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bond/x64/src/hal/inc/hal_arch.h

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Set up interrupt dispatching Set up APIC. Timer setup atrociously close. Bochs keeps giving the god damn triple fault (IDT broken)??
2016-06-13 04:11:38 +00:00
#ifndef _HAL_ARCH_H_
#define _HAL_ARCH_H_
#include "k_def.h"
Interrupt working (Except that I need to remap PIC). 1. Fix a stupid mistake in idt dispatch table (IDT_ENTRY_NUM instead of IDT_ENTRY_SIZE)! 2. Figured out that before enabling APIC, the PIC is not completely disabled/remapped. Took hours to debug why immediately after enabling interrupt, a double fault happens when executing "mov eax, 0". Turned out that PIC maps timer interrupt to int vet 8, which is double fault in the vector table. The double fault normally pushes an error code 0, the ISR is expecting the error code but the timer interrupt does not push an error code thereby screwing up the interrupt stack completely. The kernel runs normally after "sti" after changing the int 8 vector to just "iretq". (Remapping the PIC: http://wiki.osdev.org/I_Cant_Get_Interrupts_Working#I.27m_receiving_EXC9_instead_of_IRQ1_when_striking_a_key_.3F.21). Oh FML, hours wasted..
2016-06-14 06:33:31 +00:00
typedef struct
Set up interrupt dispatching Set up APIC. Timer setup atrociously close. Bochs keeps giving the god damn triple fault (IDT broken)??
2016-06-13 04:11:38 +00:00
{
uint16_t limit;
uint64_t base;
Interrupt working (Except that I need to remap PIC). 1. Fix a stupid mistake in idt dispatch table (IDT_ENTRY_NUM instead of IDT_ENTRY_SIZE)! 2. Figured out that before enabling APIC, the PIC is not completely disabled/remapped. Took hours to debug why immediately after enabling interrupt, a double fault happens when executing "mov eax, 0". Turned out that PIC maps timer interrupt to int vet 8, which is double fault in the vector table. The double fault normally pushes an error code 0, the ISR is expecting the error code but the timer interrupt does not push an error code thereby screwing up the interrupt stack completely. The kernel runs normally after "sti" after changing the int 8 vector to just "iretq". (Remapping the PIC: http://wiki.osdev.org/I_Cant_Get_Interrupts_Working#I.27m_receiving_EXC9_instead_of_IRQ1_when_striking_a_key_.3F.21). Oh FML, hours wasted..
2016-06-14 06:33:31 +00:00
} __attribute__ ((packed)) hal_gdt_ptr_t;
Set up interrupt dispatching Set up APIC. Timer setup atrociously close. Bochs keeps giving the god damn triple fault (IDT broken)??
2016-06-13 04:11:38 +00:00
Interrupt working (Except that I need to remap PIC). 1. Fix a stupid mistake in idt dispatch table (IDT_ENTRY_NUM instead of IDT_ENTRY_SIZE)! 2. Figured out that before enabling APIC, the PIC is not completely disabled/remapped. Took hours to debug why immediately after enabling interrupt, a double fault happens when executing "mov eax, 0". Turned out that PIC maps timer interrupt to int vet 8, which is double fault in the vector table. The double fault normally pushes an error code 0, the ISR is expecting the error code but the timer interrupt does not push an error code thereby screwing up the interrupt stack completely. The kernel runs normally after "sti" after changing the int 8 vector to just "iretq". (Remapping the PIC: http://wiki.osdev.org/I_Cant_Get_Interrupts_Working#I.27m_receiving_EXC9_instead_of_IRQ1_when_striking_a_key_.3F.21). Oh FML, hours wasted..
2016-06-14 06:33:31 +00:00
typedef struct
Set up interrupt dispatching Set up APIC. Timer setup atrociously close. Bochs keeps giving the god damn triple fault (IDT broken)??
2016-06-13 04:11:38 +00:00
{
uint16_t limit;
uint64_t base;
Interrupt working (Except that I need to remap PIC). 1. Fix a stupid mistake in idt dispatch table (IDT_ENTRY_NUM instead of IDT_ENTRY_SIZE)! 2. Figured out that before enabling APIC, the PIC is not completely disabled/remapped. Took hours to debug why immediately after enabling interrupt, a double fault happens when executing "mov eax, 0". Turned out that PIC maps timer interrupt to int vet 8, which is double fault in the vector table. The double fault normally pushes an error code 0, the ISR is expecting the error code but the timer interrupt does not push an error code thereby screwing up the interrupt stack completely. The kernel runs normally after "sti" after changing the int 8 vector to just "iretq". (Remapping the PIC: http://wiki.osdev.org/I_Cant_Get_Interrupts_Working#I.27m_receiving_EXC9_instead_of_IRQ1_when_striking_a_key_.3F.21). Oh FML, hours wasted..
2016-06-14 06:33:31 +00:00
} __attribute__ ((packed)) hal_idt_ptr_t;
Set up interrupt dispatching Set up APIC. Timer setup atrociously close. Bochs keeps giving the god damn triple fault (IDT broken)??
2016-06-13 04:11:38 +00:00
extern uint64_t KAPI hal_interlocked_exchange(uint64_t *dst, uint64_t val);
extern void KAPI hal_cpuid(uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx);
#define MSR_IA32_APIC_BASE 0x1B
extern void KAPI hal_read_msr(uint32_t *ecx, uint32_t *edx, uint32_t *eax);
extern void KAPI hal_write_msr(uint32_t *ecx, uint32_t *edx, uint32_t *eax);
extern void KAPI hal_enable_interrupt();
extern void KAPI hal_disable_interrupt();
extern void KAPI hal_halt_cpu();
Push missing write/read ports w/ diff operand sizes.
2016-06-14 06:57:38 +00:00
extern int8_t KAPI hal_read_port_8(uint16_t port);
Set up interrupt dispatching Set up APIC. Timer setup atrociously close. Bochs keeps giving the god damn triple fault (IDT broken)??
2016-06-13 04:11:38 +00:00
Push missing write/read ports w/ diff operand sizes.
2016-06-14 06:57:38 +00:00
extern int16_t KAPI hal_read_port_16(uint16_t port);
extern int32_t KAPI hal_read_port_32(uint16_t port);
extern void KAPI hal_write_port_8(uint16_t port, uint8_t data);
extern void KAPI hal_write_port_16(uint16_t port, uint16_t data);
extern void KAPI hal_write_port_32(uint16_t port, uint32_t data);
Set up interrupt dispatching Set up APIC. Timer setup atrociously close. Bochs keeps giving the god damn triple fault (IDT broken)??
2016-06-13 04:11:38 +00:00
extern void KAPI hal_write_mem_32(void* target, uint32_t data);
extern void KAPI hal_write_mem_64(void* target, uint64_t data);
extern void KAPI hal_flush_gdt(hal_gdt_ptr_t *gdt_ptr, uint64_t code_slct, uint64_t data_slct);
extern void KAPI hal_flush_tlb();
#define hal_trigger_interrupt(x) __asm__ __volatile__ ("int "#x);
extern void KAPI hal_flush_idt(hal_idt_ptr_t *idt_ptr);
Interrupt working (Except that I need to remap PIC). 1. Fix a stupid mistake in idt dispatch table (IDT_ENTRY_NUM instead of IDT_ENTRY_SIZE)! 2. Figured out that before enabling APIC, the PIC is not completely disabled/remapped. Took hours to debug why immediately after enabling interrupt, a double fault happens when executing "mov eax, 0". Turned out that PIC maps timer interrupt to int vet 8, which is double fault in the vector table. The double fault normally pushes an error code 0, the ISR is expecting the error code but the timer interrupt does not push an error code thereby screwing up the interrupt stack completely. The kernel runs normally after "sti" after changing the int 8 vector to just "iretq". (Remapping the PIC: http://wiki.osdev.org/I_Cant_Get_Interrupts_Working#I.27m_receiving_EXC9_instead_of_IRQ1_when_striking_a_key_.3F.21). Oh FML, hours wasted..
2016-06-14 06:33:31 +00:00
extern void KAPI hal_read_idt(hal_idt_ptr_t **idt_ptr);
Set up interrupt dispatching Set up APIC. Timer setup atrociously close. Bochs keeps giving the god damn triple fault (IDT broken)??
2016-06-13 04:11:38 +00:00
extern void KAPI hal_write_cr3(uint64_t base);
extern uint64_t KAPI hal_read_cr3();
#endif
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