2016-05-22 01:54:29 +00:00
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#ifndef _HAL_MEM_H_
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#define _HAL_MEM_H_
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2018-01-26 08:43:22 +00:00
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#include "type.h"
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#include "kernel/hal/mem.h"
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/**
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Global Descriptors Table Definitions
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**/
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2016-05-22 01:54:29 +00:00
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2016-06-13 04:11:38 +00:00
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#define GDT_ENTRY_SIZE 8
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#define GDT_ENTRY_NUM 9
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2018-01-26 08:43:22 +00:00
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#define SEG_GRANULARITY (1ull << 55)
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#define SEG_LONG (1ull << 53)
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#define SEG_DPL_0 (0ull << 45)
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#define SEG_DPL_1 (1ull << 45)
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#define SEG_DPL_2 (2ull << 45)
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#define SEG_DPL_3 (3ull << 45)
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#define SEG_PRESENT (1ull << 47)
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#define SEG_CODE_DATA (1ull << 44)
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#define SEG_TYPE_DATA_RW (2ull << 40)
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#define SEG_TYPE_DATA_R (0ull << 40)
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#define SEG_TYPE_CODE_X (8ull << 40)
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#define SEG_TYPE_CODE_XR (10ull << 40)
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#define SEG_TYPE_CODE_XC (12ull << 40)
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#define SEG_TYPE_CODE_XRC (14ull << 40)
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#define SEG_AVAILABLE (1ull << 52)
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#define SEG_32_BITS (1ull << 54)
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2016-05-22 01:54:29 +00:00
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2018-01-26 08:43:22 +00:00
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/**
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Page Table Definitions
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**/
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2015-09-01 17:37:58 +00:00
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2015-02-04 08:43:01 +00:00
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#define PML4_PRESENT (1ull << 0)
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#define PML4_WRITE (1ull << 1)
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#define PML4_USER (1ull << 2)
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#define PML4_WRITE_THROUGH (1ull << 3)
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#define PML4_CACHE_DISABLED (1ull << 4)
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#define PML4_ACCESSED (1ull << 5)
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#define PML4_EXECUTION_DISABLED (1ull << 63)
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2015-02-04 07:55:38 +00:00
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2015-02-04 08:43:01 +00:00
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#define PDPT_PRESENT (1ull << 0)
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#define PDPT_WRITE (1ull << 1)
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#define PDPT_USER (1ull << 2)
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#define PDPT_WRITE_THROUGH (1ull << 3)
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#define PDPT_CACHE_DISABLED (1ull << 4)
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#define PDPT_ACCESSED (1ull << 5)
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#define PDPT_EXECUTION_DISABLED (1ull << 63)
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2015-02-04 07:55:38 +00:00
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2015-02-04 08:43:01 +00:00
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#define PD_PRESENT (1ull << 0)
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#define PD_WRITE (1ull << 1)
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#define PD_USER (1ull << 2)
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#define PD_WRITE_THROUGH (1ull << 3)
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#define PD_CACHE_DISABLED (1ull << 4)
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#define PD_ACCESSED (1ull << 5)
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#define PD_EXECUTION_DISABLED (1ull << 63)
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2015-02-04 07:55:38 +00:00
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2015-02-04 08:43:01 +00:00
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#define PT_PRESENT (1ull << 0)
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#define PT_WRITE (1ull << 1)
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#define PT_USER (1ull << 2)
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#define PT_WRITE_THROUGH (1ull << 3)
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#define PT_CACHE_DISABLED (1ull << 4)
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#define PT_ACCESSED (1ull << 5)
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#define PT_DIRTY (1ull << 6)
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#define PT_ATTRIBUTE_TABLE (1ull << 7)
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#define PT_GLOBAL (1ull << 8)
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#define PT_EXECUTION_DISABLED (1ull << 63)
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2015-02-04 07:55:38 +00:00
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2018-02-12 03:26:03 +00:00
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#define PML4_ENTRY_NUM(vaddr) (((vaddr) >> 39) & 0x1FF)
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#define PDPT_ENTRY_NUM(vaddr) (((vaddr) >> 30) & 0x1FF)
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#define PD_ENTRY_NUM(vaddr) (((vaddr) >> 21) & 0x1FF)
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#define PT_ENTRY_NUM(vaddr) (((vaddr) >> 12) & 0x1FF)
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2015-02-06 08:21:11 +00:00
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2018-02-14 07:31:50 +00:00
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static inline uint32_t KABI seg_selector(uint32_t index, uint32_t rpl)
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{
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return (index << 3) + rpl;
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}
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void KABI hal_write_segment_descriptor(void *const gdt, uint32_t const base, uint32_t const limit, uint64_t const attr);
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2018-02-08 19:51:29 +00:00
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void KABI hal_write_pml4(void *const base, uintptr_t const pdpt_addr, uint64_t const attr);
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2015-09-05 21:14:04 +00:00
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2018-02-08 19:51:29 +00:00
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void KABI hal_write_pdpt(void *const base, uintptr_t const pd_addr, uint64_t const attr);
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2015-02-01 22:14:44 +00:00
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2018-02-08 19:51:29 +00:00
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void KABI hal_write_pd(void *const base, uintptr_t const pt_addr, uint64_t const attr);
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2015-04-16 21:46:54 +00:00
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2018-02-08 19:51:29 +00:00
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void KABI hal_write_pt(void *const base, uintptr_t const p_addr, uint64_t const attr);
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2015-04-16 21:46:54 +00:00
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2015-02-01 22:14:44 +00:00
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2018-01-26 08:43:22 +00:00
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/**
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Function Defn
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**/
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2015-02-01 22:14:44 +00:00
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2018-01-26 08:43:22 +00:00
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void *KABI halloc(uint32_t size);
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2015-02-01 22:14:44 +00:00
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2018-01-26 08:43:22 +00:00
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void KABI hfree(void *ptr);
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2016-05-17 19:03:18 +00:00
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2018-02-07 05:42:59 +00:00
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void KABI hal_mem_init(void);
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2015-02-01 22:14:44 +00:00
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2018-01-26 08:43:22 +00:00
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#endif
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