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Refactor_2

This commit is contained in:
unknown 2015-04-20 17:19:06 -07:00
parent 6321366a24
commit 056a79709d
18 changed files with 271 additions and 238 deletions
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8
x64/src/asm/io.asm → x64/src/asm/hal/io.asm
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@ -1,8 +1,8 @@
global write_port
global read_port
global hal_write_port
global hal_read_port
[SECTION .text]
[BITS 64]
write_port:
hal_write_port:
mov rdx,rdi
mov rax,rsi
out dx,eax
@ -10,7 +10,7 @@ nop
nop
ret
read_port:
hal_read_port:
mov rdx,rdi
xor rax,rax
in eax,dx

6
x64/src/asm/mem.asm → x64/src/asm/hal/mem.asm
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@ -7,7 +7,7 @@ global cpuid
[SECTION .text]
[BITS 64]
flush_gdt:
hal_flush_gdt:
push rbp
mov rbp,rsp
lgdt [rdi]
@ -33,14 +33,14 @@ pop rbp
ret
;void flush_tlb(void)
flush_tlb:
hal_flush_tlb:
mov rax,cr3
mov cr3,rax
ret
;void get_cpuid(int64_t* rax, int64_t* rbx, int64_t* rcx, int64_t* rdx)
cpuid:
hal_cpuid:
mov rax,[rdi]
push rcx
mov rcx,[rdx]

38
x64/src/c/common/sys/mem.c Normal file
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@ -0,0 +1,38 @@
#include "../type.h"
#include "../kdef.h"
#include "mem.h"
void NATIVE64 mem_copy(void *src, void *dst, uint64_t size)
{
if (src == NULL || dst == NULL)
return;
char* cSrc = (char*)src;
char* cDst = (char*)dst;
while (size--)
*(cDst++) = *(cSrc++);
return;
}
void NATIVE64 mem_set(void *src, int8_t const val, uint64_t size)
{
if (src == NULL)
return;
while (size--)
*((int8_t*)src++) = val;
return;
}
void NATIVE64 mem_move(void *src, void *dst, uint64_t size)
{
if (src == NULL || dst == NULL)
return;
if (src >= dst)
{
return mem_copy(src, dst, size);
}
src += size;
dst += size;
while (size--)
*((char*)--dst) = *((char*)--src);
return;
}

13
x64/src/c/common/sys/mem.h Normal file
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@ -0,0 +1,13 @@
#ifndef _HAL_MEM_H_
#define _HAL_MEM_H_
#include "../type.h"
#include "../kdef.h"
void NATIVE64 mem_copy(void *src, void *dst, uint64_t size);
void NATIVE64 mem_move(void *src, void *dst, uint64_t size);
void NATIVE64 mem_set(void *src, int8_t const val, uint64_t size);
#endif

29
x64/src/c/common/sys/str.c Normal file
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@ -0,0 +1,29 @@
#include "str.h"
uint64_t NATIVE64 str_len(char const *str)
{
uint64_t length = 0;
if(str == NULL)
return 0;
while(*str != 0)
{
str++;
length++;
}
return length;
}
uint64_t NATIVE64 str_cmp(char const *str1, char const *str2)
{
if(str1 == NULL || str2 == NULL)
return 0;
uint64_t length = str_len(str1);
if(length != str_len(str2))
return 0;
while(length--)
{
if(*(str1+length) != *(str2+length))
return 0;
}
return 1;
}

10
x64/src/c/common/sys/str.h Normal file
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@ -0,0 +1,10 @@
#ifndef _STR_H_
#define _STR_H_
#include "../kdef.h"
#include "../type.h"
uint64_t NATIVE64 str_len(char const *str);
uint64_t NATIVE64 str_cmp(char const *str1, char const *str2);
#endif

2
x64/src/c/util/linked_list.c → x64/src/c/common/util/list/linked_list/linked_list.c
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@ -1,4 +1,4 @@
#include "../common/kdef.h"
#include "../../../kdef.h"
#include "linked_list.h"
void NATIVE64 linked_list_node_init(linked_list_node* node)

2
x64/src/c/util/linked_list.h → x64/src/c/common/util/list/linked_list/linked_list.h
View File

@ -1,6 +1,6 @@
#ifndef _LINKED_LIST_H_
#define _LINKED_LIST_H_
#include "../common/kdef.h"
#include "../../../kdef.h"
typedef struct _linked_list_node
{
struct _linked_list_node* prev;

2
x64/src/c/util/avl_tree.c → x64/src/c/common/util/tree/avl_tree/avl_tree.c
View File

@ -1,4 +1,4 @@
#include "../common/kdef.h"
#include "../../../kdef.h"
#include "avl_tree.h"
#define MAX(a, b) (((a) > (b) ? (a) : (b)))

2
x64/src/c/util/avl_tree.h → x64/src/c/common/util/tree/avl_tree/avl_tree.h
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@ -1,6 +1,6 @@
#ifndef _AVL_TREE_H_
#define _AVL_TREE_H_
#include "../common/kdef.h"
#include "../../../kdef.h"
typedef struct __attribute__((packed)) _avl_tree_node
{

69
x64/src/c/hal/hal.c Normal file
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@ -0,0 +1,69 @@
#include "hal.h"
#include "multiboot.h"
#include "print.h"
#include "mem.h"
uint8_t g_gdt[8*9];
uint8_t g_idt[21*16];
gdt_ptr_t g_gdt_ptr;
extern uint64_t text_pos;
void NATIVE64 hal_init(multiboot_info_t* m_info)
{
text_pos = get_pos(3, 0);
hal_printf("*Setting up GDT...");
hal_write_segment_descriptor((void *) &g_gdt[0], 0, 0, 0);
hal_write_segment_descriptor((void *) &g_gdt[8], 0, 0, SEG_DPL_0 | SEG_CODE_DATA | SEG_PRESENT | SEG_LONG | SEG_TYPE_CODE_X);
hal_write_segment_descriptor((void *) &g_gdt[16], 0, 0, SEG_DPL_0 | SEG_CODE_DATA | SEG_PRESENT | SEG_LONG | SEG_TYPE_DATA_RW);
hal_write_segment_descriptor((void *) &g_gdt[24], 0, 0, SEG_DPL_3 | SEG_CODE_DATA | SEG_PRESENT | SEG_LONG | SEG_TYPE_CODE_X);
hal_write_segment_descriptor((void *) &g_gdt[32], 0, 0, SEG_DPL_3 | SEG_CODE_DATA | SEG_PRESENT | SEG_LONG | SEG_TYPE_DATA_RW);
hal_write_segment_descriptor((void *) &g_gdt[40], 0, 0xFFFFF, SEG_DPL_0 | SEG_GRANULARITY | SEG_CODE_DATA | SEG_PRESENT | SEG_32_BITS | SEG_TYPE_CODE_X);
hal_write_segment_descriptor((void *) &g_gdt[48], 0, 0xFFFFF, SEG_DPL_0 | SEG_GRANULARITY | SEG_CODE_DATA | SEG_PRESENT | SEG_32_BITS | SEG_TYPE_DATA_RW);
hal_write_segment_descriptor((void *) &g_gdt[56], 0, 0xFFFFF, SEG_DPL_3 | SEG_GRANULARITY | SEG_CODE_DATA | SEG_PRESENT | SEG_32_BITS | SEG_TYPE_CODE_X);
hal_write_segment_descriptor((void *) &g_gdt[64], 0, 0xFFFFF, SEG_DPL_3 | SEG_GRANULARITY | SEG_CODE_DATA | SEG_PRESENT | SEG_32_BITS | SEG_TYPE_DATA_RW);
g_gdt_ptr.base = (uint64_t)g_gdt;
g_gdt_ptr.limit = 8*9-1;
hal_flush_gdt(&g_gdt_ptr, SEG_SELECTOR(1, 0), SEG_SELECTOR(2, 0));
hal_printf("Done.\n\n");
hal_printf("*Checking memory information...\n");
if(m_info->flags & (1 << 6))
{
multiboot_memory_map_t const *mem_map = (multiboot_memory_map_t *) m_info->mmap_addr;
uint64_t const mem_map_size = m_info->mmap_length / sizeof(multiboot_memory_map_t);
hal_printf("BaseAddr - Length - Type\n");
uint64_t total_available_mem = 0;
uint64_t total_reserved_mem = 0;
for (int i = 0; i < mem_map_size; i++)
{
hal_printf("0x%X - 0x%X - 0x%x\n", (mem_map + i)->addr, (mem_map + i)->len, (mem_map + i)->type);
if((mem_map + i)->type == MULTIBOOT_MEMORY_RESERVED)
{
total_reserved_mem += (mem_map + i)->len;
}
else if ((mem_map + i)->type == MULTIBOOT_MEMORY_AVAILABLE)
{
total_available_mem += (mem_map + i)->len;
}
}
hal_printf("Total available memory: %uB, %uKB, %uMB.\n", total_available_mem, total_available_mem / 1024,
total_available_mem / 1024 / 1024);
hal_printf("Total reserved memory: %uB, %uKB, %uMB.\n\n", total_reserved_mem, total_reserved_mem / 1024,
total_reserved_mem / 1024 / 1024);
}
else
{
hal_printf("Memory information is currently unavailable.\n\n");
}
hal_printf("CPUIDing \n");
cpuid_t cpuid_info;
cpuid_info.eax = 1;
cpuid_info.ebx = 0;
cpuid_info.ecx = 0;
cpuid_info.edx = 0;
hal_cpuid(&cpuid_info.eax,&cpuid_info.ebx,&cpuid_info.ecx,&cpuid_info.edx);
if(cpuid_info.edx & 1 << 9)
{
hal_printf("AIPC detected...");
}
}

16
x64/src/c/hal/api.h → x64/src/c/hal/hal.h
View File

@ -1,8 +1,9 @@
#ifndef HAL_API_H
#define HAL_API_H
#ifndef _HAL_HAL_H_
#define _HAL_HAL_H_
#include "../common/kdef.h"
#include "../common/type.h"
#include "multiboot.h"
//INTERRUPT
void NATIVE64 hal_set_interrupt_handler(uint64_t index, void (*handler)(void));
void NATIVE64 hal_enable_interrupt();
@ -13,6 +14,13 @@ extern void NATIVE64 hal_spin_lock(uint32_t * lock);
extern void NATIVE64 hal_spin_unlock(uint32_t * lock);
//output
void NATIVE64 hal_printf();
void NATIVE64 hal_printf(char const *format, ...);
//inti
void NATIVE64 hal_init(multiboot_info_t* m_info);
//debug
extern void NATIVE64 HLT_CPU(void);
extern void NATIVE64 BOCHS_MAGIC_BREAKPOINT();
#endif

8
x64/src/c/hal/io.h
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@ -1,7 +1,7 @@
#ifndef _IO_H_
#define _IO_H_
#ifndef _HAL_IO_H_
#define _HAL_IO_H_
#include "../common/kdef.h"
#include "../common/type.h"
extern void NATIVE64 write_port(uint64_t port, int64_t data);
extern int64_t NATIVE64 read_port(uint64_t port);
extern void NATIVE64 hal_write_port(uint64_t port, int64_t data);
extern int64_t NATIVE64 hal_read_port(uint64_t port);
#endif

129
x64/src/c/hal/mm.c → x64/src/c/hal/mem.c
View File

@ -1,12 +1,12 @@
#include "../common/kdef.h"
#include "../common/type.h"
#include "mm.h"
#include "mem.h"
#define kernel_heap_size 4096
char* _cur_heap = NULL;
extern char kernel_heap[kernel_heap_size];
void NATIVE64 write_pt_entry(void *const base, uint64_t const p_addr, uint64_t const attr)
void NATIVE64 hal_write_pt_entry(void *const base, uint64_t const p_addr, uint64_t const attr)
{
if(base == NULL)
return;
@ -22,7 +22,7 @@ void NATIVE64 write_pt_entry(void *const base, uint64_t const p_addr, uint64_t c
return;
}
void NATIVE64 write_pd_entry(void *const base, uint64_t const pt_addr, uint64_t const attr)
void NATIVE64 hal_write_pd_entry(void *const base, uint64_t const pt_addr, uint64_t const attr)
{
if(base == NULL)
return;
@ -38,7 +38,7 @@ void NATIVE64 write_pd_entry(void *const base, uint64_t const pt_addr, uint64_t
return;
}
void NATIVE64 write_pdpt_entry(void *const base, uint64_t const pd_addr, uint64_t const attr)
void NATIVE64 hal_write_pdpt_entry(void *const base, uint64_t const pd_addr, uint64_t const attr)
{
if(base == NULL)
return;
@ -54,7 +54,7 @@ void NATIVE64 write_pdpt_entry(void *const base, uint64_t const pd_addr, uint64_
return;
}
void NATIVE64 write_pml4_entry(void *const base, uint64_t const pdpt_addr, uint64_t const attr)
void NATIVE64 hal_write_pml4_entry(void *const base, uint64_t const pdpt_addr, uint64_t const attr)
{
if(base == NULL)
return;
@ -70,7 +70,7 @@ void NATIVE64 write_pml4_entry(void *const base, uint64_t const pdpt_addr, uint6
return;
}
void NATIVE64 write_gate(void *const gate, uint64_t const offset, uint32_t const selector, uint32_t const attr)
void NATIVE64 hal_write_gate(void *const gate, uint64_t const offset, uint32_t const selector, uint32_t const attr)
{
((uint8_t*)gate)[0] = (uint8_t)(offset & 0xFF);
((uint8_t*)gate)[1] = (uint8_t)((offset >> 8) & 0xFF);
@ -91,7 +91,7 @@ void NATIVE64 write_gate(void *const gate, uint64_t const offset, uint32_t const
return;
}
void NATIVE64 write_segment_descriptor(void *const gdt, uint32_t const base, uint32_t const limit, uint64_t const attr)
void NATIVE64 hal_write_segment_descriptor(void *const gdt, uint32_t const base, uint32_t const limit, uint64_t const attr)
{
if (gdt == NULL)
return;
@ -106,83 +106,48 @@ void NATIVE64 write_segment_descriptor(void *const gdt, uint32_t const base, uin
((uint8_t*)gdt)[7] = (uint8_t)((seg_desc >> 56) & 0xFF);
return;
}
uint64_t NATIVE64 map_page(void *const base, uint64_t const p_addr, uint64_t const v_addr, uint64_t const attr, uint64_t const availableRam)
{
//wait a sec, we actually need maximum memory information here for effectively map crap
if(base == NULL || p_addr << 52 || v_addr << 52)
return 0;
//ASSUME: little endian
//All of the following should be 4K-aliened
uint64_t const pml4_index = (v_addr >> 39) & 0x1FF;
uint64_t const pdpt_index = (v_addr >> 30) & 0x1FF;
uint64_t const pd_index = (v_addr >> 21) & 0x1FF;
uint64_t const pt_index = (v_addr >> 12) & 0x1FF;
//
// void * const pml4_entry_addr = (void*)((uint64_t*) base + pml4_index);
// if(!(*(uint64_t*)pml4_entry_addr & PML4_PRESENT))
// {
// //PML4 does not exist
// write_pml4_entry(pml4_entry_addr, (uint64_t)((uint64_t*)pdpt_base + pml4_index * 512), PML4_PRESENT | PML4_WRITE);
// }
// uint64_t const pml4_entry = *(uint64_t*)pml4_entry_addr;
//uint64_t NATIVE64 map_page(void *const base, uint64_t const p_addr, uint64_t const v_addr, uint64_t const attr, uint64_t const availableRam)
//{
// //wait a sec, we actually need maximum memory information here for effectively map crap
// if(base == NULL || p_addr << 52 || v_addr << 52)
// return 0;
// //ASSUME: little endian
// //All of the following should be 4K-aliened
//
// void * const pdpt_entry_addr = (void*)((uint64_t*) PAGE_ENTRY_BASE(pml4_entry) + pdpt_index);
// if(!(*(uint64_t*) pdpt_entry_addr & PDPT_PRESENT))
// {
// write_pdpt_entry(pdpt_entry_addr, (uint64_t)((uint64_t*)pd_base + pml4_index * 512 * 512 + pdpt_index * 512), PDPT_PRESENT | PDPT_WRITE);
// }
// uint64_t const pdpt_entry = *(uint64_t*)pdpt_entry_addr;
//
// void * const pd_entry_addr = (void*)((uint64_t*) PAGE_ENTRY_BASE(pdpt_entry) + pd_index);
// if(!(*(uint64_t*) pd_entry_addr & PD_PRESENT))
// {
// write_pd_entry(pd_entry_addr, (uint64_t)((uint64_t*)pt_base + pml4_index * 512 * 512 * 512 + pdpt_index * 512 * 512 + pd_index*512), PD_PRESENT | PD_WRITE);
// }
// uint64_t const pd_entry = *(uint64_t*)pd_entry_addr;
//
// void * const pt_entry_addr = (void*)((uint64_t*) PAGE_ENTRY_BASE(pd_entry) + pt_index);
// write_pt_entry(pt_entry_addr, p_addr, attr);
return 0;
}
// uint64_t const pml4_index = (v_addr >> 39) & 0x1FF;
// uint64_t const pdpt_index = (v_addr >> 30) & 0x1FF;
// uint64_t const pd_index = (v_addr >> 21) & 0x1FF;
// uint64_t const pt_index = (v_addr >> 12) & 0x1FF;
////
//// void * const pml4_entry_addr = (void*)((uint64_t*) base + pml4_index);
//// if(!(*(uint64_t*)pml4_entry_addr & PML4_PRESENT))
//// {
//// //PML4 does not exist
//// write_pml4_entry(pml4_entry_addr, (uint64_t)((uint64_t*)pdpt_base + pml4_index * 512), PML4_PRESENT | PML4_WRITE);
//// }
//// uint64_t const pml4_entry = *(uint64_t*)pml4_entry_addr;
////
//// void * const pdpt_entry_addr = (void*)((uint64_t*) PAGE_ENTRY_BASE(pml4_entry) + pdpt_index);
//// if(!(*(uint64_t*) pdpt_entry_addr & PDPT_PRESENT))
//// {
//// write_pdpt_entry(pdpt_entry_addr, (uint64_t)((uint64_t*)pd_base + pml4_index * 512 * 512 + pdpt_index * 512), PDPT_PRESENT | PDPT_WRITE);
//// }
//// uint64_t const pdpt_entry = *(uint64_t*)pdpt_entry_addr;
////
//// void * const pd_entry_addr = (void*)((uint64_t*) PAGE_ENTRY_BASE(pdpt_entry) + pd_index);
//// if(!(*(uint64_t*) pd_entry_addr & PD_PRESENT))
//// {
//// write_pd_entry(pd_entry_addr, (uint64_t)((uint64_t*)pt_base + pml4_index * 512 * 512 * 512 + pdpt_index * 512 * 512 + pd_index*512), PD_PRESENT | PD_WRITE);
//// }
//// uint64_t const pd_entry = *(uint64_t*)pd_entry_addr;
////
//// void * const pt_entry_addr = (void*)((uint64_t*) PAGE_ENTRY_BASE(pd_entry) + pt_index);
//// write_pt_entry(pt_entry_addr, p_addr, attr);
// return 0;
//}
void NATIVE64 mem_cpy(void *src, void *dst, uint64_t size)
{
if (src == NULL || dst == NULL)
return;
char* cSrc = (char*)src;
char* cDst = (char*)dst;
while (size--)
*(cDst++) = *(cSrc++);
return;
}
void NATIVE64 mem_set(void *src, int8_t const val, uint64_t size)
{
if (src == NULL)
return;
while (size--)
*((int8_t*)src++) = val;
return;
}
void NATIVE64 mem_move(void *src, void *dst, uint64_t size)
{
if (src == NULL || dst == NULL)
return;
if (src >= dst)
{
return mem_cpy(src, dst, size);
}
src += size;
dst += size;
while (size--)
*((char*)--dst) = *((char*)--src);
return;
}
void*NATIVE64 kmalloc(size_t const size)
void*NATIVE64 hal_halloc(size_t const size)
{
if(_cur_heap == NULL)
_cur_heap = kernel_heap;
@ -195,7 +160,7 @@ void*NATIVE64 kmalloc(size_t const size)
return NULL;
}
void NATIVE64 kfree(void* ptr)
void NATIVE64 hal_hfree(void *ptr)
{
return;
}

29
x64/src/c/hal/mm.h → x64/src/c/hal/mem.h
View File

@ -85,33 +85,26 @@ typedef struct __attribute__((packed))
uint64_t edx;
} cpuid_t;
void*NATIVE64 kmalloc(size_t const size);
void NATIVE64 kfree(void* ptr);
void*NATIVE64 hal_halloc(size_t const size);
extern void NATIVE64 flush_gdt(gdt_ptr_t *gdt_ptr, uint64_t code_slct, uint64_t data_slct);
void NATIVE64 hal_hfree(void *ptr);
extern void NATIVE64 flush_tlb();
extern void NATIVE64 hal_flush_gdt(gdt_ptr_t *gdt_ptr, uint64_t code_slct, uint64_t data_slct);
extern void NATIVE64 cpuid(uint64_t * eax, uint64_t * ebx, uint64_t* ecx, uint64_t* edx);
extern void NATIVE64 hal_flush_tlb();
void NATIVE64 write_segment_descriptor(void *const gdt, uint32_t const base, uint32_t const limit, uint64_t const attr);
extern void NATIVE64 hal_cpuid(uint64_t * eax, uint64_t * ebx, uint64_t* ecx, uint64_t* edx);
//extern void NATIVE64 hk_load_gdt(gdt_ptr_t const *const ptr, uint16_t const sel_code, uint16_t const sel_data);
void NATIVE64 hal_write_segment_descriptor(void *const gdt, uint32_t const base, uint32_t const limit, uint64_t const attr);
void NATIVE64 mem_cpy(void *src, void *dst, uint64_t size);
void NATIVE64 hal_write_pml4_entry(void *const base, uint64_t const pdpt_addr, uint64_t const attr);
void NATIVE64 mem_move(void *src, void *dst, uint64_t size);
void NATIVE64 hal_write_pdpt_entry(void *const base, uint64_t const pd_addr, uint64_t const attr);
void NATIVE64 mem_set(void *src, int8_t const val, uint64_t size);
void NATIVE64 hal_write_pd_entry(void *const base, uint64_t const pt_addr, uint64_t const attr);
void NATIVE64 write_pml4_entry(void *const base, uint64_t const pdpt_addr, uint64_t const attr);
void NATIVE64 hal_write_pt_entry(void *const base, uint64_t const p_addr, uint64_t const attr);
void NATIVE64 write_pdpt_entry(void *const base, uint64_t const pd_addr, uint64_t const attr);
void NATIVE64 write_pd_entry(void *const base, uint64_t const pt_addr, uint64_t const attr);
void NATIVE64 write_pt_entry(void *const base, uint64_t const p_addr, uint64_t const attr);
void NATIVE64 write_gate(void *const gate, uint64_t const offset, uint32_t const selector, uint32_t const attr);
void NATIVE64 hal_write_gate(void *const gate, uint64_t const offset, uint32_t const selector, uint32_t const attr);
#endif

72
x64/src/c/hal/print.c
View File

@ -1,46 +1,18 @@
#include <stdarg.h>
#include "../common/kdef.h"
#include "../common/type.h"
#include "mm.h"
#include "../common/sys/mem.h"
#include "print.h"
uint64_t text_pos;
uint64_t NATIVE64 str_len(char const *str)
{
uint64_t length = 0;
if(str == NULL)
return 0;
while(*str != 0)
{
str++;
length++;
}
return length;
}
uint64_t NATIVE64 str_cmp(char const *str1, char const *str2)
{
if(str1 == NULL || str2 == NULL)
return 0;
uint64_t length = str_len(str1);
if(length != str_len(str2))
return 0;
while(length--)
{
if(*(str1+length) != *(str2+length))
return 0;
}
return 1;
}
void NATIVE64 _print_scroll()
void NATIVE64 _hal_print_scroll()
{
mem_move((void *) (0xb8000 + get_pos(1, 0) * 2), (void *) (0xb8000 + get_pos(0, 0) * 2), (80 * 24) * 2);
return;
}
void NATIVE64 _print_str(char const *str)
void NATIVE64 _hal_print_str(char const *str)
{
if(str == NULL)
return;
@ -52,7 +24,7 @@ void NATIVE64 _print_str(char const *str)
if(text_pos > 80 * 25 - 1)
{
//can't hold
_print_scroll();
_hal_print_scroll();
mem_set((void *) (0xb8000 + 80 * 24 * 2), 0, 80 * 2); // clear last row
text_pos = 80 * 24;
}
@ -63,7 +35,7 @@ void NATIVE64 _print_str(char const *str)
if (text_pos > 80 * 25 - 1)
{
//can't hold
_print_scroll();
_hal_print_scroll();
text_pos = 80 * 24;
}
*((char*)(0xb8000) + text_pos*2) = *str;
@ -75,7 +47,7 @@ void NATIVE64 _print_str(char const *str)
return;
}
void NATIVE64 _print_uint(uint64_t number)
void NATIVE64 _hal_print_uint(uint64_t number)
{
char arr[21]; // do not need to initialize
arr[20] = 0; //zero-terminated
@ -90,11 +62,11 @@ void NATIVE64 _print_uint(uint64_t number)
if (number == 0)
break;
}
_print_str(&(arr[index + 1]));
_hal_print_str(&(arr[index + 1]));
return;
}
void NATIVE64 _print_int(int64_t number)
void NATIVE64 _hal_print_int(int64_t number)
{
char arr[21]; // do not need to initialize
arr[20] = 0; //zero-terminated
@ -119,11 +91,11 @@ void NATIVE64 _print_int(int64_t number)
{
arr[index--] = '-';
}
_print_str(&(arr[index + 1]));
_hal_print_str(&(arr[index + 1]));
return;
}
void NATIVE64 _print_hex(uint64_t number, uint64_t capital)
void NATIVE64 _hal_print_hex(uint64_t number, uint64_t capital)
{
char const lookup_table_cap[16] = {'0', '1', '2', '3', '4', '5', '6', '7', '8', '9', 'A', 'B', 'C', 'D', 'E', 'F'};
char const lookup_table[16] = {'0', '1', '2', '3', '4', '5', '6', '7', '8', '9', 'a', 'b', 'c', 'd', 'e', 'f'};
@ -141,18 +113,18 @@ void NATIVE64 _print_hex(uint64_t number, uint64_t capital)
if (number == 0)
break;
}
_print_str(&(arr[index + 1]));
_hal_print_str(&(arr[index + 1]));
return;
}
void NATIVE64 clear_screen(void)
void NATIVE64 hal_clear_screen(void)
{
text_pos = 0; // reset text_pos
mem_set((void *) 0xb8000, 0, 25 * 80 * 2);
return;
}
void NATIVE64 kprintf(char const *format, ...)
void NATIVE64 hal_printf(char const *format, ...)
{
va_list args;
va_start(args, format);
@ -166,7 +138,7 @@ void NATIVE64 kprintf(char const *format, ...)
if (*format != '%')
{
buf[0] = *format;
_print_str(buf);
_hal_print_str(buf);
continue;
}
format++;
@ -174,36 +146,36 @@ void NATIVE64 kprintf(char const *format, ...)
{
case 'd':
d = va_arg(args, int64_t);
_print_int(d);
_hal_print_int(d);
break;
case 'u':
u = va_arg(args, uint64_t);
_print_uint(u);
_hal_print_uint(u);
break;
case 's':
s = va_arg(args, char *);
_print_str(s);
_hal_print_str(s);
break;
case 'c':
c = va_arg(args, int64_t);
buf[0] = c;
_print_str(buf);
_hal_print_str(buf);
break;
case 'x':
u = va_arg(args, uint64_t);
_print_hex(u, 0);
_hal_print_hex(u, 0);
break;
case 'X':
u = va_arg(args, uint64_t);
_print_hex(u, 1);
_hal_print_hex(u, 1);
break;
case '%':
buf[0] = '%';
_print_str(buf);
_hal_print_str(buf);
break;
default:
buf[0] = '%';
_print_str(buf);
_hal_print_str(buf);
format--;
break;
}

6
x64/src/c/hal/print.h
View File

@ -7,9 +7,7 @@
#define get_row(pos) (pos / 80)
#define get_pos(row,col) ((row) * 80 + (col))
void NATIVE64 clear_screen(void);
uint64_t NATIVE64 str_len(char const *str);
uint64_t NATIVE64 str_cmp(char const *str1, char const *str2);
void NATIVE64 kprintf(char const *format, ...);
void NATIVE64 hal_clear_screen(void);
void NATIVE64 hal_printf(char const *format, ...);
#endif

68
x64/src/c/kernel/entry.c
View File

@ -1,74 +1,12 @@
#include "../common/kdef.h"
#include "../common/type.h"
#include "../hal/print.h"
#include "../hal/mm.h"
#include "../hal/multiboot.h"
#include "../hal/hal.h"
uint8_t g_gdt[8*9];
uint8_t g_idt[21*16];
gdt_ptr_t g_gdt_ptr;
extern uint64_t text_pos;
extern char kernel_start[];
extern char kernel_end[];
extern void NATIVE64 HLT_CPU(void);
extern void NATIVE64 BOCHS_MAGIC_BREAKPOINT();
void NATIVE64 kmain(multiboot_info_t *multiboot_info)
{
text_pos = get_pos(3, 0);
kprintf("Kernel Start: 0x%X. End: 0x%X. Size: %dB, %dKB\n\n", (uint64_t) kernel_start, (uint64_t) kernel_end, (uint64_t) kernel_end - (uint64_t) kernel_start, ((uint64_t) kernel_end - (uint64_t) kernel_start) / 1024);
kprintf("*Setting up GDT...");
write_segment_descriptor((void *) &g_gdt[0], 0, 0, 0);
write_segment_descriptor((void *) &g_gdt[8], 0, 0, SEG_DPL_0 | SEG_CODE_DATA | SEG_PRESENT | SEG_LONG | SEG_TYPE_CODE_X);
write_segment_descriptor((void *) &g_gdt[16], 0, 0, SEG_DPL_0 | SEG_CODE_DATA | SEG_PRESENT | SEG_LONG | SEG_TYPE_DATA_RW);
write_segment_descriptor((void *) &g_gdt[24], 0, 0, SEG_DPL_3 | SEG_CODE_DATA | SEG_PRESENT | SEG_LONG | SEG_TYPE_CODE_X);
write_segment_descriptor((void *) &g_gdt[32], 0, 0, SEG_DPL_3 | SEG_CODE_DATA | SEG_PRESENT | SEG_LONG | SEG_TYPE_DATA_RW);
write_segment_descriptor((void *) &g_gdt[40], 0, 0xFFFFF, SEG_DPL_0 | SEG_GRANULARITY | SEG_CODE_DATA | SEG_PRESENT | SEG_32_BITS | SEG_TYPE_CODE_X);
write_segment_descriptor((void *) &g_gdt[48], 0, 0xFFFFF, SEG_DPL_0 | SEG_GRANULARITY | SEG_CODE_DATA | SEG_PRESENT | SEG_32_BITS | SEG_TYPE_DATA_RW);
write_segment_descriptor((void *) &g_gdt[56], 0, 0xFFFFF, SEG_DPL_3 | SEG_GRANULARITY | SEG_CODE_DATA | SEG_PRESENT | SEG_32_BITS | SEG_TYPE_CODE_X);
write_segment_descriptor((void *) &g_gdt[64], 0, 0xFFFFF, SEG_DPL_3 | SEG_GRANULARITY | SEG_CODE_DATA | SEG_PRESENT | SEG_32_BITS | SEG_TYPE_DATA_RW);
g_gdt_ptr.base = (uint64_t)g_gdt;
g_gdt_ptr.limit = 8*9-1;
flush_gdt(&g_gdt_ptr, SEG_SELECTOR(1, 0), SEG_SELECTOR(2, 0));
kprintf("Done.\n\n");
kprintf("*Checking memory information...\n");
if(multiboot_info->flags & (1 << 6))
{
multiboot_memory_map_t const *mem_map = (multiboot_memory_map_t *) multiboot_info->mmap_addr;
uint64_t const mem_map_size = multiboot_info->mmap_length / sizeof(multiboot_memory_map_t);
kprintf("BaseAddr - Length - Type\n");
uint64_t total_available_mem = 0;
uint64_t total_reserved_mem = 0;
for (int i = 0; i < mem_map_size; i++)
{
kprintf("0x%X - 0x%X - 0x%x\n", (mem_map + i)->addr, (mem_map + i)->len, (mem_map + i)->type);
if((mem_map + i)->type == MULTIBOOT_MEMORY_RESERVED)
{
total_reserved_mem += (mem_map + i)->len;
}
else if ((mem_map + i)->type == MULTIBOOT_MEMORY_AVAILABLE)
{
total_available_mem += (mem_map + i)->len;
}
}
kprintf("Total available memory: %uB, %uKB, %uMB.\n", total_available_mem, total_available_mem / 1024, total_available_mem / 1024 / 1024);
kprintf("Total reserved memory: %uB, %uKB, %uMB.\n\n", total_reserved_mem, total_reserved_mem / 1024, total_reserved_mem / 1024 / 1024);
}
else
{
kprintf("Memory information is currently unavailable.\n\n");
}
kprintf("CPUIDing \n");
cpuid_t cpuid_info;
cpuid_info.eax = 1;
cpuid_info.ebx = 0;
cpuid_info.ecx = 0;
cpuid_info.edx = 0;
BOCHS_MAGIC_BREAKPOINT();
cpuid(&cpuid_info.eax,&cpuid_info.ebx,&cpuid_info.ecx,&cpuid_info.edx);
if(cpuid_info.edx & 1 << 9)
{
kprintf("AIPC detected...");
}
hal_init(multiboot_info);
hal_printf("Finished setting up HAL\n");
HLT_CPU();
}