Kernel migration in progress.

build/link64.ld

@@ -1,7 +1,7 @@
 OUTPUT_FORMAT(binary)
 SECTIONS
 {
-  . = 0x100000;
+  . = 0x1000000;
   kernel_start = .;
 
   .entry :

x64/src/asm/entry.asm

@@ -1,13 +1,9 @@
 extern kmain
-global HLT_CPU
 global BOCHS_MAGIC_BREAKPOINT
 global kernel_heap
 ; IMPORTANT: This module should be 4k-page aliened
 [SECTION .entry]
 [BITS 32]
-; skip data definition
-jmp start
-
 ; MultiBoot Header
 GRUB_MAGIC equ 0x2BADB002
 MULTIBOOT_MAGIC_NUMBER equ 0x1BADB002
@@ -23,19 +19,18 @@ dd MULTIBOOT_HEADER
 dd 0
 dd 0
 dd entry_32
+MULTIBOOT_HEADER_SIZE equ ($ - MULTIBOOT_HEADER)
 
-; here we need to construct a dummy gdt as well as a dummy page table(As simple as possible, maps 1G page sounds good)
-; for page table we only need 4 gigs since that's the maximum mem one can access in protected mode(without PAE)
-; flags are hard-coded... highly not recommended but for our purpose it's enough
-; little-endian assumed
-times (4096 - 5) db 0; skip the first jmp as well as making it kernel stack, 16 bytes aliened :D
+times (8192 - MULTIBOOT_HEADER_SIZE) db 0 ;skip the header
 KERNEL_STACK:
+
+; temporary page table
 PML4_BASE:
 times 512 dq 0 ;reserved the rest for page entries
 PDPT_BASE:
 times 512 dq 0 ;reserved the rest for page entries
 
-
+; long mode gdt
 GDT64:                           ; Global Descriptor Table (64-bit).
     ; NULL
     dw 0                         ; Limit (low).
@@ -44,14 +39,14 @@ GDT64:                           ; Global Descriptor Table (64-bit).
     db 0                         ; Access.
     db 0                         ; Granularity.
     db 0                         ; Base (high).
-    SLCT_CODE equ $ - GDT64         ; The code descriptor.
+    .SLCT_CODE equ $ - GDT64         ; The code descriptor.
     dw 0                         ; Limit (low).
     dw 0                         ; Base (low).
     db 0                         ; Base (middle)
     db 10011010b                 ; Access.
     db 00100000b                 ; Granularity.
     db 0                         ; Base (high).
-    SLCT_DATA equ $ - GDT64         ; The data descriptor.
+    .SLCT_DATA equ $ - GDT64         ; The data descriptor.
     dw 0                         ; Limit (low).
     dw 0                         ; Base (low).
     db 0                         ; Base (middle)
@@ -62,8 +57,20 @@ GDT64:                           ; Global Descriptor Table (64-bit).
     dw $ - GDT64 - 1             ; Limit.
     dq GDT64                     ; Base.
 
-start:
+entry_32:
+; close interrupt
 cli
+
+; set stack pointer
+mov esp, KERNEL_STACK
+
+; check x64 support
+call ensure_support_x64
+cmp eax,1
+je init_x64
+hlt
+
+init_x64:
 ; disable paging first
 mov eax, cr0                                   ; Set the A-register to control register 0.
 and eax, 01111111111111111111111111111111b     ; Clear the PG-bit, which is bit 31.
@@ -114,13 +121,46 @@ mov cr0, eax                                   ; Set control register 0 to the A
 
 ; enter x64
 lgdt [GDT64.GDT64_PTR]
-jmp SLCT_CODE:entry
+jmp GDT64.SLCT_CODE:entry
+hlt
+
+ensure_support_x64:
+push ebp
+mov ebp,esp
+pushfd
+pop eax
+mov ecx, eax
+xor eax, 1 << 21
+push eax
+popfd
+pushfd
+pop eax
+push ecx
+popfd
+xor eax, ecx
+jz .not_supported
+mov eax, 0x80000000    ; Set the A-register to 0x80000000.
+cpuid                  ; CPU identification.
+cmp eax, 0x80000001    ; Compare the A-register with 0x80000001.
+jb .not_supported      ; It is less, there is no long mode.
+mov eax, 0x80000001    ; Set the A-register to 0x80000001.
+cpuid                  ; CPU identification.
+test edx, 1 << 29      ; Test if the LM-bit, which is bit 29, is set in the D-register.
+jz .not_supported      ; They aren't, there is no long mode.
+mov eax,1
+jmp .end
+.not_supported:
+xor eax,eax
+.end:
+mov esp,ebp
+pop ebp
+ret
 
 [SECTION .text]
 [BITS 64]
 entry:
 cli
-mov ax,SLCT_DATA
+mov ax,GDT64.SLCT_DATA
 mov ds,ax
 mov es,ax
 mov fs,ax
@@ -132,9 +172,6 @@ mov rsp,KERNEL_STACK
 call kmain
 hlt
 
-HLT_CPU:
-hlt
-
 BOCHS_MAGIC_BREAKPOINT:
 xchg bx,bx
 ret
@@ -142,4 +179,4 @@ ret
 [SECTION .heap]
 [BITS 64]
 kernel_heap:
-times 4096 db 0
+times 8192 db 0

x64/src/c/hal/hal.h

@@ -13,7 +13,6 @@ extern void NATIVE64 hal_spin_unlock(uint32_t * lock);
 boot_info_t* NATIVE64 hal_init(multiboot_info_t* m_info);
 
 //debug
-extern void NATIVE64 HLT_CPU(void);
 extern void NATIVE64 BOCHS_MAGIC_BREAKPOINT();
 
 #endif