1. x64 support check

2. refactored redundant code for multiboot.asm
3. changed bochs cpu to intel i7
4. write to port and read from port io subroutine
This commit is contained in:
HyperAssembler 2015-01-27 23:23:14 -08:00
parent cac107ce81
commit 7510138980
7 changed files with 89 additions and 79 deletions

View File

@ -2,7 +2,6 @@
plugin_ctrl: unmapped=1, biosdev=1, speaker=1, extfpuirq=1, parallel=1, serial=1, gameport=1
config_interface: win32config
display_library: win32, options="gui_debug"
magic_break: enabled=1
memory: host=256, guest=512
romimage: file="bochs/BIOS-bochs-latest"
vgaromimage: file="bochs/VGABIOS-lgpl-latest"
@ -20,11 +19,7 @@ ata2: enabled=0
ata3: enabled=0
pci: enabled=1, chipset=i440fx
vga: extension=vbe, update_freq=5
cpu: count=1, ips=4000000, model=bx_generic, reset_on_triple_fault=1, cpuid_limit_winnt=0, ignore_bad_msrs=1, mwait_is_nop=0
cpuid: level=6, stepping=3, model=3, family=6, vendor_string="GenuineIntel", brand_string=" Intel(R) Pentium(R) 4 CPU "
cpuid: mmx=1, apic=xapic, simd=sse2, sse4a=0, misaligned_sse=0, sep=1, movbe=0, adx=0
cpuid: aes=0, sha=0, xsave=0, xsaveopt=0, x86_64=1, 1g_pages=0, pcid=0, fsgsbase=0
cpuid: smep=0, smap=0, mwait=1, vmx=1
cpu: count=1, ips=4000000, model=corei7_sandy_bridge_2600k, reset_on_triple_fault=1, cpuid_limit_winnt=0, ignore_bad_msrs=1, mwait_is_nop=0
print_timestamps: enabled=0
port_e9_hack: enabled=0
private_colormap: enabled=0

7
bochs.bxrc → bochsrc.bxrc Executable file → Normal file
View File

@ -2,7 +2,6 @@
plugin_ctrl: unmapped=1, biosdev=1, speaker=1, extfpuirq=1, parallel=1, serial=1, gameport=1
config_interface: win32config
display_library: win32
magic_break: enabled=1
memory: host=256, guest=512
romimage: file="bochs/BIOS-bochs-latest"
vgaromimage: file="bochs/VGABIOS-lgpl-latest"
@ -20,11 +19,7 @@ ata2: enabled=0
ata3: enabled=0
pci: enabled=1, chipset=i440fx
vga: extension=vbe, update_freq=5
cpu: count=1, ips=4000000, model=bx_generic, reset_on_triple_fault=1, cpuid_limit_winnt=0, ignore_bad_msrs=1, mwait_is_nop=0
cpuid: level=6, stepping=3, model=3, family=6, vendor_string="GenuineIntel", brand_string=" Intel(R) Pentium(R) 4 CPU "
cpuid: mmx=1, apic=xapic, simd=sse2, sse4a=0, misaligned_sse=0, sep=1, movbe=0, adx=0
cpuid: aes=0, sha=0, xsave=0, xsaveopt=0, x86_64=1, 1g_pages=0, pcid=0, fsgsbase=0
cpuid: smep=0, smap=0, mwait=1, vmx=1
cpu: count=1, ips=4000000, model=corei7_sandy_bridge_2600k, reset_on_triple_fault=1, cpuid_limit_winnt=0, ignore_bad_msrs=1, mwait_is_nop=0
print_timestamps: enabled=0
port_e9_hack: enabled=0
private_colormap: enabled=0

19
x86/src/asm/asm_io32.asm Normal file
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@ -0,0 +1,19 @@
global hk_read_port
global hk_write_port
[SECTION .text]
[BITS 32]
hk_write_port:
mov edx, [esp + 4]
mov al, [esp + 4 + 4]
out dx, al
nop
nop
ret
hk_read_port:
mov edx, [esp + 4]
xor eax, eax
in al, dx
nop
nop
ret

View File

@ -6,7 +6,7 @@ SELECTOR_CODE_0 equ 1*8 + 0
SELECTOR_CODE_3 equ 2*8 + 3
[SECTION .text]
[BITS 32]
;void hk_load_gdt(gdt_ptr* ptr)
;void hk_load_gdt(gdt_ptr* ptr, uint16 SLCT_CODE, uint16 SLCT_DATA)
hk_load_gdt:
push ebp
mov ebp,esp
@ -14,9 +14,12 @@ push eax
mov eax,[ss:ebp+8]
lgdt [eax]
;reload cs
jmp SELECTOR_CODE_0:.reload
mov eax,[ss:ebp+12]
push eax
push dword .reload
retf
.reload
mov eax,SELECTOR_DATA_0
mov eax,[ss:ebp+16]
mov ss,ax
mov es,ax
mov fs,ax
@ -31,7 +34,31 @@ ret
hk_support_x64:
push ebp
mov ebp,esp
pushfd
pop eax
mov ecx, eax
xor eax, 1 << 21
push eax
popfd
pushfd
pop eax
push ecx
popfd
xor eax, ecx
jz .not_supported
mov eax, 0x80000000 ; Set the A-register to 0x80000000.
cpuid ; CPU identification.
cmp eax, 0x80000001 ; Compare the A-register with 0x80000001.
jb .not_supported ; It is less, there is no long mode.
mov eax, 0x80000001 ; Set the A-register to 0x80000001.
cpuid ; CPU identification.
test edx, 1 << 29 ; Test if the LM-bit, which is bit 29, is set in the D-register.
jz .not_supported ; They aren't, there is no long mode.
mov eax,1
jmp .end
.not_supported
xor eax,eax
.end
mov esp,ebp
pop ebp
pop ebp
ret

View File

@ -37,10 +37,6 @@ SLCT_CODE_0 equ DESC_FLAT_C - DESC_VOID
SLCT_GRAPH_0 equ DESC_GRAPH - DESC_VOID
SLCT_DATA_0 equ DESC_FLAT_RW - DESC_VOID
;Message
DUMMY_MSG:
db 'Kernel loaded by multiboot...',0
;stack
times 1024 db 0
kernel_stack:
@ -70,39 +66,4 @@ mov fs,ax
mov ax,SLCT_GRAPH_0
mov gs,ax
push DUMMY_MSG
call print_str
add esp,4
call hk_main
end:
jmp end
print_str:
;void printf(char* str)
;EAX,ECX,EDX
push ebp
mov ebp,esp
push edi
push esi
mov edi,dword [ss:ebp+8]
xor esi,esi
xor ecx,ecx
.begin:
mov al,byte [ds:edi]
cmp al,0 ;0 ended
je .end
mov byte [gs:esi],al
inc esi
mov byte [gs:esi],0x0c
inc edi
inc esi
jmp .begin
.end:
pop esi
pop edi
mov esp,ebp
pop ebp
ret
call hk_main

View File

@ -2,31 +2,32 @@
#include "kdef32.h"
#include "grub.h"
#include "mem32.h"
uint8 g_gdt[8*8];
uint8 g_gdt[8 * 8];
gdt_ptr g_gdt_ptr;
uint8 g_idt[8*256];
uint8 g_idt[8 * 256];
idt_ptr g_idt_ptr;
extern word* kernel_stack;
extern word *kernel_stack;
void HYPKERNEL32 print_str(char* str)
void HYPKERNEL32 print_str(char *str)
{
uint8* gram = (uint8*)0x0b8000;
while(*str != 0)
uint8 *gram = (uint8 *) 0x0b8000;
while (*str != 0)
{
*gram = (uint8)*str;
*gram = (uint8) *str;
gram++;
*gram = 7;
gram++;
str++;
*gram = 7;
gram++;
str++;
}
return;
}
int32 HYPKERNEL32 hk_main(multiboot_info_t* multiboot_info)
int32 HYPKERNEL32 hk_main(multiboot_info_t *multiboot_info)
{
segment_descriptor desc_dummy = {.DPL = 0, .Pr = 0, .x64 = 0, .Sys = 0, .type = 0, .Sz = 0, .limit = 0,.Gr = 0,.base = 0, .Avl = 0};
segment_descriptor desc = {.Gr = 1,.Pr = 1 ,.Sz = 1, .Avl = 0,.Sys = 1, .x64 = 0 ,.base = 0,.limit = 0xFFFFF};
segment_descriptor desc_dummy = {.DPL = 0, .Pr = 0, .x64 = 0, .Sys = 0, .type = 0, .Sz = 0, .limit = 0, .Gr = 0, .base = 0, .Avl = 0};
segment_descriptor desc = {.Gr = 1, .Pr = 1, .Sz = 1, .Avl = 0, .Sys = 1, .x64 = 0, .base = 0, .limit = 0xFFFFF};
//dummy descriptor
hk_set_segment_descriptor(&g_gdt[0], &desc_dummy);
@ -44,13 +45,24 @@ int32 HYPKERNEL32 hk_main(multiboot_info_t* multiboot_info)
//ring 3 data
desc.DPL = 3;
hk_set_segment_descriptor(&g_gdt[32], &desc);
g_gdt_ptr.limit = 8*8-1;
g_gdt_ptr.base = (uint32)g_gdt;
hk_load_gdt(&g_gdt_ptr);
g_gdt_ptr.limit = 8 * 8 - 1;
g_gdt_ptr.base = (uint32) g_gdt;
char* msg = "Welcome to HYP OS 1.0";
print_str(msg);
hk_load_gdt(&g_gdt_ptr, SEGMENT_SELECTOR(1, 0), SEGMENT_SELECTOR(3, 0));
loop:
goto loop;
char *msg_x64_not_supported = "x64 not supported by CPU, continue in x86.";
char *msg_x64_supported = "x64 supported by CPU.";
if (hk_support_x64() == 0)
{
print_str(msg_x64_not_supported);
x86:
goto x86;
}
else
{
print_str(msg_x64_supported);
}
//Setup x64
x64:
goto x64;
}

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@ -56,9 +56,10 @@ typedef struct __attribute__ ((packed))
} idt_ptr;
int32 HYPKERNEL32 hk_set_segment_descriptor(uint8* const gdt, const segment_descriptor* const seg_desc);
extern void hk_load_gdt(const gdt_ptr* const ptr);
extern void HYPKERNEL32 hk_load_gdt(const gdt_ptr* const ptr, const uint16 sel_code, const uint16 sel_data);
int32 HYPKERNEL32 hk_set_interrupt_gate(uint8* const dst, const interrupt_gate* int_gate);
int32 HYPKERNEL32 hk_set_trap_gate(uint8* const dst, const trap_gate* tr_gate);
int32 HYPKERNEL32 hk_set_task_gate(uint8* const dst, const task_gate* int_gate);
int32 HYPKERNEL32 hk_support_x64(void);
#endif