83 lines
1.5 KiB
C
83 lines
1.5 KiB
C
#ifndef HAL_CPU_H
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#define HAL_CPU_H
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#include "type.h"
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#include "kernel/hal/atomic.h"
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#define HAL_CORE_COUNT 1
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struct STRUCT_PACKED hal_gdt_ptr
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{
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uint16 limit;
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uint64 base;
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};
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struct STRUCT_PACKED hal_idt_ptr
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{
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uint16 limit;
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uint64 base;
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};
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/**
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* CPU Instructions
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*/
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extern void SXAPI hal_cpuid(uint32 *eax, uint32 *ebx, uint32 *ecx, uint32 *edx);
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extern void SXAPI hal_halt_cpu(void);
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extern void SXAPI hal_enable_interrupt(void);
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extern void SXAPI hal_disable_interrupt(void);
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/**
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* IO Port Operations
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*/
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extern int8 SXAPI hal_read_port_8(uint16 port);
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extern int16 SXAPI hal_read_port_16(uint16 port);
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extern int32 SXAPI hal_read_port_32(uint16 port);
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extern void SXAPI hal_write_port_8(uint16 port, uint8 data);
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extern void SXAPI hal_write_port_16(uint16 port, uint16 data);
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extern void SXAPI hal_write_port_32(uint16 port, uint32 data);
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/**
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* CPU Structure Operations
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*/
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extern void SXAPI hal_flush_gdt(struct hal_gdt_ptr *gdt_ptr, uint64 code_slct, uint64 data_slct);
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extern void SXAPI hal_flush_tlb(void);
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extern void SXAPI hal_flush_idt(struct hal_idt_ptr *idt_ptr);
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extern void SXAPI hal_read_idt(struct hal_idt_ptr **idt_ptr);
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/**
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* Control Register Operations
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*/
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#define MSR_IA32_APIC_BASE 0x1B
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extern void SXAPI hal_read_msr(uint32 *ecx, uint32 *edx, uint32 *eax);
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extern void SXAPI hal_write_msr(uint32 *ecx, uint32 *edx, uint32 *eax);
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extern void SXAPI hal_write_cr3(uint64 base);
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extern uint64 SXAPI hal_read_cr3(void);
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extern void SXAPI hal_write_cr8(uint64 pri);
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extern uint64 SXAPI hal_read_cr8(void);
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#endif
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