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freebsd-dev/sys/powerpc/aim/mmu_oea64.h

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Add an abstraction layer to the 64-bit AIM MMU's page table manipulation logic to support modifying the page table through a hypervisor. This uses KOBJ inheritance to provide subclasses of the base 64-bit AIM MMU class with additional methods for page table manipulation. Many thanks to Peter Grehan for suggesting this design and implementing the MMU KOBJ inheritance mechanism.
2010-12-04 02:42:52 +00:00
/*-
sys/powerpc: further adoption of SPDX licensing ID tags. Mainly focus on files that use BSD 2-Clause license, however the tool I was using misidentified many licenses so this was mostly a manual - error prone - task. The Software Package Data Exchange (SPDX) group provides a specification to make it easier for automated tools to detect and summarize well known opensource licenses. We are gradually adopting the specification, noting that the tags are considered only advisory and do not, in any way, superceed or replace the license texts.
2017-11-27 15:09:59 +00:00
* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
*
Add an abstraction layer to the 64-bit AIM MMU's page table manipulation logic to support modifying the page table through a hypervisor. This uses KOBJ inheritance to provide subclasses of the base 64-bit AIM MMU class with additional methods for page table manipulation. Many thanks to Peter Grehan for suggesting this design and implementing the MMU KOBJ inheritance mechanism.
2010-12-04 02:42:52 +00:00
* Copyright (C) 2010 Nathan Whitehorn
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* $FreeBSD$
*/
#ifndef _POWERPC_AIM_MMU_OEA64_H
#define _POWERPC_AIM_MMU_OEA64_H
powerpc/pmap64: Make moea64 statistics optional Summary: It turns out statistics accounting is very expensive in the pmap driver, and doesn't seem necessary in the common case. Make this optional behind a MOEA64_STATS #define, which one can set if they really need statistics. This saves ~7-8% on buildworld time on a POWER9. Found by bdragon. Reviewed by: luporl Differential Revision: https://reviews.freebsd.org/D20903
2019-07-25 03:47:27 +00:00
#include "opt_pmap.h"
Add an abstraction layer to the 64-bit AIM MMU's page table manipulation logic to support modifying the page table through a hypervisor. This uses KOBJ inheritance to provide subclasses of the base 64-bit AIM MMU class with additional methods for page table manipulation. Many thanks to Peter Grehan for suggesting this design and implementing the MMU KOBJ inheritance mechanism.
2010-12-04 02:42:52 +00:00
#include <machine/mmuvar.h>
[PPC64] Initial kernel minidump implementation Based on POWER9BSD implementation, with all POWER9 specific code removed and addition of new methods in PPC64 MMU interface, to isolate platform specific code. Currently, the new methods are implemented on pseries and PowerNV (D21643). Reviewed by: jhibbits Differential Revision: https://reviews.freebsd.org/D21551
2019-10-14 13:04:04 +00:00
struct dump_context {
u_long ptex;
u_long ptex_end;
size_t blksz;
};
Add an abstraction layer to the 64-bit AIM MMU's page table manipulation logic to support modifying the page table through a hypervisor. This uses KOBJ inheritance to provide subclasses of the base 64-bit AIM MMU class with additional methods for page table manipulation. Many thanks to Peter Grehan for suggesting this design and implementing the MMU KOBJ inheritance mechanism.
2010-12-04 02:42:52 +00:00
extern mmu_def_t oea64_mmu;
/*
* Helper routines
*/
/* Allocate physical memory for use in moea64_bootstrap. */
Final fix for alignment issues with the page table first patched with r333273 and partially reverted with r333594. Older CPUs implement addition of offsets into the page table by a bitwise OR rather than actual addition, which only works if the table is aligned at a multiple of its own size (they also require it to be aligned at a multiple of 256KB). Newer ones do not have that requirement, but it hardly matters to enforce it anyway. The original code was failing on newer systems with huge amounts of RAM (> 512 GB), in which the page table was 4 GB in size. Because the bootstrap memory allocator took its alignment parameter as an int, this turned into a 0, removing any alignment constraint at all and making the MMU fail. The first round of this patch (r333273) fixed this case by aligning it at 256 KB, which broke older CPUs. Fix this instead by widening the alignment parameter.
2018-05-14 04:00:52 +00:00
vm_offset_t moea64_bootstrap_alloc(vm_size_t size, vm_size_t align);
New pmap implementation for 64-bit PowerPC processors. The main focus of this change is to improve concurrency: - Drop global state stored in the shadow overflow page table (and all other global state) - Remove all global locks - Use per-PTE lock bits to allow parallel page insertion - Reconstruct state when requested for evicted PTEs instead of buffering it during overflow This drops total wall time for make buildworld on a 32-thread POWER8 system by a factor of two and system time by a factor of three, providing performance 20% better than similarly clocked Core i7 Xeons per-core. Performance on smaller SMP systems, where PMAP lock contention was not as much of an issue, is nearly unchanged. Tested on: POWER8, POWER5+, G5 UP, G5 SMP (64-bit and 32-bit kernels) Merged from: user/nwhitehorn/ppc64-pmap-rework Looked over by: jhibbits, andreast MFC after: 3 months Relnotes: yes Sponsored by: FreeBSD Foundation
2015-02-24 21:37:20 +00:00
/* Set an LPTE structure to match the contents of a PVO */
void moea64_pte_from_pvo(const struct pvo_entry *pvo, struct lpte *lpte);
/*
* Flags
*/
#define MOEA64_PTE_PROT_UPDATE 1
#define MOEA64_PTE_INVALIDATE 2
Add an abstraction layer to the 64-bit AIM MMU's page table manipulation logic to support modifying the page table through a hypervisor. This uses KOBJ inheritance to provide subclasses of the base 64-bit AIM MMU class with additional methods for page table manipulation. Many thanks to Peter Grehan for suggesting this design and implementing the MMU KOBJ inheritance mechanism.
2010-12-04 02:42:52 +00:00
/*
* Bootstrap subroutines
*
* An MMU_BOOTSTRAP() implementation looks like this:
* moea64_early_bootstrap();
* Allocate Page Table
* moea64_mid_bootstrap();
* Add mappings for MMU resources
* moea64_late_bootstrap();
*/
void moea64_early_bootstrap(mmu_t mmup, vm_offset_t kernelstart,
vm_offset_t kernelend);
void moea64_mid_bootstrap(mmu_t mmup, vm_offset_t kernelstart,
vm_offset_t kernelend);
void moea64_late_bootstrap(mmu_t mmup, vm_offset_t kernelstart,
vm_offset_t kernelend);
/*
* Statistics
*/
powerpc/pmap64: Make moea64 statistics optional Summary: It turns out statistics accounting is very expensive in the pmap driver, and doesn't seem necessary in the common case. Make this optional behind a MOEA64_STATS #define, which one can set if they really need statistics. This saves ~7-8% on buildworld time on a POWER9. Found by bdragon. Reviewed by: luporl Differential Revision: https://reviews.freebsd.org/D20903
2019-07-25 03:47:27 +00:00
#ifdef MOEA64_STATS
Add an abstraction layer to the 64-bit AIM MMU's page table manipulation logic to support modifying the page table through a hypervisor. This uses KOBJ inheritance to provide subclasses of the base 64-bit AIM MMU class with additional methods for page table manipulation. Many thanks to Peter Grehan for suggesting this design and implementing the MMU KOBJ inheritance mechanism.
2010-12-04 02:42:52 +00:00
extern u_int moea64_pte_valid;
extern u_int moea64_pte_overflow;
powerpc/pmap64: Make moea64 statistics optional Summary: It turns out statistics accounting is very expensive in the pmap driver, and doesn't seem necessary in the common case. Make this optional behind a MOEA64_STATS #define, which one can set if they really need statistics. This saves ~7-8% on buildworld time on a POWER9. Found by bdragon. Reviewed by: luporl Differential Revision: https://reviews.freebsd.org/D20903
2019-07-25 03:47:27 +00:00
#define STAT_MOEA64(x) x
#else
#define STAT_MOEA64(x) ((void)0)
#endif
Add an abstraction layer to the 64-bit AIM MMU's page table manipulation logic to support modifying the page table through a hypervisor. This uses KOBJ inheritance to provide subclasses of the base 64-bit AIM MMU class with additional methods for page table manipulation. Many thanks to Peter Grehan for suggesting this design and implementing the MMU KOBJ inheritance mechanism.
2010-12-04 02:42:52 +00:00
/*
* State variables
*/
extern int moea64_large_page_shift;
Add POWER CPUs to the kernel's knowledge. This does not imply we currently actually run on any machines with POWER CPUs but avoids closing that door unnecessarily. Approved by: re (kib)
2013-09-09 12:51:24 +00:00
extern uint64_t moea64_large_page_size;
[PPC64] Support QEMU/KVM pseries without hugepages This set of changes make it possible to run FreeBSD for PowerPC64/pseries, under QEMU/KVM, without requiring the host to make hugepages available to the guest. While there was already this possibility, by means of setting hw_direct_map to 0, on PowerPC64 there were a couple of issues/wrong assumptions that prevented this from working, before this changelist. Reviewed by: jhibbits Differential Revision: https://reviews.freebsd.org/D20522
2019-06-07 17:58:59 +00:00
extern uint64_t moea64_large_page_mask;
Add support for powernv POWER9 MMU initialization The POWER9 MMU (PowerISA 3.0) is slightly different from current configurations, using a partition table even for hypervisor mode, and dropping the SDR1 register. Key off the newly early-enabled CPU features flags for the new architecture, and configure the MMU appropriately. The POWER9 MMU ignores the "PSIZ" field in the PTCR, and expects a 64kB table. As we are enabled for powernv (hypervisor mode, no VMs), only initialize partition table entry 0, and zero out the rest. The actual contents of the register are identical to SDR1 from previous architectures. Along with this, fix a bug in the page table allocation with very large memory. The table can be allocated on any 256k boundary. The bootstrap_alloc alignment argument is an int, and with large amounts of memory passing the size of the table as the alignment will overflow an integer. Hard-code the alignment at 256k as wider alignment is not necessary. Reviewed by: nwhitehorn Tested by: Breno Leitao Relnotes: Yes
2018-05-05 16:00:02 +00:00
extern u_long moea64_pteg_count;
extern u_long moea64_pteg_mask;
Make n_slbs public in a more straightforward way. Some platforms (like PowerNV) use firmware-assisted mechanisms to discover it and need access to the variable. MFC after: 3 weeks
2017-11-25 22:05:05 +00:00
extern int n_slbs;
Add an abstraction layer to the 64-bit AIM MMU's page table manipulation logic to support modifying the page table through a hypervisor. This uses KOBJ inheritance to provide subclasses of the base 64-bit AIM MMU class with additional methods for page table manipulation. Many thanks to Peter Grehan for suggesting this design and implementing the MMU KOBJ inheritance mechanism.
2010-12-04 02:42:52 +00:00
#endif /* _POWERPC_AIM_MMU_OEA64_H */
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