2013-11-12 18:02:56 +00:00
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/*-
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2017-11-27 15:04:10 +00:00
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* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
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*
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2013-11-12 18:02:56 +00:00
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* Copyright (c) 2013 Ruslan Bukin <br@bsdpad.com>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/*
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* Vybrid Family NAND Flash Controller (NFC)
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* Chapter 31, Vybrid Reference Manual, Rev. 5, 07/2013
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/proc.h>
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#include <sys/bus.h>
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#include <sys/conf.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/malloc.h>
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#include <sys/rman.h>
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#include <sys/lock.h>
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#include <sys/mutex.h>
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#include <sys/time.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <dev/nand/nand.h>
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#include <dev/nand/nandbus.h>
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#include <machine/bus.h>
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#include "nfc_if.h"
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#include <arm/freescale/vybrid/vf_common.h>
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enum addr_type {
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ADDR_NONE,
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ADDR_ID,
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ADDR_ROW,
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ADDR_ROWCOL
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};
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struct fsl_nfc_fcm {
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uint32_t addr_bits;
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enum addr_type addr_type;
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uint32_t col_addr_bits;
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uint32_t row_addr_bits;
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u_int read_ptr;
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u_int addr_ptr;
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u_int command;
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u_int code;
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};
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struct vf_nand_softc {
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struct nand_softc nand_dev;
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bus_space_handle_t bsh;
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bus_space_tag_t bst;
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struct resource *res[2];
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struct fsl_nfc_fcm fcm;
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};
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static struct resource_spec nfc_spec[] = {
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{ SYS_RES_MEMORY, 0, RF_ACTIVE },
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{ SYS_RES_IRQ, 0, RF_ACTIVE },
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{ -1, 0 }
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};
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static int vf_nand_attach(device_t);
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static int vf_nand_probe(device_t);
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static int vf_nand_send_command(device_t, uint8_t);
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static int vf_nand_send_address(device_t, uint8_t);
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static int vf_nand_start_command(device_t);
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static uint8_t vf_nand_read_byte(device_t);
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static void vf_nand_read_buf(device_t, void *, uint32_t);
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static void vf_nand_write_buf(device_t, void *, uint32_t);
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static int vf_nand_select_cs(device_t, uint8_t);
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static int vf_nand_read_rnb(device_t);
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#define CMD_READ_PAGE 0x7EE0
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#define CMD_PROG_PAGE 0x7FC0
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#define CMD_PROG_PAGE_DMA 0xFFC8
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#define CMD_ERASE 0x4EC0
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#define CMD_READ_ID 0x4804
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#define CMD_READ_STATUS 0x4068
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#define CMD_RESET 0x4040
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#define CMD_RANDOM_IN 0x7140
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#define CMD_RANDOM_OUT 0x70E0
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#define CMD_BYTE2_PROG_PAGE 0x10
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#define CMD_BYTE2_PAGE_READ 0x30
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#define CMD_BYTE2_ERASE 0xD0
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#define NFC_CMD1 0x3F00 /* Flash command 1 */
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#define NFC_CMD2 0x3F04 /* Flash command 2 */
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#define NFC_CAR 0x3F08 /* Column address */
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#define NFC_RAR 0x3F0C /* Row address */
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#define NFC_RPT 0x3F10 /* Flash command repeat */
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#define NFC_RAI 0x3F14 /* Row address increment */
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#define NFC_SR1 0x3F18 /* Flash status 1 */
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#define NFC_SR2 0x3F1C /* Flash status 2 */
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#define NFC_DMA_CH1 0x3F20 /* DMA channel 1 address */
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#define NFC_DMACFG 0x3F24 /* DMA configuration */
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#define NFC_SWAP 0x3F28 /* Cach swap */
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#define NFC_SECSZ 0x3F2C /* Sector size */
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#define NFC_CFG 0x3F30 /* Flash configuration */
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#define NFC_DMA_CH2 0x3F34 /* DMA channel 2 address */
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#define NFC_ISR 0x3F38 /* Interrupt status */
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#define ECCMODE_SHIFT 17
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#define AIAD_SHIFT 5
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#define AIBN_SHIFT 4
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#define PAGECOUNT_SHIFT 0
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#define BITWIDTH_SHIFT 7
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#define BITWIDTH8 0
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#define BITWIDTH16 1
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#define PAGECOUNT_MASK 0xf
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#define CMD2_BYTE1_SHIFT 24
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#define CMD2_CODE_SHIFT 8
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#define CMD2_BUFNO_SHIFT 1
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#define CMD2_START_SHIFT 0
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static device_method_t vf_nand_methods[] = {
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DEVMETHOD(device_probe, vf_nand_probe),
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DEVMETHOD(device_attach, vf_nand_attach),
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DEVMETHOD(nfc_start_command, vf_nand_start_command),
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DEVMETHOD(nfc_send_command, vf_nand_send_command),
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DEVMETHOD(nfc_send_address, vf_nand_send_address),
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DEVMETHOD(nfc_read_byte, vf_nand_read_byte),
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DEVMETHOD(nfc_read_buf, vf_nand_read_buf),
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DEVMETHOD(nfc_write_buf, vf_nand_write_buf),
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DEVMETHOD(nfc_select_cs, vf_nand_select_cs),
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DEVMETHOD(nfc_read_rnb, vf_nand_read_rnb),
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{ 0, 0 },
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};
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static driver_t vf_nand_driver = {
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"nand",
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vf_nand_methods,
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sizeof(struct vf_nand_softc),
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};
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static devclass_t vf_nand_devclass;
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DRIVER_MODULE(vf_nand, simplebus, vf_nand_driver, vf_nand_devclass, 0, 0);
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static int
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vf_nand_probe(device_t dev)
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{
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2014-02-02 19:17:28 +00:00
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if (!ofw_bus_status_okay(dev))
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return (ENXIO);
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2013-11-12 18:02:56 +00:00
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if (!ofw_bus_is_compatible(dev, "fsl,mvf600-nand"))
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return (ENXIO);
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device_set_desc(dev, "Vybrid Family NAND controller");
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return (BUS_PROBE_DEFAULT);
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}
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static int
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vf_nand_attach(device_t dev)
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{
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struct vf_nand_softc *sc;
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int err;
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int reg;
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sc = device_get_softc(dev);
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if (bus_alloc_resources(dev, nfc_spec, sc->res)) {
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device_printf(dev, "could not allocate resources!\n");
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return (ENXIO);
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}
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sc->bst = rman_get_bustag(sc->res[0]);
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sc->bsh = rman_get_bushandle(sc->res[0]);
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/* Size in bytes of one elementary transfer unit */
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WRITE4(sc, NFC_SECSZ, 2048);
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/* Flash mode width */
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reg = READ4(sc, NFC_CFG);
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reg |= (BITWIDTH16 << BITWIDTH_SHIFT);
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/* No correction, ECC bypass */
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reg &= ~(0x7 << ECCMODE_SHIFT);
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/* Disable Auto-incrementing of flash row address */
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reg &= ~(0x1 << AIAD_SHIFT);
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/* Disable Auto-incrementing of buffer numbers */
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reg &= ~(0x1 << AIBN_SHIFT);
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/*
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* Number of virtual pages (in one physical flash page)
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* to be programmed or read, etc.
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*/
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reg &= ~(PAGECOUNT_MASK);
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reg |= (1 << PAGECOUNT_SHIFT);
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WRITE4(sc, NFC_CFG, reg);
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nand_init(&sc->nand_dev, dev, NAND_ECC_NONE, 0, 0, NULL, NULL);
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err = nandbus_create(dev);
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return (err);
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}
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static int
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vf_nand_start_command(device_t dev)
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{
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struct vf_nand_softc *sc;
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struct fsl_nfc_fcm *fcm;
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int reg;
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sc = device_get_softc(dev);
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fcm = &sc->fcm;
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nand_debug(NDBG_DRV,"vf_nand: start command %x", fcm->command);
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/* CMD2 */
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reg = READ4(sc, NFC_CMD2);
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reg &= ~(0xff << CMD2_BYTE1_SHIFT);
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reg |= (fcm->command << CMD2_BYTE1_SHIFT);
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WRITE4(sc, NFC_CMD2, reg);
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/* CMD1 */
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if ((fcm->command == NAND_CMD_READ) ||
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(fcm->command == NAND_CMD_PROG) ||
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(fcm->command == NAND_CMD_ERASE)) {
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reg = READ4(sc, NFC_CMD1);
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reg &= ~(0xff << 24);
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if (fcm->command == NAND_CMD_READ)
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reg |= (CMD_BYTE2_PAGE_READ << 24);
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else if (fcm->command == NAND_CMD_PROG)
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reg |= (CMD_BYTE2_PROG_PAGE << 24);
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else if (fcm->command == NAND_CMD_ERASE)
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reg |= (CMD_BYTE2_ERASE << 24);
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WRITE4(sc, NFC_CMD1, reg);
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}
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/* We work with 1st buffer */
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reg = READ4(sc, NFC_CMD2);
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reg &= ~(0xf << CMD2_BUFNO_SHIFT);
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reg |= (0 << CMD2_BUFNO_SHIFT);
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WRITE4(sc, NFC_CMD2, reg);
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/* Cmd CODE */
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reg = READ4(sc, NFC_CMD2);
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reg &= ~(0xffff << CMD2_CODE_SHIFT);
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reg |= (fcm->code << CMD2_CODE_SHIFT);
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WRITE4(sc, NFC_CMD2, reg);
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/* Col */
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if (fcm->addr_type == ADDR_ROWCOL) {
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reg = READ4(sc, NFC_CAR);
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reg &= ~(0xffff);
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reg |= fcm->col_addr_bits;
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nand_debug(NDBG_DRV,"setting CAR to 0x%08x\n", reg);
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WRITE4(sc, NFC_CAR, reg);
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}
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/* Row */
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reg = READ4(sc, NFC_RAR);
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reg &= ~(0xffffff);
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if (fcm->addr_type == ADDR_ID)
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reg |= fcm->addr_bits;
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else
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reg |= fcm->row_addr_bits;
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WRITE4(sc, NFC_RAR, reg);
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/* Start */
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reg = READ4(sc, NFC_CMD2);
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reg |= (1 << CMD2_START_SHIFT);
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WRITE4(sc, NFC_CMD2, reg);
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/* Wait command completion */
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while (READ4(sc, NFC_CMD2) & (1 << CMD2_START_SHIFT))
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;
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return (0);
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}
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static int
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vf_nand_send_command(device_t dev, uint8_t command)
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{
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struct vf_nand_softc *sc;
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struct fsl_nfc_fcm *fcm;
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nand_debug(NDBG_DRV,"vf_nand: send command %x", command);
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sc = device_get_softc(dev);
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fcm = &sc->fcm;
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if ((command == NAND_CMD_READ_END) ||
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(command == NAND_CMD_PROG_END) ||
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(command == NAND_CMD_ERASE_END)) {
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return (0);
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}
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fcm->command = command;
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fcm->code = 0;
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fcm->read_ptr = 0;
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fcm->addr_type = 0;
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fcm->addr_bits = 0;
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fcm->addr_ptr = 0;
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fcm->col_addr_bits = 0;
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fcm->row_addr_bits = 0;
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switch (command) {
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case NAND_CMD_READ:
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fcm->code = CMD_READ_PAGE;
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fcm->addr_type = ADDR_ROWCOL;
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break;
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case NAND_CMD_PROG:
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fcm->code = CMD_PROG_PAGE;
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fcm->addr_type = ADDR_ROWCOL;
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break;
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case NAND_CMD_PROG_END:
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break;
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case NAND_CMD_ERASE_END:
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break;
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case NAND_CMD_RESET:
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fcm->code = CMD_RESET;
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break;
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case NAND_CMD_READ_ID:
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fcm->code = CMD_READ_ID;
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fcm->addr_type = ADDR_ID;
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break;
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case NAND_CMD_READ_PARAMETER:
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fcm->code = CMD_READ_PAGE;
|
|
|
|
fcm->addr_type = ADDR_ID;
|
|
|
|
break;
|
|
|
|
case NAND_CMD_STATUS:
|
|
|
|
fcm->code = CMD_READ_STATUS;
|
|
|
|
break;
|
|
|
|
case NAND_CMD_ERASE:
|
|
|
|
fcm->code = CMD_ERASE;
|
|
|
|
fcm->addr_type = ADDR_ROW;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
nand_debug(NDBG_DRV, "unknown command %d\n", command);
|
|
|
|
return (1);
|
|
|
|
}
|
|
|
|
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
vf_nand_send_address(device_t dev, uint8_t addr)
|
|
|
|
{
|
|
|
|
struct vf_nand_softc *sc;
|
|
|
|
struct fsl_nfc_fcm *fcm;
|
|
|
|
|
|
|
|
nand_debug(NDBG_DRV,"vf_nand: send address %x", addr);
|
|
|
|
sc = device_get_softc(dev);
|
|
|
|
fcm = &sc->fcm;
|
|
|
|
|
|
|
|
nand_debug(NDBG_DRV, "setting addr #%d to 0x%02x\n", fcm->addr_ptr, addr);
|
|
|
|
|
|
|
|
if (fcm->addr_type == ADDR_ID) {
|
|
|
|
fcm->addr_bits = addr;
|
|
|
|
} else if (fcm->addr_type == ADDR_ROWCOL) {
|
|
|
|
|
|
|
|
if (fcm->addr_ptr < 2)
|
|
|
|
fcm->col_addr_bits |= (addr << (fcm->addr_ptr * 8));
|
|
|
|
else
|
|
|
|
fcm->row_addr_bits |= (addr << ((fcm->addr_ptr - 2) * 8));
|
|
|
|
|
|
|
|
} else if (fcm->addr_type == ADDR_ROW)
|
|
|
|
fcm->row_addr_bits |= (addr << (fcm->addr_ptr * 8));
|
|
|
|
|
|
|
|
fcm->addr_ptr += 1;
|
|
|
|
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
static uint8_t
|
|
|
|
vf_nand_read_byte(device_t dev)
|
|
|
|
{
|
|
|
|
struct vf_nand_softc *sc;
|
|
|
|
struct fsl_nfc_fcm *fcm;
|
|
|
|
uint8_t data;
|
|
|
|
int sr1, sr2;
|
|
|
|
int b;
|
|
|
|
|
|
|
|
sc = device_get_softc(dev);
|
|
|
|
fcm = &sc->fcm;
|
|
|
|
|
|
|
|
sr1 = READ4(sc, NFC_SR1);
|
|
|
|
sr2 = READ4(sc, NFC_SR2);
|
|
|
|
|
|
|
|
data = 0;
|
|
|
|
if (fcm->addr_type == ADDR_ID) {
|
|
|
|
b = 32 - ((fcm->read_ptr + 1) * 8);
|
|
|
|
data = (sr1 >> b) & 0xff;
|
|
|
|
fcm->read_ptr++;
|
|
|
|
} else if (fcm->command == NAND_CMD_STATUS) {
|
|
|
|
data = sr2 & 0xff;
|
|
|
|
}
|
|
|
|
|
|
|
|
nand_debug(NDBG_DRV,"vf_nand: read %x", data);
|
|
|
|
return (data);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
vf_nand_read_buf(device_t dev, void* buf, uint32_t len)
|
|
|
|
{
|
|
|
|
struct vf_nand_softc *sc;
|
|
|
|
struct fsl_nfc_fcm *fcm;
|
|
|
|
uint16_t *tmp;
|
|
|
|
uint8_t *b;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
b = (uint8_t*)buf;
|
|
|
|
sc = device_get_softc(dev);
|
|
|
|
fcm = &sc->fcm;
|
|
|
|
|
|
|
|
nand_debug(NDBG_DRV, "vf_nand: read_buf len %d", len);
|
|
|
|
|
|
|
|
if (fcm->command == NAND_CMD_READ_PARAMETER) {
|
|
|
|
tmp = malloc(len, M_DEVBUF, M_NOWAIT);
|
|
|
|
bus_read_region_2(sc->res[0], 0x0, tmp, len);
|
|
|
|
|
|
|
|
for (i = 0; i < len; i += 2) {
|
|
|
|
b[i] = tmp[i+1];
|
|
|
|
b[i+1] = tmp[i];
|
|
|
|
}
|
|
|
|
|
|
|
|
free(tmp, M_DEVBUF);
|
|
|
|
|
|
|
|
#ifdef NAND_DEBUG
|
|
|
|
for (i = 0; i < len; i++) {
|
|
|
|
if (!(i % 16))
|
|
|
|
printf("%s", i == 0 ? "vf_nand:\n" : "\n");
|
|
|
|
printf(" %x", b[i]);
|
|
|
|
if (i == len - 1)
|
|
|
|
printf("\n");
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
} else {
|
|
|
|
|
|
|
|
for (i = 0; i < len; i++) {
|
|
|
|
b[i] = READ1(sc, i);
|
|
|
|
|
|
|
|
#ifdef NAND_DEBUG
|
|
|
|
if (!(i % 16))
|
|
|
|
printf("%s", i == 0 ? "vf_nand:\n" : "\n");
|
|
|
|
printf(" %x", b[i]);
|
|
|
|
if (i == len - 1)
|
|
|
|
printf("\n");
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
vf_nand_write_buf(device_t dev, void* buf, uint32_t len)
|
|
|
|
{
|
|
|
|
struct vf_nand_softc *sc;
|
|
|
|
struct fsl_nfc_fcm *fcm;
|
|
|
|
uint8_t *b;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
b = (uint8_t*)buf;
|
|
|
|
sc = device_get_softc(dev);
|
|
|
|
fcm = &sc->fcm;
|
|
|
|
|
|
|
|
nand_debug(NDBG_DRV,"vf_nand: write_buf len %d", len);
|
|
|
|
|
|
|
|
for (i = 0; i < len; i++) {
|
|
|
|
WRITE1(sc, i, b[i]);
|
|
|
|
|
|
|
|
#ifdef NAND_DEBUG
|
|
|
|
if (!(i % 16))
|
|
|
|
printf("%s", i == 0 ? "vf_nand:\n" : "\n");
|
|
|
|
printf(" %x", b[i]);
|
|
|
|
if (i == len - 1)
|
|
|
|
printf("\n");
|
|
|
|
#endif
|
|
|
|
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
vf_nand_select_cs(device_t dev, uint8_t cs)
|
|
|
|
{
|
|
|
|
|
|
|
|
if (cs > 0)
|
|
|
|
return (ENODEV);
|
|
|
|
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
vf_nand_read_rnb(device_t dev)
|
|
|
|
{
|
|
|
|
|
|
|
|
/* no-op */
|
|
|
|
return (0); /* ready */
|
|
|
|
}
|