freebsd-dev/sys/mips/sibyte/sb_asm.S

/*-
 * Copyright (c) 2009 Neelkanth Natu
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 * $FreeBSD$
 */

#include <machine/asm.h>
#include <machine/cpuregs.h>

.set	mips64
.set	noat
.set	noreorder

#ifdef SMP
/*
 * This function must be implemented in assembly because it is called early
 * in AP boot without a valid stack.
 *
 * This cpu number is available in bits 25 to 27 of the coprocessor 0 PRID
 * register. This is not documented in the BCM1250 user manual but can be
 * gleaned from the CFE source code - see sb1250_altcpu.S
 */
LEAF(platform_processor_id)
	mfc0	v0, MIPS_COP_0_PRID
	srl	v0, v0, 25
	jr	ra
	and	v0, v0, 7
END(platform_processor_id)
#endif	/* SMP */
Add sibyte device support. Submitted by: Neelkanth Natu 2009-07-04 03:05:48 +00:00			`/*-`
			`* Copyright (c) 2009 Neelkanth Natu`
			`* All rights reserved.`
			`*`
			`* Redistribution and use in source and binary forms, with or without`
			`* modification, are permitted provided that the following conditions`
			`* are met:`
			`* 1. Redistributions of source code must retain the above copyright`
			`* notice, this list of conditions and the following disclaimer.`
			`* 2. Redistributions in binary form must reproduce the above copyright`
			`* notice, this list of conditions and the following disclaimer in the`
			`* documentation and/or other materials provided with the distribution.`
			`*`
			* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
			`* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE`
			`* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE`
			`* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE`
			`* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL`
			`* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS`
			`* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)`
			`* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT`
			`* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY`
			`* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF`
			`* SUCH DAMAGE.`
Reimplement all functions to access the system control unit in C. The only reason we need to have the sb_load64() and sb_store64() functions in assembly is to cheat the compiler and generate the 'ld' and 'sd' instructions which it otherwise will not do when compiling for a 32-bit architecture. There are some 64-bit registers in the SCD unit that must be accessed using 64-bit load and store instructions. 2010-02-05 03:20:47 +00:00			`*`
			`* $FreeBSD$`
Add sibyte device support. Submitted by: Neelkanth Natu 2009-07-04 03:05:48 +00:00			`*/`

			`#include <machine/asm.h>`
SMP support for the mips port. The platform that supports SMP currently is a SWARM with a dual-core Sibyte processor. The kernel config file to use is SWARM_SMP. Reviewed by: imp, rrs 2010-02-09 06:24:43 +00:00			`#include <machine/cpuregs.h>`
Add sibyte device support. Submitted by: Neelkanth Natu 2009-07-04 03:05:48 +00:00
			`.set mips64`
			`.set noat`
			`.set noreorder`

SMP support for the mips port. The platform that supports SMP currently is a SWARM with a dual-core Sibyte processor. The kernel config file to use is SWARM_SMP. Reviewed by: imp, rrs 2010-02-09 06:24:43 +00:00			`#ifdef SMP`
			`/*`
			`* This function must be implemented in assembly because it is called early`
			`* in AP boot without a valid stack.`
			`*`
			`* This cpu number is available in bits 25 to 27 of the coprocessor 0 PRID`
			`* register. This is not documented in the BCM1250 user manual but can be`
			`* gleaned from the CFE source code - see sb1250_altcpu.S`
			`*/`
			`LEAF(platform_processor_id)`
			`mfc0 v0, MIPS_COP_0_PRID`
			`srl v0, v0, 25`
			`jr ra`
			`and v0, v0, 7`
			`END(platform_processor_id)`
			`#endif /* SMP */`