171 lines
4.0 KiB
ArmAsm
171 lines
4.0 KiB
ArmAsm
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/*
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* Copyright (C) 2013 Andrew Turner
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*/
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#include <machine/asm.h>
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__FBSDID("$FreeBSD$");
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#include "aeabi_vfp.h"
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.fpu vfp
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.syntax unified
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/* int __aeabi_dcmpeq(double, double) */
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AEABI_ENTRY(dcmpeq)
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LOAD_DREG(d0, r0, r1)
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LOAD_DREG(d1, r2, r3)
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vcmp.f64 d0, d1
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vmrs APSR_nzcv, fpscr
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movne r0, #0
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moveq r0, #1
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RET
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AEABI_END(dcmpeq)
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/* int __aeabi_dcmplt(double, double) */
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AEABI_ENTRY(dcmplt)
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LOAD_DREG(d0, r0, r1)
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LOAD_DREG(d1, r2, r3)
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vcmp.f64 d0, d1
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vmrs APSR_nzcv, fpscr
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movcs r0, #0
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movlt r0, #1
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RET
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AEABI_END(dcmplt)
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/* int __aeabi_dcmple(double, double) */
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AEABI_ENTRY(dcmple)
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LOAD_DREG(d0, r0, r1)
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LOAD_DREG(d1, r2, r3)
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vcmp.f64 d0, d1
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vmrs APSR_nzcv, fpscr
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movhi r0, #0
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movls r0, #1
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RET
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AEABI_END(dcmple)
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/* int __aeabi_dcmpge(double, double) */
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AEABI_ENTRY(dcmpge)
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LOAD_DREG(d0, r0, r1)
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LOAD_DREG(d1, r2, r3)
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vcmp.f64 d0, d1
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vmrs APSR_nzcv, fpscr
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movlt r0, #0
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movge r0, #1
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RET
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AEABI_END(dcmpge)
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/* int __aeabi_dcmpgt(double, double) */
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AEABI_ENTRY(dcmpgt)
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LOAD_DREG(d0, r0, r1)
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LOAD_DREG(d1, r2, r3)
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vcmp.f64 d0, d1
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vmrs APSR_nzcv, fpscr
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movle r0, #0
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movgt r0, #1
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RET
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AEABI_END(dcmpgt)
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/* int __aeabi_dcmpun(double, double) */
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AEABI_ENTRY(dcmpun)
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LOAD_DREG(d0, r0, r1)
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LOAD_DREG(d1, r2, r3)
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vcmp.f64 d0, d1
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vmrs APSR_nzcv, fpscr
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movvc r0, #0
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movvs r0, #1
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RET
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AEABI_END(dcmpun)
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/* int __aeabi_d2iz(double) */
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AEABI_ENTRY(d2iz)
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LOAD_DREG(d0, r0, r1)
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#if 0
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/*
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* This should be the correct instruction, but binutils incorrectly
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* encodes it as the version that used FPSCR to determine the rounding.
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* When binutils is fixed we can use this again.
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*/
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vcvt.s32.f64 s0, d0
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#else
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ftosizd s0, d0
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#endif
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vmov r0, s0
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RET
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AEABI_END(d2iz)
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/* float __aeabi_d2f(double) */
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AEABI_ENTRY(d2f)
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LOAD_DREG(d0, r0, r1)
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vcvt.f32.f64 s0, d0
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UNLOAD_SREG(r0, s0)
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RET
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AEABI_END(d2f)
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/* double __aeabi_i2d(int) */
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AEABI_ENTRY(i2d)
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vmov s0, r0
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vcvt.f64.s32 d0, s0
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UNLOAD_DREG(r0, r1, d0)
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RET
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AEABI_END(i2d)
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/* double __aeabi_dadd(double, double) */
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AEABI_ENTRY(dadd)
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LOAD_DREG(d0, r0, r1)
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LOAD_DREG(d1, r2, r3)
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vadd.f64 d0, d0, d1
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UNLOAD_DREG(r0, r1, d0)
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RET
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AEABI_END(dadd)
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/* double __aeabi_ddiv(double, double) */
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AEABI_ENTRY(ddiv)
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LOAD_DREG(d0, r0, r1)
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LOAD_DREG(d1, r2, r3)
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vdiv.f64 d0, d0, d1
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UNLOAD_DREG(r0, r1, d0)
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RET
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AEABI_END(ddiv)
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/* double __aeabi_dmul(double, double) */
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AEABI_ENTRY(dmul)
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LOAD_DREG(d0, r0, r1)
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LOAD_DREG(d1, r2, r3)
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vmul.f64 d0, d0, d1
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UNLOAD_DREG(r0, r1, d0)
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RET
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AEABI_END(dmul)
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/* double __aeabi_dsub(double, double) */
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AEABI_ENTRY(dsub)
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LOAD_DREG(d0, r0, r1)
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LOAD_DREG(d1, r2, r3)
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vsub.f64 d0, d0, d1
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UNLOAD_DREG(r0, r1, d0)
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RET
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AEABI_END(dsub)
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