2018-12-12 22:08:43 +00:00
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/*-
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* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
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*
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* Copyright (c) 2018 Rubicon Communications, LLC (Netgate)
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/rman.h>
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#include <sys/lock.h>
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#include <sys/mutex.h>
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#include <machine/bus.h>
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#include <machine/resource.h>
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#include <machine/intr.h>
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#include <dev/fdt/simplebus.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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2019-10-20 10:48:27 +00:00
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#include <gnu/dts/include/dt-bindings/interrupt-controller/irq.h>
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2018-12-12 22:08:43 +00:00
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#include "pic_if.h"
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#define ICU_GRP_NSR 0x0
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#define ICU_GRP_SR 0x1
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#define ICU_GRP_SEI 0x4
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#define ICU_GRP_REI 0x5
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#define ICU_SETSPI_NSR_AL 0x10
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#define ICU_SETSPI_NSR_AH 0x14
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#define ICU_CLRSPI_NSR_AL 0x18
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#define ICU_CLRSPI_NSR_AH 0x1c
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#define ICU_INT_CFG(x) (0x100 + (x) * 4)
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#define ICU_INT_ENABLE (1 << 24)
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#define ICU_INT_EDGE (1 << 28)
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#define ICU_INT_GROUP_SHIFT 29
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#define ICU_INT_MASK 0x3ff
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#define MV_CP110_ICU_MAX_NIRQS 207
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struct mv_cp110_icu_softc {
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device_t dev;
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device_t parent;
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struct resource *res;
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2019-10-20 10:48:27 +00:00
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struct intr_map_data_fdt *parent_map_data;
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2018-12-12 22:08:43 +00:00
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};
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static struct resource_spec mv_cp110_icu_res_spec[] = {
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{ SYS_RES_MEMORY, 0, RF_ACTIVE | RF_SHAREABLE },
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{ -1, 0 }
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};
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static struct ofw_compat_data compat_data[] = {
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2019-10-20 10:48:27 +00:00
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{"marvell,cp110-icu-nsr", 1},
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{"marvell,cp110-icu-sei", 2},
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{NULL, 0}
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2018-12-12 22:08:43 +00:00
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};
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#define RD4(sc, reg) bus_read_4((sc)->res, (reg))
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#define WR4(sc, reg, val) bus_write_4((sc)->res, (reg), (val))
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static int
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mv_cp110_icu_probe(device_t dev)
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{
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if (!ofw_bus_status_okay(dev))
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return (ENXIO);
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if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
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return (ENXIO);
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device_set_desc(dev, "Marvell Interrupt Consolidation Unit");
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return (BUS_PROBE_DEFAULT);
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}
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static int
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mv_cp110_icu_attach(device_t dev)
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{
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struct mv_cp110_icu_softc *sc;
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phandle_t node, msi_parent;
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sc = device_get_softc(dev);
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sc->dev = dev;
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node = ofw_bus_get_node(dev);
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if (OF_getencprop(node, "msi-parent", &msi_parent,
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sizeof(phandle_t)) <= 0) {
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device_printf(dev, "cannot find msi-parent property\n");
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return (ENXIO);
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}
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if ((sc->parent = OF_device_from_xref(msi_parent)) == NULL) {
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device_printf(dev, "cannot find msi-parent device\n");
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return (ENXIO);
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}
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if (bus_alloc_resources(dev, mv_cp110_icu_res_spec, &sc->res) != 0) {
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device_printf(dev, "cannot allocate resources for device\n");
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return (ENXIO);
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}
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if (intr_pic_register(dev, OF_xref_from_node(node)) == NULL) {
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device_printf(dev, "Cannot register ICU\n");
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goto fail;
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}
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2019-10-20 10:48:27 +00:00
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/* Allocate GICP compatible mapping entry (2 cells) */
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sc->parent_map_data = (struct intr_map_data_fdt *)intr_alloc_map_data(
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INTR_MAP_DATA_FDT, sizeof(struct intr_map_data_fdt) +
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+ 3 * sizeof(phandle_t), M_WAITOK | M_ZERO);
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2018-12-12 22:08:43 +00:00
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return (0);
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fail:
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bus_release_resources(dev, mv_cp110_icu_res_spec, &sc->res);
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return (ENXIO);
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}
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2019-10-20 10:48:27 +00:00
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static struct intr_map_data *
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mv_cp110_icu_convert_map_data(struct mv_cp110_icu_softc *sc, struct intr_map_data *data)
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{
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struct intr_map_data_fdt *daf;
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uint32_t reg, irq_no, irq_type;
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daf = (struct intr_map_data_fdt *)data;
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if (daf->ncells != 2)
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return (NULL);
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irq_no = daf->cells[0];
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irq_type = daf->cells[1];
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if (irq_no >= MV_CP110_ICU_MAX_NIRQS)
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return (NULL);
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if (irq_type != IRQ_TYPE_LEVEL_HIGH &&
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irq_type != IRQ_TYPE_EDGE_RISING)
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return (NULL);
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/* We rely on fact that ICU->GIC mapping is preset by bootstrap. */
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reg = RD4(sc, ICU_INT_CFG(irq_no));
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/* Construct GICP compatible mapping. */
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sc->parent_map_data->ncells = 2;
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sc->parent_map_data->cells[0] = reg & ICU_INT_MASK;
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sc->parent_map_data->cells[1] = irq_type;
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return ((struct intr_map_data *)sc->parent_map_data);
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}
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2018-12-12 22:08:43 +00:00
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static int
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mv_cp110_icu_detach(device_t dev)
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{
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return (EBUSY);
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}
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static int
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mv_cp110_icu_activate_intr(device_t dev, struct intr_irqsrc *isrc,
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struct resource *res, struct intr_map_data *data)
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{
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struct mv_cp110_icu_softc *sc;
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sc = device_get_softc(dev);
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2019-10-20 10:48:27 +00:00
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data = mv_cp110_icu_convert_map_data(sc, data);
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if (data == NULL)
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return (EINVAL);
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2018-12-12 22:08:43 +00:00
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return (PIC_ACTIVATE_INTR(sc->parent, isrc, res, data));
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}
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static void
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mv_cp110_icu_enable_intr(device_t dev, struct intr_irqsrc *isrc)
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{
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struct mv_cp110_icu_softc *sc;
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sc = device_get_softc(dev);
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PIC_ENABLE_INTR(sc->parent, isrc);
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}
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static void
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mv_cp110_icu_disable_intr(device_t dev, struct intr_irqsrc *isrc)
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{
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struct mv_cp110_icu_softc *sc;
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sc = device_get_softc(dev);
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PIC_DISABLE_INTR(sc->parent, isrc);
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}
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2019-10-20 10:48:27 +00:00
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2018-12-12 22:08:43 +00:00
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static int
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mv_cp110_icu_map_intr(device_t dev, struct intr_map_data *data,
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struct intr_irqsrc **isrcp)
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{
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struct mv_cp110_icu_softc *sc;
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struct intr_map_data_fdt *daf;
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2019-10-20 10:48:27 +00:00
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uint32_t reg, irq_no, irq_type;
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int ret;
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2018-12-12 22:08:43 +00:00
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sc = device_get_softc(dev);
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if (data->type != INTR_MAP_DATA_FDT)
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return (ENOTSUP);
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2019-10-20 10:48:27 +00:00
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/* Parse original */
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2018-12-12 22:08:43 +00:00
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daf = (struct intr_map_data_fdt *)data;
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2019-10-20 10:48:27 +00:00
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if (daf->ncells != 2)
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return (EINVAL);
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irq_no = daf->cells[0];
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irq_type = daf->cells[1];
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data = mv_cp110_icu_convert_map_data(sc, data);
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if (data == NULL)
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2018-12-12 22:08:43 +00:00
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return (EINVAL);
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2019-10-20 10:48:27 +00:00
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reg = RD4(sc, ICU_INT_CFG(irq_no));
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reg |= ICU_INT_ENABLE;
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if (irq_type == IRQ_TYPE_LEVEL_HIGH)
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reg &= ~ICU_INT_EDGE;
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else
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reg |= ICU_INT_EDGE;
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WR4(sc, ICU_INT_CFG(irq_no), reg);
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ret = PIC_MAP_INTR(sc->parent, data, isrcp);
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(*isrcp)->isrc_dev = sc->dev;
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return (ret);
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2018-12-12 22:08:43 +00:00
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}
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static int
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mv_cp110_icu_deactivate_intr(device_t dev, struct intr_irqsrc *isrc,
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struct resource *res, struct intr_map_data *data)
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{
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struct mv_cp110_icu_softc *sc;
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sc = device_get_softc(dev);
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2019-10-20 10:48:27 +00:00
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data = mv_cp110_icu_convert_map_data(sc, data);
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if (data == NULL)
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return (EINVAL);
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2018-12-12 22:08:43 +00:00
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return (PIC_DEACTIVATE_INTR(sc->parent, isrc, res, data));
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}
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static int
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mv_cp110_icu_setup_intr(device_t dev, struct intr_irqsrc *isrc,
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struct resource *res, struct intr_map_data *data)
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{
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struct mv_cp110_icu_softc *sc;
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sc = device_get_softc(dev);
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2019-10-20 10:48:27 +00:00
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data = mv_cp110_icu_convert_map_data(sc, data);
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if (data == NULL)
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return (EINVAL);
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2018-12-12 22:08:43 +00:00
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return (PIC_SETUP_INTR(sc->parent, isrc, res, data));
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}
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static int
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mv_cp110_icu_teardown_intr(device_t dev, struct intr_irqsrc *isrc,
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struct resource *res, struct intr_map_data *data)
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{
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struct mv_cp110_icu_softc *sc;
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sc = device_get_softc(dev);
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2019-10-20 10:48:27 +00:00
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data = mv_cp110_icu_convert_map_data(sc, data);
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if (data == NULL)
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return (EINVAL);
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2018-12-12 22:08:43 +00:00
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return (PIC_TEARDOWN_INTR(sc->parent, isrc, res, data));
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}
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static void
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mv_cp110_icu_pre_ithread(device_t dev, struct intr_irqsrc *isrc)
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{
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struct mv_cp110_icu_softc *sc;
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sc = device_get_softc(dev);
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PIC_PRE_ITHREAD(sc->parent, isrc);
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}
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static void
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mv_cp110_icu_post_ithread(device_t dev, struct intr_irqsrc *isrc)
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{
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struct mv_cp110_icu_softc *sc;
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sc = device_get_softc(dev);
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PIC_POST_ITHREAD(sc->parent, isrc);
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}
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static void
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mv_cp110_icu_post_filter(device_t dev, struct intr_irqsrc *isrc)
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{
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struct mv_cp110_icu_softc *sc;
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sc = device_get_softc(dev);
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PIC_POST_FILTER(sc->parent, isrc);
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}
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static device_method_t mv_cp110_icu_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, mv_cp110_icu_probe),
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DEVMETHOD(device_attach, mv_cp110_icu_attach),
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DEVMETHOD(device_detach, mv_cp110_icu_detach),
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/* Interrupt controller interface */
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DEVMETHOD(pic_activate_intr, mv_cp110_icu_activate_intr),
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DEVMETHOD(pic_disable_intr, mv_cp110_icu_disable_intr),
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DEVMETHOD(pic_enable_intr, mv_cp110_icu_enable_intr),
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DEVMETHOD(pic_map_intr, mv_cp110_icu_map_intr),
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DEVMETHOD(pic_deactivate_intr, mv_cp110_icu_deactivate_intr),
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DEVMETHOD(pic_setup_intr, mv_cp110_icu_setup_intr),
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DEVMETHOD(pic_teardown_intr, mv_cp110_icu_teardown_intr),
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DEVMETHOD(pic_post_filter, mv_cp110_icu_post_filter),
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|
|
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DEVMETHOD(pic_post_ithread, mv_cp110_icu_post_ithread),
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|
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DEVMETHOD(pic_pre_ithread, mv_cp110_icu_pre_ithread),
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|
|
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|
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|
|
DEVMETHOD_END
|
|
|
|
};
|
|
|
|
|
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|
|
static devclass_t mv_cp110_icu_devclass;
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|
|
|
|
|
|
|
static driver_t mv_cp110_icu_driver = {
|
|
|
|
"mv_cp110_icu",
|
|
|
|
mv_cp110_icu_methods,
|
|
|
|
sizeof(struct mv_cp110_icu_softc),
|
|
|
|
};
|
|
|
|
|
2019-10-20 10:48:27 +00:00
|
|
|
EARLY_DRIVER_MODULE(mv_cp110_icu, mv_cp110_icu_bus, mv_cp110_icu_driver,
|
2018-12-12 22:08:43 +00:00
|
|
|
mv_cp110_icu_devclass, 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LAST);
|