freebsd-dev/share/man/man4/man4.i386/npx.4

Ignoring revisions in .git-blame-ignore-revs. Click here to bypass and see the normal blame view.

112 lines
3.3 KiB
Groff
Raw Normal View History

.\"
.\" Copyright (c) 1993 Christopher G. Demetriou
.\" All rights reserved.
.\"
.\" Redistribution and use in source and binary forms, with or without
.\" modification, are permitted provided that the following conditions
.\" are met:
.\" 1. Redistributions of source code must retain the above copyright
.\" notice, this list of conditions and the following disclaimer.
.\" 2. Redistributions in binary form must reproduce the above copyright
.\" notice, this list of conditions and the following disclaimer in the
.\" documentation and/or other materials provided with the distribution.
.\" 3. All advertising materials mentioning features or use of this software
.\" must display the following acknowledgement:
.\" This product includes software developed by Christopher G. Demetriou.
.\" 3. The name of the author may not be used to endorse or promote products
.\" derived from this software without specific prior written permission
.\"
.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
.\" OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
.\" IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
.\" INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
.\" NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
.\" DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
.\" THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
.\" (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
.\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
.\"
2002-03-18 13:02:33 +00:00
.\" $Id: npx.4,v 1.1 1993/08/06 10:58:03 cgd Exp $
1999-08-28 00:22:10 +00:00
.\" $FreeBSD$
.\"
.Dd August 28, 1993
.Dt NPX 4 i386
.Os
.Sh NAME
.Nm npx
2003-07-22 08:15:29 +00:00
.Nd Numeric Processing Extension coprocessor
.Sh SYNOPSIS
.Cd "device npx"
.Cd hint.npx.0.at="nexus"
.Cd hint.npx.0.port="0x0F0"
.Cd hint.npx.0.flags="0x0"
.Cd hint.npx.0.irq="13"
.Sh DESCRIPTION
The
.Nm
driver enables the use of the system's Numeric Processing Extension
2003-07-22 08:15:29 +00:00
coprocessor.
2002-03-18 13:02:33 +00:00
Numeric processing extensions are present in
systems with
2002-03-18 13:02:33 +00:00
.Tn 486DX
CPUs and in systems with
2002-03-18 13:02:33 +00:00
.Tn 387
or
2002-03-18 13:02:33 +00:00
.Tn 487SX
coprocessors.
The
.Nm
2003-07-22 08:15:29 +00:00
driver is required for proper system functioning.
If there is no NPX in the system, the system will not boot.
.Pp
2002-03-18 13:02:33 +00:00
The flags for
.Pa npx0
are:
.Pp
.Bl -tag -width indent -compact
.It 0x01
2002-03-18 13:02:33 +00:00
do not use the NPX registers to optimize bcopy.
.It 0x02
2002-03-18 13:02:33 +00:00
do not use the NPX registers to optimize bzero.
.It 0x04
2002-03-18 13:02:33 +00:00
do not use the NPX registers to optimize copyin or copyout.
.El
.Pp
2002-03-18 13:02:33 +00:00
The NPX registers are normally used
to optimize copying and zeroing
when all of the following conditions are satisfied:
2002-03-18 13:02:33 +00:00
.Pp
.Bl -enum -compact
.It
2002-03-18 13:02:33 +00:00
.Cd "cpu I586_CPU"
is an option
.It
2002-03-18 13:02:33 +00:00
the CPU is an i586 (perhaps not a Pentium)
.It
2002-03-18 13:02:33 +00:00
the probe for
.Pa npx0
succeeds
.It
INT 16 exception handling works.
.El
2002-03-18 13:02:33 +00:00
.Pp
Then copying and zeroing
2002-03-18 13:02:33 +00:00
using the NPX registers
is normally 30-100% faster.
.Pp
The flags can be used
to control cases
2002-03-18 13:02:33 +00:00
where it does not work or is slower.
Setting them at boot time
using hints works correctly
(the optimizations are not used
until later in the bootstrap
2002-03-18 13:02:33 +00:00
when
.Pa npx0
is attached).
.Sh BUGS
There are lots of them, especially on old cheap motherboards.
In particular, some motherboards do not have the interrupt lines from
the NPX to the CPU wired properly.