2016-02-26 03:34:08 +00:00
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/*-
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2017-11-21 23:15:20 +00:00
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* Copyright (c) 2015-2016 Landon Fuller <landon@landonf.org>
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* Copyright (c) 2017 The FreeBSD Foundation
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2016-02-26 03:34:08 +00:00
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* All rights reserved.
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*
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2017-11-21 23:15:20 +00:00
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* Portions of this software were developed by Landon Fuller
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* under sponsorship from the FreeBSD Foundation.
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*
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2016-02-26 03:34:08 +00:00
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer,
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* without modification.
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* 2. Redistributions in binary form must reproduce at minimum a disclaimer
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* similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
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* redistribution must be conditioned upon including a substantially
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* similar Disclaimer requirement for further binary redistribution.
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*
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* NO WARRANTY
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
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* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
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* OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
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* IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
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* THE POSSIBILITY OF SUCH DAMAGES.
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*
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* $FreeBSD$
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*/
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#ifndef _BHND_BHNDB_PCIVAR_H_
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#define _BHND_BHNDB_PCIVAR_H_
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#include "bhndbvar.h"
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/*
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* bhndb(4) PCI driver subclass.
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*/
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DECLARE_CLASS(bhndb_pci_driver);
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struct bhndb_pci_softc;
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/*
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* An interconnect-specific function implementing BHNDB_SET_WINDOW_ADDR
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*/
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2017-09-27 19:48:34 +00:00
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typedef int (*bhndb_pci_set_regwin_t)(device_t dev, device_t pci_dev,
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2016-02-26 03:34:08 +00:00
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const struct bhndb_regwin *rw, bhnd_addr_t addr);
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2017-11-21 23:15:20 +00:00
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/**
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* PCI/PCIe bridge-level device quirks
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*/
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enum {
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/** No quirks */
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BHNDB_PCI_QUIRK_NONE = 0,
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/**
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* The core requires fixup of the BAR0 SROM shadow to point at the
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* current PCI core.
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*/
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BHNDB_PCI_QUIRK_SRSH_WAR = (1<<0),
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/**
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* The PCI (rev <= 5) core does not provide interrupt status/mask
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* registers; these siba-only devices require routing backplane
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* interrupt flags via the SIBA_CFG0_INTVEC register.
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*/
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BHNDB_PCI_QUIRK_SIBA_INTVEC = (1<<1),
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2016-09-05 22:11:46 +00:00
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};
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2017-11-21 23:15:20 +00:00
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/** bhndb_pci quirk table entry */
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struct bhndb_pci_quirk {
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struct bhnd_chip_match chip_desc; /**< chip match descriptor */
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struct bhnd_core_match core_desc; /**< core match descriptor */
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uint32_t quirks; /**< quirk flags */
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};
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#define BHNDB_PCI_QUIRK(_rev, _flags) { \
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{ BHND_MATCH_ANY }, \
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{ BHND_MATCH_CORE_REV(_rev) }, \
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_flags, \
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}
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#define BHNDB_PCI_QUIRK_END \
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{ { BHND_MATCH_ANY }, { BHND_MATCH_ANY }, 0 }
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#define BHNDB_PCI_IS_QUIRK_END(_q) \
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(BHND_MATCH_IS_ANY(&(_q)->core_desc) && \
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BHND_MATCH_IS_ANY(&(_q)->chip_desc) && \
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(_q)->quirks == 0)
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/** bhndb_pci core table entry */
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struct bhndb_pci_core {
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struct bhnd_core_match match; /**< core match descriptor */
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struct bhndb_pci_quirk *quirks; /**< quirk table */
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};
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2018-01-17 03:34:26 +00:00
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#define BHNDB_PCI_CORE(_device, _quirks) { \
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2017-11-21 23:15:20 +00:00
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{ BHND_MATCH_CORE(BHND_MFGID_BCM, BHND_COREID_ ## _device) }, \
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_quirks \
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}
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2018-01-17 03:34:26 +00:00
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#define BHNDB_PCI_CORE_END { { BHND_MATCH_ANY }, NULL }
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2017-11-21 23:15:20 +00:00
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#define BHNDB_PCI_IS_CORE_END(_c) BHND_MATCH_IS_ANY(&(_c)->match)
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2016-02-26 03:34:08 +00:00
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struct bhndb_pci_softc {
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2017-11-21 23:15:20 +00:00
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struct bhndb_softc bhndb; /**< parent softc */
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device_t dev; /**< bridge device */
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device_t parent; /**< parent PCI device */
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bhnd_devclass_t pci_devclass; /**< PCI core's devclass */
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uint32_t pci_quirks; /**< PCI bridge-level quirks */
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int msi_count; /**< MSI count, or 0 */
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struct bhndb_intr_isrc *isrc; /**< host interrupt source */
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2016-09-05 22:11:46 +00:00
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2017-11-21 23:15:20 +00:00
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struct mtx mtx;
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bhndb_pci_set_regwin_t set_regwin; /**< regwin handler */
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2016-02-26 03:34:08 +00:00
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};
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2017-11-21 23:15:20 +00:00
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#define BHNDB_PCI_LOCK_INIT(sc) \
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mtx_init(&(sc)->mtx, device_get_nameunit((sc)->dev), \
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"bhndb_pc state", MTX_DEF)
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#define BHNDB_PCI_LOCK(sc) mtx_lock(&(sc)->mtx)
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#define BHNDB_PCI_UNLOCK(sc) mtx_unlock(&(sc)->mtx)
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#define BHNDB_PCI_LOCK_ASSERT(sc, what) mtx_assert(&(sc)->mtx, what)
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#define BHNDB_PCI_LOCK_DESTROY(sc) mtx_destroy(&(sc)->mtx)
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2016-04-22 16:26:53 +00:00
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#endif /* _BHND_BHNDB_PCIVAR_H_ */
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