2006-09-06 21:43:55 +00:00
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.\" Copyright (c) 2006, M. Warner Losh
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1998-10-28 00:40:53 +00:00
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.\" Copyright (c) 1998, Nicolas Souchu
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.\" All rights reserved.
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.\"
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.\" Redistribution and use in source and binary forms, with or without
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.\" modification, are permitted provided that the following conditions
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.\" are met:
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.\" 1. Redistributions of source code must retain the above copyright
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.\" notice, this list of conditions and the following disclaimer.
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.\" 2. Redistributions in binary form must reproduce the above copyright
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.\" notice, this list of conditions and the following disclaimer in the
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.\" documentation and/or other materials provided with the distribution.
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.\"
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.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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.\" SUCH DAMAGE.
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.\"
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1999-08-28 00:22:10 +00:00
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.\" $FreeBSD$
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1998-10-28 00:40:53 +00:00
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.\"
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2015-05-15 13:04:14 +00:00
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.Dd May 15, 2015
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1998-10-28 00:40:53 +00:00
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.Dt IIC 4
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2001-07-10 15:31:11 +00:00
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.Os
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1998-10-28 00:40:53 +00:00
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.Sh NAME
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.Nm iic
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2006-09-07 08:31:59 +00:00
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.Nd I2C generic I/O device driver
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1998-10-28 00:40:53 +00:00
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.Sh SYNOPSIS
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2000-01-23 15:04:20 +00:00
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.Cd "device iic"
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2006-09-06 21:43:55 +00:00
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.Pp
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.In dev/iicbus/iic.h
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1998-10-28 00:40:53 +00:00
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.Sh DESCRIPTION
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The
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2006-09-07 08:31:59 +00:00
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.Nm
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device driver provides generic I/O to any
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1998-10-28 00:40:53 +00:00
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.Xr iicbus 4
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2000-03-01 14:50:24 +00:00
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instance.
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2004-07-03 18:29:24 +00:00
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In order to control I2C devices, use
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.Pa /dev/iic?
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with the
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1998-10-28 00:40:53 +00:00
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following ioctls:
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2009-01-26 13:53:39 +00:00
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.Bl -tag -width ".Dv I2CRPTSTART"
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2006-09-06 21:43:55 +00:00
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.It Dv I2CSTART
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2006-09-07 08:31:59 +00:00
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.Pq Vt "struct iiccmd"
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2006-09-06 21:43:55 +00:00
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Sends the start condition to the slave specified by the
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2006-09-07 08:31:59 +00:00
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.Va slave
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2006-09-06 21:43:55 +00:00
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element to the bus.
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2014-06-24 19:42:37 +00:00
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The
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.Va slave
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element consists of a 7-bit address and a read/write bit
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2015-05-15 12:28:17 +00:00
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(that is, a 7-bit address << 1 | r/w).
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A read operation is initiated when the read/write bit is set, or a write
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operation when it is cleared.
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2006-09-06 21:43:55 +00:00
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All other elements are ignored.
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2015-05-15 12:28:17 +00:00
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If successful, the file descriptor receives exclusive
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ownership of the underlying iicbus instance.
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2009-01-26 13:53:39 +00:00
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.It Dv I2CRPTSTART
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.Pq Vt "struct iiccmd"
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Sends the repeated start condition to the slave specified by the
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.Va slave
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element to the bus.
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2014-06-24 19:42:37 +00:00
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The slave address should be specified as in
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.Dv I2CSTART .
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2009-01-26 13:53:39 +00:00
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All other elements are ignored.
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2015-05-15 12:28:17 +00:00
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.Dv I2CSTART
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must have previously been issued on the same file descriptor.
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2006-09-06 21:43:55 +00:00
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.It Dv I2CSTOP
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No argument is passed.
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Sends the stop condition to the bus.
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2015-05-15 12:28:17 +00:00
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If
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.Dv I2CSTART
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was previously issued on the file descriptor, the current transaction is
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terminated and exclusive ownership of the underlying iicbus instance is
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released.
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Otherwise, no action is performed.
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2006-09-06 21:43:55 +00:00
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.It Dv I2CRSTCARD
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2006-09-07 08:31:59 +00:00
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.Pq Vt "struct iiccmd"
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2006-09-06 21:43:55 +00:00
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Resets the bus.
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The argument is completely ignored.
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2015-05-15 12:28:17 +00:00
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This command does not require
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.Dv I2CSTART
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to have been previously issued on the file descriptor.
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If it was previously issued, exclusive ownership of the underlying iicbus
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instance is released.
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2006-09-06 21:43:55 +00:00
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.It Dv I2CWRITE
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2006-09-07 08:31:59 +00:00
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.Pq Vt "struct iiccmd"
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Writes data to the
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.Xr iicbus 4 .
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2015-05-15 12:28:17 +00:00
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The bus must already be started by a previous
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.Dv I2CSTART
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on the file descriptor.
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2006-09-07 08:31:59 +00:00
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The
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.Va slave
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element is ignored.
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The
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.Va count
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element is the number of bytes to write.
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The
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.Va last
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element is a boolean flag.
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2016-12-02 11:32:11 +00:00
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It must be zero when additional read commands will follow, or non-zero if this
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is the last command.
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2006-09-07 08:31:59 +00:00
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The
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.Va buf
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element is a pointer to the data to write to the bus.
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2006-09-06 21:43:55 +00:00
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.It Dv I2CREAD
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2006-09-07 08:31:59 +00:00
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.Pq Vt "struct iiccmd"
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Reads data from the
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.Xr iicbus 4 .
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2015-05-15 12:28:17 +00:00
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The bus must already be started by a previous
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.Dv I2CSTART
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on the file descriptor.
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2006-09-07 08:31:59 +00:00
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The
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.Va slave
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element is ignored.
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The
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.Va count
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2016-12-02 11:32:11 +00:00
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element is the number of bytes to read.
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2006-09-07 08:31:59 +00:00
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The
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.Va last
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element is a boolean flag.
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2016-12-02 11:32:11 +00:00
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It must be zero when additional read commands will follow, or non-zero if this
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is the last command.
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2006-09-07 08:31:59 +00:00
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The
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.Va buf
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element is a pointer to where to store the data read from the bus.
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2006-09-06 21:43:55 +00:00
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Short reads on the bus produce undefined results.
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.It Dv I2CRDWR
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2006-09-07 08:31:59 +00:00
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.Pq Vt "struct iic_rdwr_data"
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2006-09-06 21:43:55 +00:00
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Generic read/write interface.
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Allows for an arbitrary number of commands to be sent to
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an arbitrary number of devices on the bus.
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2015-05-15 12:28:17 +00:00
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Any previous transaction started by
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.Dv I2CSTART
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must be terminated by
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.Dv I2CSTOP
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or
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.Dv I2CRSTCARD
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before
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.Dv I2CRDWR
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can be issued on the same file descriptor.
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2006-12-14 16:40:57 +00:00
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A read transfer is specified if
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2006-09-07 08:31:59 +00:00
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.Dv IIC_M_RD
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2006-09-06 21:43:55 +00:00
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is set in
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2006-09-07 08:31:59 +00:00
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.Va flags .
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2006-09-06 21:43:55 +00:00
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Otherwise the transfer is a write transfer.
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2006-09-07 08:31:59 +00:00
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The
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.Va slave
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2014-06-24 19:42:37 +00:00
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element specifies the 7-bit address with the read/write bit for the transfer.
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The read/write bit will be handled by the iicbus stack based on the specified
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transfer operation.
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2006-09-07 08:31:59 +00:00
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The
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.Va len
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2014-06-24 19:42:37 +00:00
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element is the number of
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.Pq Vt "struct iic_msg"
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messages encoded on
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.Pq Vt "struct iic_rdwr_data" .
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2006-09-07 08:31:59 +00:00
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The
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.Va buf
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element is a buffer for that data.
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This ioctl is intended to be
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.Tn Linux
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compatible.
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2015-05-15 12:28:17 +00:00
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.It Dv I2CSADDR
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.Pq Vt "uint8_t"
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Associate the specified address with the file descriptor for use by
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subsequent
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.Xr read 2
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or
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.Xr write 2
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calls.
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The argument is an 8-bit address (that is, a 7-bit address << 1).
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The read/write bit in the least-significant position is ignored.
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Any subsequent read or write operation will set or clear that bit as needed.
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1998-10-28 00:40:53 +00:00
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.El
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.Pp
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2006-09-06 21:43:55 +00:00
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The following data structures are defined in
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.In dev/iicbus/iic.h
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and referenced above:
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2006-09-07 08:31:59 +00:00
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.Bd -literal -offset indent
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2006-09-06 21:43:55 +00:00
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struct iiccmd {
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u_char slave;
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int count;
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int last;
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char *buf;
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};
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/* Designed to be compatible with linux's struct i2c_msg */
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struct iic_msg
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{
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uint16_t slave;
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uint16_t flags;
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2015-05-15 12:28:17 +00:00
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#define IIC_M_WR 0 /* Fake flag for write */
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#define IIC_M_RD 0x0001 /* read vs write */
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#define IIC_M_NOSTOP 0x0002 /* do not send a I2C stop after message */
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#define IIC_M_NOSTART 0x0004 /* do not send a I2C start before message */
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2010-08-07 08:31:32 +00:00
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uint16_t len; /* msg length */
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2006-09-06 21:43:55 +00:00
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uint8_t * buf;
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};
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struct iic_rdwr_data {
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struct iic_msg *msgs;
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uint32_t nmsgs;
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};
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.Ed
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.Pp
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2015-05-15 12:28:17 +00:00
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It is also possible to use
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.Xr read 2
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or
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.Xr write 2 ,
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in which case the I2C start/stop handshake is managed by
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.Xr iicbus 4 .
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The address used for the read/write operation is the one passed to the most
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recent
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2006-09-06 21:43:55 +00:00
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.Dv I2CSTART
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.Xr ioctl 2
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2015-05-15 12:28:17 +00:00
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or
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.Dv I2CSADDR
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.Xr ioctl 2
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on the open
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.Pa /dev/iic?
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file descriptor.
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Closing the file descriptor clears any addressing state established by a
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previous
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.Dv I2CSTART
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or
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.Dv I2CSADDR ,
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stops any transaction established by a not-yet-terminated
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.Dv I2CSTART ,
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and releases iicbus ownership.
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Because addressing state is stored on a per-file-descriptor basis, it is
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permissible for multiple file descriptors to be simultaneously open on the
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same
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.Pa /dev/iic?
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device.
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Concurrent transactions on those descriptors are synchronized by the
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exclusive-ownership requests issued to the underlying iicbus instance.
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1998-10-28 00:40:53 +00:00
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.Sh SEE ALSO
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2006-09-07 08:31:59 +00:00
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.Xr ioctl 2 ,
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.Xr read 2 ,
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.Xr write 2 ,
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1998-10-28 00:40:53 +00:00
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.Xr iicbus 4
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.Sh HISTORY
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The
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.Nm
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manual page first appeared in
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.Fx 3.0 .
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1999-08-15 10:48:36 +00:00
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.Sh AUTHORS
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2006-09-07 08:31:59 +00:00
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.An -nosplit
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1998-10-28 00:40:53 +00:00
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This
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manual page was written by
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2006-09-06 21:43:55 +00:00
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.An Nicolas Souchu
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and
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.An M. Warner Losh .
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