2000-01-09 08:14:11 +00:00
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/*
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* Copyright (c) 1999 Cameron Grant <gandalf@vilnya.demon.co.uk>
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* All rights reserved.
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*
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* Derived from the public domain Linux driver
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHERIN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THEPOSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _NM256_H_
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#define _NM256_H_
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/* The BIOS signature. */
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#define NM_SIGNATURE 0x4e4d0000
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/* Signature mask. */
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#define NM_SIG_MASK 0xffff0000
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/* Size of the second memory area. */
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#define NM_PORT2_SIZE 4096
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/* The base offset of the mixer in the second memory area. */
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#define NM_MIXER_OFFSET 0x600
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2001-04-10 14:28:21 +00:00
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/* The base offset for the AC97 test */
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#define NM_MIXER_PRESENCE 0xa06
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#define NM_PRESENCE_MASK 0x050
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#define NM_PRESENCE_VALUE 0x040
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2000-01-09 08:14:11 +00:00
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/* The maximum size of a coefficient entry. */
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#define NM_MAX_COEFFICIENT 0x5000
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/* The interrupt register. */
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#define NM_INT_REG 0xa04
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/* And its bits. */
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#define NM_PLAYBACK_INT 0x40
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#define NM_RECORD_INT 0x100
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#define NM_MISC_INT_1 0x4000
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#define NM_MISC_INT_2 0x1
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/* The AV's "mixer ready" status bit and location. */
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#define NM_MIXER_STATUS_OFFSET 0xa04
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#define NM_MIXER_READY_MASK 0x0800
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/*
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* For the ZX. It uses the same interrupt register, but it holds 32
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* bits instead of 16.
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*/
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#define NM2_PLAYBACK_INT 0x10000
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#define NM2_RECORD_INT 0x80000
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#define NM2_MISC_INT_1 0x8
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#define NM2_MISC_INT_2 0x2
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/* The ZX's "mixer ready" status bit and location. */
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#define NM2_MIXER_STATUS_OFFSET 0xa06
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#define NM2_MIXER_READY_MASK 0x0800
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/* The playback registers start from here. */
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#define NM_PLAYBACK_REG_OFFSET 0x0
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/* The record registers start from here. */
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#define NM_RECORD_REG_OFFSET 0x200
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/* The rate register is located 2 bytes from the start of the register area. */
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#define NM_RATE_REG_OFFSET 2
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/* Mono/stereo flag, number of bits on playback, and rate mask. */
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#define NM_RATE_STEREO 1
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#define NM_RATE_BITS_16 2
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#define NM_RATE_MASK 0xf0
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/* Playback enable register. */
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#define NM_PLAYBACK_ENABLE_REG (NM_PLAYBACK_REG_OFFSET + 0x1)
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#define NM_PLAYBACK_ENABLE_FLAG 1
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#define NM_PLAYBACK_ONESHOT 2
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#define NM_PLAYBACK_FREERUN 4
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/* Mutes the audio output. */
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#define NM_AUDIO_MUTE_REG (NM_PLAYBACK_REG_OFFSET + 0x18)
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#define NM_AUDIO_MUTE_LEFT 0x8000
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#define NM_AUDIO_MUTE_RIGHT 0x0080
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#define NM_AUDIO_MUTE_BOTH 0x8080
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/* Recording enable register. */
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#define NM_RECORD_ENABLE_REG (NM_RECORD_REG_OFFSET + 0)
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#define NM_RECORD_ENABLE_FLAG 1
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#define NM_RECORD_FREERUN 2
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#define NM_RBUFFER_START (NM_RECORD_REG_OFFSET + 0x4)
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#define NM_RBUFFER_END (NM_RECORD_REG_OFFSET + 0x10)
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#define NM_RBUFFER_WMARK (NM_RECORD_REG_OFFSET + 0xc)
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#define NM_RBUFFER_CURRP (NM_RECORD_REG_OFFSET + 0x8)
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#define NM_PBUFFER_START (NM_PLAYBACK_REG_OFFSET + 0x4)
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#define NM_PBUFFER_END (NM_PLAYBACK_REG_OFFSET + 0x14)
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#define NM_PBUFFER_WMARK (NM_PLAYBACK_REG_OFFSET + 0xc)
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#define NM_PBUFFER_CURRP (NM_PLAYBACK_REG_OFFSET + 0x8)
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#endif
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