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freebsd-dev/sys/riscv/include/machdep.h

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Import RISC-V machine headers. This is a minimal set required to compile kernel and userland. Reviewed by: andrew, imp, kib Sponsored by: DARPA, AFRL Sponsored by: HEIF5 Differential Revision: https://reviews.freebsd.org/D4554
2015-12-17 18:44:30 +00:00
/*-
Support for v1.10 (latest) of RISC-V privilege specification. New version is not compatible on supervisor mode with v1.9.1 (previous version). Highlights: o BBL (Berkeley Boot Loader) provides no initial page tables anymore allowing us to choose VM, to build page tables manually and enable MMU in S-mode. o SBI interface changed. o GENERIC kernel. FDT is now chosen standard for RISC-V hardware description. DTB is now provided by Spike (golden model simulator). This allows us to introduce GENERIC kernel. However, description for console and timer devices is not provided in DTB, so move these devices temporary to nexus bus. o Supervisor can't access userspace by default. Solution is to set SUM (permit Supervisor User Memory access) bit in sstatus register. o Compressed extension is now turned on by default. o External GCC 7.1 compiler used. o _gp renamed to __global_pointer$ o Compiler -march= string is now in use allowing us to choose required extensions (compressed, FPU, atomic, etc). Sponsored by: DARPA, AFRL Differential Revision: https://reviews.freebsd.org/D11800
2017-08-10 14:18:09 +00:00
* Copyright (c) 2015-2017 Ruslan Bukin <br@bsdpad.com>
Import RISC-V machine headers. This is a minimal set required to compile kernel and userland. Reviewed by: andrew, imp, kib Sponsored by: DARPA, AFRL Sponsored by: HEIF5 Differential Revision: https://reviews.freebsd.org/D4554
2015-12-17 18:44:30 +00:00
* All rights reserved.
*
* Portions of this software were developed by SRI International and the
* University of Cambridge Computer Laboratory under DARPA/AFRL contract
* FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme.
*
* Portions of this software were developed by the University of Cambridge
* Computer Laboratory as part of the CTSRD Project, with support from the
* UK Higher Education Innovation Fund (HEIF).
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD$
*/
#ifndef _MACHINE_MACHDEP_H_
#define _MACHINE_MACHDEP_H_
struct riscv_bootparams {
vm_offset_t kern_l1pt; /* Kernel L1 base */
Support for v1.10 (latest) of RISC-V privilege specification. New version is not compatible on supervisor mode with v1.9.1 (previous version). Highlights: o BBL (Berkeley Boot Loader) provides no initial page tables anymore allowing us to choose VM, to build page tables manually and enable MMU in S-mode. o SBI interface changed. o GENERIC kernel. FDT is now chosen standard for RISC-V hardware description. DTB is now provided by Spike (golden model simulator). This allows us to introduce GENERIC kernel. However, description for console and timer devices is not provided in DTB, so move these devices temporary to nexus bus. o Supervisor can't access userspace by default. Solution is to set SUM (permit Supervisor User Memory access) bit in sstatus register. o Compressed extension is now turned on by default. o External GCC 7.1 compiler used. o _gp renamed to __global_pointer$ o Compiler -march= string is now in use allowing us to choose required extensions (compressed, FPU, atomic, etc). Sponsored by: DARPA, AFRL Differential Revision: https://reviews.freebsd.org/D11800
2017-08-10 14:18:09 +00:00
vm_offset_t kern_phys; /* Kernel base (physical) addr */
Import RISC-V machine headers. This is a minimal set required to compile kernel and userland. Reviewed by: andrew, imp, kib Sponsored by: DARPA, AFRL Sponsored by: HEIF5 Differential Revision: https://reviews.freebsd.org/D4554
2015-12-17 18:44:30 +00:00
vm_offset_t kern_stack;
Support for v1.10 (latest) of RISC-V privilege specification. New version is not compatible on supervisor mode with v1.9.1 (previous version). Highlights: o BBL (Berkeley Boot Loader) provides no initial page tables anymore allowing us to choose VM, to build page tables manually and enable MMU in S-mode. o SBI interface changed. o GENERIC kernel. FDT is now chosen standard for RISC-V hardware description. DTB is now provided by Spike (golden model simulator). This allows us to introduce GENERIC kernel. However, description for console and timer devices is not provided in DTB, so move these devices temporary to nexus bus. o Supervisor can't access userspace by default. Solution is to set SUM (permit Supervisor User Memory access) bit in sstatus register. o Compressed extension is now turned on by default. o External GCC 7.1 compiler used. o _gp renamed to __global_pointer$ o Compiler -march= string is now in use allowing us to choose required extensions (compressed, FPU, atomic, etc). Sponsored by: DARPA, AFRL Differential Revision: https://reviews.freebsd.org/D11800
2017-08-10 14:18:09 +00:00
vm_offset_t dtbp_virt; /* Device tree blob virtual addr */
RISC-V: Check that the DTB doesn't overlap with kernel This can happen with very large kernels (e.g. ones embedding a root filesystem). The DTB written by OpenSBI/BBL is quite small so this is unlikely to hit important data, but if it does this can result in very confusing and hard-to-debug crashes. Add a KASSERT() and a verbose print to catch this problem with debug kernels. While this will not print any output by default if it fails (that would depend on EARLY_PRINTF), at least the kernel now halts reliably instead of randomly crashing. Reviewed By: mhorne Differential Revision: https://reviews.freebsd.org/D25153
2020-06-08 08:52:02 +00:00
vm_offset_t dtbp_phys; /* Device tree blob physical addr */
Handle load from loader(8) In locore, we must detect and handle different arguments passed by loader(8) compared to what we recieve when booting directly via SBI firmware. Currently we receive the hart ID in a0 and a pointer to the device tree blob in a1. loader(8) provides only a pointer to its metadata in a0. The solution to this is to add an additional entry point, _alt_start. This will be placed first in the .text section, so SBI firmware will enter here, and jump to the common pagetable setup shortly after. Since loader(8) understands our ELF kernel, it will enter at the ELF's entry address, which points to _start. This approach leads to very little guesswork as to which way we booted. Fix-up initriscv() to parse the loader's metadata, continuing to use fake_preload_metadata() in the SBI direct boot case. Reviewed by: markj, jrtc27 (asm portion) Differential Revision: https://reviews.freebsd.org/D24912
2020-06-24 15:20:00 +00:00
vm_offset_t modulep; /* loader(8) metadata */
Import RISC-V machine headers. This is a minimal set required to compile kernel and userland. Reviewed by: andrew, imp, kib Sponsored by: DARPA, AFRL Sponsored by: HEIF5 Differential Revision: https://reviews.freebsd.org/D4554
2015-12-17 18:44:30 +00:00
};
RISC-V: use physmem to manage physical memory Replace our hand-rolled functions with the generic ones provided by kern/subr_physmem.c. This greatly simplifies the initialization of physical memory regions and kernel globals. Tested by: nick Differential Revision: https://reviews.freebsd.org/D24154
2020-04-19 00:18:16 +00:00
extern vm_paddr_t physmap[PHYS_AVAIL_ENTRIES];
Import RISC-V machine headers. This is a minimal set required to compile kernel and userland. Reviewed by: andrew, imp, kib Sponsored by: DARPA, AFRL Sponsored by: HEIF5 Differential Revision: https://reviews.freebsd.org/D4554
2015-12-17 18:44:30 +00:00
extern u_int physmap_idx;
void initriscv(struct riscv_bootparams *);
#endif /* _MACHINE_MACHDEP_H_ */
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