2016-03-16 13:01:48 +00:00
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/*-
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* Copyright (c) 2016 Michal Meloun <mmel@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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/*
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* RTC driver for Tegra SoCs.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/clock.h>
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#include <sys/kernel.h>
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#include <sys/limits.h>
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#include <sys/lock.h>
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#include <sys/mutex.h>
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#include <sys/module.h>
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#include <sys/resource.h>
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#include <machine/bus.h>
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#include <machine/resource.h>
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#include <sys/rman.h>
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#include <dev/extres/clk/clk.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include "clock_if.h"
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#define RTC_CONTROL 0x00
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#define RTC_BUSY 0x04
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#define RTC_BUSY_STATUS (1 << 0)
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#define RTC_SECONDS 0x08
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#define RTC_SHADOW_SECONDS 0x0c
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#define RTC_MILLI_SECONDS 0x10
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#define RTC_SECONDS_ALARM0 0x14
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#define RTC_SECONDS_ALARM1 0x18
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#define RTC_MILLI_SECONDS_ALARM 0x1c
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#define RTC_SECONDS_COUNTDOWN_ALARM 0x20
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#define RTC_MILLI_SECONDS_COUNTDOW_ALARM 0x24
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#define RTC_INTR_MASK 0x28
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#define RTC_INTR_MSEC_CDN_ALARM (1 << 4)
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#define RTC_INTR_SEC_CDN_ALARM (1 << 3)
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#define RTC_INTR_MSEC_ALARM (1 << 2)
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#define RTC_INTR_SEC_ALARM1 (1 << 1)
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#define RTC_INTR_SEC_ALARM0 (1 << 0)
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#define RTC_INTR_STATUS 0x2c
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#define RTC_INTR_SOURCE 0x30
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#define RTC_INTR_SET 0x34
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#define RTC_CORRECTION_FACTOR 0x38
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#define WR4(_sc, _r, _v) bus_write_4((_sc)->mem_res, (_r), (_v))
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#define RD4(_sc, _r) bus_read_4((_sc)->mem_res, (_r))
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#define LOCK(_sc) mtx_lock(&(_sc)->mtx)
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#define UNLOCK(_sc) mtx_unlock(&(_sc)->mtx)
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#define SLEEP(_sc, timeout) \
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mtx_sleep(sc, &sc->mtx, 0, "rtcwait", timeout);
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#define LOCK_INIT(_sc) \
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mtx_init(&_sc->mtx, device_get_nameunit(_sc->dev), "tegra_rtc", MTX_DEF)
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#define LOCK_DESTROY(_sc) mtx_destroy(&_sc->mtx)
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#define ASSERT_LOCKED(_sc) mtx_assert(&_sc->mtx, MA_OWNED)
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#define ASSERT_UNLOCKED(_sc) mtx_assert(&_sc->mtx, MA_NOTOWNED)
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static struct ofw_compat_data compat_data[] = {
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{"nvidia,tegra124-rtc", 1},
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{NULL, 0}
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};
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struct tegra_rtc_softc {
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device_t dev;
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struct mtx mtx;
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struct resource *mem_res;
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struct resource *irq_res;
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void *irq_h;
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clk_t clk;
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uint32_t core_freq;
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};
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static void
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tegra_rtc_wait(struct tegra_rtc_softc *sc)
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{
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int timeout;
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for (timeout = 500; timeout >0; timeout--) {
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if ((RD4(sc, RTC_BUSY) & RTC_BUSY_STATUS) == 0)
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break;
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DELAY(1);
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}
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if (timeout <= 0)
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device_printf(sc->dev, "Device busy timeouted\n");
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}
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/*
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* Get the time of day clock and return it in ts.
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* Return 0 on success, an error number otherwise.
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*/
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static int
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tegra_rtc_gettime(device_t dev, struct timespec *ts)
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{
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struct tegra_rtc_softc *sc;
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struct timeval tv;
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uint32_t msec, sec;
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sc = device_get_softc(dev);
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LOCK(sc);
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msec = RD4(sc, RTC_MILLI_SECONDS);
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sec = RD4(sc, RTC_SHADOW_SECONDS);
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UNLOCK(sc);
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tv.tv_sec = sec;
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tv.tv_usec = msec * 1000;
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TIMEVAL_TO_TIMESPEC(&tv, ts);
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return (0);
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}
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static int
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tegra_rtc_settime(device_t dev, struct timespec *ts)
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{
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struct tegra_rtc_softc *sc;
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struct timeval tv;
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sc = device_get_softc(dev);
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LOCK(sc);
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TIMESPEC_TO_TIMEVAL(&tv, ts);
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tegra_rtc_wait(sc);
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WR4(sc, RTC_SECONDS, tv.tv_sec);
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UNLOCK(sc);
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return (0);
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}
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static void
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tegra_rtc_intr(void *arg)
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{
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struct tegra_rtc_softc *sc;
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uint32_t status;
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sc = (struct tegra_rtc_softc *)arg;
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LOCK(sc);
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status = RD4(sc, RTC_INTR_STATUS);
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WR4(sc, RTC_INTR_STATUS, status);
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UNLOCK(sc);
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}
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static int
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tegra_rtc_probe(device_t dev)
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{
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if (!ofw_bus_status_okay(dev))
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return (ENXIO);
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if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
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return (ENXIO);
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return (BUS_PROBE_DEFAULT);
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}
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static int
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tegra_rtc_attach(device_t dev)
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{
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int rv, rid;
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struct tegra_rtc_softc *sc;
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sc = device_get_softc(dev);
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sc->dev = dev;
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LOCK_INIT(sc);
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/* Get the memory resource for the register mapping. */
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rid = 0;
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sc->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
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RF_ACTIVE);
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if (sc->mem_res == NULL) {
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device_printf(dev, "Cannot map registers.\n");
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rv = ENXIO;
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goto fail;
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}
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/* Allocate our IRQ resource. */
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rid = 0;
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sc->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
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RF_ACTIVE);
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if (sc->irq_res == NULL) {
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device_printf(dev, "Cannot allocate interrupt.\n");
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rv = ENXIO;
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goto fail;
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}
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/* OFW resources. */
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2016-07-10 18:28:15 +00:00
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rv = clk_get_by_ofw_index(dev, 0, 0, &sc->clk);
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2016-03-16 13:01:48 +00:00
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if (rv != 0) {
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device_printf(dev, "Cannot get i2c clock: %d\n", rv);
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goto fail;
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}
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rv = clk_enable(sc->clk);
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if (rv != 0) {
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device_printf(dev, "Cannot enable clock: %d\n", rv);
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goto fail;
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}
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/* Init hardware. */
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WR4(sc, RTC_SECONDS_ALARM0, 0);
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WR4(sc, RTC_SECONDS_ALARM1, 0);
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WR4(sc, RTC_INTR_STATUS, 0xFFFFFFFF);
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WR4(sc, RTC_INTR_MASK, 0);
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/* Setup interrupt */
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rv = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_MISC | INTR_MPSAFE,
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NULL, tegra_rtc_intr, sc, &sc->irq_h);
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if (rv) {
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device_printf(dev, "Cannot setup interrupt.\n");
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goto fail;
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}
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/*
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* Register as a time of day clock with 1-second resolution.
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*
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* XXXX Not yet, we don't have support for multiple RTCs
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*/
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/* clock_register(dev, 1000000); */
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return (bus_generic_attach(dev));
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fail:
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if (sc->clk != NULL)
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clk_release(sc->clk);
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if (sc->irq_h != NULL)
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bus_teardown_intr(dev, sc->irq_res, sc->irq_h);
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if (sc->irq_res != NULL)
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bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq_res);
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if (sc->mem_res != NULL)
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bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->mem_res);
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LOCK_DESTROY(sc);
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return (rv);
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}
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static int
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tegra_rtc_detach(device_t dev)
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{
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struct tegra_rtc_softc *sc;
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sc = device_get_softc(dev);
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if (sc->irq_h != NULL)
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bus_teardown_intr(dev, sc->irq_res, sc->irq_h);
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if (sc->irq_res != NULL)
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bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq_res);
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if (sc->mem_res != NULL)
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bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->mem_res);
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LOCK_DESTROY(sc);
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return (bus_generic_detach(dev));
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}
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static device_method_t tegra_rtc_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, tegra_rtc_probe),
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DEVMETHOD(device_attach, tegra_rtc_attach),
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DEVMETHOD(device_detach, tegra_rtc_detach),
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/* clock interface */
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DEVMETHOD(clock_gettime, tegra_rtc_gettime),
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DEVMETHOD(clock_settime, tegra_rtc_settime),
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DEVMETHOD_END
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};
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static devclass_t tegra_rtc_devclass;
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2016-09-30 05:25:15 +00:00
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static DEFINE_CLASS_0(rtc, tegra_rtc_driver, tegra_rtc_methods,
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sizeof(struct tegra_rtc_softc));
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DRIVER_MODULE(tegra_rtc, simplebus, tegra_rtc_driver, tegra_rtc_devclass,
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NULL, NULL);
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