2016-07-19 18:07:47 +00:00
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/*
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* Copyright (c) 2015, 2016, Stephen J. Kiernan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/kernel.h>
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Extract eventfilter declarations to sys/_eventfilter.h
This allows replacing "sys/eventfilter.h" includes with "sys/_eventfilter.h"
in other header files (e.g., sys/{bus,conf,cpu}.h) and reduces header
pollution substantially.
EVENTHANDLER_DECLARE and EVENTHANDLER_LIST_DECLAREs were moved out of .c
files into appropriate headers (e.g., sys/proc.h, powernv/opal.h).
As a side effect of reduced header pollution, many .c files and headers no
longer contain needed definitions. The remainder of the patch addresses
adding appropriate includes to fix those files.
LOCK_DEBUG and LOCK_FILE_LINE_ARG are moved to sys/_lock.h, as required by
sys/mutex.h since r326106 (but silently protected by header pollution prior
to this change).
No functional change (intended). Of course, any out of tree modules that
relied on header pollution for sys/eventhandler.h, sys/lock.h, or
sys/mutex.h inclusion need to be fixed. __FreeBSD_version has been bumped.
2019-05-20 00:38:23 +00:00
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#include <sys/ktr.h>
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2016-07-19 18:07:47 +00:00
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#include <sys/lock.h>
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#include <sys/malloc.h>
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#include <sys/module.h>
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#include <sys/random.h>
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#include <sys/sbuf.h>
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#include <sys/sysctl.h>
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#include <sys/selinfo.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/rman.h>
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#include <machine/bus.h>
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#include <machine/resource.h>
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#include <dev/ofw/openfirm.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <dev/random/randomdev.h>
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#include <dev/random/random_harvestq.h>
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static device_attach_t bcm2835_rng_attach;
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static device_detach_t bcm2835_rng_detach;
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static device_probe_t bcm2835_rng_probe;
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#define RNG_CTRL 0x00 /* RNG Control Register */
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#define RNG_COMBLK1_OSC 0x003f0000 /* Combiner Blk 1 Oscillator */
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#define RNG_COMBLK1_OSC_SHIFT 16
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#define RNG_COMBLK2_OSC 0x0fc00000 /* Combiner Blk 2 Oscillator */
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#define RNG_COMBLK2_OSC_SHIFT 22
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#define RNG_JCLK_BYP_DIV_CNT 0x0000ff00 /* Jitter clk bypass divider
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count */
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#define RNG_JCLK_BYP_DIV_CNT_SHIFT 8
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#define RNG_JCLK_BYP_SRC 0x00000020 /* Jitter clk bypass source */
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#define RNG_JCLK_BYP_SEL 0x00000010 /* Jitter clk bypass select */
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#define RNG_RBG2X 0x00000002 /* RBG 2X SPEED */
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#define RNG_RBGEN_BIT 0x00000001 /* Enable RNG bit */
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2021-03-06 11:28:35 +00:00
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#define BCM2835_RNG_STATUS 0x04 /* BCM2835 RNG status register */
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#define BCM2838_RNG_STATUS 0x18 /* BCM2838 RNG status register */
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2016-07-19 18:07:47 +00:00
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2021-03-06 11:28:35 +00:00
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#define BCM2838_RNG_COUNT 0x24 /* How many values available */
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#define BCM2838_COUNT_VAL_MASK 0x000000ff
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#define BCM2835_RND_VAL_SHIFT 24 /* Shift for valid words */
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#define BCM2835_RND_VAL_MASK 0x000000ff /* Number valid words mask */
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#define BCM2835_RND_VAL_WARM_CNT 0x40000 /* RNG Warm Up count */
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#define BCM2835_RND_WARM_CNT 0xfffff /* RNG Warm Up Count mask */
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#define BCM2835_RNG_DATA 0x08 /* RNG Data Register */
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#define BCM2838_RNG_DATA 0x20
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2016-07-19 18:07:47 +00:00
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#define RNG_FF_THRES 0x0c
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#define RNG_FF_THRES_MASK 0x0000001f
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2021-03-06 11:28:35 +00:00
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#define BCM2835_RNG_INT_MASK 0x10
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#define BCM2835_RNG_INT_OFF_BIT 0x00000001
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2016-07-19 18:07:47 +00:00
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#define RNG_FF_DEFAULT 0x10 /* FIFO threshold default */
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#define RNG_FIFO_WORDS (RNG_FF_DEFAULT / sizeof(uint32_t))
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#define RNG_NUM_OSCILLATORS 6
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#define RNG_STALL_COUNT_DEFAULT 10
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2018-03-10 02:49:58 +00:00
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#define RNG_CALLOUT_TICKS (hz * 4)
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2021-03-06 11:28:35 +00:00
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struct bcm_rng_conf {
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bus_size_t control_reg;
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bus_size_t status_reg;
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bus_size_t count_reg;
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bus_size_t data_reg;
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bus_size_t intr_mask_reg;
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uint32_t intr_disable_bit;
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uint32_t count_value_shift;
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uint32_t count_value_mask;
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uint32_t warmup_count;
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bool allow_2x_mode;
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bool can_diagnose;
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/* XXX diag regs */
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};
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static const struct bcm_rng_conf bcm2835_rng_conf = {
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.control_reg = RNG_CTRL,
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.status_reg = BCM2835_RNG_STATUS,
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.count_reg = BCM2835_RNG_STATUS, /* Same register */
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.data_reg = BCM2835_RNG_DATA,
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.intr_mask_reg = BCM2835_RNG_INT_MASK,
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.intr_disable_bit = BCM2835_RNG_INT_OFF_BIT,
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.count_value_shift = BCM2835_RND_VAL_SHIFT,
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.count_value_mask = BCM2835_RND_VAL_MASK,
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.warmup_count = BCM2835_RND_VAL_WARM_CNT,
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.allow_2x_mode = true,
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.can_diagnose = true
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};
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static const struct bcm_rng_conf bcm2838_rng_conf = {
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.control_reg = RNG_CTRL,
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.status_reg = BCM2838_RNG_STATUS,
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.count_reg = BCM2838_RNG_COUNT,
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.data_reg = BCM2838_RNG_DATA,
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.intr_mask_reg = 0,
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.intr_disable_bit = 0,
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.count_value_shift = 0,
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.count_value_mask = BCM2838_COUNT_VAL_MASK,
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.warmup_count = 0,
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.allow_2x_mode = false,
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.can_diagnose = false
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};
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2016-07-19 18:07:47 +00:00
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struct bcm2835_rng_softc {
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device_t sc_dev;
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struct resource * sc_mem_res;
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struct resource * sc_irq_res;
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void * sc_intr_hdl;
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2021-03-06 11:28:35 +00:00
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struct bcm_rng_conf const* conf;
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2016-07-19 18:07:47 +00:00
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uint32_t sc_buf[RNG_FIFO_WORDS];
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struct callout sc_rngto;
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int sc_stall_count;
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int sc_rbg2x;
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long sc_underrun;
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};
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2017-10-02 00:49:33 +00:00
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static struct ofw_compat_data compat_data[] = {
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2021-03-06 11:28:35 +00:00
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{"broadcom,bcm2835-rng", (uintptr_t)&bcm2835_rng_conf},
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{"brcm,bcm2835-rng", (uintptr_t)&bcm2835_rng_conf},
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{"brcm,bcm2711-rng200", (uintptr_t)&bcm2838_rng_conf},
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{"brcm,bcm2838-rng", (uintptr_t)&bcm2838_rng_conf},
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{"brcm,bcm2838-rng200", (uintptr_t)&bcm2838_rng_conf},
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{"brcm,bcm7211-rng", (uintptr_t)&bcm2838_rng_conf},
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{"brcm,bcm7278-rng", (uintptr_t)&bcm2838_rng_conf},
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{"brcm,iproc-rng200", (uintptr_t)&bcm2838_rng_conf},
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2017-10-02 00:49:33 +00:00
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{NULL, 0}
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};
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2016-07-19 18:07:47 +00:00
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static __inline void
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bcm2835_rng_stat_inc_underrun(struct bcm2835_rng_softc *sc)
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{
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atomic_add_long(&sc->sc_underrun, 1);
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}
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static __inline uint32_t
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bcm2835_rng_read4(struct bcm2835_rng_softc *sc, bus_size_t off)
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{
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return bus_read_4(sc->sc_mem_res, off);
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}
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static __inline void
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bcm2835_rng_read_multi4(struct bcm2835_rng_softc *sc, bus_size_t off,
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uint32_t *datap, bus_size_t count)
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{
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bus_read_multi_4(sc->sc_mem_res, off, datap, count);
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}
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static __inline void
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bcm2835_rng_write4(struct bcm2835_rng_softc *sc, bus_size_t off, uint32_t val)
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{
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bus_write_4(sc->sc_mem_res, off, val);
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}
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static void
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bcm2835_rng_dump_registers(struct bcm2835_rng_softc *sc, struct sbuf *sbp)
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{
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uint32_t comblk2_osc, comblk1_osc, jclk_byp_div, val;
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int i;
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2021-03-06 11:28:35 +00:00
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if (!sc->conf->can_diagnose)
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/* Not implemented. */
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return;
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2016-07-19 18:07:47 +00:00
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/* Display RNG control register contents */
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2021-03-06 11:28:35 +00:00
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val = bcm2835_rng_read4(sc, sc->conf->control_reg);
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2016-07-19 18:07:47 +00:00
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sbuf_printf(sbp, "RNG_CTRL (%08x)\n", val);
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comblk2_osc = (val & RNG_COMBLK2_OSC) >> RNG_COMBLK2_OSC_SHIFT;
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sbuf_printf(sbp, " RNG_COMBLK2_OSC (%02x)\n", comblk2_osc);
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for (i = 0; i < RNG_NUM_OSCILLATORS; i++)
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if ((comblk2_osc & (1 << i)) == 0)
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sbuf_printf(sbp, " Oscillator %d enabled\n", i + 1);
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comblk1_osc = (val & RNG_COMBLK1_OSC) >> RNG_COMBLK1_OSC_SHIFT;
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sbuf_printf(sbp, " RNG_COMBLK1_OSC (%02x)\n", comblk1_osc);
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for (i = 0; i < RNG_NUM_OSCILLATORS; i++)
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if ((comblk1_osc & (1 << i)) == 0)
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sbuf_printf(sbp, " Oscillator %d enabled\n", i + 1);
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jclk_byp_div = (val & RNG_JCLK_BYP_DIV_CNT) >>
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RNG_JCLK_BYP_DIV_CNT_SHIFT;
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sbuf_printf(sbp,
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" RNG_JCLK_BYP_DIV_CNT (%02x)\n APB clock frequency / %d\n",
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jclk_byp_div, 2 * (jclk_byp_div + 1));
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sbuf_printf(sbp, " RNG_JCLK_BYP_SRC:\n %s\n",
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(val & RNG_JCLK_BYP_SRC) ? "Use divided down APB clock" :
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"Use RNG clock (APB clock)");
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sbuf_printf(sbp, " RNG_JCLK_BYP_SEL:\n %s\n",
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(val & RNG_JCLK_BYP_SEL) ? "Bypass internal jitter clock" :
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"Use internal jitter clock");
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if ((val & RNG_RBG2X) != 0)
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sbuf_cat(sbp, " RNG_RBG2X: RNG 2X SPEED enabled\n");
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if ((val & RNG_RBGEN_BIT) != 0)
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sbuf_cat(sbp, " RNG_RBGEN_BIT: RBG enabled\n");
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/* Display RNG status register contents */
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2021-03-06 11:28:35 +00:00
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val = bcm2835_rng_read4(sc, sc->conf->status_reg);
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2016-07-19 18:07:47 +00:00
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sbuf_printf(sbp, "RNG_CTRL (%08x)\n", val);
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sbuf_printf(sbp, " RND_VAL: %02x\n",
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2021-03-06 11:28:35 +00:00
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(val >> sc->conf->count_value_shift) & sc->conf->count_value_mask);
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sbuf_printf(sbp, " RND_WARM_CNT: %05x\n", val & sc->conf->warmup_count);
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2016-07-19 18:07:47 +00:00
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/* Display FIFO threshold register contents */
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val = bcm2835_rng_read4(sc, RNG_FF_THRES);
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sbuf_printf(sbp, "RNG_FF_THRES: %05x\n", val & RNG_FF_THRES_MASK);
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/* Display interrupt mask register contents */
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2021-03-06 11:28:35 +00:00
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val = bcm2835_rng_read4(sc, sc->conf->intr_mask_reg);
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2016-07-19 18:07:47 +00:00
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sbuf_printf(sbp, "RNG_INT_MASK: interrupt %s\n",
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2021-03-06 11:28:35 +00:00
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((val & sc->conf->intr_disable_bit) != 0) ? "disabled" : "enabled");
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2016-07-19 18:07:47 +00:00
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}
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static void
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bcm2835_rng_disable_intr(struct bcm2835_rng_softc *sc)
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{
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uint32_t mask;
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/* Set the interrupt off bit in the interrupt mask register */
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2021-03-06 11:28:35 +00:00
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mask = bcm2835_rng_read4(sc, sc->conf->intr_mask_reg);
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mask |= sc->conf->intr_disable_bit;
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bcm2835_rng_write4(sc, sc->conf->intr_mask_reg, mask);
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2016-07-19 18:07:47 +00:00
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}
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static void
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bcm2835_rng_start(struct bcm2835_rng_softc *sc)
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{
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uint32_t ctrl;
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/* Disable the interrupt */
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2021-03-06 11:28:35 +00:00
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if (sc->conf->intr_mask_reg)
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bcm2835_rng_disable_intr(sc);
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2016-07-19 18:07:47 +00:00
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/* Set the warmup count */
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2021-03-06 11:28:35 +00:00
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if (sc->conf->warmup_count > 0)
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bcm2835_rng_write4(sc, sc->conf->status_reg,
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sc->conf->warmup_count);
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2016-07-19 18:07:47 +00:00
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/* Enable the RNG */
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2021-03-06 11:28:35 +00:00
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|
|
ctrl = bcm2835_rng_read4(sc, sc->conf->control_reg);
|
2016-07-19 18:07:47 +00:00
|
|
|
ctrl |= RNG_RBGEN_BIT;
|
2021-03-06 11:28:35 +00:00
|
|
|
if (sc->sc_rbg2x && sc->conf->allow_2x_mode)
|
2016-07-19 18:07:47 +00:00
|
|
|
ctrl |= RNG_RBG2X;
|
2021-03-06 11:28:35 +00:00
|
|
|
bcm2835_rng_write4(sc, sc->conf->control_reg, ctrl);
|
2016-07-19 18:07:47 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
bcm2835_rng_stop(struct bcm2835_rng_softc *sc)
|
|
|
|
{
|
|
|
|
uint32_t ctrl;
|
|
|
|
|
|
|
|
/* Disable the RNG */
|
2021-03-06 11:28:35 +00:00
|
|
|
ctrl = bcm2835_rng_read4(sc, sc->conf->control_reg);
|
2016-07-19 18:07:47 +00:00
|
|
|
ctrl &= ~RNG_RBGEN_BIT;
|
2021-03-06 11:28:35 +00:00
|
|
|
bcm2835_rng_write4(sc, sc->conf->control_reg, ctrl);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
bcm2835_rng_enqueue_harvest(struct bcm2835_rng_softc *sc, uint32_t nread)
|
|
|
|
{
|
|
|
|
char *sc_buf_chunk;
|
|
|
|
uint32_t chunk_size;
|
|
|
|
uint32_t cnt;
|
|
|
|
|
|
|
|
chunk_size = sizeof(((struct harvest_event *)0)->he_entropy);
|
|
|
|
cnt = nread * sizeof(uint32_t);
|
|
|
|
sc_buf_chunk = (void*)sc->sc_buf;
|
|
|
|
|
|
|
|
while (cnt > 0) {
|
|
|
|
uint32_t size;
|
|
|
|
|
|
|
|
size = MIN(cnt, chunk_size);
|
|
|
|
|
|
|
|
random_harvest_queue(sc_buf_chunk, size, RANDOM_PURE_BROADCOM);
|
|
|
|
|
|
|
|
sc_buf_chunk += size;
|
|
|
|
cnt -= size;
|
|
|
|
}
|
2016-07-19 18:07:47 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
2018-03-10 02:49:58 +00:00
|
|
|
bcm2835_rng_harvest(void *arg)
|
2016-07-19 18:07:47 +00:00
|
|
|
{
|
|
|
|
uint32_t *dest;
|
2021-03-06 11:28:35 +00:00
|
|
|
uint32_t hwcount;
|
2016-07-19 18:07:47 +00:00
|
|
|
u_int cnt, nread, num_avail, num_words;
|
|
|
|
int seen_underrun, num_stalls;
|
2018-03-10 02:49:58 +00:00
|
|
|
struct bcm2835_rng_softc *sc = arg;
|
2016-07-19 18:07:47 +00:00
|
|
|
|
|
|
|
dest = sc->sc_buf;
|
|
|
|
nread = num_words = 0;
|
|
|
|
seen_underrun = num_stalls = 0;
|
2021-03-06 11:28:35 +00:00
|
|
|
|
2016-07-19 18:07:47 +00:00
|
|
|
for (cnt = sizeof(sc->sc_buf) / sizeof(uint32_t); cnt > 0;
|
|
|
|
cnt -= num_words) {
|
2021-03-06 11:28:35 +00:00
|
|
|
/* Read count register to find out how many words available */
|
|
|
|
hwcount = bcm2835_rng_read4(sc, sc->conf->count_reg);
|
|
|
|
num_avail = (hwcount >> sc->conf->count_value_shift) &
|
|
|
|
sc->conf->count_value_mask;
|
2016-07-19 18:07:47 +00:00
|
|
|
|
|
|
|
/* If we have none... */
|
|
|
|
if (num_avail == 0) {
|
|
|
|
bcm2835_rng_stat_inc_underrun(sc);
|
|
|
|
if (++seen_underrun >= sc->sc_stall_count) {
|
|
|
|
if (num_stalls++ > 0) {
|
|
|
|
device_printf(sc->sc_dev,
|
|
|
|
"RNG stalled, disabling device\n");
|
|
|
|
bcm2835_rng_stop(sc);
|
|
|
|
break;
|
|
|
|
} else {
|
|
|
|
device_printf(sc->sc_dev,
|
|
|
|
"Too many underruns, resetting\n");
|
|
|
|
bcm2835_rng_stop(sc);
|
|
|
|
bcm2835_rng_start(sc);
|
|
|
|
seen_underrun = 0;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
/* Try again */
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
|
|
|
|
CTR2(KTR_DEV, "%s: %d words available in RNG FIFO",
|
|
|
|
device_get_nameunit(sc->sc_dev), num_avail);
|
|
|
|
|
|
|
|
/* Pull MIN(num_avail, cnt) words from the FIFO */
|
|
|
|
num_words = (num_avail > cnt) ? cnt : num_avail;
|
2021-03-06 11:28:35 +00:00
|
|
|
bcm2835_rng_read_multi4(sc, sc->conf->data_reg, dest,
|
2016-07-19 18:07:47 +00:00
|
|
|
num_words);
|
|
|
|
dest += num_words;
|
|
|
|
nread += num_words;
|
|
|
|
}
|
|
|
|
|
2021-03-06 11:28:35 +00:00
|
|
|
bcm2835_rng_enqueue_harvest(sc, nread);
|
2016-07-19 18:07:47 +00:00
|
|
|
|
2018-03-10 02:49:58 +00:00
|
|
|
callout_reset(&sc->sc_rngto, RNG_CALLOUT_TICKS, bcm2835_rng_harvest, sc);
|
2016-07-19 18:07:47 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
sysctl_bcm2835_rng_2xspeed(SYSCTL_HANDLER_ARGS)
|
|
|
|
{
|
|
|
|
struct bcm2835_rng_softc *sc = arg1;
|
|
|
|
int error, rbg2x;
|
|
|
|
|
|
|
|
rbg2x = sc->sc_rbg2x;
|
|
|
|
error = sysctl_handle_int(oidp, &rbg2x, 0, req);
|
|
|
|
if (error)
|
|
|
|
return (error);
|
|
|
|
if (req->newptr == NULL)
|
|
|
|
return (error);
|
|
|
|
if (rbg2x == sc->sc_rbg2x)
|
|
|
|
return (0);
|
|
|
|
|
|
|
|
/* Reset the RNG */
|
|
|
|
bcm2835_rng_stop(sc);
|
|
|
|
sc->sc_rbg2x = rbg2x;
|
|
|
|
bcm2835_rng_start(sc);
|
|
|
|
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
#ifdef BCM2835_RNG_DEBUG_REGISTERS
|
|
|
|
static int
|
|
|
|
sysctl_bcm2835_rng_dump(SYSCTL_HANDLER_ARGS)
|
|
|
|
{
|
|
|
|
struct sbuf sb;
|
|
|
|
struct bcm2835_rng_softc *sc = arg1;
|
|
|
|
int error;
|
|
|
|
|
|
|
|
error = sysctl_wire_old_buffer(req, 0);
|
|
|
|
if (error != 0)
|
|
|
|
return (error);
|
|
|
|
sbuf_new_for_sysctl(&sb, NULL, 128, req);
|
|
|
|
bcm2835_rng_dump_registers(sc, &sb);
|
|
|
|
error = sbuf_finish(&sb);
|
|
|
|
sbuf_delete(&sb);
|
|
|
|
return (error);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
static int
|
|
|
|
bcm2835_rng_probe(device_t dev)
|
|
|
|
{
|
|
|
|
|
|
|
|
if (!ofw_bus_status_okay(dev))
|
|
|
|
return (ENXIO);
|
|
|
|
|
2017-10-02 00:49:33 +00:00
|
|
|
if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
|
2016-07-19 18:07:47 +00:00
|
|
|
return (ENXIO);
|
|
|
|
|
2021-03-06 11:28:35 +00:00
|
|
|
device_set_desc(dev, "Broadcom BCM2835/BCM2838 RNG");
|
2016-07-19 18:07:47 +00:00
|
|
|
|
|
|
|
return (BUS_PROBE_DEFAULT);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
bcm2835_rng_attach(device_t dev)
|
|
|
|
{
|
|
|
|
struct bcm2835_rng_softc *sc;
|
|
|
|
struct sysctl_ctx_list *sysctl_ctx;
|
|
|
|
struct sysctl_oid *sysctl_tree;
|
|
|
|
int error, rid;
|
|
|
|
|
|
|
|
error = 0;
|
|
|
|
sc = device_get_softc(dev);
|
|
|
|
sc->sc_dev = dev;
|
2021-03-06 11:28:35 +00:00
|
|
|
|
|
|
|
sc->conf = (void const*)ofw_bus_search_compatible(dev, compat_data)->ocd_data;
|
|
|
|
KASSERT(sc->conf != NULL, ("bcm2835_rng_attach: sc->conf == NULL"));
|
|
|
|
|
2016-07-19 18:07:47 +00:00
|
|
|
sc->sc_stall_count = RNG_STALL_COUNT_DEFAULT;
|
2018-03-10 02:49:58 +00:00
|
|
|
|
2016-07-19 18:07:47 +00:00
|
|
|
/* Initialize callout */
|
|
|
|
callout_init(&sc->sc_rngto, CALLOUT_MPSAFE);
|
2018-03-10 02:49:58 +00:00
|
|
|
|
2016-07-19 18:07:47 +00:00
|
|
|
TUNABLE_INT_FETCH("bcmrng.stall_count", &sc->sc_stall_count);
|
2021-03-06 11:28:35 +00:00
|
|
|
if (sc->conf->allow_2x_mode)
|
|
|
|
TUNABLE_INT_FETCH("bcmrng.2xspeed", &sc->sc_rbg2x);
|
2016-07-19 18:07:47 +00:00
|
|
|
|
|
|
|
/* Allocate memory resources */
|
|
|
|
rid = 0;
|
|
|
|
sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
|
|
|
|
RF_ACTIVE);
|
|
|
|
if (sc->sc_mem_res == NULL) {
|
|
|
|
bcm2835_rng_detach(dev);
|
|
|
|
return (ENXIO);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Start the RNG */
|
|
|
|
bcm2835_rng_start(sc);
|
|
|
|
|
|
|
|
/* Dump the registers if booting verbose */
|
|
|
|
if (bootverbose) {
|
|
|
|
struct sbuf sb;
|
|
|
|
|
|
|
|
(void) sbuf_new(&sb, NULL, 256,
|
|
|
|
SBUF_AUTOEXTEND | SBUF_INCLUDENUL);
|
|
|
|
bcm2835_rng_dump_registers(sc, &sb);
|
|
|
|
sbuf_trim(&sb);
|
|
|
|
error = sbuf_finish(&sb);
|
|
|
|
if (error == 0)
|
|
|
|
device_printf(dev, "%s", sbuf_data(&sb));
|
|
|
|
sbuf_delete(&sb);
|
|
|
|
}
|
|
|
|
|
|
|
|
sysctl_ctx = device_get_sysctl_ctx(dev);
|
|
|
|
sysctl_tree = device_get_sysctl_tree(dev);
|
|
|
|
SYSCTL_ADD_LONG(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), OID_AUTO,
|
|
|
|
"underrun", CTLFLAG_RD, &sc->sc_underrun,
|
|
|
|
"Number of FIFO underruns");
|
2021-03-06 11:28:35 +00:00
|
|
|
if (sc->conf->allow_2x_mode)
|
|
|
|
SYSCTL_ADD_PROC(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), OID_AUTO,
|
|
|
|
"2xspeed", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, 0,
|
|
|
|
sysctl_bcm2835_rng_2xspeed, "I", "Enable RBG 2X SPEED");
|
2016-07-19 18:07:47 +00:00
|
|
|
SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), OID_AUTO,
|
|
|
|
"stall_count", CTLFLAG_RW, &sc->sc_stall_count,
|
|
|
|
RNG_STALL_COUNT_DEFAULT, "Number of underruns to assume RNG stall");
|
|
|
|
#ifdef BCM2835_RNG_DEBUG_REGISTERS
|
|
|
|
SYSCTL_ADD_PROC(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), OID_AUTO,
|
2020-02-26 14:26:36 +00:00
|
|
|
"dumpregs", CTLTYPE_STRING | CTLFLAG_RD | CTLFLAG_NEEDGIANT, sc, 0,
|
2016-07-19 18:07:47 +00:00
|
|
|
sysctl_bcm2835_rng_dump, "S", "Dump RNG registers");
|
|
|
|
#endif
|
|
|
|
|
2021-03-06 11:28:35 +00:00
|
|
|
/*
|
2018-03-10 02:49:58 +00:00
|
|
|
* Schedule the initial harvesting one second from now, which should give the
|
|
|
|
* hardware RNG plenty of time to generate the first random bytes.
|
|
|
|
*/
|
|
|
|
callout_reset(&sc->sc_rngto, hz, bcm2835_rng_harvest, sc);
|
2016-07-19 18:07:47 +00:00
|
|
|
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
bcm2835_rng_detach(device_t dev)
|
|
|
|
{
|
|
|
|
struct bcm2835_rng_softc *sc;
|
|
|
|
|
|
|
|
sc = device_get_softc(dev);
|
|
|
|
|
|
|
|
/* Stop the RNG */
|
|
|
|
bcm2835_rng_stop(sc);
|
|
|
|
|
|
|
|
/* Drain the callout it */
|
|
|
|
callout_drain(&sc->sc_rngto);
|
|
|
|
|
|
|
|
/* Release memory resource */
|
|
|
|
if (sc->sc_mem_res != NULL)
|
|
|
|
bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res);
|
|
|
|
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
static device_method_t bcm2835_rng_methods[] = {
|
|
|
|
/* Device interface */
|
|
|
|
DEVMETHOD(device_probe, bcm2835_rng_probe),
|
|
|
|
DEVMETHOD(device_attach, bcm2835_rng_attach),
|
|
|
|
DEVMETHOD(device_detach, bcm2835_rng_detach),
|
|
|
|
|
|
|
|
DEVMETHOD_END
|
|
|
|
};
|
|
|
|
|
|
|
|
static driver_t bcm2835_rng_driver = {
|
|
|
|
"bcmrng",
|
|
|
|
bcm2835_rng_methods,
|
|
|
|
sizeof(struct bcm2835_rng_softc)
|
|
|
|
};
|
|
|
|
|
2022-05-09 21:26:44 +00:00
|
|
|
DRIVER_MODULE(bcm2835_rng, simplebus, bcm2835_rng_driver, 0, 0);
|
|
|
|
DRIVER_MODULE(bcm2835_rng, ofwbus, bcm2835_rng_driver, 0, 0);
|
2016-07-19 18:07:47 +00:00
|
|
|
MODULE_VERSION(bcm2835_rng, 1);
|
|
|
|
MODULE_DEPEND(bcm2835_rng, randomdev, 1, 1, 1);
|