43 lines
1.4 KiB
C
43 lines
1.4 KiB
C
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#ifndef __XEN_DEVICE_TREE_DEFS_H__
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#define __XEN_DEVICE_TREE_DEFS_H__
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#if defined(__XEN__) || defined(__XEN_TOOLS__)
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/*
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* The device tree compiler (DTC) is allocating the phandle from 1 to
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* onwards. Reserve a high value for the GIC phandle.
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*/
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#define GUEST_PHANDLE_GIC (65000)
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#define GUEST_ROOT_ADDRESS_CELLS 2
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#define GUEST_ROOT_SIZE_CELLS 2
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/**
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* IRQ line type.
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*
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* DT_IRQ_TYPE_NONE - default, unspecified type
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* DT_IRQ_TYPE_EDGE_RISING - rising edge triggered
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* DT_IRQ_TYPE_EDGE_FALLING - falling edge triggered
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* DT_IRQ_TYPE_EDGE_BOTH - rising and falling edge triggered
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* DT_IRQ_TYPE_LEVEL_HIGH - high level triggered
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* DT_IRQ_TYPE_LEVEL_LOW - low level triggered
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* DT_IRQ_TYPE_LEVEL_MASK - Mask to filter out the level bits
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* DT_IRQ_TYPE_SENSE_MASK - Mask for all the above bits
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* DT_IRQ_TYPE_INVALID - Use to initialize the type
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*/
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#define DT_IRQ_TYPE_NONE 0x00000000
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#define DT_IRQ_TYPE_EDGE_RISING 0x00000001
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#define DT_IRQ_TYPE_EDGE_FALLING 0x00000002
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#define DT_IRQ_TYPE_EDGE_BOTH \
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(DT_IRQ_TYPE_EDGE_FALLING | DT_IRQ_TYPE_EDGE_RISING)
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#define DT_IRQ_TYPE_LEVEL_HIGH 0x00000004
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#define DT_IRQ_TYPE_LEVEL_LOW 0x00000008
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#define DT_IRQ_TYPE_LEVEL_MASK \
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(DT_IRQ_TYPE_LEVEL_LOW | DT_IRQ_TYPE_LEVEL_HIGH)
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#define DT_IRQ_TYPE_SENSE_MASK 0x0000000f
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#define DT_IRQ_TYPE_INVALID 0x00000010
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#endif
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#endif
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