2012-01-31 19:38:18 +00:00
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/*-
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2017-11-27 14:52:40 +00:00
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* SPDX-License-Identifier: BSD-2-Clause
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*
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2012-01-31 19:38:18 +00:00
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* BSD LICENSE
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*
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* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <dev/isci/isci.h>
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#include <sys/sysctl.h>
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#include <sys/malloc.h>
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#include <cam/cam_periph.h>
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2012-09-26 16:46:44 +00:00
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#include <dev/led/led.h>
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2012-01-31 19:38:18 +00:00
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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#include <dev/isci/scil/scic_logger.h>
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#include <dev/isci/scil/scic_library.h>
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2012-09-26 16:46:44 +00:00
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#include <dev/isci/scil/scic_sgpio.h>
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2012-01-31 19:38:18 +00:00
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#include <dev/isci/scil/scic_user_callback.h>
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#include <dev/isci/scil/scif_controller.h>
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#include <dev/isci/scil/scif_library.h>
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#include <dev/isci/scil/scif_logger.h>
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#include <dev/isci/scil/scif_user_callback.h>
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MALLOC_DEFINE(M_ISCI, "isci", "isci driver memory allocations");
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struct isci_softc *g_isci;
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uint32_t g_isci_debug_level = 0;
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static int isci_probe(device_t);
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static int isci_attach(device_t);
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static int isci_detach(device_t);
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int isci_initialize(struct isci_softc *isci);
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void isci_allocate_dma_buffer_callback(void *arg, bus_dma_segment_t *seg,
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int nseg, int error);
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static device_method_t isci_pci_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, isci_probe),
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DEVMETHOD(device_attach, isci_attach),
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DEVMETHOD(device_detach, isci_detach),
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{ 0, 0 }
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};
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static driver_t isci_pci_driver = {
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"isci",
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isci_pci_methods,
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sizeof(struct isci_softc),
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};
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2022-05-06 22:46:58 +00:00
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DRIVER_MODULE(isci, pci, isci_pci_driver, 0, 0);
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2013-10-07 20:48:24 +00:00
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MODULE_DEPEND(isci, cam, 1, 1, 1);
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2012-01-31 19:38:18 +00:00
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static struct _pcsid
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{
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u_int32_t type;
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const char *desc;
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} pci_ids[] = {
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{ 0x1d608086, "Intel(R) C600 Series Chipset SAS Controller" },
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{ 0x1d618086, "Intel(R) C600 Series Chipset SAS Controller (SATA mode)" },
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{ 0x1d628086, "Intel(R) C600 Series Chipset SAS Controller" },
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{ 0x1d638086, "Intel(R) C600 Series Chipset SAS Controller" },
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{ 0x1d648086, "Intel(R) C600 Series Chipset SAS Controller" },
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{ 0x1d658086, "Intel(R) C600 Series Chipset SAS Controller" },
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{ 0x1d668086, "Intel(R) C600 Series Chipset SAS Controller" },
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{ 0x1d678086, "Intel(R) C600 Series Chipset SAS Controller" },
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{ 0x1d688086, "Intel(R) C600 Series Chipset SAS Controller" },
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{ 0x1d698086, "Intel(R) C600 Series Chipset SAS Controller" },
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{ 0x1d6a8086, "Intel(R) C600 Series Chipset SAS Controller (SATA mode)" },
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2012-02-27 17:04:18 +00:00
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{ 0x1d6b8086, "Intel(R) C600 Series Chipset SAS Controller (SATA mode)" },
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{ 0x1d6c8086, "Intel(R) C600 Series Chipset SAS Controller" },
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{ 0x1d6d8086, "Intel(R) C600 Series Chipset SAS Controller" },
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{ 0x1d6e8086, "Intel(R) C600 Series Chipset SAS Controller" },
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{ 0x1d6f8086, "Intel(R) C600 Series Chipset SAS Controller (SATA mode)" },
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2012-01-31 19:38:18 +00:00
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{ 0x00000000, NULL }
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};
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static int
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isci_probe (device_t device)
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{
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u_int32_t type = pci_get_devid(device);
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struct _pcsid *ep = pci_ids;
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while (ep->type && ep->type != type)
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++ep;
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if (ep->desc)
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{
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device_set_desc(device, ep->desc);
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2012-02-27 17:04:18 +00:00
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return (BUS_PROBE_DEFAULT);
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2012-01-31 19:38:18 +00:00
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}
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else
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return (ENXIO);
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}
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static int
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isci_allocate_pci_memory(struct isci_softc *isci)
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{
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int i;
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for (i = 0; i < ISCI_NUM_PCI_BARS; i++)
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{
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struct ISCI_PCI_BAR *pci_bar = &isci->pci_bar[i];
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pci_bar->resource_id = PCIR_BAR(i*2);
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2016-02-19 03:37:56 +00:00
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pci_bar->resource = bus_alloc_resource_any(isci->device,
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SYS_RES_MEMORY, &pci_bar->resource_id,
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2012-01-31 19:38:18 +00:00
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RF_ACTIVE);
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if(pci_bar->resource == NULL)
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isci_log_message(0, "ISCI",
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"unable to allocate pci resource\n");
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else {
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pci_bar->bus_tag = rman_get_bustag(pci_bar->resource);
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pci_bar->bus_handle =
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rman_get_bushandle(pci_bar->resource);
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}
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}
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return (0);
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}
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static int
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isci_attach(device_t device)
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{
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int error;
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struct isci_softc *isci = DEVICE2SOFTC(device);
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g_isci = isci;
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isci->device = device;
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2015-09-08 15:59:55 +00:00
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pci_enable_busmaster(device);
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2012-01-31 19:38:18 +00:00
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isci_allocate_pci_memory(isci);
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error = isci_initialize(isci);
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if (error)
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{
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isci_detach(device);
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return (error);
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}
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isci_interrupt_setup(isci);
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isci_sysctl_initialize(isci);
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return (0);
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}
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static int
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isci_detach(device_t device)
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{
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struct isci_softc *isci = DEVICE2SOFTC(device);
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2012-09-26 16:46:44 +00:00
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int i, phy;
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2012-01-31 19:38:18 +00:00
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for (i = 0; i < isci->controller_count; i++) {
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struct ISCI_CONTROLLER *controller = &isci->controllers[i];
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SCI_STATUS status;
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2012-08-21 22:28:14 +00:00
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void *unmap_buffer;
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2012-01-31 19:38:18 +00:00
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if (controller->scif_controller_handle != NULL) {
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scic_controller_disable_interrupts(
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scif_controller_get_scic_handle(controller->scif_controller_handle));
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mtx_lock(&controller->lock);
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status = scif_controller_stop(controller->scif_controller_handle, 0);
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mtx_unlock(&controller->lock);
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while (controller->is_started == TRUE) {
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/* Now poll for interrupts until the controller stop complete
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* callback is received.
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*/
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mtx_lock(&controller->lock);
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isci_interrupt_poll_handler(controller);
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mtx_unlock(&controller->lock);
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pause("isci", 1);
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}
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if(controller->sim != NULL) {
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mtx_lock(&controller->lock);
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xpt_free_path(controller->path);
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xpt_bus_deregister(cam_sim_path(controller->sim));
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cam_sim_free(controller->sim, TRUE);
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mtx_unlock(&controller->lock);
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}
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}
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if (controller->timer_memory != NULL)
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free(controller->timer_memory, M_ISCI);
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if (controller->remote_device_memory != NULL)
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free(controller->remote_device_memory, M_ISCI);
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2012-08-21 22:28:14 +00:00
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2012-10-10 18:01:56 +00:00
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for (phy = 0; phy < SCI_MAX_PHYS; phy++) {
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if (controller->phys[phy].cdev_fault)
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led_destroy(controller->phys[phy].cdev_fault);
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if (controller->phys[phy].cdev_locate)
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led_destroy(controller->phys[phy].cdev_locate);
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}
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2012-09-26 16:46:44 +00:00
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2012-08-21 22:28:14 +00:00
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while (1) {
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sci_pool_get(controller->unmap_buffer_pool, unmap_buffer);
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if (unmap_buffer == NULL)
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break;
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contigfree(unmap_buffer, PAGE_SIZE, M_ISCI);
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}
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2012-01-31 19:38:18 +00:00
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}
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/* The SCIF controllers have been stopped, so we can now
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* free the SCI library memory.
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*/
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if (isci->sci_library_memory != NULL)
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free(isci->sci_library_memory, M_ISCI);
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for (i = 0; i < ISCI_NUM_PCI_BARS; i++)
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{
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struct ISCI_PCI_BAR *pci_bar = &isci->pci_bar[i];
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if (pci_bar->resource != NULL)
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bus_release_resource(device, SYS_RES_MEMORY,
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pci_bar->resource_id, pci_bar->resource);
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}
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for (i = 0; i < isci->num_interrupts; i++)
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{
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struct ISCI_INTERRUPT_INFO *interrupt_info;
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interrupt_info = &isci->interrupt_info[i];
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if(interrupt_info->tag != NULL)
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bus_teardown_intr(device, interrupt_info->res,
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interrupt_info->tag);
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if(interrupt_info->res != NULL)
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bus_release_resource(device, SYS_RES_IRQ,
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rman_get_rid(interrupt_info->res),
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interrupt_info->res);
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pci_release_msi(device);
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}
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2015-09-08 15:59:55 +00:00
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pci_disable_busmaster(device);
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2012-01-31 19:38:18 +00:00
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return (0);
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}
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int
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isci_initialize(struct isci_softc *isci)
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{
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int error;
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uint32_t status = 0;
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uint32_t library_object_size;
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uint32_t verbosity_mask;
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uint32_t scic_log_object_mask;
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uint32_t scif_log_object_mask;
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uint8_t *header_buffer;
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library_object_size = scif_library_get_object_size(SCI_MAX_CONTROLLERS);
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isci->sci_library_memory =
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malloc(library_object_size, M_ISCI, M_NOWAIT | M_ZERO );
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isci->sci_library_handle = scif_library_construct(
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isci->sci_library_memory, SCI_MAX_CONTROLLERS);
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sci_object_set_association( isci->sci_library_handle, (void *)isci);
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verbosity_mask = (1<<SCI_LOG_VERBOSITY_ERROR) |
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(1<<SCI_LOG_VERBOSITY_WARNING) | (1<<SCI_LOG_VERBOSITY_INFO) |
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(1<<SCI_LOG_VERBOSITY_TRACE);
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scic_log_object_mask = 0xFFFFFFFF;
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scic_log_object_mask &= ~SCIC_LOG_OBJECT_COMPLETION_QUEUE;
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scic_log_object_mask &= ~SCIC_LOG_OBJECT_SSP_IO_REQUEST;
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scic_log_object_mask &= ~SCIC_LOG_OBJECT_STP_IO_REQUEST;
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scic_log_object_mask &= ~SCIC_LOG_OBJECT_SMP_IO_REQUEST;
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scic_log_object_mask &= ~SCIC_LOG_OBJECT_CONTROLLER;
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scif_log_object_mask = 0xFFFFFFFF;
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scif_log_object_mask &= ~SCIF_LOG_OBJECT_CONTROLLER;
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scif_log_object_mask &= ~SCIF_LOG_OBJECT_IO_REQUEST;
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TUNABLE_INT_FETCH("hw.isci.debug_level", &g_isci_debug_level);
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sci_logger_enable(sci_object_get_logger(isci->sci_library_handle),
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scif_log_object_mask, verbosity_mask);
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sci_logger_enable(sci_object_get_logger(
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scif_library_get_scic_handle(isci->sci_library_handle)),
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scic_log_object_mask, verbosity_mask);
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header_buffer = (uint8_t *)&isci->pci_common_header;
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for (uint8_t i = 0; i < sizeof(isci->pci_common_header); i++)
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header_buffer[i] = pci_read_config(isci->device, i, 1);
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scic_library_set_pci_info(
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scif_library_get_scic_handle(isci->sci_library_handle),
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&isci->pci_common_header);
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isci->oem_parameters_found = FALSE;
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|
|
|
|
isci_get_oem_parameters(isci);
|
|
|
|
|
|
|
|
/* trigger interrupt if 32 completions occur before timeout expires */
|
|
|
|
isci->coalesce_number = 32;
|
|
|
|
|
|
|
|
/* trigger interrupt if 2 microseconds elapse after a completion occurs,
|
|
|
|
* regardless if "coalesce_number" completions have occurred
|
|
|
|
*/
|
|
|
|
isci->coalesce_timeout = 2;
|
|
|
|
|
|
|
|
isci->controller_count = scic_library_get_pci_device_controller_count(
|
|
|
|
scif_library_get_scic_handle(isci->sci_library_handle));
|
|
|
|
|
|
|
|
for (int index = 0; index < isci->controller_count; index++) {
|
|
|
|
struct ISCI_CONTROLLER *controller = &isci->controllers[index];
|
|
|
|
SCI_CONTROLLER_HANDLE_T scif_controller_handle;
|
|
|
|
|
|
|
|
controller->index = index;
|
|
|
|
isci_controller_construct(controller, isci);
|
|
|
|
|
|
|
|
scif_controller_handle = controller->scif_controller_handle;
|
|
|
|
|
|
|
|
status = isci_controller_initialize(controller);
|
|
|
|
|
|
|
|
if(status != SCI_SUCCESS) {
|
|
|
|
isci_log_message(0, "ISCI",
|
|
|
|
"isci_controller_initialize FAILED: %x\n",
|
|
|
|
status);
|
|
|
|
return (status);
|
|
|
|
}
|
|
|
|
|
|
|
|
error = isci_controller_allocate_memory(controller);
|
|
|
|
|
|
|
|
if (error != 0)
|
|
|
|
return (error);
|
|
|
|
|
|
|
|
scif_controller_set_interrupt_coalescence(
|
|
|
|
scif_controller_handle, isci->coalesce_number,
|
|
|
|
isci->coalesce_timeout);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* FreeBSD provides us a hook to ensure we get a chance to start
|
|
|
|
* our controllers and complete initial domain discovery before
|
|
|
|
* it searches for the boot device. Once we're done, we'll
|
|
|
|
* disestablish the hook, signaling the kernel that is can proceed
|
|
|
|
* with the boot process.
|
|
|
|
*/
|
|
|
|
isci->config_hook.ich_func = &isci_controller_start;
|
|
|
|
isci->config_hook.ich_arg = &isci->controllers[0];
|
|
|
|
|
|
|
|
if (config_intrhook_establish(&isci->config_hook) != 0)
|
|
|
|
isci_log_message(0, "ISCI",
|
|
|
|
"config_intrhook_establish failed!\n");
|
|
|
|
|
|
|
|
return (status);
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
isci_allocate_dma_buffer_callback(void *arg, bus_dma_segment_t *seg,
|
|
|
|
int nseg, int error)
|
|
|
|
{
|
|
|
|
struct ISCI_MEMORY *memory = (struct ISCI_MEMORY *)arg;
|
|
|
|
|
|
|
|
memory->error = error;
|
|
|
|
|
|
|
|
if (nseg != 1 || error != 0)
|
|
|
|
isci_log_message(0, "ISCI",
|
|
|
|
"Failed to allocate physically contiguous memory!\n");
|
|
|
|
else
|
|
|
|
memory->physical_address = seg->ds_addr;
|
|
|
|
}
|
|
|
|
|
|
|
|
int
|
2019-03-12 16:49:08 +00:00
|
|
|
isci_allocate_dma_buffer(device_t device, struct ISCI_CONTROLLER *controller,
|
|
|
|
struct ISCI_MEMORY *memory)
|
2012-01-31 19:38:18 +00:00
|
|
|
{
|
|
|
|
uint32_t status;
|
|
|
|
|
|
|
|
status = bus_dma_tag_create(bus_get_dma_tag(device),
|
2019-07-10 22:23:59 +00:00
|
|
|
0x40 /* cacheline alignment */,
|
|
|
|
ISCI_DMA_BOUNDARY, BUS_SPACE_MAXADDR,
|
2012-01-31 19:38:18 +00:00
|
|
|
BUS_SPACE_MAXADDR, NULL, NULL, memory->size,
|
|
|
|
0x1 /* we want physically contiguous */,
|
2019-03-12 16:49:08 +00:00
|
|
|
memory->size, 0, busdma_lock_mutex, &controller->lock,
|
|
|
|
&memory->dma_tag);
|
2012-01-31 19:38:18 +00:00
|
|
|
|
|
|
|
if(status == ENOMEM) {
|
|
|
|
isci_log_message(0, "ISCI", "bus_dma_tag_create failed\n");
|
|
|
|
return (status);
|
|
|
|
}
|
|
|
|
|
|
|
|
status = bus_dmamem_alloc(memory->dma_tag,
|
|
|
|
(void **)&memory->virtual_address, BUS_DMA_ZERO, &memory->dma_map);
|
|
|
|
|
|
|
|
if(status == ENOMEM)
|
|
|
|
{
|
|
|
|
isci_log_message(0, "ISCI", "bus_dmamem_alloc failed\n");
|
|
|
|
return (status);
|
|
|
|
}
|
|
|
|
|
|
|
|
status = bus_dmamap_load(memory->dma_tag, memory->dma_map,
|
|
|
|
(void *)memory->virtual_address, memory->size,
|
|
|
|
isci_allocate_dma_buffer_callback, memory, 0);
|
|
|
|
|
|
|
|
if(status == EINVAL)
|
|
|
|
{
|
|
|
|
isci_log_message(0, "ISCI", "bus_dmamap_load failed\n");
|
|
|
|
return (status);
|
|
|
|
}
|
|
|
|
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief This callback method asks the user to associate the supplied
|
|
|
|
* lock with an operating environment specific locking construct.
|
|
|
|
*
|
|
|
|
* @param[in] controller This parameter specifies the controller with
|
|
|
|
* which this lock is to be associated.
|
|
|
|
* @param[in] lock This parameter specifies the lock for which the
|
|
|
|
* user should associate an operating environment specific
|
|
|
|
* locking object.
|
|
|
|
*
|
|
|
|
* @see The SCI_LOCK_LEVEL enumeration for more information.
|
|
|
|
*
|
|
|
|
* @return none.
|
|
|
|
*/
|
|
|
|
void
|
|
|
|
scif_cb_lock_associate(SCI_CONTROLLER_HANDLE_T controller,
|
|
|
|
SCI_LOCK_HANDLE_T lock)
|
|
|
|
{
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief This callback method asks the user to de-associate the supplied
|
|
|
|
* lock with an operating environment specific locking construct.
|
|
|
|
*
|
|
|
|
* @param[in] controller This parameter specifies the controller with
|
|
|
|
* which this lock is to be de-associated.
|
|
|
|
* @param[in] lock This parameter specifies the lock for which the
|
|
|
|
* user should de-associate an operating environment specific
|
|
|
|
* locking object.
|
|
|
|
*
|
|
|
|
* @see The SCI_LOCK_LEVEL enumeration for more information.
|
|
|
|
*
|
|
|
|
* @return none.
|
|
|
|
*/
|
|
|
|
void
|
|
|
|
scif_cb_lock_disassociate(SCI_CONTROLLER_HANDLE_T controller,
|
|
|
|
SCI_LOCK_HANDLE_T lock)
|
|
|
|
{
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief This callback method asks the user to acquire/get the lock.
|
|
|
|
* This method should pend until the lock has been acquired.
|
|
|
|
*
|
|
|
|
* @param[in] controller This parameter specifies the controller with
|
|
|
|
* which this lock is associated.
|
|
|
|
* @param[in] lock This parameter specifies the lock to be acquired.
|
|
|
|
*
|
|
|
|
* @return none
|
|
|
|
*/
|
|
|
|
void
|
|
|
|
scif_cb_lock_acquire(SCI_CONTROLLER_HANDLE_T controller,
|
|
|
|
SCI_LOCK_HANDLE_T lock)
|
|
|
|
{
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief This callback method asks the user to release a lock.
|
|
|
|
*
|
|
|
|
* @param[in] controller This parameter specifies the controller with
|
|
|
|
* which this lock is associated.
|
|
|
|
* @param[in] lock This parameter specifies the lock to be released.
|
|
|
|
*
|
|
|
|
* @return none
|
|
|
|
*/
|
|
|
|
void
|
|
|
|
scif_cb_lock_release(SCI_CONTROLLER_HANDLE_T controller,
|
|
|
|
SCI_LOCK_HANDLE_T lock)
|
|
|
|
{
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief This callback method creates an OS specific deferred task
|
|
|
|
* for internal usage. The handler to deferred task is stored by OS
|
|
|
|
* driver.
|
|
|
|
*
|
|
|
|
* @param[in] controller This parameter specifies the controller object
|
|
|
|
* with which this callback is associated.
|
|
|
|
*
|
|
|
|
* @return none
|
|
|
|
*/
|
|
|
|
void
|
|
|
|
scif_cb_start_internal_io_task_create(SCI_CONTROLLER_HANDLE_T controller)
|
|
|
|
{
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief This callback method schedules a OS specific deferred task.
|
|
|
|
*
|
|
|
|
* @param[in] controller This parameter specifies the controller
|
|
|
|
* object with which this callback is associated.
|
|
|
|
* @param[in] start_internal_io_task_routine This parameter specifies the
|
|
|
|
* sci start_internal_io routine.
|
|
|
|
* @param[in] context This parameter specifies a handle to a parameter
|
|
|
|
* that will be passed into the "start_internal_io_task_routine"
|
|
|
|
* when it is invoked.
|
|
|
|
*
|
|
|
|
* @return none
|
|
|
|
*/
|
|
|
|
void
|
|
|
|
scif_cb_start_internal_io_task_schedule(SCI_CONTROLLER_HANDLE_T scif_controller,
|
|
|
|
FUNCPTR start_internal_io_task_routine, void *context)
|
|
|
|
{
|
|
|
|
/** @todo Use FreeBSD tasklet to defer this routine to a later time,
|
|
|
|
* rather than calling the routine inline.
|
|
|
|
*/
|
|
|
|
SCI_START_INTERNAL_IO_ROUTINE sci_start_internal_io_routine =
|
|
|
|
(SCI_START_INTERNAL_IO_ROUTINE)start_internal_io_task_routine;
|
|
|
|
|
|
|
|
sci_start_internal_io_routine(context);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief In this method the user must write to PCI memory via access.
|
|
|
|
* This method is used for access to memory space and IO space.
|
|
|
|
*
|
|
|
|
* @param[in] controller The controller for which to read a DWORD.
|
|
|
|
* @param[in] address This parameter depicts the address into
|
|
|
|
* which to write.
|
|
|
|
* @param[out] write_value This parameter depicts the value being written
|
|
|
|
* into the PCI memory location.
|
|
|
|
*
|
|
|
|
* @todo These PCI memory access calls likely needs to be optimized into macros?
|
|
|
|
*/
|
|
|
|
void
|
|
|
|
scic_cb_pci_write_dword(SCI_CONTROLLER_HANDLE_T scic_controller,
|
|
|
|
void *address, uint32_t write_value)
|
|
|
|
{
|
|
|
|
SCI_CONTROLLER_HANDLE_T scif_controller =
|
|
|
|
(SCI_CONTROLLER_HANDLE_T) sci_object_get_association(scic_controller);
|
|
|
|
struct ISCI_CONTROLLER *isci_controller =
|
|
|
|
(struct ISCI_CONTROLLER *) sci_object_get_association(scif_controller);
|
|
|
|
struct isci_softc *isci = isci_controller->isci;
|
|
|
|
uint32_t bar = (uint32_t)(((POINTER_UINT)address & 0xF0000000) >> 28);
|
|
|
|
bus_size_t offset = (bus_size_t)((POINTER_UINT)address & 0x0FFFFFFF);
|
|
|
|
|
|
|
|
bus_space_write_4(isci->pci_bar[bar].bus_tag,
|
|
|
|
isci->pci_bar[bar].bus_handle, offset, write_value);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief In this method the user must read from PCI memory via access.
|
|
|
|
* This method is used for access to memory space and IO space.
|
|
|
|
*
|
|
|
|
* @param[in] controller The controller for which to read a DWORD.
|
|
|
|
* @param[in] address This parameter depicts the address from
|
|
|
|
* which to read.
|
|
|
|
*
|
|
|
|
* @return The value being returned from the PCI memory location.
|
|
|
|
*
|
|
|
|
* @todo This PCI memory access calls likely need to be optimized into macro?
|
|
|
|
*/
|
|
|
|
uint32_t
|
|
|
|
scic_cb_pci_read_dword(SCI_CONTROLLER_HANDLE_T scic_controller, void *address)
|
|
|
|
{
|
|
|
|
SCI_CONTROLLER_HANDLE_T scif_controller =
|
|
|
|
(SCI_CONTROLLER_HANDLE_T)sci_object_get_association(scic_controller);
|
|
|
|
struct ISCI_CONTROLLER *isci_controller =
|
|
|
|
(struct ISCI_CONTROLLER *)sci_object_get_association(scif_controller);
|
|
|
|
struct isci_softc *isci = isci_controller->isci;
|
|
|
|
uint32_t bar = (uint32_t)(((POINTER_UINT)address & 0xF0000000) >> 28);
|
|
|
|
bus_size_t offset = (bus_size_t)((POINTER_UINT)address & 0x0FFFFFFF);
|
|
|
|
|
|
|
|
return (bus_space_read_4(isci->pci_bar[bar].bus_tag,
|
|
|
|
isci->pci_bar[bar].bus_handle, offset));
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief This method is called when the core requires the OS driver
|
|
|
|
* to stall execution. This method is utilized during initialization
|
|
|
|
* or non-performance paths only.
|
|
|
|
*
|
|
|
|
* @param[in] microseconds This parameter specifies the number of
|
|
|
|
* microseconds for which to stall. The operating system driver
|
|
|
|
* is allowed to round this value up where necessary.
|
|
|
|
*
|
|
|
|
* @return none.
|
|
|
|
*/
|
|
|
|
void
|
|
|
|
scic_cb_stall_execution(uint32_t microseconds)
|
|
|
|
{
|
|
|
|
|
|
|
|
DELAY(microseconds);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief In this method the user must return the base address register (BAR)
|
|
|
|
* value for the supplied base address register number.
|
|
|
|
*
|
|
|
|
* @param[in] controller The controller for which to retrieve the bar number.
|
|
|
|
* @param[in] bar_number This parameter depicts the BAR index/number to be read.
|
|
|
|
*
|
|
|
|
* @return Return a pointer value indicating the contents of the BAR.
|
|
|
|
* @retval NULL indicates an invalid BAR index/number was specified.
|
|
|
|
* @retval All other values indicate a valid VIRTUAL address from the BAR.
|
|
|
|
*/
|
|
|
|
void *
|
|
|
|
scic_cb_pci_get_bar(SCI_CONTROLLER_HANDLE_T controller,
|
|
|
|
uint16_t bar_number)
|
|
|
|
{
|
|
|
|
|
|
|
|
return ((void *)(POINTER_UINT)((uint32_t)bar_number << 28));
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief This method informs the SCI Core user that a phy/link became
|
|
|
|
* ready, but the phy is not allowed in the port. In some
|
|
|
|
* situations the underlying hardware only allows for certain phy
|
|
|
|
* to port mappings. If these mappings are violated, then this
|
|
|
|
* API is invoked.
|
|
|
|
*
|
|
|
|
* @param[in] controller This parameter represents the controller which
|
|
|
|
* contains the port.
|
|
|
|
* @param[in] port This parameter specifies the SCI port object for which
|
|
|
|
* the callback is being invoked.
|
|
|
|
* @param[in] phy This parameter specifies the phy that came ready, but the
|
|
|
|
* phy can't be a valid member of the port.
|
|
|
|
*
|
|
|
|
* @return none
|
|
|
|
*/
|
|
|
|
void
|
|
|
|
scic_cb_port_invalid_link_up(SCI_CONTROLLER_HANDLE_T controller,
|
|
|
|
SCI_PORT_HANDLE_T port, SCI_PHY_HANDLE_T phy)
|
|
|
|
{
|
|
|
|
|
|
|
|
}
|