freebsd-dev/sys/contrib/ncsw/Peripherals/QM/qm_ipc.h

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Add support for the Freescale dTSEC DPAA-based ethernet controller. Freescale's QorIQ line includes a new ethernet controller, based on their Datapath Acceleration Architecture (DPAA). This uses a combination of a Frame manager, Buffer manager, and Queue manager to improve performance across all interfaces by being able to pass data directly between hardware acceleration interfaces. As part of this import, Freescale's Netcomm Software (ncsw) driver is imported. This was an attempt by Freescale to create an OS-agnostic sub-driver for managing the hardware, using shims to interface to the OS-specific APIs. This work was abandoned, and Freescale's primary work is in the Linux driver (dual BSD/GPL license). Hence, this was imported directly to sys/contrib, rather than going through the vendor area. Going forward, FreeBSD-specific changes may be made to the ncsw code, diverging from the upstream in potentially incompatible ways. An alternative could be to import the Linux driver itself, using the linuxKPI layer, as that would maintain parity with the vendor-maintained driver. However, the Linux driver has not been evaluated for reliability yet, and may have issues with the import, whereas the ncsw-based driver in this commit was completed by Semihalf 4 years ago, and is very stable. Other SoC modules based on DPAA, which could be added in the future: * Security and Encryption engine (SEC4.x, SEC5.x) * RAID engine Additional work to be done: * Implement polling mode * Test vlan support * Add support for the Pattern Matching Engine, which can do regular expression matching on packets. This driver has been tested on the P5020 QorIQ SoC. Others listed in the dtsec(4) manual page are expected to work as the same DPAA engine is included in all. Obtained from: Semihalf Relnotes: Yes Sponsored by: Alex Perez/Inertial Computing
2016-02-29 03:38:00 +00:00
/******************************************************************************
<EFBFBD> 1995-2003, 2004, 2005-2011 Freescale Semiconductor, Inc.
All rights reserved.
This is proprietary source code of Freescale Semiconductor Inc.,
and its use is subject to the NetComm Device Drivers EULA.
The copyright notice above does not evidence any actual or intended
publication of such source code.
ALTERNATIVELY, redistribution and use in source and binary forms, with
or without modification, are permitted provided that the following
conditions are met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
* Neither the name of Freescale Semiconductor nor the
names of its contributors may be used to endorse or promote products
derived from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
**************************************************************************/
/**************************************************************************//**
@File QM_ipc.h
@Description QM Inter-Partition prototypes, structures and definitions.
*//***************************************************************************/
#ifndef __QM_IPC_H
#define __QM_IPC_H
#include "error_ext.h"
#include "std_ext.h"
/**************************************************************************//**
@Group QM_grp Frame Manager API
@Description QM API functions, definitions and enums
@{
*//***************************************************************************/
/**************************************************************************//**
@Group QM_IPC_grp Qm Inter-Partition messaging Unit
@Description QM Inter-Partition messaging unit API definitions and enums.
@{
*//***************************************************************************/
#define QM_FORCE_FQID 1
#define QM_PUT_FQID 2
#define QM_GET_COUNTER 3
#define QM_GET_SET_PORTAL_PARAMS 4
#define QM_GET_REVISION 5
#define QM_MASTER_IS_ALIVE 6
#define QM_IPC_MAX_REPLY_BODY_SIZE 16
#define QM_IPC_MAX_REPLY_SIZE (QM_IPC_MAX_REPLY_BODY_SIZE + sizeof(uint32_t))
#define QM_IPC_MAX_MSG_SIZE 30
#if defined(__MWERKS__) && !defined(__GNUC__)
#pragma pack(push,1)
#endif /* defined(__MWERKS__) && ... */
#define MEM_MAP_START
typedef _Packed struct t_QmIpcMsg
{
uint32_t msgId;
uint8_t msgBody[QM_IPC_MAX_MSG_SIZE];
} _PackedType t_QmIpcMsg;
typedef _Packed struct t_QmIpcReply
{
uint32_t error;
uint8_t replyBody[QM_IPC_MAX_REPLY_BODY_SIZE];
} _PackedType t_QmIpcReply;
typedef _Packed struct t_QmIpcGetCounter
{
uint32_t enumId; /**< IN */
} _PackedType t_QmIpcGetCounter;
typedef _Packed struct t_QmIpcFqidParams
{
uint32_t fqid; /**< IN */
uint32_t size; /**< IN */
} _PackedType t_QmIpcFqidParams;
typedef _Packed struct t_QmIpcPortalInitParams {
uint8_t portalId; /**< IN */
uint8_t stashDestQueue; /**< IN */
uint16_t liodn; /**< IN */
uint16_t dqrrLiodn; /**< IN */
uint16_t fdFqLiodn; /**< IN */
} _PackedType t_QmIpcPortalInitParams;
typedef _Packed struct t_QmIpcRevisionInfo {
uint8_t majorRev; /**< OUT: Major revision */
uint8_t minorRev; /**< OUT: Minor revision */
} _PackedType t_QmIpcRevisionInfo;
#define MEM_MAP_END
#if defined(__MWERKS__) && !defined(__GNUC__)
#pragma pack(pop)
#endif /* defined(__MWERKS__) && ... */
/** @} */ /* end of QM_IPC_grp group */
/** @} */ /* end of QM_grp group */
#endif /* __QM_IPC_H */