1997-08-09 01:43:15 +00:00
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/*
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** No copyright?!
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*/
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2001-10-02 11:28:59 +00:00
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/*
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* Notes:
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* 1) Second PIC is not implemented.
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* 2) Interrupt priority management is not implemented.
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* 3) What should be read from port 0x20?
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*
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* "within interrupt processing" means the following is true:
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* 1) Hardware interrupt <irql> is delivered by hardint().
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* 2) Next interrupt <irql> is not possible yet by either:
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* a) V_IF;
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* b) Interrupt mask;
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* c) Current irql.
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*
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* Related functions:
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* int isinhardint(int irql)
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2001-10-12 10:31:00 +00:00
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* void set_eoir(int irql, void (*eoir)(void *), void *arg);
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2001-10-02 11:28:59 +00:00
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*
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*/
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2002-03-07 12:52:27 +00:00
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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1997-08-09 01:43:15 +00:00
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#include "doscmd.h"
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2001-10-02 11:28:59 +00:00
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struct IRQ {
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int pending;
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int busy;
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int within;
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2001-10-12 10:31:00 +00:00
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void (*eoir)(void *arg);
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void *arg;
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2001-10-02 11:28:59 +00:00
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};
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static unsigned char IM;
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static int Irql;
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static struct IRQ Irqs[8];
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#define int_allowed(n) ((IM & 1 << (n)) == 0 && Irql > (n))
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void
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2001-10-12 10:31:00 +00:00
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set_eoir(int irql, void (*eoir)(void *), void *arg)
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2001-10-02 11:28:59 +00:00
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{
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Irqs [irql].eoir = eoir;
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Irqs [irql].arg = arg;
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}
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int
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isinhardint(int irql)
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{
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return Irqs[irql].within;
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}
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static void
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set_vip(void)
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{
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regcontext_t *REGS = saved_regcontext;
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int irql;
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if (R_EFLAGS & PSL_VIF) {
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R_EFLAGS &= ~PSL_VIP;
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return;
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}
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2001-10-12 10:31:00 +00:00
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for (irql = 0; irql < 8; irql++)
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2001-10-02 11:28:59 +00:00
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if (int_allowed(irql) && (Irqs[irql].within || Irqs[irql].pending)) {
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R_EFLAGS |= PSL_VIP;
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return;
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}
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R_EFLAGS &= ~PSL_VIP;
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}
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void
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resume_interrupt(void)
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{
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regcontext_t *REGS = saved_regcontext;
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int irql;
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if (R_EFLAGS & PSL_VIF) {
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2001-10-12 10:31:00 +00:00
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for (irql = 0; irql < 8; irql++)
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2001-10-02 11:28:59 +00:00
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if (Irqs[irql].within && int_allowed(irql)) {
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Irqs[irql].within = 0;
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if (Irqs[irql].eoir)
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Irqs[irql].eoir(Irqs[irql].arg);
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}
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2001-10-12 10:31:00 +00:00
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for (irql = 0; irql < 8; irql++)
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2001-10-02 11:28:59 +00:00
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if (Irqs[irql].pending && int_allowed(irql)) {
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Irqs[irql].pending = 0;
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hardint(irql);
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break;
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}
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}
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set_vip();
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}
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void
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send_eoi(void)
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{
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if (Irql >= 8)
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return;
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Irqs[Irql].busy = 0;
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while (++Irql < 8)
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if (Irqs [Irql].busy)
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break;
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resume_interrupt();
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}
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/*
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** Cause a hardware interrupt to happen immediately after
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** we return to vm86 mode
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*/
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void
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hardint(int irql)
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{
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regcontext_t *REGS = saved_regcontext;
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u_long vec = ivec[8 + irql];
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/*
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** if we're dead, or there's no vector, or the saved registers
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** are invalid
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*/
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if (dead || !saved_valid || vec == 0)
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return;
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/*
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** if the vector points into the BIOS, or the handler at the
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** other end is just an IRET, don't bother
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*/
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if ((vec >> 16) == 0xf000 || *(u_char *)VECPTR(vec) == 0xcf)
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return;
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2001-10-12 10:31:00 +00:00
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if (!int_allowed(irql)) {
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2001-10-02 11:28:59 +00:00
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Irqs[irql].pending = 1;
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return;
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}
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if ((R_EFLAGS & PSL_VIF) == 0) {
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Irqs[irql].pending = 1;
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R_EFLAGS |= PSL_VIP;
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return;
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}
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debug(D_TRAPS | (8 + irql), "Int%02x [%04lx:%04lx]\n",
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8 + irql, vec >> 16, vec & 0xffff);
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Irql = irql;
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Irqs[Irql].busy = 1;
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if (Irqs[Irql].eoir)
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Irqs[Irql].within = 1;
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PUSH((R_FLAGS & ~PSL_I) | (R_EFLAGS & PSL_VIF ? PSL_I : 0), REGS);
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PUSH(R_CS, REGS);
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PUSH(R_IP, REGS);
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R_EFLAGS &= ~PSL_VIF; /* XXX disable interrupts */
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PUTVEC(R_CS, R_IP, vec);
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}
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void
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unpend(int irql)
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{
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if (!Irqs[irql].pending)
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return;
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Irqs[irql].pending = 0;
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set_vip();
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}
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static unsigned char
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2002-03-30 13:51:40 +00:00
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irqc_in(int port __unused)
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2001-10-02 11:28:59 +00:00
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{
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return 0x60; /* What should be here? */
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}
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static void
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2002-03-30 13:51:40 +00:00
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irqc_out(int port __unused, unsigned char val)
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2001-10-02 11:28:59 +00:00
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{
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if (val == 0x20)
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send_eoi();
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}
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static unsigned char
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2002-03-30 13:51:40 +00:00
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imr_in(int port __unused)
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2001-10-02 11:28:59 +00:00
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{
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return IM;
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}
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static void
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2002-03-30 13:51:40 +00:00
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imr_out(int port __unused, unsigned char val)
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2001-10-02 11:28:59 +00:00
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{
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IM = val;
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resume_interrupt();
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}
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1997-08-09 01:43:15 +00:00
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/*
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** Cause a software interrupt to happen immediately after we
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** return to vm86 mode
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*/
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void
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softint(int intnum)
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{
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regcontext_t *REGS = saved_regcontext;
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u_long vec = ivec[intnum];
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/*
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** if we're dead, or there's no vector or the saved registers are
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** invalid
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*/
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if (dead || !saved_valid || vec == 0)
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return;
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/*
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** if the vector points into the BIOS, or the handler at the other
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** end is just an IRET, don't bother.
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*/
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if ((vec >> 16) == 0xf000 || *(u_char *)VECPTR(vec) == 0xcf)
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return;
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2001-10-02 11:28:59 +00:00
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debug(D_TRAPS | intnum, "INT %02x [%04lx:%04lx]\n",
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1997-08-09 01:43:15 +00:00
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intnum, vec >> 16, vec & 0xffff);
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1999-09-29 20:09:19 +00:00
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PUSH((R_FLAGS & ~PSL_I) | (R_EFLAGS & PSL_VIF ? PSL_I : 0), REGS);
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PUSH(R_CS, REGS);
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PUSH(R_IP, REGS);
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1997-08-09 01:43:15 +00:00
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R_EFLAGS &= ~PSL_VIF; /* XXX disable interrupts? */
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1999-09-29 20:09:19 +00:00
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PUTVEC(R_CS, R_IP, vec);
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1997-08-09 01:43:15 +00:00
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}
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void
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2001-10-02 11:28:59 +00:00
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init_ints(void)
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1997-08-09 01:43:15 +00:00
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{
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int i;
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2001-10-02 11:28:59 +00:00
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for (i = 0; i < 8; i++) {
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Irqs[i].busy = 0;
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Irqs[i].pending = 0;
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Irqs[i].within = 0;
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1997-08-09 01:43:15 +00:00
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}
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2001-10-02 11:28:59 +00:00
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IM = 0x00;
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Irql = 8;
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define_input_port_handler(0x20, irqc_in);
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define_output_port_handler(0x20, irqc_out);
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define_input_port_handler(0x21, imr_in);
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define_output_port_handler(0x21, imr_out);
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}
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