1998-09-15 07:24:17 +00:00
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/*
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2000-09-16 20:02:28 +00:00
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* Core routines and tables shareable across OS platforms.
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1998-09-15 07:24:17 +00:00
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*
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2002-08-31 06:41:37 +00:00
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* Copyright (c) 1994-2002 Justin T. Gibbs.
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* Copyright (c) 2000-2002 Adaptec Inc.
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1998-09-15 07:24:17 +00:00
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions, and the following disclaimer,
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1999-12-06 18:23:31 +00:00
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* without modification.
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2002-04-24 16:58:51 +00:00
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* 2. Redistributions in binary form must reproduce at minimum a disclaimer
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* substantially similar to the "NO WARRANTY" disclaimer below
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* ("Disclaimer") and any redistribution must be conditioned upon
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* including a substantially similar Disclaimer requirement for further
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* binary redistribution.
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* 3. Neither the names of the above-listed copyright holders nor the names
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* of any contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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1998-09-15 07:24:17 +00:00
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*
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1999-12-06 18:23:31 +00:00
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* Alternatively, this software may be distributed under the terms of the
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2002-04-24 16:58:51 +00:00
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* GNU General Public License ("GPL") version 2 as published by the Free
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* Software Foundation.
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1998-09-15 07:24:17 +00:00
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*
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2002-04-24 16:58:51 +00:00
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* NO WARRANTY
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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1998-09-15 07:24:17 +00:00
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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2002-04-24 16:58:51 +00:00
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
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* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGES.
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1998-09-15 07:24:17 +00:00
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*
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2003-05-26 21:24:01 +00:00
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* $Id: //depot/aic7xxx/aic7xxx/aic7xxx.c#130 $
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1998-09-15 07:24:17 +00:00
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*
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2000-09-16 20:02:28 +00:00
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* $FreeBSD$
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1998-09-15 07:24:17 +00:00
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*/
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2002-04-24 16:58:51 +00:00
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#ifdef __linux__
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#include "aic7xxx_osm.h"
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#include "aic7xxx_inline.h"
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#include "aicasm/aicasm_insformat.h"
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#else
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#include <dev/aic7xxx/aic7xxx_osm.h>
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2000-09-16 20:02:28 +00:00
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#include <dev/aic7xxx/aic7xxx_inline.h>
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#include <dev/aic7xxx/aicasm/aicasm_insformat.h>
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2002-04-24 16:58:51 +00:00
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#endif
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1998-09-15 07:24:17 +00:00
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2000-09-16 20:02:28 +00:00
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/****************************** Softc Data ************************************/
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struct ahc_softc_tailq ahc_tailq = TAILQ_HEAD_INITIALIZER(ahc_tailq);
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1998-09-15 07:24:17 +00:00
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2000-09-16 20:02:28 +00:00
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/***************************** Lookup Tables **********************************/
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2000-01-07 23:08:20 +00:00
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char *ahc_chip_names[] =
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{
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"NONE",
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"aic7770",
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"aic7850",
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"aic7855",
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"aic7859",
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"aic7860",
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"aic7870",
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"aic7880",
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"aic7895",
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2000-09-16 20:02:28 +00:00
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"aic7895C",
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2000-07-18 20:12:14 +00:00
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"aic7890/91",
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2000-01-07 23:08:20 +00:00
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"aic7896/97",
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2000-07-18 20:12:14 +00:00
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"aic7892",
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2000-01-07 23:08:20 +00:00
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"aic7899"
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};
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This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
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static const u_int num_chip_names = NUM_ELEMENTS(ahc_chip_names);
|
2000-01-07 23:08:20 +00:00
|
|
|
|
This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
|
|
|
/*
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* Hardware error codes.
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*/
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struct ahc_hard_error_entry {
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uint8_t errno;
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char *errmesg;
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};
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static struct ahc_hard_error_entry ahc_hard_errors[] = {
|
2000-09-16 20:02:28 +00:00
|
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{ ILLHADDR, "Illegal Host Access" },
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{ ILLSADDR, "Illegal Sequencer Address referrenced" },
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{ ILLOPCODE, "Illegal Opcode in sequencer program" },
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{ SQPARERR, "Sequencer Parity Error" },
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{ DPARERR, "Data-path Parity Error" },
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{ MPARERR, "Scratch or SCB Memory Parity Error" },
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{ PCIERRSTAT, "PCI Error detected" },
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{ CIOPARERR, "CIOBUS Parity Error" },
|
1998-09-15 07:24:17 +00:00
|
|
|
};
|
This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
|
|
|
static const u_int num_errors = NUM_ELEMENTS(ahc_hard_errors);
|
1998-09-15 07:24:17 +00:00
|
|
|
|
This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
|
|
|
static struct ahc_phase_table_entry ahc_phase_table[] =
|
2000-09-16 20:02:28 +00:00
|
|
|
{
|
|
|
|
{ P_DATAOUT, MSG_NOOP, "in Data-out phase" },
|
|
|
|
{ P_DATAIN, MSG_INITIATOR_DET_ERR, "in Data-in phase" },
|
|
|
|
{ P_DATAOUT_DT, MSG_NOOP, "in DT Data-out phase" },
|
|
|
|
{ P_DATAIN_DT, MSG_INITIATOR_DET_ERR, "in DT Data-in phase" },
|
|
|
|
{ P_COMMAND, MSG_NOOP, "in Command phase" },
|
|
|
|
{ P_MESGOUT, MSG_NOOP, "in Message-out phase" },
|
|
|
|
{ P_STATUS, MSG_INITIATOR_DET_ERR, "in Status phase" },
|
|
|
|
{ P_MESGIN, MSG_PARITY_ERROR, "in Message-in phase" },
|
|
|
|
{ P_BUSFREE, MSG_NOOP, "while idle" },
|
|
|
|
{ 0, MSG_NOOP, "in unknown phase" }
|
|
|
|
};
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/*
|
|
|
|
* In most cases we only wish to itterate over real phases, so
|
|
|
|
* exclude the last element from the count.
|
|
|
|
*/
|
This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
|
|
|
static const u_int num_phases = NUM_ELEMENTS(ahc_phase_table) - 1;
|
1999-04-23 23:27:31 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/*
|
|
|
|
* Valid SCSIRATE values. (p. 3-17)
|
|
|
|
* Provides a mapping of tranfer periods in ns to the proper value to
|
|
|
|
* stick in the scsixfer reg.
|
|
|
|
*/
|
This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
|
|
|
static struct ahc_syncrate ahc_syncrates[] =
|
2000-09-16 20:02:28 +00:00
|
|
|
{
|
|
|
|
/* ultra2 fast/ultra period rate */
|
|
|
|
{ 0x42, 0x000, 9, "80.0" },
|
|
|
|
{ 0x03, 0x000, 10, "40.0" },
|
|
|
|
{ 0x04, 0x000, 11, "33.0" },
|
|
|
|
{ 0x05, 0x100, 12, "20.0" },
|
|
|
|
{ 0x06, 0x110, 15, "16.0" },
|
|
|
|
{ 0x07, 0x120, 18, "13.4" },
|
|
|
|
{ 0x08, 0x000, 25, "10.0" },
|
|
|
|
{ 0x19, 0x010, 31, "8.0" },
|
|
|
|
{ 0x1a, 0x020, 37, "6.67" },
|
|
|
|
{ 0x1b, 0x030, 43, "5.7" },
|
|
|
|
{ 0x1c, 0x040, 50, "5.0" },
|
|
|
|
{ 0x00, 0x050, 56, "4.4" },
|
|
|
|
{ 0x00, 0x060, 62, "4.0" },
|
|
|
|
{ 0x00, 0x070, 68, "3.6" },
|
|
|
|
{ 0x00, 0x000, 0, NULL }
|
|
|
|
};
|
1999-04-23 23:27:31 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/* Our Sequencer Program */
|
|
|
|
#include "aic7xxx_seq.h"
|
|
|
|
|
|
|
|
/**************************** Function Declarations ***************************/
|
2003-05-03 23:55:38 +00:00
|
|
|
static void ahc_force_renegotiation(struct ahc_softc *ahc,
|
|
|
|
struct ahc_devinfo *devinfo);
|
2001-03-29 00:36:35 +00:00
|
|
|
static struct ahc_tmode_tstate*
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_alloc_tstate(struct ahc_softc *ahc,
|
|
|
|
u_int scsi_id, char channel);
|
ahc_eisa.c:
ahc_pci.c:
Add detach support.
Make use of soft allocated on our behalf by newbus.
For PCI devices, disable the mapping type we aren't
using for extra protection from rogue code.
aic7xxx_93cx6.c:
aic7xxx_93cx6.h:
Sync perforce IDs.
aic7xxx_freebsd.c:
Capture the eventhandle returned by EVENTHANDER_REGISTER
so we can kill the handler off during detach.
Use AHC_* constants instead of hard coded numbers in a
few more places.
Test PPR option state when deciding to "really" negotiate
when the CAM_NEGOTIATE flag is passed in a CCB.
Make use of core "ahc_pause_and_flushwork" routine in our
timeout handler rather than re-inventing this code.
Cleanup all of our resources (really!) in ahc_platform_free().
We should be all set to become a module now.
Implement the core ahc_detach() routine shared by all of
the FreeBSD front-ends.
aic7xxx_freebsd.h:
Softc storage for our event handler.
Null implementation for the ahc_platform_flushwork() OSM
callback. FreeBSD doesn't need this as XPT callbacks are
safe from all contexts and are done directly in ahc_done().
aic7xxx_inline.h:
Implement new lazy interrupt scheme. To avoid an extra
PCI bus read, we first check our completion queues to
see if any work has completed. If work is available, we
assume that this is the source of the interrupt and skip
reading INTSTAT. Any remaining interrupt status will be
cleared by a second call to the interrupt handler should
the interrupt line still be asserted. This drops the
interrupt handler down to a single PCI bus read in the
common case of I/O completion. This is the same overhead
as in the not so distant past, but the extra sanity of
perforning a PCI read after clearing the command complete
interrupt and before running the completion queue to avoid
missing command complete interrupts added a cycle.
aic7xxx.c:
During initialization, be sure to initialize all scratch
ram locations before they are read to avoid parity errors.
In this case, we use a new function, ahc_unbusy_tcl() to
initialize the scratch ram busy target table.
Replace instances of ahc_index_busy_tcl() used to unbusy
a tcl without looking at the old value with ahc_unbusy_tcl().
Modify ahc_sent_msg so that it can find single byte messages.
ahc_sent_msg is now used to determine if a transfer negotiation
attempt resulted in a bus free.
Be more careful in filtering out only the SCSI interrupts
of interest in ahc_handle_scsiint.
Rearrange interrupt clearing code to ensure that at least
one PCI transaction occurrs after hitting CLRSINT1 and
writting to CLRINT. CLRSINT1 writes take a bit to
take effect, and the re-arrangement provides sufficient
delay to ensure the write to CLRINT is effective. The
old code might report a spurious interrupt on some "fast"
chipsets.
export ahc-update_target_msg_request for use by OSM code.
If a target does not respond to our ATN request, clear
it once we move to a non-message phase. This avoids
sending a MSG_NOOP in some later message out phase.
Use max lun and max target constants instead of
hard-coded values.
Use softc storage built into our device_t under FreeBSD.
Fix a bug in ahc_free() that caused us to delete
resources that were not allocated.
Clean up any tstate/lstate info in ahc_free().
Clear the powerdown state in ahc_reset() so that
registers can be accessed.
Add a preliminary function for pausing the chip and
processing any posted work.
Add a preliminary suspend and resume functions.
aic7xxx.h:
Limit the number of supported luns to 64. We don't
support information unit transfers, so this is the
maximum that makes sense for these chips.
Add a new flag AHC_ALL_INTERRUPTS that forces the
processing of all interrupt state in a single invokation
of ahc_intr(). When the flag is not set, we use the
lazy interrupt handling scheme.
Add data structures to store controller state while
we are suspended.
Use constants instead of hard coded values where appropriate.
Correct some harmless "unsigned/signed" conflicts.
aic7xxx.seq:
Only perform the SCSIBUSL fix on ULTRA2 or newer controllers.
Older controllers seem to be confused by this.
In target mode, ignore PHASEMIS during data phases.
This bit seems to be flakey on U160 controllers acting
in target mode.
aic7xxx_pci.c:
Add support for the 29160C CPCI adapter.
Add definitions for subvendor ID information
available for devices with the "9005" vendor id.
We currently use this information to determine
if a multi-function device doesn't have the second
channel hooked up on a board.
Add rudimentary power mode code so we can put the
controller into the D0 state. In the future this
will be an OSM callback so that in FreeBSD we don't
duplicate functionality provided by the PCI code.
The powerstate code was added after I'd completed
my regression tests on this code.
Only capture "left over BIOS state" if the POWRDN
setting is not set in HCNTRL.
In target mode, don't bother sending incremental
CRC data.
2000-12-20 01:11:37 +00:00
|
|
|
#ifdef AHC_TARGET_MODE
|
2000-09-16 20:02:28 +00:00
|
|
|
static void ahc_free_tstate(struct ahc_softc *ahc,
|
|
|
|
u_int scsi_id, char channel, int force);
|
ahc_eisa.c:
ahc_pci.c:
Add detach support.
Make use of soft allocated on our behalf by newbus.
For PCI devices, disable the mapping type we aren't
using for extra protection from rogue code.
aic7xxx_93cx6.c:
aic7xxx_93cx6.h:
Sync perforce IDs.
aic7xxx_freebsd.c:
Capture the eventhandle returned by EVENTHANDER_REGISTER
so we can kill the handler off during detach.
Use AHC_* constants instead of hard coded numbers in a
few more places.
Test PPR option state when deciding to "really" negotiate
when the CAM_NEGOTIATE flag is passed in a CCB.
Make use of core "ahc_pause_and_flushwork" routine in our
timeout handler rather than re-inventing this code.
Cleanup all of our resources (really!) in ahc_platform_free().
We should be all set to become a module now.
Implement the core ahc_detach() routine shared by all of
the FreeBSD front-ends.
aic7xxx_freebsd.h:
Softc storage for our event handler.
Null implementation for the ahc_platform_flushwork() OSM
callback. FreeBSD doesn't need this as XPT callbacks are
safe from all contexts and are done directly in ahc_done().
aic7xxx_inline.h:
Implement new lazy interrupt scheme. To avoid an extra
PCI bus read, we first check our completion queues to
see if any work has completed. If work is available, we
assume that this is the source of the interrupt and skip
reading INTSTAT. Any remaining interrupt status will be
cleared by a second call to the interrupt handler should
the interrupt line still be asserted. This drops the
interrupt handler down to a single PCI bus read in the
common case of I/O completion. This is the same overhead
as in the not so distant past, but the extra sanity of
perforning a PCI read after clearing the command complete
interrupt and before running the completion queue to avoid
missing command complete interrupts added a cycle.
aic7xxx.c:
During initialization, be sure to initialize all scratch
ram locations before they are read to avoid parity errors.
In this case, we use a new function, ahc_unbusy_tcl() to
initialize the scratch ram busy target table.
Replace instances of ahc_index_busy_tcl() used to unbusy
a tcl without looking at the old value with ahc_unbusy_tcl().
Modify ahc_sent_msg so that it can find single byte messages.
ahc_sent_msg is now used to determine if a transfer negotiation
attempt resulted in a bus free.
Be more careful in filtering out only the SCSI interrupts
of interest in ahc_handle_scsiint.
Rearrange interrupt clearing code to ensure that at least
one PCI transaction occurrs after hitting CLRSINT1 and
writting to CLRINT. CLRSINT1 writes take a bit to
take effect, and the re-arrangement provides sufficient
delay to ensure the write to CLRINT is effective. The
old code might report a spurious interrupt on some "fast"
chipsets.
export ahc-update_target_msg_request for use by OSM code.
If a target does not respond to our ATN request, clear
it once we move to a non-message phase. This avoids
sending a MSG_NOOP in some later message out phase.
Use max lun and max target constants instead of
hard-coded values.
Use softc storage built into our device_t under FreeBSD.
Fix a bug in ahc_free() that caused us to delete
resources that were not allocated.
Clean up any tstate/lstate info in ahc_free().
Clear the powerdown state in ahc_reset() so that
registers can be accessed.
Add a preliminary function for pausing the chip and
processing any posted work.
Add a preliminary suspend and resume functions.
aic7xxx.h:
Limit the number of supported luns to 64. We don't
support information unit transfers, so this is the
maximum that makes sense for these chips.
Add a new flag AHC_ALL_INTERRUPTS that forces the
processing of all interrupt state in a single invokation
of ahc_intr(). When the flag is not set, we use the
lazy interrupt handling scheme.
Add data structures to store controller state while
we are suspended.
Use constants instead of hard coded values where appropriate.
Correct some harmless "unsigned/signed" conflicts.
aic7xxx.seq:
Only perform the SCSIBUSL fix on ULTRA2 or newer controllers.
Older controllers seem to be confused by this.
In target mode, ignore PHASEMIS during data phases.
This bit seems to be flakey on U160 controllers acting
in target mode.
aic7xxx_pci.c:
Add support for the 29160C CPCI adapter.
Add definitions for subvendor ID information
available for devices with the "9005" vendor id.
We currently use this information to determine
if a multi-function device doesn't have the second
channel hooked up on a board.
Add rudimentary power mode code so we can put the
controller into the D0 state. In the future this
will be an OSM callback so that in FreeBSD we don't
duplicate functionality provided by the PCI code.
The powerstate code was added after I'd completed
my regression tests on this code.
Only capture "left over BIOS state" if the POWRDN
setting is not set in HCNTRL.
In target mode, don't bother sending incremental
CRC data.
2000-12-20 01:11:37 +00:00
|
|
|
#endif
|
2000-09-16 20:02:28 +00:00
|
|
|
static struct ahc_syncrate*
|
|
|
|
ahc_devlimited_syncrate(struct ahc_softc *ahc,
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
struct ahc_initiator_tinfo *,
|
2000-09-16 20:02:28 +00:00
|
|
|
u_int *period,
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
u_int *ppr_options,
|
|
|
|
role_t role);
|
2001-03-29 00:36:35 +00:00
|
|
|
static void ahc_update_pending_scbs(struct ahc_softc *ahc);
|
2000-09-16 20:02:28 +00:00
|
|
|
static void ahc_fetch_devinfo(struct ahc_softc *ahc,
|
|
|
|
struct ahc_devinfo *devinfo);
|
|
|
|
static void ahc_scb_devinfo(struct ahc_softc *ahc,
|
|
|
|
struct ahc_devinfo *devinfo,
|
|
|
|
struct scb *scb);
|
2001-05-15 19:41:12 +00:00
|
|
|
static void ahc_assert_atn(struct ahc_softc *ahc);
|
2000-09-16 20:02:28 +00:00
|
|
|
static void ahc_setup_initiator_msgout(struct ahc_softc *ahc,
|
|
|
|
struct ahc_devinfo *devinfo,
|
|
|
|
struct scb *scb);
|
|
|
|
static void ahc_build_transfer_msg(struct ahc_softc *ahc,
|
|
|
|
struct ahc_devinfo *devinfo);
|
|
|
|
static void ahc_construct_sdtr(struct ahc_softc *ahc,
|
2000-10-05 04:24:14 +00:00
|
|
|
struct ahc_devinfo *devinfo,
|
2000-09-16 20:02:28 +00:00
|
|
|
u_int period, u_int offset);
|
|
|
|
static void ahc_construct_wdtr(struct ahc_softc *ahc,
|
2000-10-05 04:24:14 +00:00
|
|
|
struct ahc_devinfo *devinfo,
|
2000-09-16 20:02:28 +00:00
|
|
|
u_int bus_width);
|
|
|
|
static void ahc_construct_ppr(struct ahc_softc *ahc,
|
2000-10-05 04:24:14 +00:00
|
|
|
struct ahc_devinfo *devinfo,
|
2000-09-16 20:02:28 +00:00
|
|
|
u_int period, u_int offset,
|
|
|
|
u_int bus_width, u_int ppr_options);
|
|
|
|
static void ahc_clear_msg_state(struct ahc_softc *ahc);
|
2002-11-30 19:30:09 +00:00
|
|
|
static void ahc_handle_proto_violation(struct ahc_softc *ahc);
|
2000-09-16 20:02:28 +00:00
|
|
|
static void ahc_handle_message_phase(struct ahc_softc *ahc);
|
ahc_eisa.c:
ahc_pci.c:
Add detach support.
Make use of soft allocated on our behalf by newbus.
For PCI devices, disable the mapping type we aren't
using for extra protection from rogue code.
aic7xxx_93cx6.c:
aic7xxx_93cx6.h:
Sync perforce IDs.
aic7xxx_freebsd.c:
Capture the eventhandle returned by EVENTHANDER_REGISTER
so we can kill the handler off during detach.
Use AHC_* constants instead of hard coded numbers in a
few more places.
Test PPR option state when deciding to "really" negotiate
when the CAM_NEGOTIATE flag is passed in a CCB.
Make use of core "ahc_pause_and_flushwork" routine in our
timeout handler rather than re-inventing this code.
Cleanup all of our resources (really!) in ahc_platform_free().
We should be all set to become a module now.
Implement the core ahc_detach() routine shared by all of
the FreeBSD front-ends.
aic7xxx_freebsd.h:
Softc storage for our event handler.
Null implementation for the ahc_platform_flushwork() OSM
callback. FreeBSD doesn't need this as XPT callbacks are
safe from all contexts and are done directly in ahc_done().
aic7xxx_inline.h:
Implement new lazy interrupt scheme. To avoid an extra
PCI bus read, we first check our completion queues to
see if any work has completed. If work is available, we
assume that this is the source of the interrupt and skip
reading INTSTAT. Any remaining interrupt status will be
cleared by a second call to the interrupt handler should
the interrupt line still be asserted. This drops the
interrupt handler down to a single PCI bus read in the
common case of I/O completion. This is the same overhead
as in the not so distant past, but the extra sanity of
perforning a PCI read after clearing the command complete
interrupt and before running the completion queue to avoid
missing command complete interrupts added a cycle.
aic7xxx.c:
During initialization, be sure to initialize all scratch
ram locations before they are read to avoid parity errors.
In this case, we use a new function, ahc_unbusy_tcl() to
initialize the scratch ram busy target table.
Replace instances of ahc_index_busy_tcl() used to unbusy
a tcl without looking at the old value with ahc_unbusy_tcl().
Modify ahc_sent_msg so that it can find single byte messages.
ahc_sent_msg is now used to determine if a transfer negotiation
attempt resulted in a bus free.
Be more careful in filtering out only the SCSI interrupts
of interest in ahc_handle_scsiint.
Rearrange interrupt clearing code to ensure that at least
one PCI transaction occurrs after hitting CLRSINT1 and
writting to CLRINT. CLRSINT1 writes take a bit to
take effect, and the re-arrangement provides sufficient
delay to ensure the write to CLRINT is effective. The
old code might report a spurious interrupt on some "fast"
chipsets.
export ahc-update_target_msg_request for use by OSM code.
If a target does not respond to our ATN request, clear
it once we move to a non-message phase. This avoids
sending a MSG_NOOP in some later message out phase.
Use max lun and max target constants instead of
hard-coded values.
Use softc storage built into our device_t under FreeBSD.
Fix a bug in ahc_free() that caused us to delete
resources that were not allocated.
Clean up any tstate/lstate info in ahc_free().
Clear the powerdown state in ahc_reset() so that
registers can be accessed.
Add a preliminary function for pausing the chip and
processing any posted work.
Add a preliminary suspend and resume functions.
aic7xxx.h:
Limit the number of supported luns to 64. We don't
support information unit transfers, so this is the
maximum that makes sense for these chips.
Add a new flag AHC_ALL_INTERRUPTS that forces the
processing of all interrupt state in a single invokation
of ahc_intr(). When the flag is not set, we use the
lazy interrupt handling scheme.
Add data structures to store controller state while
we are suspended.
Use constants instead of hard coded values where appropriate.
Correct some harmless "unsigned/signed" conflicts.
aic7xxx.seq:
Only perform the SCSIBUSL fix on ULTRA2 or newer controllers.
Older controllers seem to be confused by this.
In target mode, ignore PHASEMIS during data phases.
This bit seems to be flakey on U160 controllers acting
in target mode.
aic7xxx_pci.c:
Add support for the 29160C CPCI adapter.
Add definitions for subvendor ID information
available for devices with the "9005" vendor id.
We currently use this information to determine
if a multi-function device doesn't have the second
channel hooked up on a board.
Add rudimentary power mode code so we can put the
controller into the D0 state. In the future this
will be an OSM callback so that in FreeBSD we don't
duplicate functionality provided by the PCI code.
The powerstate code was added after I'd completed
my regression tests on this code.
Only capture "left over BIOS state" if the POWRDN
setting is not set in HCNTRL.
In target mode, don't bother sending incremental
CRC data.
2000-12-20 01:11:37 +00:00
|
|
|
typedef enum {
|
|
|
|
AHCMSG_1B,
|
|
|
|
AHCMSG_2B,
|
|
|
|
AHCMSG_EXT
|
|
|
|
} ahc_msgtype;
|
|
|
|
static int ahc_sent_msg(struct ahc_softc *ahc, ahc_msgtype type,
|
|
|
|
u_int msgval, int full);
|
2000-09-16 20:02:28 +00:00
|
|
|
static int ahc_parse_msg(struct ahc_softc *ahc,
|
1998-12-10 04:14:50 +00:00
|
|
|
struct ahc_devinfo *devinfo);
|
2000-09-16 20:02:28 +00:00
|
|
|
static int ahc_handle_msg_reject(struct ahc_softc *ahc,
|
|
|
|
struct ahc_devinfo *devinfo);
|
|
|
|
static void ahc_handle_ign_wide_residue(struct ahc_softc *ahc,
|
|
|
|
struct ahc_devinfo *devinfo);
|
2001-07-18 21:39:48 +00:00
|
|
|
static void ahc_reinitialize_dataptrs(struct ahc_softc *ahc);
|
2000-09-16 20:02:28 +00:00
|
|
|
static void ahc_handle_devreset(struct ahc_softc *ahc,
|
|
|
|
struct ahc_devinfo *devinfo,
|
|
|
|
cam_status status, char *message,
|
|
|
|
int verbose_level);
|
2001-05-15 19:41:12 +00:00
|
|
|
#if AHC_TARGET_MODE
|
2001-03-29 00:36:35 +00:00
|
|
|
static void ahc_setup_target_msgin(struct ahc_softc *ahc,
|
|
|
|
struct ahc_devinfo *devinfo,
|
|
|
|
struct scb *scb);
|
2001-05-15 19:41:12 +00:00
|
|
|
#endif
|
2000-09-16 20:02:28 +00:00
|
|
|
|
|
|
|
static bus_dmamap_callback_t ahc_dmamap_cb;
|
ahc_eisa.c:
ahc_pci.c:
Add detach support.
Make use of soft allocated on our behalf by newbus.
For PCI devices, disable the mapping type we aren't
using for extra protection from rogue code.
aic7xxx_93cx6.c:
aic7xxx_93cx6.h:
Sync perforce IDs.
aic7xxx_freebsd.c:
Capture the eventhandle returned by EVENTHANDER_REGISTER
so we can kill the handler off during detach.
Use AHC_* constants instead of hard coded numbers in a
few more places.
Test PPR option state when deciding to "really" negotiate
when the CAM_NEGOTIATE flag is passed in a CCB.
Make use of core "ahc_pause_and_flushwork" routine in our
timeout handler rather than re-inventing this code.
Cleanup all of our resources (really!) in ahc_platform_free().
We should be all set to become a module now.
Implement the core ahc_detach() routine shared by all of
the FreeBSD front-ends.
aic7xxx_freebsd.h:
Softc storage for our event handler.
Null implementation for the ahc_platform_flushwork() OSM
callback. FreeBSD doesn't need this as XPT callbacks are
safe from all contexts and are done directly in ahc_done().
aic7xxx_inline.h:
Implement new lazy interrupt scheme. To avoid an extra
PCI bus read, we first check our completion queues to
see if any work has completed. If work is available, we
assume that this is the source of the interrupt and skip
reading INTSTAT. Any remaining interrupt status will be
cleared by a second call to the interrupt handler should
the interrupt line still be asserted. This drops the
interrupt handler down to a single PCI bus read in the
common case of I/O completion. This is the same overhead
as in the not so distant past, but the extra sanity of
perforning a PCI read after clearing the command complete
interrupt and before running the completion queue to avoid
missing command complete interrupts added a cycle.
aic7xxx.c:
During initialization, be sure to initialize all scratch
ram locations before they are read to avoid parity errors.
In this case, we use a new function, ahc_unbusy_tcl() to
initialize the scratch ram busy target table.
Replace instances of ahc_index_busy_tcl() used to unbusy
a tcl without looking at the old value with ahc_unbusy_tcl().
Modify ahc_sent_msg so that it can find single byte messages.
ahc_sent_msg is now used to determine if a transfer negotiation
attempt resulted in a bus free.
Be more careful in filtering out only the SCSI interrupts
of interest in ahc_handle_scsiint.
Rearrange interrupt clearing code to ensure that at least
one PCI transaction occurrs after hitting CLRSINT1 and
writting to CLRINT. CLRSINT1 writes take a bit to
take effect, and the re-arrangement provides sufficient
delay to ensure the write to CLRINT is effective. The
old code might report a spurious interrupt on some "fast"
chipsets.
export ahc-update_target_msg_request for use by OSM code.
If a target does not respond to our ATN request, clear
it once we move to a non-message phase. This avoids
sending a MSG_NOOP in some later message out phase.
Use max lun and max target constants instead of
hard-coded values.
Use softc storage built into our device_t under FreeBSD.
Fix a bug in ahc_free() that caused us to delete
resources that were not allocated.
Clean up any tstate/lstate info in ahc_free().
Clear the powerdown state in ahc_reset() so that
registers can be accessed.
Add a preliminary function for pausing the chip and
processing any posted work.
Add a preliminary suspend and resume functions.
aic7xxx.h:
Limit the number of supported luns to 64. We don't
support information unit transfers, so this is the
maximum that makes sense for these chips.
Add a new flag AHC_ALL_INTERRUPTS that forces the
processing of all interrupt state in a single invokation
of ahc_intr(). When the flag is not set, we use the
lazy interrupt handling scheme.
Add data structures to store controller state while
we are suspended.
Use constants instead of hard coded values where appropriate.
Correct some harmless "unsigned/signed" conflicts.
aic7xxx.seq:
Only perform the SCSIBUSL fix on ULTRA2 or newer controllers.
Older controllers seem to be confused by this.
In target mode, ignore PHASEMIS during data phases.
This bit seems to be flakey on U160 controllers acting
in target mode.
aic7xxx_pci.c:
Add support for the 29160C CPCI adapter.
Add definitions for subvendor ID information
available for devices with the "9005" vendor id.
We currently use this information to determine
if a multi-function device doesn't have the second
channel hooked up on a board.
Add rudimentary power mode code so we can put the
controller into the D0 state. In the future this
will be an OSM callback so that in FreeBSD we don't
duplicate functionality provided by the PCI code.
The powerstate code was added after I'd completed
my regression tests on this code.
Only capture "left over BIOS state" if the POWRDN
setting is not set in HCNTRL.
In target mode, don't bother sending incremental
CRC data.
2000-12-20 01:11:37 +00:00
|
|
|
static void ahc_build_free_scb_list(struct ahc_softc *ahc);
|
2000-09-16 20:02:28 +00:00
|
|
|
static int ahc_init_scbdata(struct ahc_softc *ahc);
|
|
|
|
static void ahc_fini_scbdata(struct ahc_softc *ahc);
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
static void ahc_qinfifo_requeue(struct ahc_softc *ahc,
|
|
|
|
struct scb *prev_scb,
|
|
|
|
struct scb *scb);
|
|
|
|
static int ahc_qinfifo_count(struct ahc_softc *ahc);
|
2000-09-16 20:02:28 +00:00
|
|
|
static u_int ahc_rem_scb_from_disc_list(struct ahc_softc *ahc,
|
|
|
|
u_int prev, u_int scbptr);
|
|
|
|
static void ahc_add_curscb_to_free_list(struct ahc_softc *ahc);
|
|
|
|
static u_int ahc_rem_wscb(struct ahc_softc *ahc,
|
|
|
|
u_int scbpos, u_int prev);
|
|
|
|
static void ahc_reset_current_bus(struct ahc_softc *ahc);
|
1999-12-06 18:23:31 +00:00
|
|
|
#ifdef AHC_DUMP_SEQ
|
2000-09-16 20:02:28 +00:00
|
|
|
static void ahc_dumpseq(struct ahc_softc *ahc);
|
1999-12-06 18:23:31 +00:00
|
|
|
#endif
|
2003-05-03 23:55:38 +00:00
|
|
|
static int ahc_loadseq(struct ahc_softc *ahc);
|
2000-09-16 20:02:28 +00:00
|
|
|
static int ahc_check_patch(struct ahc_softc *ahc,
|
|
|
|
struct patch **start_patch,
|
|
|
|
u_int start_instr, u_int *skip_addr);
|
|
|
|
static void ahc_download_instr(struct ahc_softc *ahc,
|
|
|
|
u_int instrptr, uint8_t *dconsts);
|
|
|
|
#ifdef AHC_TARGET_MODE
|
|
|
|
static void ahc_queue_lstate_event(struct ahc_softc *ahc,
|
2001-03-29 00:36:35 +00:00
|
|
|
struct ahc_tmode_lstate *lstate,
|
2000-09-16 20:02:28 +00:00
|
|
|
u_int initiator_id,
|
|
|
|
u_int event_type,
|
|
|
|
u_int event_arg);
|
|
|
|
static void ahc_update_scsiid(struct ahc_softc *ahc,
|
|
|
|
u_int targid_mask);
|
|
|
|
static int ahc_handle_target_cmd(struct ahc_softc *ahc,
|
|
|
|
struct target_cmd *cmd);
|
1998-09-15 07:24:17 +00:00
|
|
|
#endif
|
2000-09-16 20:02:28 +00:00
|
|
|
/************************* Sequencer Execution Control ************************/
|
1998-09-15 07:24:17 +00:00
|
|
|
/*
|
|
|
|
* Restart the sequencer program from address zero
|
|
|
|
*/
|
2000-09-16 20:02:28 +00:00
|
|
|
void
|
This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
|
|
|
ahc_restart(struct ahc_softc *ahc)
|
1998-09-15 07:24:17 +00:00
|
|
|
{
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
|
This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
|
|
|
ahc_pause(ahc);
|
|
|
|
|
2002-04-24 16:58:51 +00:00
|
|
|
/* No more pending messages. */
|
|
|
|
ahc_clear_msg_state(ahc);
|
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_outb(ahc, SCSISIGO, 0); /* De-assert BSY */
|
|
|
|
ahc_outb(ahc, MSG_OUT, MSG_NOOP); /* No message to send */
|
|
|
|
ahc_outb(ahc, SXFRCTL1, ahc_inb(ahc, SXFRCTL1) & ~BITBUCKET);
|
2002-04-24 16:58:51 +00:00
|
|
|
ahc_outb(ahc, LASTPHASE, P_BUSFREE);
|
|
|
|
ahc_outb(ahc, SAVED_SCSIID, 0xFF);
|
|
|
|
ahc_outb(ahc, SAVED_LUN, 0xFF);
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
|
Clean up error recovery code:
aic7xxx.c:
In target mode, reset the TQINPOS on every restart of the sequencer.
In the past we did this only during a bus reset, but there are other
reasons the sequencer might be reset.
In ahc_clear_critical_section(), disable pausing chip interrupts while
we step the sequencer out of a critical section. This avoids the
possibility of getting a pausing interrupt (unexpected bus free,
bus reset, etc.) that would prevent the sequencer from stepping.
Send the correct async notifications in the case of a BDR or bus reset.
In ahc_loadseq(), correct the calculation of our critical sections.
In some cases, the sections would be larger than needed.
aic7xxx.h:
Remove an unused SCB flag.
aic7xxx.seq:
MK_MESSAGE is cleared by the kernel, there is no need to waste
a sequencer instruction clearing it.
aic7xxx_freebsd.c:
Go through the host message loop instead of issuing a single
byte message directly in the ahc_timeout() case where we
are currently on the bus to the device. The effect is the same,
but this way we get a nice printf saying that an expected BDR
was delivered instead of an unexpected bus free.
If we are requeuing an SCB for an error recovery action, be sure
to set the DISCONNECTED flag in the in-core version of the SCB.
This ensures that, in the SCB-paging case, the sequencer will
still recognize the reselection as valid even if the version
of the SCB with this flag set was never previously paged out
to system memory. In the non-paging case, set the MK_MESSAGE
flag in SCB_CONTROL directly.
aic7xxx_pci.c:
Enable the Memeory Write and Invalidate bug workaround for
all aic7880 chips with revs < 1. This bug is rarely triggered
in FreeBSD as most transfers end on cache-aligned boundaries,
but a recheck of my references indicates that these chips
are affected.
2000-10-09 01:46:01 +00:00
|
|
|
/*
|
|
|
|
* Ensure that the sequencer's idea of TQINPOS
|
|
|
|
* matches our own. The sequencer increments TQINPOS
|
|
|
|
* only after it sees a DMA complete and a reset could
|
|
|
|
* occur before the increment leaving the kernel to believe
|
|
|
|
* the command arrived but the sequencer to not.
|
|
|
|
*/
|
|
|
|
ahc_outb(ahc, TQINPOS, ahc->tqinfifonext);
|
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/* Always allow reselection */
|
|
|
|
ahc_outb(ahc, SCSISEQ,
|
|
|
|
ahc_inb(ahc, SCSISEQ_TEMPLATE) & (ENSELI|ENRSELI|ENAUTOATNP));
|
|
|
|
if ((ahc->features & AHC_CMD_CHAN) != 0) {
|
|
|
|
/* Ensure that no DMA operations are in progress */
|
2000-11-06 20:05:38 +00:00
|
|
|
ahc_outb(ahc, CCSCBCNT, 0);
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_outb(ahc, CCSGCTL, 0);
|
|
|
|
ahc_outb(ahc, CCSCBCTL, 0);
|
|
|
|
}
|
This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
|
|
|
/*
|
|
|
|
* If we were in the process of DMA'ing SCB data into
|
|
|
|
* an SCB, replace that SCB on the free list. This prevents
|
|
|
|
* an SCB leak.
|
|
|
|
*/
|
|
|
|
if ((ahc_inb(ahc, SEQ_FLAGS2) & SCB_DMA) != 0) {
|
|
|
|
ahc_add_curscb_to_free_list(ahc);
|
|
|
|
ahc_outb(ahc, SEQ_FLAGS2,
|
|
|
|
ahc_inb(ahc, SEQ_FLAGS2) & ~SCB_DMA);
|
|
|
|
}
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_outb(ahc, MWI_RESIDUAL, 0);
|
2003-05-26 21:20:47 +00:00
|
|
|
ahc_outb(ahc, SEQCTL, ahc->seqctl);
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
ahc_outb(ahc, SEQADDR0, 0);
|
|
|
|
ahc_outb(ahc, SEQADDR1, 0);
|
This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
|
|
|
ahc_unpause(ahc);
|
1998-09-15 07:24:17 +00:00
|
|
|
}
|
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/************************* Input/Output Queues ********************************/
|
|
|
|
void
|
|
|
|
ahc_run_qoutfifo(struct ahc_softc *ahc)
|
2000-07-18 20:12:14 +00:00
|
|
|
{
|
2000-09-16 20:02:28 +00:00
|
|
|
struct scb *scb;
|
|
|
|
u_int scb_index;
|
2000-07-18 20:12:14 +00:00
|
|
|
|
2001-07-18 21:39:48 +00:00
|
|
|
ahc_sync_qoutfifo(ahc, BUS_DMASYNC_POSTREAD);
|
2000-09-16 20:02:28 +00:00
|
|
|
while (ahc->qoutfifo[ahc->qoutfifonext] != SCB_LIST_NULL) {
|
2000-07-18 20:12:14 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
scb_index = ahc->qoutfifo[ahc->qoutfifonext];
|
|
|
|
if ((ahc->qoutfifonext & 0x03) == 0x03) {
|
|
|
|
u_int modnext;
|
2000-07-18 20:12:14 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/*
|
|
|
|
* Clear 32bits of QOUTFIFO at a time
|
2001-05-15 19:41:12 +00:00
|
|
|
* so that we don't clobber an incoming
|
2000-09-16 20:02:28 +00:00
|
|
|
* byte DMA to the array on architectures
|
|
|
|
* that only support 32bit load and store
|
|
|
|
* operations.
|
|
|
|
*/
|
|
|
|
modnext = ahc->qoutfifonext & ~0x3;
|
|
|
|
*((uint32_t *)(&ahc->qoutfifo[modnext])) = 0xFFFFFFFFUL;
|
2001-07-18 21:39:48 +00:00
|
|
|
ahc_dmamap_sync(ahc, ahc->shared_data_dmat,
|
|
|
|
ahc->shared_data_dmamap,
|
|
|
|
/*offset*/modnext, /*len*/4,
|
|
|
|
BUS_DMASYNC_PREREAD);
|
2000-09-16 20:02:28 +00:00
|
|
|
}
|
|
|
|
ahc->qoutfifonext++;
|
2000-07-18 20:12:14 +00:00
|
|
|
|
2000-10-05 04:24:14 +00:00
|
|
|
scb = ahc_lookup_scb(ahc, scb_index);
|
|
|
|
if (scb == NULL) {
|
2000-09-16 20:02:28 +00:00
|
|
|
printf("%s: WARNING no command for scb %d "
|
|
|
|
"(cmdcmplt)\nQOUTPOS = %d\n",
|
|
|
|
ahc_name(ahc), scb_index,
|
2002-08-31 06:41:37 +00:00
|
|
|
(ahc->qoutfifonext - 1) & 0xFF);
|
2000-09-16 20:02:28 +00:00
|
|
|
continue;
|
|
|
|
}
|
2000-07-18 20:12:14 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/*
|
|
|
|
* Save off the residual
|
|
|
|
* if there is one.
|
|
|
|
*/
|
2002-04-24 16:58:51 +00:00
|
|
|
ahc_update_residual(ahc, scb);
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_done(ahc, scb);
|
2000-07-18 20:12:14 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
void
|
2000-07-18 20:12:14 +00:00
|
|
|
ahc_run_untagged_queues(struct ahc_softc *ahc)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
|
|
|
|
for (i = 0; i < 16; i++)
|
|
|
|
ahc_run_untagged_queue(ahc, &ahc->untagged_queues[i]);
|
|
|
|
}
|
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
void
|
2000-07-18 20:12:14 +00:00
|
|
|
ahc_run_untagged_queue(struct ahc_softc *ahc, struct scb_tailq *queue)
|
|
|
|
{
|
|
|
|
struct scb *scb;
|
|
|
|
|
|
|
|
if (ahc->untagged_queue_lock != 0)
|
|
|
|
return;
|
|
|
|
|
|
|
|
if ((scb = TAILQ_FIRST(queue)) != NULL
|
|
|
|
&& (scb->flags & SCB_ACTIVE) == 0) {
|
|
|
|
scb->flags |= SCB_ACTIVE;
|
|
|
|
ahc_queue_scb(ahc, scb);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/************************* Interrupt Handling *********************************/
|
|
|
|
void
|
|
|
|
ahc_handle_brkadrint(struct ahc_softc *ahc)
|
1999-03-05 23:35:48 +00:00
|
|
|
{
|
2000-09-16 20:02:28 +00:00
|
|
|
/*
|
|
|
|
* We upset the sequencer :-(
|
|
|
|
* Lookup the error message
|
|
|
|
*/
|
This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
|
|
|
int i;
|
|
|
|
int error;
|
2000-09-16 20:02:28 +00:00
|
|
|
|
|
|
|
error = ahc_inb(ahc, ERROR);
|
|
|
|
for (i = 0; error != 1 && i < num_errors; i++)
|
|
|
|
error >>= 1;
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
printf("%s: brkadrint, %s at seqaddr = 0x%x\n",
|
This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
|
|
|
ahc_name(ahc), ahc_hard_errors[i].errmesg,
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
ahc_inb(ahc, SEQADDR0) |
|
|
|
|
(ahc_inb(ahc, SEQADDR1) << 8));
|
|
|
|
|
|
|
|
ahc_dump_card_state(ahc);
|
2000-09-16 20:02:28 +00:00
|
|
|
|
2003-05-03 23:55:38 +00:00
|
|
|
/* Tell everyone that this HBA is no longer available */
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_abort_scbs(ahc, CAM_TARGET_WILDCARD, ALL_CHANNELS,
|
|
|
|
CAM_LUN_WILDCARD, SCB_LIST_NULL, ROLE_UNKNOWN,
|
|
|
|
CAM_NO_HBA);
|
2000-11-12 05:19:46 +00:00
|
|
|
|
|
|
|
/* Disable all interrupt sources by resetting the controller */
|
|
|
|
ahc_shutdown(ahc);
|
2000-09-16 20:02:28 +00:00
|
|
|
}
|
1999-03-05 23:35:48 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
void
|
|
|
|
ahc_handle_seqint(struct ahc_softc *ahc, u_int intstat)
|
|
|
|
{
|
|
|
|
struct scb *scb;
|
|
|
|
struct ahc_devinfo devinfo;
|
|
|
|
|
|
|
|
ahc_fetch_devinfo(ahc, &devinfo);
|
1999-03-05 23:35:48 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/*
|
|
|
|
* Clear the upper byte that holds SEQINT status
|
|
|
|
* codes and clear the SEQINT bit. We will unpause
|
|
|
|
* the sequencer, if appropriate, after servicing
|
|
|
|
* the request.
|
|
|
|
*/
|
|
|
|
ahc_outb(ahc, CLRINT, CLRSEQINT);
|
|
|
|
switch (intstat & SEQINT_MASK) {
|
|
|
|
case BAD_STATUS:
|
|
|
|
{
|
|
|
|
u_int scb_index;
|
|
|
|
struct hardware_scb *hscb;
|
2000-10-05 04:24:14 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Set the default return value to 0 (don't
|
|
|
|
* send sense). The sense code will change
|
|
|
|
* this if needed.
|
|
|
|
*/
|
|
|
|
ahc_outb(ahc, RETURN_1, 0);
|
|
|
|
|
1999-03-05 23:35:48 +00:00
|
|
|
/*
|
2000-09-16 20:02:28 +00:00
|
|
|
* The sequencer will notify us when a command
|
|
|
|
* has an error that would be of interest to
|
|
|
|
* the kernel. This allows us to leave the sequencer
|
|
|
|
* running in the common case of command completes
|
|
|
|
* without error. The sequencer will already have
|
|
|
|
* dma'd the SCB back up to us, so we can reference
|
|
|
|
* the in kernel copy directly.
|
1999-03-05 23:35:48 +00:00
|
|
|
*/
|
2000-09-16 20:02:28 +00:00
|
|
|
scb_index = ahc_inb(ahc, SCB_TAG);
|
2000-10-05 04:24:14 +00:00
|
|
|
scb = ahc_lookup_scb(ahc, scb_index);
|
|
|
|
if (scb == NULL) {
|
2002-08-31 06:41:37 +00:00
|
|
|
ahc_print_devinfo(ahc, &devinfo);
|
|
|
|
printf("ahc_intr - referenced scb "
|
2000-09-16 20:02:28 +00:00
|
|
|
"not valid during seqint 0x%x scb(%d)\n",
|
2002-08-31 06:41:37 +00:00
|
|
|
intstat, scb_index);
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
ahc_dump_card_state(ahc);
|
|
|
|
panic("for safety");
|
2000-09-16 20:02:28 +00:00
|
|
|
goto unpause;
|
1999-03-05 23:35:48 +00:00
|
|
|
}
|
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
hscb = scb->hscb;
|
1999-08-16 22:49:29 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/* Don't want to clobber the original sense code */
|
|
|
|
if ((scb->flags & SCB_SENSE) != 0) {
|
|
|
|
/*
|
|
|
|
* Clear the SCB_SENSE Flag and have
|
|
|
|
* the sequencer do a normal command
|
|
|
|
* complete.
|
|
|
|
*/
|
|
|
|
scb->flags &= ~SCB_SENSE;
|
|
|
|
ahc_set_transaction_status(scb, CAM_AUTOSENSE_FAIL);
|
|
|
|
break;
|
1999-08-16 22:49:29 +00:00
|
|
|
}
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_set_transaction_status(scb, CAM_SCSI_STATUS_ERROR);
|
|
|
|
/* Freeze the queue until the client sees the error. */
|
|
|
|
ahc_freeze_devq(ahc, scb);
|
|
|
|
ahc_freeze_scb(scb);
|
|
|
|
ahc_set_scsi_status(scb, hscb->shared_data.status.scsi_status);
|
|
|
|
switch (hscb->shared_data.status.scsi_status) {
|
|
|
|
case SCSI_STATUS_OK:
|
|
|
|
printf("%s: Interrupted for staus of 0???\n",
|
|
|
|
ahc_name(ahc));
|
|
|
|
break;
|
|
|
|
case SCSI_STATUS_CMD_TERMINATED:
|
|
|
|
case SCSI_STATUS_CHECK_COND:
|
2001-03-29 00:36:35 +00:00
|
|
|
{
|
|
|
|
struct ahc_dma_seg *sg;
|
|
|
|
struct scsi_sense *sc;
|
|
|
|
struct ahc_initiator_tinfo *targ_info;
|
|
|
|
struct ahc_tmode_tstate *tstate;
|
|
|
|
struct ahc_transinfo *tinfo;
|
2000-09-16 20:02:28 +00:00
|
|
|
#ifdef AHC_DEBUG
|
2002-08-31 06:41:37 +00:00
|
|
|
if (ahc_debug & AHC_SHOW_SENSE) {
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_print_path(ahc, scb);
|
|
|
|
printf("SCB %d: requests Check Status\n",
|
|
|
|
scb->hscb->tag);
|
|
|
|
}
|
|
|
|
#endif
|
1999-08-16 22:49:29 +00:00
|
|
|
|
2001-03-29 00:36:35 +00:00
|
|
|
if (ahc_perform_autosense(scb) == 0)
|
|
|
|
break;
|
1999-08-16 22:49:29 +00:00
|
|
|
|
2001-03-29 00:36:35 +00:00
|
|
|
targ_info = ahc_fetch_transinfo(ahc,
|
2000-09-16 20:02:28 +00:00
|
|
|
devinfo.channel,
|
|
|
|
devinfo.our_scsiid,
|
|
|
|
devinfo.target,
|
|
|
|
&tstate);
|
2001-05-15 19:41:12 +00:00
|
|
|
tinfo = &targ_info->curr;
|
2001-03-29 00:36:35 +00:00
|
|
|
sg = scb->sg_list;
|
|
|
|
sc = (struct scsi_sense *)(&hscb->shared_data.cdb);
|
|
|
|
/*
|
|
|
|
* Save off the residual if there is one.
|
|
|
|
*/
|
2002-04-24 16:58:51 +00:00
|
|
|
ahc_update_residual(ahc, scb);
|
2000-09-16 20:02:28 +00:00
|
|
|
#ifdef AHC_DEBUG
|
2002-08-31 06:41:37 +00:00
|
|
|
if (ahc_debug & AHC_SHOW_SENSE) {
|
2001-03-29 00:36:35 +00:00
|
|
|
ahc_print_path(ahc, scb);
|
|
|
|
printf("Sending Sense\n");
|
|
|
|
}
|
2000-09-16 20:02:28 +00:00
|
|
|
#endif
|
2001-03-29 00:36:35 +00:00
|
|
|
sg->addr = ahc_get_sense_bufaddr(ahc, scb);
|
|
|
|
sg->len = ahc_get_sense_bufsize(ahc, scb);
|
|
|
|
sg->len |= AHC_DMA_LAST_SEG;
|
|
|
|
|
|
|
|
/* Fixup byte order */
|
|
|
|
sg->addr = ahc_htole32(sg->addr);
|
|
|
|
sg->len = ahc_htole32(sg->len);
|
|
|
|
|
|
|
|
sc->opcode = REQUEST_SENSE;
|
|
|
|
sc->byte2 = 0;
|
|
|
|
if (tinfo->protocol_version <= SCSI_REV_2
|
|
|
|
&& SCB_GET_LUN(scb) < 8)
|
|
|
|
sc->byte2 = SCB_GET_LUN(scb) << 5;
|
|
|
|
sc->unused[0] = 0;
|
|
|
|
sc->unused[1] = 0;
|
|
|
|
sc->length = sg->len;
|
|
|
|
sc->control = 0;
|
1999-04-23 23:27:31 +00:00
|
|
|
|
2001-03-29 00:36:35 +00:00
|
|
|
/*
|
|
|
|
* We can't allow the target to disconnect.
|
|
|
|
* This will be an untagged transaction and
|
|
|
|
* having the target disconnect will make this
|
|
|
|
* transaction indestinguishable from outstanding
|
|
|
|
* tagged transactions.
|
|
|
|
*/
|
|
|
|
hscb->control = 0;
|
1999-04-23 23:27:31 +00:00
|
|
|
|
2001-03-29 00:36:35 +00:00
|
|
|
/*
|
|
|
|
* This request sense could be because the
|
|
|
|
* the device lost power or in some other
|
|
|
|
* way has lost our transfer negotiations.
|
|
|
|
* Renegotiate if appropriate. Unit attention
|
|
|
|
* errors will be reported before any data
|
|
|
|
* phases occur.
|
|
|
|
*/
|
|
|
|
if (ahc_get_residual(scb)
|
|
|
|
== ahc_get_transfer_length(scb)) {
|
|
|
|
ahc_update_neg_request(ahc, &devinfo,
|
|
|
|
tstate, targ_info,
|
2002-11-30 19:30:09 +00:00
|
|
|
AHC_NEG_IF_NON_ASYNC);
|
2001-03-29 00:36:35 +00:00
|
|
|
}
|
|
|
|
if (tstate->auto_negotiate & devinfo.target_mask) {
|
|
|
|
hscb->control |= MK_MESSAGE;
|
|
|
|
scb->flags &= ~SCB_NEGOTIATE;
|
|
|
|
scb->flags |= SCB_AUTO_NEGOTIATE;
|
|
|
|
}
|
|
|
|
hscb->cdb_len = sizeof(*sc);
|
|
|
|
hscb->dataptr = sg->addr;
|
|
|
|
hscb->datacnt = sg->len;
|
|
|
|
hscb->sgptr = scb->sg_list_phys | SG_FULL_RESID;
|
|
|
|
hscb->sgptr = ahc_htole32(hscb->sgptr);
|
|
|
|
scb->sg_count = 1;
|
|
|
|
scb->flags |= SCB_SENSE;
|
|
|
|
ahc_qinfifo_requeue_tail(ahc, scb);
|
|
|
|
ahc_outb(ahc, RETURN_1, SEND_SENSE);
|
|
|
|
/*
|
|
|
|
* Ensure we have enough time to actually
|
|
|
|
* retrieve the sense.
|
|
|
|
*/
|
2002-11-30 19:30:09 +00:00
|
|
|
ahc_scb_timer_reset(scb, 5 * 1000000);
|
2000-09-16 20:02:28 +00:00
|
|
|
break;
|
2001-03-29 00:36:35 +00:00
|
|
|
}
|
2000-09-16 20:02:28 +00:00
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
break;
|
1999-04-23 23:27:31 +00:00
|
|
|
}
|
2000-09-16 20:02:28 +00:00
|
|
|
case NO_MATCH:
|
|
|
|
{
|
|
|
|
/* Ensure we don't leave the selection hardware on */
|
|
|
|
ahc_outb(ahc, SCSISEQ,
|
|
|
|
ahc_inb(ahc, SCSISEQ) & (ENSELI|ENRSELI|ENAUTOATNP));
|
1999-04-23 23:27:31 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
printf("%s:%c:%d: no active SCB for reconnecting "
|
|
|
|
"target - issuing BUS DEVICE RESET\n",
|
|
|
|
ahc_name(ahc), devinfo.channel, devinfo.target);
|
|
|
|
printf("SAVED_SCSIID == 0x%x, SAVED_LUN == 0x%x, "
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
"ARG_1 == 0x%x ACCUM = 0x%x\n",
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_inb(ahc, SAVED_SCSIID), ahc_inb(ahc, SAVED_LUN),
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
ahc_inb(ahc, ARG_1), ahc_inb(ahc, ACCUM));
|
|
|
|
printf("SEQ_FLAGS == 0x%x, SCBPTR == 0x%x, BTT == 0x%x, "
|
|
|
|
"SINDEX == 0x%x\n",
|
|
|
|
ahc_inb(ahc, SEQ_FLAGS), ahc_inb(ahc, SCBPTR),
|
|
|
|
ahc_index_busy_tcl(ahc,
|
|
|
|
BUILD_TCL(ahc_inb(ahc, SAVED_SCSIID),
|
ahc_eisa.c:
ahc_pci.c:
Add detach support.
Make use of soft allocated on our behalf by newbus.
For PCI devices, disable the mapping type we aren't
using for extra protection from rogue code.
aic7xxx_93cx6.c:
aic7xxx_93cx6.h:
Sync perforce IDs.
aic7xxx_freebsd.c:
Capture the eventhandle returned by EVENTHANDER_REGISTER
so we can kill the handler off during detach.
Use AHC_* constants instead of hard coded numbers in a
few more places.
Test PPR option state when deciding to "really" negotiate
when the CAM_NEGOTIATE flag is passed in a CCB.
Make use of core "ahc_pause_and_flushwork" routine in our
timeout handler rather than re-inventing this code.
Cleanup all of our resources (really!) in ahc_platform_free().
We should be all set to become a module now.
Implement the core ahc_detach() routine shared by all of
the FreeBSD front-ends.
aic7xxx_freebsd.h:
Softc storage for our event handler.
Null implementation for the ahc_platform_flushwork() OSM
callback. FreeBSD doesn't need this as XPT callbacks are
safe from all contexts and are done directly in ahc_done().
aic7xxx_inline.h:
Implement new lazy interrupt scheme. To avoid an extra
PCI bus read, we first check our completion queues to
see if any work has completed. If work is available, we
assume that this is the source of the interrupt and skip
reading INTSTAT. Any remaining interrupt status will be
cleared by a second call to the interrupt handler should
the interrupt line still be asserted. This drops the
interrupt handler down to a single PCI bus read in the
common case of I/O completion. This is the same overhead
as in the not so distant past, but the extra sanity of
perforning a PCI read after clearing the command complete
interrupt and before running the completion queue to avoid
missing command complete interrupts added a cycle.
aic7xxx.c:
During initialization, be sure to initialize all scratch
ram locations before they are read to avoid parity errors.
In this case, we use a new function, ahc_unbusy_tcl() to
initialize the scratch ram busy target table.
Replace instances of ahc_index_busy_tcl() used to unbusy
a tcl without looking at the old value with ahc_unbusy_tcl().
Modify ahc_sent_msg so that it can find single byte messages.
ahc_sent_msg is now used to determine if a transfer negotiation
attempt resulted in a bus free.
Be more careful in filtering out only the SCSI interrupts
of interest in ahc_handle_scsiint.
Rearrange interrupt clearing code to ensure that at least
one PCI transaction occurrs after hitting CLRSINT1 and
writting to CLRINT. CLRSINT1 writes take a bit to
take effect, and the re-arrangement provides sufficient
delay to ensure the write to CLRINT is effective. The
old code might report a spurious interrupt on some "fast"
chipsets.
export ahc-update_target_msg_request for use by OSM code.
If a target does not respond to our ATN request, clear
it once we move to a non-message phase. This avoids
sending a MSG_NOOP in some later message out phase.
Use max lun and max target constants instead of
hard-coded values.
Use softc storage built into our device_t under FreeBSD.
Fix a bug in ahc_free() that caused us to delete
resources that were not allocated.
Clean up any tstate/lstate info in ahc_free().
Clear the powerdown state in ahc_reset() so that
registers can be accessed.
Add a preliminary function for pausing the chip and
processing any posted work.
Add a preliminary suspend and resume functions.
aic7xxx.h:
Limit the number of supported luns to 64. We don't
support information unit transfers, so this is the
maximum that makes sense for these chips.
Add a new flag AHC_ALL_INTERRUPTS that forces the
processing of all interrupt state in a single invokation
of ahc_intr(). When the flag is not set, we use the
lazy interrupt handling scheme.
Add data structures to store controller state while
we are suspended.
Use constants instead of hard coded values where appropriate.
Correct some harmless "unsigned/signed" conflicts.
aic7xxx.seq:
Only perform the SCSIBUSL fix on ULTRA2 or newer controllers.
Older controllers seem to be confused by this.
In target mode, ignore PHASEMIS during data phases.
This bit seems to be flakey on U160 controllers acting
in target mode.
aic7xxx_pci.c:
Add support for the 29160C CPCI adapter.
Add definitions for subvendor ID information
available for devices with the "9005" vendor id.
We currently use this information to determine
if a multi-function device doesn't have the second
channel hooked up on a board.
Add rudimentary power mode code so we can put the
controller into the D0 state. In the future this
will be an OSM callback so that in FreeBSD we don't
duplicate functionality provided by the PCI code.
The powerstate code was added after I'd completed
my regression tests on this code.
Only capture "left over BIOS state" if the POWRDN
setting is not set in HCNTRL.
In target mode, don't bother sending incremental
CRC data.
2000-12-20 01:11:37 +00:00
|
|
|
ahc_inb(ahc, SAVED_LUN))),
|
|
|
|
ahc_inb(ahc, SINDEX));
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
printf("SCSIID == 0x%x, SCB_SCSIID == 0x%x, SCB_LUN == 0x%x, "
|
|
|
|
"SCB_TAG == 0x%x, SCB_CONTROL == 0x%x\n",
|
|
|
|
ahc_inb(ahc, SCSIID), ahc_inb(ahc, SCB_SCSIID),
|
|
|
|
ahc_inb(ahc, SCB_LUN), ahc_inb(ahc, SCB_TAG),
|
|
|
|
ahc_inb(ahc, SCB_CONTROL));
|
2001-01-22 21:03:48 +00:00
|
|
|
printf("SCSIBUSL == 0x%x, SCSISIGI == 0x%x\n",
|
|
|
|
ahc_inb(ahc, SCSIBUSL), ahc_inb(ahc, SCSISIGI));
|
|
|
|
printf("SXFRCTL0 == 0x%x\n", ahc_inb(ahc, SXFRCTL0));
|
|
|
|
printf("SEQCTL == 0x%x\n", ahc_inb(ahc, SEQCTL));
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
ahc_dump_card_state(ahc);
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc->msgout_buf[0] = MSG_BUS_DEV_RESET;
|
|
|
|
ahc->msgout_len = 1;
|
|
|
|
ahc->msgout_index = 0;
|
|
|
|
ahc->msg_type = MSG_TYPE_INITIATOR_MSGOUT;
|
|
|
|
ahc_outb(ahc, MSG_OUT, HOST_MSG);
|
2001-05-15 19:41:12 +00:00
|
|
|
ahc_assert_atn(ahc);
|
2000-09-16 20:02:28 +00:00
|
|
|
break;
|
1999-04-23 23:27:31 +00:00
|
|
|
}
|
2000-09-16 20:02:28 +00:00
|
|
|
case SEND_REJECT:
|
|
|
|
{
|
|
|
|
u_int rejbyte = ahc_inb(ahc, ACCUM);
|
|
|
|
printf("%s:%c:%d: Warning - unknown message received from "
|
|
|
|
"target (0x%x). Rejecting\n",
|
|
|
|
ahc_name(ahc), devinfo.channel, devinfo.target, rejbyte);
|
|
|
|
break;
|
|
|
|
}
|
2002-11-30 19:30:09 +00:00
|
|
|
case PROTO_VIOLATION:
|
2000-09-16 20:02:28 +00:00
|
|
|
{
|
2002-11-30 19:30:09 +00:00
|
|
|
ahc_handle_proto_violation(ahc);
|
|
|
|
break;
|
2000-09-16 20:02:28 +00:00
|
|
|
}
|
|
|
|
case IGN_WIDE_RES:
|
|
|
|
ahc_handle_ign_wide_residue(ahc, &devinfo);
|
|
|
|
break;
|
2001-07-18 21:39:48 +00:00
|
|
|
case PDATA_REINIT:
|
|
|
|
ahc_reinitialize_dataptrs(ahc);
|
|
|
|
break;
|
2000-09-16 20:02:28 +00:00
|
|
|
case BAD_PHASE:
|
|
|
|
{
|
|
|
|
u_int lastphase;
|
1999-04-23 23:27:31 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
lastphase = ahc_inb(ahc, LASTPHASE);
|
Sync Perforce IDs, add tranceiver state change support, and correct
numerous error recovery buglets.
Many thanks to Tor Egge for his assistance in diagnosing problems with
the error recovery code.
aic7xxx.c:
Report missed bus free events using their own sequencer interrupt
code to avoid confusion with other "bad phase" interrupts.
Remove a delay used in debugging. This delay could only be hit
in certain, very extreme, error recovery scenarios.
Handle transceiver state changes correctly. You can now
plug an SE device into a hot-plug LVD bus without hanging
the controller.
When stepping through a critical section, panic if we step
more than a reasonable number of times.
After a bus reset, disable bus reset interupts until we either
our first attempt to (re)select another device, or another device
attemps to select us. This removes the need to busy wait in
kernel for the scsi reset line to fall yet still ensures we
see any reset events that impact the state of either our initiator
or target roles. Before this change, we had the potential of
servicing a "storm" of reset interrupts if the reset line was
held for a significant amount of time.
Indicate the current sequencer address whenever we dump the
card's state.
aic7xxx.reg:
Transceiver state change register definitions.
Add the missed bussfree sequencer interrupt code.
Re-enable the scsi reset interrupt if it has been
disabled before every attempt to (re)select a device
and when we have been selected as a target.
When being (re)selected, check to see if the selection
dissappeared just after we enabled our bus free interrupt.
If the bus has gone free again, go back to the idle loop
and wait for another selection.
Note two locations where we should change our behavior
if ATN is still raised. If ATN is raised during the
presentation of a command complete or disconnect message,
we should ignore the message and expect the target to put
us in msgout phase. We don't currently do this as it
requires some code re-arrangement so that critical sections
can be properly placed around our handling of these two
events. Otherwise, we cannot guarantee that the check of
ATN is atomic relative to our acking of the message in
byte (the kernel could assert ATN).
Only set the IDENTIFY_SEEN flag after we have settled
on the SCB for this transaction. The kernel looks at
this flag before assuming that SCB_TAG is valid. This
avoids confusion during certain types of error recovery.
Add a critical section around findSCB. We cannot allow
the kernel to remove an entry from the disconnected
list while we are traversing it. Ditto for get_free_or_disc_scb.
aic7xxx_freebsd.c:
Only assume that SCB_TAG is accurate if IDENTIFY_SEEN is
set in SEQ_FLAGS.
Fix a typo that caused us to execute some code for the
non-SCB paging case when paging SCBs. This only occurred
during error recovery.
2000-11-10 20:13:41 +00:00
|
|
|
printf("%s:%c:%d: unknown scsi bus phase %x, "
|
|
|
|
"lastphase = 0x%x. Attempting to continue\n",
|
|
|
|
ahc_name(ahc), devinfo.channel, devinfo.target,
|
|
|
|
lastphase, ahc_inb(ahc, SCSISIGI));
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
case MISSED_BUSFREE:
|
|
|
|
{
|
|
|
|
u_int lastphase;
|
|
|
|
|
|
|
|
lastphase = ahc_inb(ahc, LASTPHASE);
|
|
|
|
printf("%s:%c:%d: Missed busfree. "
|
|
|
|
"Lastphase = 0x%x, Curphase = 0x%x\n",
|
|
|
|
ahc_name(ahc), devinfo.channel, devinfo.target,
|
|
|
|
lastphase, ahc_inb(ahc, SCSISIGI));
|
This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
|
|
|
ahc_restart(ahc);
|
Sync Perforce IDs, add tranceiver state change support, and correct
numerous error recovery buglets.
Many thanks to Tor Egge for his assistance in diagnosing problems with
the error recovery code.
aic7xxx.c:
Report missed bus free events using their own sequencer interrupt
code to avoid confusion with other "bad phase" interrupts.
Remove a delay used in debugging. This delay could only be hit
in certain, very extreme, error recovery scenarios.
Handle transceiver state changes correctly. You can now
plug an SE device into a hot-plug LVD bus without hanging
the controller.
When stepping through a critical section, panic if we step
more than a reasonable number of times.
After a bus reset, disable bus reset interupts until we either
our first attempt to (re)select another device, or another device
attemps to select us. This removes the need to busy wait in
kernel for the scsi reset line to fall yet still ensures we
see any reset events that impact the state of either our initiator
or target roles. Before this change, we had the potential of
servicing a "storm" of reset interrupts if the reset line was
held for a significant amount of time.
Indicate the current sequencer address whenever we dump the
card's state.
aic7xxx.reg:
Transceiver state change register definitions.
Add the missed bussfree sequencer interrupt code.
Re-enable the scsi reset interrupt if it has been
disabled before every attempt to (re)select a device
and when we have been selected as a target.
When being (re)selected, check to see if the selection
dissappeared just after we enabled our bus free interrupt.
If the bus has gone free again, go back to the idle loop
and wait for another selection.
Note two locations where we should change our behavior
if ATN is still raised. If ATN is raised during the
presentation of a command complete or disconnect message,
we should ignore the message and expect the target to put
us in msgout phase. We don't currently do this as it
requires some code re-arrangement so that critical sections
can be properly placed around our handling of these two
events. Otherwise, we cannot guarantee that the check of
ATN is atomic relative to our acking of the message in
byte (the kernel could assert ATN).
Only set the IDENTIFY_SEEN flag after we have settled
on the SCB for this transaction. The kernel looks at
this flag before assuming that SCB_TAG is valid. This
avoids confusion during certain types of error recovery.
Add a critical section around findSCB. We cannot allow
the kernel to remove an entry from the disconnected
list while we are traversing it. Ditto for get_free_or_disc_scb.
aic7xxx_freebsd.c:
Only assume that SCB_TAG is accurate if IDENTIFY_SEEN is
set in SEQ_FLAGS.
Fix a typo that caused us to execute some code for the
non-SCB paging case when paging SCBs. This only occurred
during error recovery.
2000-11-10 20:13:41 +00:00
|
|
|
return;
|
2000-09-16 20:02:28 +00:00
|
|
|
}
|
|
|
|
case HOST_MSG_LOOP:
|
|
|
|
{
|
|
|
|
/*
|
|
|
|
* The sequencer has encountered a message phase
|
|
|
|
* that requires host assistance for completion.
|
|
|
|
* While handling the message phase(s), we will be
|
|
|
|
* notified by the sequencer after each byte is
|
|
|
|
* transfered so we can track bus phase changes.
|
|
|
|
*
|
|
|
|
* If this is the first time we've seen a HOST_MSG_LOOP
|
|
|
|
* interrupt, initialize the state of the host message
|
|
|
|
* loop.
|
|
|
|
*/
|
|
|
|
if (ahc->msg_type == MSG_TYPE_NONE) {
|
2001-03-29 00:36:35 +00:00
|
|
|
struct scb *scb;
|
|
|
|
u_int scb_index;
|
2000-09-16 20:02:28 +00:00
|
|
|
u_int bus_phase;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
bus_phase = ahc_inb(ahc, SCSISIGI) & PHASE_MASK;
|
|
|
|
if (bus_phase != P_MESGIN
|
|
|
|
&& bus_phase != P_MESGOUT) {
|
|
|
|
printf("ahc_intr: HOST_MSG_LOOP bad "
|
|
|
|
"phase 0x%x\n",
|
|
|
|
bus_phase);
|
|
|
|
/*
|
|
|
|
* Probably transitioned to bus free before
|
|
|
|
* we got here. Just punt the message.
|
|
|
|
*/
|
|
|
|
ahc_clear_intstat(ahc);
|
This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
|
|
|
ahc_restart(ahc);
|
2000-09-16 20:02:28 +00:00
|
|
|
return;
|
|
|
|
}
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2001-03-29 00:36:35 +00:00
|
|
|
scb_index = ahc_inb(ahc, SCB_TAG);
|
|
|
|
scb = ahc_lookup_scb(ahc, scb_index);
|
2000-09-16 20:02:28 +00:00
|
|
|
if (devinfo.role == ROLE_INITIATOR) {
|
2000-10-05 04:24:14 +00:00
|
|
|
if (scb == NULL)
|
|
|
|
panic("HOST_MSG_LOOP with "
|
|
|
|
"invalid SCB %x\n", scb_index);
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
if (bus_phase == P_MESGOUT)
|
|
|
|
ahc_setup_initiator_msgout(ahc,
|
|
|
|
&devinfo,
|
|
|
|
scb);
|
|
|
|
else {
|
|
|
|
ahc->msg_type =
|
|
|
|
MSG_TYPE_INITIATOR_MSGIN;
|
|
|
|
ahc->msgin_index = 0;
|
|
|
|
}
|
2002-04-24 16:58:51 +00:00
|
|
|
}
|
|
|
|
#if AHC_TARGET_MODE
|
|
|
|
else {
|
2000-09-16 20:02:28 +00:00
|
|
|
if (bus_phase == P_MESGOUT) {
|
|
|
|
ahc->msg_type =
|
|
|
|
MSG_TYPE_TARGET_MSGOUT;
|
|
|
|
ahc->msgin_index = 0;
|
|
|
|
}
|
|
|
|
else
|
2001-03-29 00:36:35 +00:00
|
|
|
ahc_setup_target_msgin(ahc,
|
|
|
|
&devinfo,
|
|
|
|
scb);
|
2000-09-16 20:02:28 +00:00
|
|
|
}
|
2002-04-24 16:58:51 +00:00
|
|
|
#endif
|
2000-09-16 20:02:28 +00:00
|
|
|
}
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_handle_message_phase(ahc);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
case PERR_DETECTED:
|
|
|
|
{
|
|
|
|
/*
|
|
|
|
* If we've cleared the parity error interrupt
|
|
|
|
* but the sequencer still believes that SCSIPERR
|
|
|
|
* is true, it must be that the parity error is
|
|
|
|
* for the currently presented byte on the bus,
|
|
|
|
* and we are not in a phase (data-in) where we will
|
|
|
|
* eventually ack this byte. Ack the byte and
|
|
|
|
* throw it away in the hope that the target will
|
|
|
|
* take us to message out to deliver the appropriate
|
|
|
|
* error message.
|
|
|
|
*/
|
|
|
|
if ((intstat & SCSIINT) == 0
|
|
|
|
&& (ahc_inb(ahc, SSTAT1) & SCSIPERR) != 0) {
|
2000-07-18 20:12:14 +00:00
|
|
|
|
2001-05-15 19:41:12 +00:00
|
|
|
if ((ahc->features & AHC_DT) == 0) {
|
|
|
|
u_int curphase;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* The hardware will only let you ack bytes
|
|
|
|
* if the expected phase in SCSISIGO matches
|
|
|
|
* the current phase. Make sure this is
|
|
|
|
* currently the case.
|
|
|
|
*/
|
|
|
|
curphase = ahc_inb(ahc, SCSISIGI) & PHASE_MASK;
|
|
|
|
ahc_outb(ahc, LASTPHASE, curphase);
|
|
|
|
ahc_outb(ahc, SCSISIGO, curphase);
|
|
|
|
}
|
2002-11-30 19:30:09 +00:00
|
|
|
if ((ahc_inb(ahc, SCSISIGI) & (CDI|MSGI)) == 0) {
|
|
|
|
int wait;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* In a data phase. Faster to bitbucket
|
|
|
|
* the data than to individually ack each
|
|
|
|
* byte. This is also the only strategy
|
|
|
|
* that will work with AUTOACK enabled.
|
|
|
|
*/
|
|
|
|
ahc_outb(ahc, SXFRCTL1,
|
|
|
|
ahc_inb(ahc, SXFRCTL1) | BITBUCKET);
|
|
|
|
wait = 5000;
|
|
|
|
while (--wait != 0) {
|
|
|
|
if ((ahc_inb(ahc, SCSISIGI)
|
|
|
|
& (CDI|MSGI)) != 0)
|
|
|
|
break;
|
|
|
|
ahc_delay(100);
|
|
|
|
}
|
|
|
|
ahc_outb(ahc, SXFRCTL1,
|
|
|
|
ahc_inb(ahc, SXFRCTL1) & ~BITBUCKET);
|
|
|
|
if (wait == 0) {
|
|
|
|
struct scb *scb;
|
|
|
|
u_int scb_index;
|
|
|
|
|
|
|
|
ahc_print_devinfo(ahc, &devinfo);
|
|
|
|
printf("Unable to clear parity error. "
|
|
|
|
"Resetting bus.\n");
|
|
|
|
scb_index = ahc_inb(ahc, SCB_TAG);
|
|
|
|
scb = ahc_lookup_scb(ahc, scb_index);
|
|
|
|
if (scb != NULL)
|
|
|
|
ahc_set_transaction_status(scb,
|
|
|
|
CAM_UNCOR_PARITY);
|
|
|
|
ahc_reset_channel(ahc, devinfo.channel,
|
|
|
|
/*init reset*/TRUE);
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
ahc_inb(ahc, SCSIDATL);
|
|
|
|
}
|
2000-09-16 20:02:28 +00:00
|
|
|
}
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
case DATA_OVERRUN:
|
|
|
|
{
|
|
|
|
/*
|
|
|
|
* When the sequencer detects an overrun, it
|
|
|
|
* places the controller in "BITBUCKET" mode
|
|
|
|
* and allows the target to complete its transfer.
|
|
|
|
* Unfortunately, none of the counters get updated
|
|
|
|
* when the controller is in this mode, so we have
|
|
|
|
* no way of knowing how large the overrun was.
|
|
|
|
*/
|
|
|
|
u_int scbindex = ahc_inb(ahc, SCB_TAG);
|
|
|
|
u_int lastphase = ahc_inb(ahc, LASTPHASE);
|
|
|
|
u_int i;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-10-05 04:24:14 +00:00
|
|
|
scb = ahc_lookup_scb(ahc, scbindex);
|
2000-09-16 20:02:28 +00:00
|
|
|
for (i = 0; i < num_phases; i++) {
|
This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
|
|
|
if (lastphase == ahc_phase_table[i].phase)
|
2000-09-16 20:02:28 +00:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
ahc_print_path(ahc, scb);
|
|
|
|
printf("data overrun detected %s."
|
|
|
|
" Tag == 0x%x.\n",
|
This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
|
|
|
ahc_phase_table[i].phasemsg,
|
2000-09-16 20:02:28 +00:00
|
|
|
scb->hscb->tag);
|
|
|
|
ahc_print_path(ahc, scb);
|
|
|
|
printf("%s seen Data Phase. Length = %ld. NumSGs = %d.\n",
|
|
|
|
ahc_inb(ahc, SEQ_FLAGS) & DPHASE ? "Have" : "Haven't",
|
|
|
|
ahc_get_transfer_length(scb), scb->sg_count);
|
|
|
|
if (scb->sg_count > 0) {
|
|
|
|
for (i = 0; i < scb->sg_count; i++) {
|
2001-07-18 21:39:48 +00:00
|
|
|
|
|
|
|
printf("sg[%d] - Addr 0x%x%x : Length %d\n",
|
2000-09-16 20:02:28 +00:00
|
|
|
i,
|
2001-07-18 21:39:48 +00:00
|
|
|
(ahc_le32toh(scb->sg_list[i].len) >> 24
|
|
|
|
& SG_HIGH_ADDR_BITS),
|
2001-01-05 19:15:37 +00:00
|
|
|
ahc_le32toh(scb->sg_list[i].addr),
|
|
|
|
ahc_le32toh(scb->sg_list[i].len)
|
|
|
|
& AHC_SG_LEN_MASK);
|
2000-09-16 20:02:28 +00:00
|
|
|
}
|
|
|
|
}
|
1998-09-15 07:24:17 +00:00
|
|
|
/*
|
2000-09-16 20:02:28 +00:00
|
|
|
* Set this and it will take effect when the
|
|
|
|
* target does a command complete.
|
1998-09-15 07:24:17 +00:00
|
|
|
*/
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_freeze_devq(ahc, scb);
|
2002-04-24 16:58:51 +00:00
|
|
|
if ((scb->flags & SCB_SENSE) == 0) {
|
|
|
|
ahc_set_transaction_status(scb, CAM_DATA_RUN_ERR);
|
|
|
|
} else {
|
|
|
|
scb->flags &= ~SCB_SENSE;
|
|
|
|
ahc_set_transaction_status(scb, CAM_AUTOSENSE_FAIL);
|
|
|
|
}
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_freeze_scb(scb);
|
2001-07-18 21:39:48 +00:00
|
|
|
|
|
|
|
if ((ahc->features & AHC_ULTRA2) != 0) {
|
|
|
|
/*
|
|
|
|
* Clear the channel in case we return
|
|
|
|
* to data phase later.
|
|
|
|
*/
|
|
|
|
ahc_outb(ahc, SXFRCTL0,
|
|
|
|
ahc_inb(ahc, SXFRCTL0) | CLRSTCNT|CLRCHN);
|
|
|
|
ahc_outb(ahc, SXFRCTL0,
|
|
|
|
ahc_inb(ahc, SXFRCTL0) | CLRSTCNT|CLRCHN);
|
|
|
|
}
|
|
|
|
if ((ahc->flags & AHC_39BIT_ADDRESSING) != 0) {
|
|
|
|
u_int dscommand1;
|
|
|
|
|
|
|
|
/* Ensure HHADDR is 0 for future DMA operations. */
|
|
|
|
dscommand1 = ahc_inb(ahc, DSCOMMAND1);
|
|
|
|
ahc_outb(ahc, DSCOMMAND1, dscommand1 | HADDLDSEL0);
|
|
|
|
ahc_outb(ahc, HADDR, 0);
|
|
|
|
ahc_outb(ahc, DSCOMMAND1, dscommand1);
|
|
|
|
}
|
2000-09-16 20:02:28 +00:00
|
|
|
break;
|
1998-09-15 07:24:17 +00:00
|
|
|
}
|
2000-11-06 20:05:38 +00:00
|
|
|
case MKMSG_FAILED:
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
{
|
2000-11-06 20:05:38 +00:00
|
|
|
u_int scbindex;
|
|
|
|
|
|
|
|
printf("%s:%c:%d:%d: Attempt to issue message failed\n",
|
|
|
|
ahc_name(ahc), devinfo.channel, devinfo.target,
|
|
|
|
devinfo.lun);
|
|
|
|
scbindex = ahc_inb(ahc, SCB_TAG);
|
|
|
|
scb = ahc_lookup_scb(ahc, scbindex);
|
|
|
|
if (scb != NULL
|
|
|
|
&& (scb->flags & SCB_RECOVERY_SCB) != 0)
|
|
|
|
/*
|
|
|
|
* Ensure that we didn't put a second instance of this
|
|
|
|
* SCB into the QINFIFO.
|
|
|
|
*/
|
|
|
|
ahc_search_qinfifo(ahc, SCB_GET_TARGET(ahc, scb),
|
|
|
|
SCB_GET_CHANNEL(ahc, scb),
|
|
|
|
SCB_GET_LUN(scb), scb->hscb->tag,
|
|
|
|
ROLE_INITIATOR, /*status*/0,
|
|
|
|
SEARCH_REMOVE);
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
case NO_FREE_SCB:
|
2000-09-16 20:02:28 +00:00
|
|
|
{
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
printf("%s: No free or disconnected SCBs\n", ahc_name(ahc));
|
|
|
|
ahc_dump_card_state(ahc);
|
|
|
|
panic("for safety");
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
case SCB_MISMATCH:
|
|
|
|
{
|
|
|
|
u_int scbptr;
|
|
|
|
|
|
|
|
scbptr = ahc_inb(ahc, SCBPTR);
|
|
|
|
printf("Bogus TAG after DMA. SCBPTR %d, tag %d, our tag %d\n",
|
|
|
|
scbptr, ahc_inb(ahc, ARG_1),
|
|
|
|
ahc->scb_data->hscbs[scbptr].tag);
|
|
|
|
ahc_dump_card_state(ahc);
|
|
|
|
panic("for saftey");
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
case OUT_OF_RANGE:
|
|
|
|
{
|
|
|
|
printf("%s: BTT calculation out of range\n", ahc_name(ahc));
|
|
|
|
printf("SAVED_SCSIID == 0x%x, SAVED_LUN == 0x%x, "
|
|
|
|
"ARG_1 == 0x%x ACCUM = 0x%x\n",
|
|
|
|
ahc_inb(ahc, SAVED_SCSIID), ahc_inb(ahc, SAVED_LUN),
|
|
|
|
ahc_inb(ahc, ARG_1), ahc_inb(ahc, ACCUM));
|
|
|
|
printf("SEQ_FLAGS == 0x%x, SCBPTR == 0x%x, BTT == 0x%x, "
|
|
|
|
"SINDEX == 0x%x\n, A == 0x%x\n",
|
|
|
|
ahc_inb(ahc, SEQ_FLAGS), ahc_inb(ahc, SCBPTR),
|
|
|
|
ahc_index_busy_tcl(ahc,
|
|
|
|
BUILD_TCL(ahc_inb(ahc, SAVED_SCSIID),
|
ahc_eisa.c:
ahc_pci.c:
Add detach support.
Make use of soft allocated on our behalf by newbus.
For PCI devices, disable the mapping type we aren't
using for extra protection from rogue code.
aic7xxx_93cx6.c:
aic7xxx_93cx6.h:
Sync perforce IDs.
aic7xxx_freebsd.c:
Capture the eventhandle returned by EVENTHANDER_REGISTER
so we can kill the handler off during detach.
Use AHC_* constants instead of hard coded numbers in a
few more places.
Test PPR option state when deciding to "really" negotiate
when the CAM_NEGOTIATE flag is passed in a CCB.
Make use of core "ahc_pause_and_flushwork" routine in our
timeout handler rather than re-inventing this code.
Cleanup all of our resources (really!) in ahc_platform_free().
We should be all set to become a module now.
Implement the core ahc_detach() routine shared by all of
the FreeBSD front-ends.
aic7xxx_freebsd.h:
Softc storage for our event handler.
Null implementation for the ahc_platform_flushwork() OSM
callback. FreeBSD doesn't need this as XPT callbacks are
safe from all contexts and are done directly in ahc_done().
aic7xxx_inline.h:
Implement new lazy interrupt scheme. To avoid an extra
PCI bus read, we first check our completion queues to
see if any work has completed. If work is available, we
assume that this is the source of the interrupt and skip
reading INTSTAT. Any remaining interrupt status will be
cleared by a second call to the interrupt handler should
the interrupt line still be asserted. This drops the
interrupt handler down to a single PCI bus read in the
common case of I/O completion. This is the same overhead
as in the not so distant past, but the extra sanity of
perforning a PCI read after clearing the command complete
interrupt and before running the completion queue to avoid
missing command complete interrupts added a cycle.
aic7xxx.c:
During initialization, be sure to initialize all scratch
ram locations before they are read to avoid parity errors.
In this case, we use a new function, ahc_unbusy_tcl() to
initialize the scratch ram busy target table.
Replace instances of ahc_index_busy_tcl() used to unbusy
a tcl without looking at the old value with ahc_unbusy_tcl().
Modify ahc_sent_msg so that it can find single byte messages.
ahc_sent_msg is now used to determine if a transfer negotiation
attempt resulted in a bus free.
Be more careful in filtering out only the SCSI interrupts
of interest in ahc_handle_scsiint.
Rearrange interrupt clearing code to ensure that at least
one PCI transaction occurrs after hitting CLRSINT1 and
writting to CLRINT. CLRSINT1 writes take a bit to
take effect, and the re-arrangement provides sufficient
delay to ensure the write to CLRINT is effective. The
old code might report a spurious interrupt on some "fast"
chipsets.
export ahc-update_target_msg_request for use by OSM code.
If a target does not respond to our ATN request, clear
it once we move to a non-message phase. This avoids
sending a MSG_NOOP in some later message out phase.
Use max lun and max target constants instead of
hard-coded values.
Use softc storage built into our device_t under FreeBSD.
Fix a bug in ahc_free() that caused us to delete
resources that were not allocated.
Clean up any tstate/lstate info in ahc_free().
Clear the powerdown state in ahc_reset() so that
registers can be accessed.
Add a preliminary function for pausing the chip and
processing any posted work.
Add a preliminary suspend and resume functions.
aic7xxx.h:
Limit the number of supported luns to 64. We don't
support information unit transfers, so this is the
maximum that makes sense for these chips.
Add a new flag AHC_ALL_INTERRUPTS that forces the
processing of all interrupt state in a single invokation
of ahc_intr(). When the flag is not set, we use the
lazy interrupt handling scheme.
Add data structures to store controller state while
we are suspended.
Use constants instead of hard coded values where appropriate.
Correct some harmless "unsigned/signed" conflicts.
aic7xxx.seq:
Only perform the SCSIBUSL fix on ULTRA2 or newer controllers.
Older controllers seem to be confused by this.
In target mode, ignore PHASEMIS during data phases.
This bit seems to be flakey on U160 controllers acting
in target mode.
aic7xxx_pci.c:
Add support for the 29160C CPCI adapter.
Add definitions for subvendor ID information
available for devices with the "9005" vendor id.
We currently use this information to determine
if a multi-function device doesn't have the second
channel hooked up on a board.
Add rudimentary power mode code so we can put the
controller into the D0 state. In the future this
will be an OSM callback so that in FreeBSD we don't
duplicate functionality provided by the PCI code.
The powerstate code was added after I'd completed
my regression tests on this code.
Only capture "left over BIOS state" if the POWRDN
setting is not set in HCNTRL.
In target mode, don't bother sending incremental
CRC data.
2000-12-20 01:11:37 +00:00
|
|
|
ahc_inb(ahc, SAVED_LUN))),
|
|
|
|
ahc_inb(ahc, SINDEX),
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
ahc_inb(ahc, ACCUM));
|
|
|
|
printf("SCSIID == 0x%x, SCB_SCSIID == 0x%x, SCB_LUN == 0x%x, "
|
|
|
|
"SCB_TAG == 0x%x, SCB_CONTROL == 0x%x\n",
|
|
|
|
ahc_inb(ahc, SCSIID), ahc_inb(ahc, SCB_SCSIID),
|
|
|
|
ahc_inb(ahc, SCB_LUN), ahc_inb(ahc, SCB_TAG),
|
|
|
|
ahc_inb(ahc, SCB_CONTROL));
|
2001-01-22 21:03:48 +00:00
|
|
|
printf("SCSIBUSL == 0x%x, SCSISIGI == 0x%x\n",
|
|
|
|
ahc_inb(ahc, SCSIBUSL), ahc_inb(ahc, SCSISIGI));
|
|
|
|
ahc_dump_card_state(ahc);
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
panic("for safety");
|
2000-09-16 20:02:28 +00:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
default:
|
|
|
|
printf("ahc_intr: seqint, "
|
|
|
|
"intstat == 0x%x, scsisigi = 0x%x\n",
|
|
|
|
intstat, ahc_inb(ahc, SCSISIGI));
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
unpause:
|
|
|
|
/*
|
|
|
|
* The sequencer is paused immediately on
|
|
|
|
* a SEQINT, so we should restart it when
|
|
|
|
* we're done.
|
|
|
|
*/
|
This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
|
|
|
ahc_unpause(ahc);
|
1998-09-15 07:24:17 +00:00
|
|
|
}
|
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
void
|
|
|
|
ahc_handle_scsiint(struct ahc_softc *ahc, u_int intstat)
|
1999-04-23 23:27:31 +00:00
|
|
|
{
|
2000-09-16 20:02:28 +00:00
|
|
|
u_int scb_index;
|
Sync Perforce IDs, add tranceiver state change support, and correct
numerous error recovery buglets.
Many thanks to Tor Egge for his assistance in diagnosing problems with
the error recovery code.
aic7xxx.c:
Report missed bus free events using their own sequencer interrupt
code to avoid confusion with other "bad phase" interrupts.
Remove a delay used in debugging. This delay could only be hit
in certain, very extreme, error recovery scenarios.
Handle transceiver state changes correctly. You can now
plug an SE device into a hot-plug LVD bus without hanging
the controller.
When stepping through a critical section, panic if we step
more than a reasonable number of times.
After a bus reset, disable bus reset interupts until we either
our first attempt to (re)select another device, or another device
attemps to select us. This removes the need to busy wait in
kernel for the scsi reset line to fall yet still ensures we
see any reset events that impact the state of either our initiator
or target roles. Before this change, we had the potential of
servicing a "storm" of reset interrupts if the reset line was
held for a significant amount of time.
Indicate the current sequencer address whenever we dump the
card's state.
aic7xxx.reg:
Transceiver state change register definitions.
Add the missed bussfree sequencer interrupt code.
Re-enable the scsi reset interrupt if it has been
disabled before every attempt to (re)select a device
and when we have been selected as a target.
When being (re)selected, check to see if the selection
dissappeared just after we enabled our bus free interrupt.
If the bus has gone free again, go back to the idle loop
and wait for another selection.
Note two locations where we should change our behavior
if ATN is still raised. If ATN is raised during the
presentation of a command complete or disconnect message,
we should ignore the message and expect the target to put
us in msgout phase. We don't currently do this as it
requires some code re-arrangement so that critical sections
can be properly placed around our handling of these two
events. Otherwise, we cannot guarantee that the check of
ATN is atomic relative to our acking of the message in
byte (the kernel could assert ATN).
Only set the IDENTIFY_SEEN flag after we have settled
on the SCB for this transaction. The kernel looks at
this flag before assuming that SCB_TAG is valid. This
avoids confusion during certain types of error recovery.
Add a critical section around findSCB. We cannot allow
the kernel to remove an entry from the disconnected
list while we are traversing it. Ditto for get_free_or_disc_scb.
aic7xxx_freebsd.c:
Only assume that SCB_TAG is accurate if IDENTIFY_SEEN is
set in SEQ_FLAGS.
Fix a typo that caused us to execute some code for the
non-SCB paging case when paging SCBs. This only occurred
during error recovery.
2000-11-10 20:13:41 +00:00
|
|
|
u_int status0;
|
2000-09-16 20:02:28 +00:00
|
|
|
u_int status;
|
|
|
|
struct scb *scb;
|
|
|
|
char cur_channel;
|
|
|
|
char intr_channel;
|
1999-04-23 23:27:31 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
if ((ahc->features & AHC_TWIN) != 0
|
|
|
|
&& ((ahc_inb(ahc, SBLKCTL) & SELBUSB) != 0))
|
|
|
|
cur_channel = 'B';
|
|
|
|
else
|
|
|
|
cur_channel = 'A';
|
|
|
|
intr_channel = cur_channel;
|
1999-04-23 23:27:31 +00:00
|
|
|
|
Sync Perforce IDs, add tranceiver state change support, and correct
numerous error recovery buglets.
Many thanks to Tor Egge for his assistance in diagnosing problems with
the error recovery code.
aic7xxx.c:
Report missed bus free events using their own sequencer interrupt
code to avoid confusion with other "bad phase" interrupts.
Remove a delay used in debugging. This delay could only be hit
in certain, very extreme, error recovery scenarios.
Handle transceiver state changes correctly. You can now
plug an SE device into a hot-plug LVD bus without hanging
the controller.
When stepping through a critical section, panic if we step
more than a reasonable number of times.
After a bus reset, disable bus reset interupts until we either
our first attempt to (re)select another device, or another device
attemps to select us. This removes the need to busy wait in
kernel for the scsi reset line to fall yet still ensures we
see any reset events that impact the state of either our initiator
or target roles. Before this change, we had the potential of
servicing a "storm" of reset interrupts if the reset line was
held for a significant amount of time.
Indicate the current sequencer address whenever we dump the
card's state.
aic7xxx.reg:
Transceiver state change register definitions.
Add the missed bussfree sequencer interrupt code.
Re-enable the scsi reset interrupt if it has been
disabled before every attempt to (re)select a device
and when we have been selected as a target.
When being (re)selected, check to see if the selection
dissappeared just after we enabled our bus free interrupt.
If the bus has gone free again, go back to the idle loop
and wait for another selection.
Note two locations where we should change our behavior
if ATN is still raised. If ATN is raised during the
presentation of a command complete or disconnect message,
we should ignore the message and expect the target to put
us in msgout phase. We don't currently do this as it
requires some code re-arrangement so that critical sections
can be properly placed around our handling of these two
events. Otherwise, we cannot guarantee that the check of
ATN is atomic relative to our acking of the message in
byte (the kernel could assert ATN).
Only set the IDENTIFY_SEEN flag after we have settled
on the SCB for this transaction. The kernel looks at
this flag before assuming that SCB_TAG is valid. This
avoids confusion during certain types of error recovery.
Add a critical section around findSCB. We cannot allow
the kernel to remove an entry from the disconnected
list while we are traversing it. Ditto for get_free_or_disc_scb.
aic7xxx_freebsd.c:
Only assume that SCB_TAG is accurate if IDENTIFY_SEEN is
set in SEQ_FLAGS.
Fix a typo that caused us to execute some code for the
non-SCB paging case when paging SCBs. This only occurred
during error recovery.
2000-11-10 20:13:41 +00:00
|
|
|
if ((ahc->features & AHC_ULTRA2) != 0)
|
|
|
|
status0 = ahc_inb(ahc, SSTAT0) & IOERR;
|
|
|
|
else
|
|
|
|
status0 = 0;
|
ahc_eisa.c:
ahc_pci.c:
Add detach support.
Make use of soft allocated on our behalf by newbus.
For PCI devices, disable the mapping type we aren't
using for extra protection from rogue code.
aic7xxx_93cx6.c:
aic7xxx_93cx6.h:
Sync perforce IDs.
aic7xxx_freebsd.c:
Capture the eventhandle returned by EVENTHANDER_REGISTER
so we can kill the handler off during detach.
Use AHC_* constants instead of hard coded numbers in a
few more places.
Test PPR option state when deciding to "really" negotiate
when the CAM_NEGOTIATE flag is passed in a CCB.
Make use of core "ahc_pause_and_flushwork" routine in our
timeout handler rather than re-inventing this code.
Cleanup all of our resources (really!) in ahc_platform_free().
We should be all set to become a module now.
Implement the core ahc_detach() routine shared by all of
the FreeBSD front-ends.
aic7xxx_freebsd.h:
Softc storage for our event handler.
Null implementation for the ahc_platform_flushwork() OSM
callback. FreeBSD doesn't need this as XPT callbacks are
safe from all contexts and are done directly in ahc_done().
aic7xxx_inline.h:
Implement new lazy interrupt scheme. To avoid an extra
PCI bus read, we first check our completion queues to
see if any work has completed. If work is available, we
assume that this is the source of the interrupt and skip
reading INTSTAT. Any remaining interrupt status will be
cleared by a second call to the interrupt handler should
the interrupt line still be asserted. This drops the
interrupt handler down to a single PCI bus read in the
common case of I/O completion. This is the same overhead
as in the not so distant past, but the extra sanity of
perforning a PCI read after clearing the command complete
interrupt and before running the completion queue to avoid
missing command complete interrupts added a cycle.
aic7xxx.c:
During initialization, be sure to initialize all scratch
ram locations before they are read to avoid parity errors.
In this case, we use a new function, ahc_unbusy_tcl() to
initialize the scratch ram busy target table.
Replace instances of ahc_index_busy_tcl() used to unbusy
a tcl without looking at the old value with ahc_unbusy_tcl().
Modify ahc_sent_msg so that it can find single byte messages.
ahc_sent_msg is now used to determine if a transfer negotiation
attempt resulted in a bus free.
Be more careful in filtering out only the SCSI interrupts
of interest in ahc_handle_scsiint.
Rearrange interrupt clearing code to ensure that at least
one PCI transaction occurrs after hitting CLRSINT1 and
writting to CLRINT. CLRSINT1 writes take a bit to
take effect, and the re-arrangement provides sufficient
delay to ensure the write to CLRINT is effective. The
old code might report a spurious interrupt on some "fast"
chipsets.
export ahc-update_target_msg_request for use by OSM code.
If a target does not respond to our ATN request, clear
it once we move to a non-message phase. This avoids
sending a MSG_NOOP in some later message out phase.
Use max lun and max target constants instead of
hard-coded values.
Use softc storage built into our device_t under FreeBSD.
Fix a bug in ahc_free() that caused us to delete
resources that were not allocated.
Clean up any tstate/lstate info in ahc_free().
Clear the powerdown state in ahc_reset() so that
registers can be accessed.
Add a preliminary function for pausing the chip and
processing any posted work.
Add a preliminary suspend and resume functions.
aic7xxx.h:
Limit the number of supported luns to 64. We don't
support information unit transfers, so this is the
maximum that makes sense for these chips.
Add a new flag AHC_ALL_INTERRUPTS that forces the
processing of all interrupt state in a single invokation
of ahc_intr(). When the flag is not set, we use the
lazy interrupt handling scheme.
Add data structures to store controller state while
we are suspended.
Use constants instead of hard coded values where appropriate.
Correct some harmless "unsigned/signed" conflicts.
aic7xxx.seq:
Only perform the SCSIBUSL fix on ULTRA2 or newer controllers.
Older controllers seem to be confused by this.
In target mode, ignore PHASEMIS during data phases.
This bit seems to be flakey on U160 controllers acting
in target mode.
aic7xxx_pci.c:
Add support for the 29160C CPCI adapter.
Add definitions for subvendor ID information
available for devices with the "9005" vendor id.
We currently use this information to determine
if a multi-function device doesn't have the second
channel hooked up on a board.
Add rudimentary power mode code so we can put the
controller into the D0 state. In the future this
will be an OSM callback so that in FreeBSD we don't
duplicate functionality provided by the PCI code.
The powerstate code was added after I'd completed
my regression tests on this code.
Only capture "left over BIOS state" if the POWRDN
setting is not set in HCNTRL.
In target mode, don't bother sending incremental
CRC data.
2000-12-20 01:11:37 +00:00
|
|
|
status = ahc_inb(ahc, SSTAT1) & (SELTO|SCSIRSTI|BUSFREE|SCSIPERR);
|
Sync Perforce IDs, add tranceiver state change support, and correct
numerous error recovery buglets.
Many thanks to Tor Egge for his assistance in diagnosing problems with
the error recovery code.
aic7xxx.c:
Report missed bus free events using their own sequencer interrupt
code to avoid confusion with other "bad phase" interrupts.
Remove a delay used in debugging. This delay could only be hit
in certain, very extreme, error recovery scenarios.
Handle transceiver state changes correctly. You can now
plug an SE device into a hot-plug LVD bus without hanging
the controller.
When stepping through a critical section, panic if we step
more than a reasonable number of times.
After a bus reset, disable bus reset interupts until we either
our first attempt to (re)select another device, or another device
attemps to select us. This removes the need to busy wait in
kernel for the scsi reset line to fall yet still ensures we
see any reset events that impact the state of either our initiator
or target roles. Before this change, we had the potential of
servicing a "storm" of reset interrupts if the reset line was
held for a significant amount of time.
Indicate the current sequencer address whenever we dump the
card's state.
aic7xxx.reg:
Transceiver state change register definitions.
Add the missed bussfree sequencer interrupt code.
Re-enable the scsi reset interrupt if it has been
disabled before every attempt to (re)select a device
and when we have been selected as a target.
When being (re)selected, check to see if the selection
dissappeared just after we enabled our bus free interrupt.
If the bus has gone free again, go back to the idle loop
and wait for another selection.
Note two locations where we should change our behavior
if ATN is still raised. If ATN is raised during the
presentation of a command complete or disconnect message,
we should ignore the message and expect the target to put
us in msgout phase. We don't currently do this as it
requires some code re-arrangement so that critical sections
can be properly placed around our handling of these two
events. Otherwise, we cannot guarantee that the check of
ATN is atomic relative to our acking of the message in
byte (the kernel could assert ATN).
Only set the IDENTIFY_SEEN flag after we have settled
on the SCB for this transaction. The kernel looks at
this flag before assuming that SCB_TAG is valid. This
avoids confusion during certain types of error recovery.
Add a critical section around findSCB. We cannot allow
the kernel to remove an entry from the disconnected
list while we are traversing it. Ditto for get_free_or_disc_scb.
aic7xxx_freebsd.c:
Only assume that SCB_TAG is accurate if IDENTIFY_SEEN is
set in SEQ_FLAGS.
Fix a typo that caused us to execute some code for the
non-SCB paging case when paging SCBs. This only occurred
during error recovery.
2000-11-10 20:13:41 +00:00
|
|
|
if (status == 0 && status0 == 0) {
|
2000-09-16 20:02:28 +00:00
|
|
|
if ((ahc->features & AHC_TWIN) != 0) {
|
|
|
|
/* Try the other channel */
|
|
|
|
ahc_outb(ahc, SBLKCTL, ahc_inb(ahc, SBLKCTL) ^ SELBUSB);
|
2001-02-21 20:50:36 +00:00
|
|
|
status = ahc_inb(ahc, SSTAT1)
|
|
|
|
& (SELTO|SCSIRSTI|BUSFREE|SCSIPERR);
|
2000-09-16 20:02:28 +00:00
|
|
|
intr_channel = (cur_channel == 'A') ? 'B' : 'A';
|
|
|
|
}
|
|
|
|
if (status == 0) {
|
|
|
|
printf("%s: Spurious SCSI interrupt\n", ahc_name(ahc));
|
2000-09-22 22:18:05 +00:00
|
|
|
ahc_outb(ahc, CLRINT, CLRSCSIINT);
|
This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
|
|
|
ahc_unpause(ahc);
|
2000-09-16 20:02:28 +00:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
}
|
1999-04-23 23:27:31 +00:00
|
|
|
|
2002-11-30 19:30:09 +00:00
|
|
|
/* Make sure the sequencer is in a safe location. */
|
|
|
|
ahc_clear_critical_section(ahc);
|
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
scb_index = ahc_inb(ahc, SCB_TAG);
|
2000-10-05 04:24:14 +00:00
|
|
|
scb = ahc_lookup_scb(ahc, scb_index);
|
|
|
|
if (scb != NULL
|
2002-11-30 19:30:09 +00:00
|
|
|
&& (ahc_inb(ahc, SEQ_FLAGS) & NOT_IDENTIFIED) != 0)
|
2000-09-16 20:02:28 +00:00
|
|
|
scb = NULL;
|
1999-04-23 23:27:31 +00:00
|
|
|
|
Sync Perforce IDs, add tranceiver state change support, and correct
numerous error recovery buglets.
Many thanks to Tor Egge for his assistance in diagnosing problems with
the error recovery code.
aic7xxx.c:
Report missed bus free events using their own sequencer interrupt
code to avoid confusion with other "bad phase" interrupts.
Remove a delay used in debugging. This delay could only be hit
in certain, very extreme, error recovery scenarios.
Handle transceiver state changes correctly. You can now
plug an SE device into a hot-plug LVD bus without hanging
the controller.
When stepping through a critical section, panic if we step
more than a reasonable number of times.
After a bus reset, disable bus reset interupts until we either
our first attempt to (re)select another device, or another device
attemps to select us. This removes the need to busy wait in
kernel for the scsi reset line to fall yet still ensures we
see any reset events that impact the state of either our initiator
or target roles. Before this change, we had the potential of
servicing a "storm" of reset interrupts if the reset line was
held for a significant amount of time.
Indicate the current sequencer address whenever we dump the
card's state.
aic7xxx.reg:
Transceiver state change register definitions.
Add the missed bussfree sequencer interrupt code.
Re-enable the scsi reset interrupt if it has been
disabled before every attempt to (re)select a device
and when we have been selected as a target.
When being (re)selected, check to see if the selection
dissappeared just after we enabled our bus free interrupt.
If the bus has gone free again, go back to the idle loop
and wait for another selection.
Note two locations where we should change our behavior
if ATN is still raised. If ATN is raised during the
presentation of a command complete or disconnect message,
we should ignore the message and expect the target to put
us in msgout phase. We don't currently do this as it
requires some code re-arrangement so that critical sections
can be properly placed around our handling of these two
events. Otherwise, we cannot guarantee that the check of
ATN is atomic relative to our acking of the message in
byte (the kernel could assert ATN).
Only set the IDENTIFY_SEEN flag after we have settled
on the SCB for this transaction. The kernel looks at
this flag before assuming that SCB_TAG is valid. This
avoids confusion during certain types of error recovery.
Add a critical section around findSCB. We cannot allow
the kernel to remove an entry from the disconnected
list while we are traversing it. Ditto for get_free_or_disc_scb.
aic7xxx_freebsd.c:
Only assume that SCB_TAG is accurate if IDENTIFY_SEEN is
set in SEQ_FLAGS.
Fix a typo that caused us to execute some code for the
non-SCB paging case when paging SCBs. This only occurred
during error recovery.
2000-11-10 20:13:41 +00:00
|
|
|
if ((ahc->features & AHC_ULTRA2) != 0
|
aic7xxx.c:
Style nits.
Make sure that our selection hardware is disabled
as soon as possible after detecting a busfree and
even go so far as to disable the selection hardware
in advance of an event that will cause a busfree
(ABORT or BUS DEVICE RESET message). The concern
is that the selection hardware will select a target
for which, after processing the bus free, there
will be no commands pending. The sequencer idle
loop will re-enable the selection should it still be
necessary.
In ahc_handle_scsiint(), clear SSTAT0 events several
PCI transactions (most notably reads) prior to clearing
SCSIINT. The newer chips seem to take a bit of time to
see the change which can make the clearing of SCSIINT
ineffective.
Don't bother panicing at the end of ahc_handle_scsiint().
Getting to the final else just means we lost the race
with clearing SCSIINT.
In ahc_free(), handle init-level 0. This can happen when we
fail the attach for RAID devices. While I'm here, also kill
the parent dma tag.
In ahc_match_scb(), consider initiator ccbs to be any
that are not from the target mode group. This fixes
a bug where an external target reset CCB was not getting
cleaned up by the reset code.
Don't bother freezing a ccb in any of our "abort" routines
when the status is set to CAM_REQ_CMP. This can happen
for a target reset ccb.
aic7xxx.reg:
Reserve space for a completion queue. This will be used
to enhance performance in the near future.
aic7xxx.seq:
Remove an optimization for the 7890 autoflush bug that
turned out to allow, in rare cases, some data to get
lost.
Implement a simpler, faster, fix for the PCI_2_1 retry
bug that hangs the sequencer on an SCB dma for certain chips.
Test against SAVED_SCSIID rather than SELID during target
reselections. This is how we always did it in the past,
but the code was modified while trying to work around an
issue with the 7895. SAVED_SCSIID takes into account
twin channel adapters such as the 2742T, whereas SELID
does not have the channel bit. This caused invalid
selection warnings and other strangeness on these cards.
aic7xxx_pci.c
Use the correct mask for checking the generic aic7892
entry.
2001-02-10 18:04:27 +00:00
|
|
|
&& (status0 & IOERR) != 0) {
|
Sync Perforce IDs, add tranceiver state change support, and correct
numerous error recovery buglets.
Many thanks to Tor Egge for his assistance in diagnosing problems with
the error recovery code.
aic7xxx.c:
Report missed bus free events using their own sequencer interrupt
code to avoid confusion with other "bad phase" interrupts.
Remove a delay used in debugging. This delay could only be hit
in certain, very extreme, error recovery scenarios.
Handle transceiver state changes correctly. You can now
plug an SE device into a hot-plug LVD bus without hanging
the controller.
When stepping through a critical section, panic if we step
more than a reasonable number of times.
After a bus reset, disable bus reset interupts until we either
our first attempt to (re)select another device, or another device
attemps to select us. This removes the need to busy wait in
kernel for the scsi reset line to fall yet still ensures we
see any reset events that impact the state of either our initiator
or target roles. Before this change, we had the potential of
servicing a "storm" of reset interrupts if the reset line was
held for a significant amount of time.
Indicate the current sequencer address whenever we dump the
card's state.
aic7xxx.reg:
Transceiver state change register definitions.
Add the missed bussfree sequencer interrupt code.
Re-enable the scsi reset interrupt if it has been
disabled before every attempt to (re)select a device
and when we have been selected as a target.
When being (re)selected, check to see if the selection
dissappeared just after we enabled our bus free interrupt.
If the bus has gone free again, go back to the idle loop
and wait for another selection.
Note two locations where we should change our behavior
if ATN is still raised. If ATN is raised during the
presentation of a command complete or disconnect message,
we should ignore the message and expect the target to put
us in msgout phase. We don't currently do this as it
requires some code re-arrangement so that critical sections
can be properly placed around our handling of these two
events. Otherwise, we cannot guarantee that the check of
ATN is atomic relative to our acking of the message in
byte (the kernel could assert ATN).
Only set the IDENTIFY_SEEN flag after we have settled
on the SCB for this transaction. The kernel looks at
this flag before assuming that SCB_TAG is valid. This
avoids confusion during certain types of error recovery.
Add a critical section around findSCB. We cannot allow
the kernel to remove an entry from the disconnected
list while we are traversing it. Ditto for get_free_or_disc_scb.
aic7xxx_freebsd.c:
Only assume that SCB_TAG is accurate if IDENTIFY_SEEN is
set in SEQ_FLAGS.
Fix a typo that caused us to execute some code for the
non-SCB paging case when paging SCBs. This only occurred
during error recovery.
2000-11-10 20:13:41 +00:00
|
|
|
int now_lvd;
|
|
|
|
|
|
|
|
now_lvd = ahc_inb(ahc, SBLKCTL) & ENAB40;
|
|
|
|
printf("%s: Transceiver State Has Changed to %s mode\n",
|
|
|
|
ahc_name(ahc), now_lvd ? "LVD" : "SE");
|
|
|
|
ahc_outb(ahc, CLRSINT0, CLRIOERR);
|
|
|
|
/*
|
|
|
|
* When transitioning to SE mode, the reset line
|
|
|
|
* glitches, triggering an arbitration bug in some
|
|
|
|
* Ultra2 controllers. This bug is cleared when we
|
|
|
|
* assert the reset line. Since a reset glitch has
|
|
|
|
* already occurred with this transition and a
|
|
|
|
* transceiver state change is handled just like
|
|
|
|
* a bus reset anyway, asserting the reset line
|
|
|
|
* ourselves is safe.
|
|
|
|
*/
|
|
|
|
ahc_reset_channel(ahc, intr_channel,
|
|
|
|
/*Initiate Reset*/now_lvd == 0);
|
|
|
|
} else if ((status & SCSIRSTI) != 0) {
|
2000-09-16 20:02:28 +00:00
|
|
|
printf("%s: Someone reset channel %c\n",
|
|
|
|
ahc_name(ahc), intr_channel);
|
2001-02-21 20:50:36 +00:00
|
|
|
if (intr_channel != cur_channel)
|
|
|
|
ahc_outb(ahc, SBLKCTL, ahc_inb(ahc, SBLKCTL) ^ SELBUSB);
|
Sync Perforce IDs, add tranceiver state change support, and correct
numerous error recovery buglets.
Many thanks to Tor Egge for his assistance in diagnosing problems with
the error recovery code.
aic7xxx.c:
Report missed bus free events using their own sequencer interrupt
code to avoid confusion with other "bad phase" interrupts.
Remove a delay used in debugging. This delay could only be hit
in certain, very extreme, error recovery scenarios.
Handle transceiver state changes correctly. You can now
plug an SE device into a hot-plug LVD bus without hanging
the controller.
When stepping through a critical section, panic if we step
more than a reasonable number of times.
After a bus reset, disable bus reset interupts until we either
our first attempt to (re)select another device, or another device
attemps to select us. This removes the need to busy wait in
kernel for the scsi reset line to fall yet still ensures we
see any reset events that impact the state of either our initiator
or target roles. Before this change, we had the potential of
servicing a "storm" of reset interrupts if the reset line was
held for a significant amount of time.
Indicate the current sequencer address whenever we dump the
card's state.
aic7xxx.reg:
Transceiver state change register definitions.
Add the missed bussfree sequencer interrupt code.
Re-enable the scsi reset interrupt if it has been
disabled before every attempt to (re)select a device
and when we have been selected as a target.
When being (re)selected, check to see if the selection
dissappeared just after we enabled our bus free interrupt.
If the bus has gone free again, go back to the idle loop
and wait for another selection.
Note two locations where we should change our behavior
if ATN is still raised. If ATN is raised during the
presentation of a command complete or disconnect message,
we should ignore the message and expect the target to put
us in msgout phase. We don't currently do this as it
requires some code re-arrangement so that critical sections
can be properly placed around our handling of these two
events. Otherwise, we cannot guarantee that the check of
ATN is atomic relative to our acking of the message in
byte (the kernel could assert ATN).
Only set the IDENTIFY_SEEN flag after we have settled
on the SCB for this transaction. The kernel looks at
this flag before assuming that SCB_TAG is valid. This
avoids confusion during certain types of error recovery.
Add a critical section around findSCB. We cannot allow
the kernel to remove an entry from the disconnected
list while we are traversing it. Ditto for get_free_or_disc_scb.
aic7xxx_freebsd.c:
Only assume that SCB_TAG is accurate if IDENTIFY_SEEN is
set in SEQ_FLAGS.
Fix a typo that caused us to execute some code for the
non-SCB paging case when paging SCBs. This only occurred
during error recovery.
2000-11-10 20:13:41 +00:00
|
|
|
ahc_reset_channel(ahc, intr_channel, /*Initiate Reset*/FALSE);
|
2000-09-16 20:02:28 +00:00
|
|
|
} else if ((status & SCSIPERR) != 0) {
|
|
|
|
/*
|
|
|
|
* Determine the bus phase and queue an appropriate message.
|
|
|
|
* SCSIPERR is latched true as soon as a parity error
|
|
|
|
* occurs. If the sequencer acked the transfer that
|
|
|
|
* caused the parity error and the currently presented
|
|
|
|
* transfer on the bus has correct parity, SCSIPERR will
|
|
|
|
* be cleared by CLRSCSIPERR. Use this to determine if
|
|
|
|
* we should look at the last phase the sequencer recorded,
|
|
|
|
* or the current phase presented on the bus.
|
|
|
|
*/
|
2003-05-03 23:55:38 +00:00
|
|
|
struct ahc_devinfo devinfo;
|
|
|
|
u_int mesg_out;
|
|
|
|
u_int curphase;
|
|
|
|
u_int errorphase;
|
|
|
|
u_int lastphase;
|
|
|
|
u_int scsirate;
|
|
|
|
u_int i;
|
|
|
|
u_int sstat2;
|
|
|
|
int silent;
|
1999-04-23 23:27:31 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
lastphase = ahc_inb(ahc, LASTPHASE);
|
|
|
|
curphase = ahc_inb(ahc, SCSISIGI) & PHASE_MASK;
|
|
|
|
sstat2 = ahc_inb(ahc, SSTAT2);
|
|
|
|
ahc_outb(ahc, CLRSINT1, CLRSCSIPERR);
|
|
|
|
/*
|
|
|
|
* For all phases save DATA, the sequencer won't
|
|
|
|
* automatically ack a byte that has a parity error
|
|
|
|
* in it. So the only way that the current phase
|
|
|
|
* could be 'data-in' is if the parity error is for
|
|
|
|
* an already acked byte in the data phase. During
|
|
|
|
* synchronous data-in transfers, we may actually
|
|
|
|
* ack bytes before latching the current phase in
|
|
|
|
* LASTPHASE, leading to the discrepancy between
|
|
|
|
* curphase and lastphase.
|
|
|
|
*/
|
|
|
|
if ((ahc_inb(ahc, SSTAT1) & SCSIPERR) != 0
|
|
|
|
|| curphase == P_DATAIN || curphase == P_DATAIN_DT)
|
|
|
|
errorphase = curphase;
|
|
|
|
else
|
|
|
|
errorphase = lastphase;
|
1999-04-23 23:27:31 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
for (i = 0; i < num_phases; i++) {
|
This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
|
|
|
if (errorphase == ahc_phase_table[i].phase)
|
2000-09-16 20:02:28 +00:00
|
|
|
break;
|
|
|
|
}
|
This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
|
|
|
mesg_out = ahc_phase_table[i].mesg_out;
|
aic7xxx.reg:
Add a constant for the controller's stack size and the
maximum scsi offset.
aic7xxx.seq:
Style nit. The source is implied to be the destination
unless overridden in an "and" instruction.
Update target mode code for changes in identify seen
sequencer flags.
aic7xxx_pci.c:
Ensure that the PCIERRGENDIS bit is set in the
PCIERRGEN config space register. Perhaps this
is a reason for the spurios parity errors reported
on U160 controllers.
Honor the AHC_NO_BIOS_INIT flag.
Allow PCI interrupt reporting to be disabled,
by clearing the PERRRESEN bit in the command
register. This option is now enabled via a new
softc flag: AHC_DISABLE_PCI_PERR.
Disable SERR and pause the controller prior to performing
our mmapped I/O test. This should handle the case of
controllers that do not "auto-access pause". For legacy
controllers, use SCB ram instead of scratch ram since
the latter may contain settings left over from the BIOS
that we will use if an seeprom is not found.
Make use of new ahc_inl/outl() inlines.
aic7xxx.h:
Reformat a few comments to follow driver style.
Add a controller flags that indicate that a controller
has not been initialized by the BIOS and whether to
disable PCI parity errors..
Remove stack probing softc members.
Add a few more syncrate constants that are useful in speed
fallback calculations.
Add the SHOW_MASKED_ERRORS debug flag.
aic7xxx.h:
aic7xxx.c:
Implement the SCB_SILENT flag. This is useful for
hushing up the driver during DV or other operations
that we expect to cause transmission errors. The
messages will still print if the SHOW_MASKED_ERRORS
debug option is enabled.
aic7xxx_inline.h:
Implement ahc_[in|out][w|l|q]. This removes the need
for manual 'or and shift" type operations throughout
the driver.
aic7xxx.c:
Move SELTO dignostic so that the SCB is still valid
when we use it for printing path information.
If we are narrow, limit syncrate to Ultra2.
Don't clobber ppr_options when forcing a renegotiation.
The current ppr_options may be referenced while queuing
new commands. Don't set our width to unknown when forcing
negotiation on narrow controllers. This will confuse the
negotiation code into negotiating with a wide message on
narrow controllers.
Add an "asserting atn" diagnostic with controller/target
information.
Remove the probe_stack code. The stack is always
4 deep on legacy controllers, so probing is pointless.
This also avoids an issue where probing the stack would
upset the aic7770.
In ahc_reset(), record whether or not we found the
controller in a reset state. If the controller was
already reset, assume that no BIOS has initialized
the controller and ignore left over scratch ram
settings.
Fix an ifdef bug that caused sequencer debugging to
be enabled always.
Clear the ultraenb flag in our tstate during startup.
The ultraenbled'ness of a device is recorded in the user
transfer settings. tstate->ultraenb bitmask indicates
which devices we have negotiated an ultra speed with.
Just after initialization, we are async. Setting the
ultraenb flag while async seems to be harmless, but it
was confusing to see the ULTRAENB flag set in the SCB.
Enhance residual diagnostic to indicate if the residual
if for sense information or normal data transfers.
Indicate the features, bugs, and flags set in the softc
that are used to control firmware patch download when
booting verbose.
In ahc_dump_card_state() fix a logic reversal. The
SCSIPHASE register only exists on U160 controllers.
The SCSISIGI register exists on all controllers. Not
the other way around. Also print out the ERROR register.
Allow ahc_dump_card_state() to be called when the sequencer
is not paused. Add dump card state markers as in the U320
driver.
2003-01-20 20:44:55 +00:00
|
|
|
silent = FALSE;
|
2002-11-30 19:30:09 +00:00
|
|
|
if (scb != NULL) {
|
aic7xxx.reg:
Add a constant for the controller's stack size and the
maximum scsi offset.
aic7xxx.seq:
Style nit. The source is implied to be the destination
unless overridden in an "and" instruction.
Update target mode code for changes in identify seen
sequencer flags.
aic7xxx_pci.c:
Ensure that the PCIERRGENDIS bit is set in the
PCIERRGEN config space register. Perhaps this
is a reason for the spurios parity errors reported
on U160 controllers.
Honor the AHC_NO_BIOS_INIT flag.
Allow PCI interrupt reporting to be disabled,
by clearing the PERRRESEN bit in the command
register. This option is now enabled via a new
softc flag: AHC_DISABLE_PCI_PERR.
Disable SERR and pause the controller prior to performing
our mmapped I/O test. This should handle the case of
controllers that do not "auto-access pause". For legacy
controllers, use SCB ram instead of scratch ram since
the latter may contain settings left over from the BIOS
that we will use if an seeprom is not found.
Make use of new ahc_inl/outl() inlines.
aic7xxx.h:
Reformat a few comments to follow driver style.
Add a controller flags that indicate that a controller
has not been initialized by the BIOS and whether to
disable PCI parity errors..
Remove stack probing softc members.
Add a few more syncrate constants that are useful in speed
fallback calculations.
Add the SHOW_MASKED_ERRORS debug flag.
aic7xxx.h:
aic7xxx.c:
Implement the SCB_SILENT flag. This is useful for
hushing up the driver during DV or other operations
that we expect to cause transmission errors. The
messages will still print if the SHOW_MASKED_ERRORS
debug option is enabled.
aic7xxx_inline.h:
Implement ahc_[in|out][w|l|q]. This removes the need
for manual 'or and shift" type operations throughout
the driver.
aic7xxx.c:
Move SELTO dignostic so that the SCB is still valid
when we use it for printing path information.
If we are narrow, limit syncrate to Ultra2.
Don't clobber ppr_options when forcing a renegotiation.
The current ppr_options may be referenced while queuing
new commands. Don't set our width to unknown when forcing
negotiation on narrow controllers. This will confuse the
negotiation code into negotiating with a wide message on
narrow controllers.
Add an "asserting atn" diagnostic with controller/target
information.
Remove the probe_stack code. The stack is always
4 deep on legacy controllers, so probing is pointless.
This also avoids an issue where probing the stack would
upset the aic7770.
In ahc_reset(), record whether or not we found the
controller in a reset state. If the controller was
already reset, assume that no BIOS has initialized
the controller and ignore left over scratch ram
settings.
Fix an ifdef bug that caused sequencer debugging to
be enabled always.
Clear the ultraenb flag in our tstate during startup.
The ultraenbled'ness of a device is recorded in the user
transfer settings. tstate->ultraenb bitmask indicates
which devices we have negotiated an ultra speed with.
Just after initialization, we are async. Setting the
ultraenb flag while async seems to be harmless, but it
was confusing to see the ULTRAENB flag set in the SCB.
Enhance residual diagnostic to indicate if the residual
if for sense information or normal data transfers.
Indicate the features, bugs, and flags set in the softc
that are used to control firmware patch download when
booting verbose.
In ahc_dump_card_state() fix a logic reversal. The
SCSIPHASE register only exists on U160 controllers.
The SCSISIGI register exists on all controllers. Not
the other way around. Also print out the ERROR register.
Allow ahc_dump_card_state() to be called when the sequencer
is not paused. Add dump card state markers as in the U320
driver.
2003-01-20 20:44:55 +00:00
|
|
|
if (SCB_IS_SILENT(scb))
|
|
|
|
silent = TRUE;
|
|
|
|
else
|
|
|
|
ahc_print_path(ahc, scb);
|
2002-11-30 19:30:09 +00:00
|
|
|
scb->flags |= SCB_TRANSMISSION_ERROR;
|
|
|
|
} else
|
aic7xxx.c:
Style nits.
Make sure that our selection hardware is disabled
as soon as possible after detecting a busfree and
even go so far as to disable the selection hardware
in advance of an event that will cause a busfree
(ABORT or BUS DEVICE RESET message). The concern
is that the selection hardware will select a target
for which, after processing the bus free, there
will be no commands pending. The sequencer idle
loop will re-enable the selection should it still be
necessary.
In ahc_handle_scsiint(), clear SSTAT0 events several
PCI transactions (most notably reads) prior to clearing
SCSIINT. The newer chips seem to take a bit of time to
see the change which can make the clearing of SCSIINT
ineffective.
Don't bother panicing at the end of ahc_handle_scsiint().
Getting to the final else just means we lost the race
with clearing SCSIINT.
In ahc_free(), handle init-level 0. This can happen when we
fail the attach for RAID devices. While I'm here, also kill
the parent dma tag.
In ahc_match_scb(), consider initiator ccbs to be any
that are not from the target mode group. This fixes
a bug where an external target reset CCB was not getting
cleaned up by the reset code.
Don't bother freezing a ccb in any of our "abort" routines
when the status is set to CAM_REQ_CMP. This can happen
for a target reset ccb.
aic7xxx.reg:
Reserve space for a completion queue. This will be used
to enhance performance in the near future.
aic7xxx.seq:
Remove an optimization for the 7890 autoflush bug that
turned out to allow, in rare cases, some data to get
lost.
Implement a simpler, faster, fix for the PCI_2_1 retry
bug that hangs the sequencer on an SCB dma for certain chips.
Test against SAVED_SCSIID rather than SELID during target
reselections. This is how we always did it in the past,
but the code was modified while trying to work around an
issue with the 7895. SAVED_SCSIID takes into account
twin channel adapters such as the 2742T, whereas SELID
does not have the channel bit. This caused invalid
selection warnings and other strangeness on these cards.
aic7xxx_pci.c
Use the correct mask for checking the generic aic7892
entry.
2001-02-10 18:04:27 +00:00
|
|
|
printf("%s:%c:%d: ", ahc_name(ahc), intr_channel,
|
2000-09-16 20:02:28 +00:00
|
|
|
SCSIID_TARGET(ahc, ahc_inb(ahc, SAVED_SCSIID)));
|
|
|
|
scsirate = ahc_inb(ahc, SCSIRATE);
|
aic7xxx.reg:
Add a constant for the controller's stack size and the
maximum scsi offset.
aic7xxx.seq:
Style nit. The source is implied to be the destination
unless overridden in an "and" instruction.
Update target mode code for changes in identify seen
sequencer flags.
aic7xxx_pci.c:
Ensure that the PCIERRGENDIS bit is set in the
PCIERRGEN config space register. Perhaps this
is a reason for the spurios parity errors reported
on U160 controllers.
Honor the AHC_NO_BIOS_INIT flag.
Allow PCI interrupt reporting to be disabled,
by clearing the PERRRESEN bit in the command
register. This option is now enabled via a new
softc flag: AHC_DISABLE_PCI_PERR.
Disable SERR and pause the controller prior to performing
our mmapped I/O test. This should handle the case of
controllers that do not "auto-access pause". For legacy
controllers, use SCB ram instead of scratch ram since
the latter may contain settings left over from the BIOS
that we will use if an seeprom is not found.
Make use of new ahc_inl/outl() inlines.
aic7xxx.h:
Reformat a few comments to follow driver style.
Add a controller flags that indicate that a controller
has not been initialized by the BIOS and whether to
disable PCI parity errors..
Remove stack probing softc members.
Add a few more syncrate constants that are useful in speed
fallback calculations.
Add the SHOW_MASKED_ERRORS debug flag.
aic7xxx.h:
aic7xxx.c:
Implement the SCB_SILENT flag. This is useful for
hushing up the driver during DV or other operations
that we expect to cause transmission errors. The
messages will still print if the SHOW_MASKED_ERRORS
debug option is enabled.
aic7xxx_inline.h:
Implement ahc_[in|out][w|l|q]. This removes the need
for manual 'or and shift" type operations throughout
the driver.
aic7xxx.c:
Move SELTO dignostic so that the SCB is still valid
when we use it for printing path information.
If we are narrow, limit syncrate to Ultra2.
Don't clobber ppr_options when forcing a renegotiation.
The current ppr_options may be referenced while queuing
new commands. Don't set our width to unknown when forcing
negotiation on narrow controllers. This will confuse the
negotiation code into negotiating with a wide message on
narrow controllers.
Add an "asserting atn" diagnostic with controller/target
information.
Remove the probe_stack code. The stack is always
4 deep on legacy controllers, so probing is pointless.
This also avoids an issue where probing the stack would
upset the aic7770.
In ahc_reset(), record whether or not we found the
controller in a reset state. If the controller was
already reset, assume that no BIOS has initialized
the controller and ignore left over scratch ram
settings.
Fix an ifdef bug that caused sequencer debugging to
be enabled always.
Clear the ultraenb flag in our tstate during startup.
The ultraenbled'ness of a device is recorded in the user
transfer settings. tstate->ultraenb bitmask indicates
which devices we have negotiated an ultra speed with.
Just after initialization, we are async. Setting the
ultraenb flag while async seems to be harmless, but it
was confusing to see the ULTRAENB flag set in the SCB.
Enhance residual diagnostic to indicate if the residual
if for sense information or normal data transfers.
Indicate the features, bugs, and flags set in the softc
that are used to control firmware patch download when
booting verbose.
In ahc_dump_card_state() fix a logic reversal. The
SCSIPHASE register only exists on U160 controllers.
The SCSISIGI register exists on all controllers. Not
the other way around. Also print out the ERROR register.
Allow ahc_dump_card_state() to be called when the sequencer
is not paused. Add dump card state markers as in the U320
driver.
2003-01-20 20:44:55 +00:00
|
|
|
if (silent == FALSE) {
|
|
|
|
printf("parity error detected %s. "
|
|
|
|
"SEQADDR(0x%x) SCSIRATE(0x%x)\n",
|
|
|
|
ahc_phase_table[i].phasemsg,
|
|
|
|
ahc_inw(ahc, SEQADDR0),
|
|
|
|
scsirate);
|
|
|
|
if ((ahc->features & AHC_DT) != 0) {
|
|
|
|
if ((sstat2 & CRCVALERR) != 0)
|
|
|
|
printf("\tCRC Value Mismatch\n");
|
|
|
|
if ((sstat2 & CRCENDERR) != 0)
|
|
|
|
printf("\tNo terminal CRC packet "
|
|
|
|
"recevied\n");
|
|
|
|
if ((sstat2 & CRCREQERR) != 0)
|
|
|
|
printf("\tIllegal CRC packet "
|
|
|
|
"request\n");
|
|
|
|
if ((sstat2 & DUAL_EDGE_ERR) != 0)
|
|
|
|
printf("\tUnexpected %sDT Data Phase\n",
|
|
|
|
(scsirate & SINGLE_EDGE)
|
|
|
|
? "" : "non-");
|
2002-08-31 06:41:37 +00:00
|
|
|
}
|
2000-09-16 20:02:28 +00:00
|
|
|
}
|
1999-04-23 23:27:31 +00:00
|
|
|
|
aic7xxx.reg:
Add a constant for the controller's stack size and the
maximum scsi offset.
aic7xxx.seq:
Style nit. The source is implied to be the destination
unless overridden in an "and" instruction.
Update target mode code for changes in identify seen
sequencer flags.
aic7xxx_pci.c:
Ensure that the PCIERRGENDIS bit is set in the
PCIERRGEN config space register. Perhaps this
is a reason for the spurios parity errors reported
on U160 controllers.
Honor the AHC_NO_BIOS_INIT flag.
Allow PCI interrupt reporting to be disabled,
by clearing the PERRRESEN bit in the command
register. This option is now enabled via a new
softc flag: AHC_DISABLE_PCI_PERR.
Disable SERR and pause the controller prior to performing
our mmapped I/O test. This should handle the case of
controllers that do not "auto-access pause". For legacy
controllers, use SCB ram instead of scratch ram since
the latter may contain settings left over from the BIOS
that we will use if an seeprom is not found.
Make use of new ahc_inl/outl() inlines.
aic7xxx.h:
Reformat a few comments to follow driver style.
Add a controller flags that indicate that a controller
has not been initialized by the BIOS and whether to
disable PCI parity errors..
Remove stack probing softc members.
Add a few more syncrate constants that are useful in speed
fallback calculations.
Add the SHOW_MASKED_ERRORS debug flag.
aic7xxx.h:
aic7xxx.c:
Implement the SCB_SILENT flag. This is useful for
hushing up the driver during DV or other operations
that we expect to cause transmission errors. The
messages will still print if the SHOW_MASKED_ERRORS
debug option is enabled.
aic7xxx_inline.h:
Implement ahc_[in|out][w|l|q]. This removes the need
for manual 'or and shift" type operations throughout
the driver.
aic7xxx.c:
Move SELTO dignostic so that the SCB is still valid
when we use it for printing path information.
If we are narrow, limit syncrate to Ultra2.
Don't clobber ppr_options when forcing a renegotiation.
The current ppr_options may be referenced while queuing
new commands. Don't set our width to unknown when forcing
negotiation on narrow controllers. This will confuse the
negotiation code into negotiating with a wide message on
narrow controllers.
Add an "asserting atn" diagnostic with controller/target
information.
Remove the probe_stack code. The stack is always
4 deep on legacy controllers, so probing is pointless.
This also avoids an issue where probing the stack would
upset the aic7770.
In ahc_reset(), record whether or not we found the
controller in a reset state. If the controller was
already reset, assume that no BIOS has initialized
the controller and ignore left over scratch ram
settings.
Fix an ifdef bug that caused sequencer debugging to
be enabled always.
Clear the ultraenb flag in our tstate during startup.
The ultraenbled'ness of a device is recorded in the user
transfer settings. tstate->ultraenb bitmask indicates
which devices we have negotiated an ultra speed with.
Just after initialization, we are async. Setting the
ultraenb flag while async seems to be harmless, but it
was confusing to see the ULTRAENB flag set in the SCB.
Enhance residual diagnostic to indicate if the residual
if for sense information or normal data transfers.
Indicate the features, bugs, and flags set in the softc
that are used to control firmware patch download when
booting verbose.
In ahc_dump_card_state() fix a logic reversal. The
SCSIPHASE register only exists on U160 controllers.
The SCSISIGI register exists on all controllers. Not
the other way around. Also print out the ERROR register.
Allow ahc_dump_card_state() to be called when the sequencer
is not paused. Add dump card state markers as in the U320
driver.
2003-01-20 20:44:55 +00:00
|
|
|
if ((ahc->features & AHC_DT) != 0
|
|
|
|
&& (sstat2 & DUAL_EDGE_ERR) != 0) {
|
|
|
|
/*
|
|
|
|
* This error applies regardless of
|
|
|
|
* data direction, so ignore the value
|
|
|
|
* in the phase table.
|
|
|
|
*/
|
|
|
|
mesg_out = MSG_INITIATOR_DET_ERR;
|
|
|
|
}
|
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/*
|
|
|
|
* We've set the hardware to assert ATN if we
|
|
|
|
* get a parity error on "in" phases, so all we
|
|
|
|
* need to do is stuff the message buffer with
|
|
|
|
* the appropriate message. "In" phases have set
|
|
|
|
* mesg_out to something other than MSG_NOP.
|
|
|
|
*/
|
|
|
|
if (mesg_out != MSG_NOOP) {
|
|
|
|
if (ahc->msg_type != MSG_TYPE_NONE)
|
|
|
|
ahc->send_msg_perror = TRUE;
|
|
|
|
else
|
|
|
|
ahc_outb(ahc, MSG_OUT, mesg_out);
|
|
|
|
}
|
2002-04-24 16:58:51 +00:00
|
|
|
/*
|
|
|
|
* Force a renegotiation with this target just in
|
|
|
|
* case we are out of sync for some external reason
|
|
|
|
* unknown (or unreported) by the target.
|
|
|
|
*/
|
2003-05-03 23:55:38 +00:00
|
|
|
ahc_fetch_devinfo(ahc, &devinfo);
|
|
|
|
ahc_force_renegotiation(ahc, &devinfo);
|
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_outb(ahc, CLRINT, CLRSCSIINT);
|
This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
|
|
|
ahc_unpause(ahc);
|
2001-05-15 19:41:12 +00:00
|
|
|
} else if ((status & SELTO) != 0) {
|
2002-04-24 16:58:51 +00:00
|
|
|
u_int scbptr;
|
2001-05-15 19:41:12 +00:00
|
|
|
|
|
|
|
/* Stop the selection */
|
|
|
|
ahc_outb(ahc, SCSISEQ, 0);
|
|
|
|
|
|
|
|
/* No more pending messages */
|
|
|
|
ahc_clear_msg_state(ahc);
|
|
|
|
|
|
|
|
/* Clear interrupt state */
|
|
|
|
ahc_outb(ahc, SIMODE1, ahc_inb(ahc, SIMODE1) & ~ENBUSFREE);
|
|
|
|
ahc_outb(ahc, CLRSINT1, CLRSELTIMEO|CLRBUSFREE|CLRSCSIPERR);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Although the driver does not care about the
|
|
|
|
* 'Selection in Progress' status bit, the busy
|
|
|
|
* LED does. SELINGO is only cleared by a sucessfull
|
|
|
|
* selection, so we must manually clear it to insure
|
|
|
|
* the LED turns off just incase no future successful
|
|
|
|
* selections occur (e.g. no devices on the bus).
|
|
|
|
*/
|
|
|
|
ahc_outb(ahc, CLRSINT0, CLRSELINGO);
|
|
|
|
|
|
|
|
scbptr = ahc_inb(ahc, WAITING_SCBH);
|
|
|
|
ahc_outb(ahc, SCBPTR, scbptr);
|
|
|
|
scb_index = ahc_inb(ahc, SCB_TAG);
|
|
|
|
|
|
|
|
scb = ahc_lookup_scb(ahc, scb_index);
|
|
|
|
if (scb == NULL) {
|
|
|
|
printf("%s: ahc_intr - referenced scb not "
|
|
|
|
"valid during SELTO scb(%d, %d)\n",
|
|
|
|
ahc_name(ahc), scbptr, scb_index);
|
2002-11-30 19:30:09 +00:00
|
|
|
ahc_dump_card_state(ahc);
|
2001-05-15 19:41:12 +00:00
|
|
|
} else {
|
2003-05-03 23:55:38 +00:00
|
|
|
struct ahc_devinfo devinfo;
|
aic7xxx.reg:
Add a constant for the controller's stack size and the
maximum scsi offset.
aic7xxx.seq:
Style nit. The source is implied to be the destination
unless overridden in an "and" instruction.
Update target mode code for changes in identify seen
sequencer flags.
aic7xxx_pci.c:
Ensure that the PCIERRGENDIS bit is set in the
PCIERRGEN config space register. Perhaps this
is a reason for the spurios parity errors reported
on U160 controllers.
Honor the AHC_NO_BIOS_INIT flag.
Allow PCI interrupt reporting to be disabled,
by clearing the PERRRESEN bit in the command
register. This option is now enabled via a new
softc flag: AHC_DISABLE_PCI_PERR.
Disable SERR and pause the controller prior to performing
our mmapped I/O test. This should handle the case of
controllers that do not "auto-access pause". For legacy
controllers, use SCB ram instead of scratch ram since
the latter may contain settings left over from the BIOS
that we will use if an seeprom is not found.
Make use of new ahc_inl/outl() inlines.
aic7xxx.h:
Reformat a few comments to follow driver style.
Add a controller flags that indicate that a controller
has not been initialized by the BIOS and whether to
disable PCI parity errors..
Remove stack probing softc members.
Add a few more syncrate constants that are useful in speed
fallback calculations.
Add the SHOW_MASKED_ERRORS debug flag.
aic7xxx.h:
aic7xxx.c:
Implement the SCB_SILENT flag. This is useful for
hushing up the driver during DV or other operations
that we expect to cause transmission errors. The
messages will still print if the SHOW_MASKED_ERRORS
debug option is enabled.
aic7xxx_inline.h:
Implement ahc_[in|out][w|l|q]. This removes the need
for manual 'or and shift" type operations throughout
the driver.
aic7xxx.c:
Move SELTO dignostic so that the SCB is still valid
when we use it for printing path information.
If we are narrow, limit syncrate to Ultra2.
Don't clobber ppr_options when forcing a renegotiation.
The current ppr_options may be referenced while queuing
new commands. Don't set our width to unknown when forcing
negotiation on narrow controllers. This will confuse the
negotiation code into negotiating with a wide message on
narrow controllers.
Add an "asserting atn" diagnostic with controller/target
information.
Remove the probe_stack code. The stack is always
4 deep on legacy controllers, so probing is pointless.
This also avoids an issue where probing the stack would
upset the aic7770.
In ahc_reset(), record whether or not we found the
controller in a reset state. If the controller was
already reset, assume that no BIOS has initialized
the controller and ignore left over scratch ram
settings.
Fix an ifdef bug that caused sequencer debugging to
be enabled always.
Clear the ultraenb flag in our tstate during startup.
The ultraenbled'ness of a device is recorded in the user
transfer settings. tstate->ultraenb bitmask indicates
which devices we have negotiated an ultra speed with.
Just after initialization, we are async. Setting the
ultraenb flag while async seems to be harmless, but it
was confusing to see the ULTRAENB flag set in the SCB.
Enhance residual diagnostic to indicate if the residual
if for sense information or normal data transfers.
Indicate the features, bugs, and flags set in the softc
that are used to control firmware patch download when
booting verbose.
In ahc_dump_card_state() fix a logic reversal. The
SCSIPHASE register only exists on U160 controllers.
The SCSISIGI register exists on all controllers. Not
the other way around. Also print out the ERROR register.
Allow ahc_dump_card_state() to be called when the sequencer
is not paused. Add dump card state markers as in the U320
driver.
2003-01-20 20:44:55 +00:00
|
|
|
#ifdef AHC_DEBUG
|
|
|
|
if ((ahc_debug & AHC_SHOW_SELTO) != 0) {
|
|
|
|
ahc_print_path(ahc, scb);
|
|
|
|
printf("Saw Selection Timeout for SCB 0x%x\n",
|
|
|
|
scb_index);
|
|
|
|
}
|
|
|
|
#endif
|
2002-11-30 19:30:09 +00:00
|
|
|
/*
|
|
|
|
* Force a renegotiation with this target just in
|
|
|
|
* case the cable was pulled and will later be
|
|
|
|
* re-attached. The target may forget its negotiation
|
|
|
|
* settings with us should it attempt to reselect
|
|
|
|
* during the interruption. The target will not issue
|
|
|
|
* a unit attention in this case, so we must always
|
|
|
|
* renegotiate.
|
|
|
|
*/
|
2003-05-03 23:55:38 +00:00
|
|
|
ahc_scb_devinfo(ahc, &devinfo, scb);
|
|
|
|
ahc_force_renegotiation(ahc, &devinfo);
|
2001-05-15 19:41:12 +00:00
|
|
|
ahc_set_transaction_status(scb, CAM_SEL_TIMEOUT);
|
|
|
|
ahc_freeze_devq(ahc, scb);
|
|
|
|
}
|
|
|
|
ahc_outb(ahc, CLRINT, CLRSCSIINT);
|
|
|
|
ahc_restart(ahc);
|
2000-09-16 20:02:28 +00:00
|
|
|
} else if ((status & BUSFREE) != 0
|
|
|
|
&& (ahc_inb(ahc, SIMODE1) & ENBUSFREE) != 0) {
|
2003-05-03 23:55:38 +00:00
|
|
|
struct ahc_devinfo devinfo;
|
|
|
|
u_int lastphase;
|
|
|
|
u_int saved_scsiid;
|
|
|
|
u_int saved_lun;
|
|
|
|
u_int target;
|
|
|
|
u_int initiator_role_id;
|
|
|
|
char channel;
|
|
|
|
int printerror;
|
aic7xxx.c:
Style nits.
Make sure that our selection hardware is disabled
as soon as possible after detecting a busfree and
even go so far as to disable the selection hardware
in advance of an event that will cause a busfree
(ABORT or BUS DEVICE RESET message). The concern
is that the selection hardware will select a target
for which, after processing the bus free, there
will be no commands pending. The sequencer idle
loop will re-enable the selection should it still be
necessary.
In ahc_handle_scsiint(), clear SSTAT0 events several
PCI transactions (most notably reads) prior to clearing
SCSIINT. The newer chips seem to take a bit of time to
see the change which can make the clearing of SCSIINT
ineffective.
Don't bother panicing at the end of ahc_handle_scsiint().
Getting to the final else just means we lost the race
with clearing SCSIINT.
In ahc_free(), handle init-level 0. This can happen when we
fail the attach for RAID devices. While I'm here, also kill
the parent dma tag.
In ahc_match_scb(), consider initiator ccbs to be any
that are not from the target mode group. This fixes
a bug where an external target reset CCB was not getting
cleaned up by the reset code.
Don't bother freezing a ccb in any of our "abort" routines
when the status is set to CAM_REQ_CMP. This can happen
for a target reset ccb.
aic7xxx.reg:
Reserve space for a completion queue. This will be used
to enhance performance in the near future.
aic7xxx.seq:
Remove an optimization for the 7890 autoflush bug that
turned out to allow, in rare cases, some data to get
lost.
Implement a simpler, faster, fix for the PCI_2_1 retry
bug that hangs the sequencer on an SCB dma for certain chips.
Test against SAVED_SCSIID rather than SELID during target
reselections. This is how we always did it in the past,
but the code was modified while trying to work around an
issue with the 7895. SAVED_SCSIID takes into account
twin channel adapters such as the 2742T, whereas SELID
does not have the channel bit. This caused invalid
selection warnings and other strangeness on these cards.
aic7xxx_pci.c
Use the correct mask for checking the generic aic7892
entry.
2001-02-10 18:04:27 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Clear our selection hardware as soon as possible.
|
|
|
|
* We may have an entry in the waiting Q for this target,
|
|
|
|
* that is affected by this busfree and we don't want to
|
|
|
|
* go about selecting the target while we handle the event.
|
|
|
|
*/
|
|
|
|
ahc_outb(ahc, SCSISEQ,
|
|
|
|
ahc_inb(ahc, SCSISEQ) & (ENSELI|ENRSELI|ENAUTOATNP));
|
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/*
|
aic7xxx.c:
Style nits.
Make sure that our selection hardware is disabled
as soon as possible after detecting a busfree and
even go so far as to disable the selection hardware
in advance of an event that will cause a busfree
(ABORT or BUS DEVICE RESET message). The concern
is that the selection hardware will select a target
for which, after processing the bus free, there
will be no commands pending. The sequencer idle
loop will re-enable the selection should it still be
necessary.
In ahc_handle_scsiint(), clear SSTAT0 events several
PCI transactions (most notably reads) prior to clearing
SCSIINT. The newer chips seem to take a bit of time to
see the change which can make the clearing of SCSIINT
ineffective.
Don't bother panicing at the end of ahc_handle_scsiint().
Getting to the final else just means we lost the race
with clearing SCSIINT.
In ahc_free(), handle init-level 0. This can happen when we
fail the attach for RAID devices. While I'm here, also kill
the parent dma tag.
In ahc_match_scb(), consider initiator ccbs to be any
that are not from the target mode group. This fixes
a bug where an external target reset CCB was not getting
cleaned up by the reset code.
Don't bother freezing a ccb in any of our "abort" routines
when the status is set to CAM_REQ_CMP. This can happen
for a target reset ccb.
aic7xxx.reg:
Reserve space for a completion queue. This will be used
to enhance performance in the near future.
aic7xxx.seq:
Remove an optimization for the 7890 autoflush bug that
turned out to allow, in rare cases, some data to get
lost.
Implement a simpler, faster, fix for the PCI_2_1 retry
bug that hangs the sequencer on an SCB dma for certain chips.
Test against SAVED_SCSIID rather than SELID during target
reselections. This is how we always did it in the past,
but the code was modified while trying to work around an
issue with the 7895. SAVED_SCSIID takes into account
twin channel adapters such as the 2742T, whereas SELID
does not have the channel bit. This caused invalid
selection warnings and other strangeness on these cards.
aic7xxx_pci.c
Use the correct mask for checking the generic aic7892
entry.
2001-02-10 18:04:27 +00:00
|
|
|
* Disable busfree interrupts and clear the busfree
|
|
|
|
* interrupt status. We do this here so that several
|
|
|
|
* bus transactions occur prior to clearing the SCSIINT
|
|
|
|
* latch. It can take a bit for the clearing to take effect.
|
|
|
|
*/
|
|
|
|
ahc_outb(ahc, SIMODE1, ahc_inb(ahc, SIMODE1) & ~ENBUSFREE);
|
|
|
|
ahc_outb(ahc, CLRSINT1, CLRBUSFREE|CLRSCSIPERR);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Look at what phase we were last in.
|
2000-09-16 20:02:28 +00:00
|
|
|
* If its message out, chances are pretty good
|
|
|
|
* that the busfree was in response to one of
|
|
|
|
* our abort requests.
|
|
|
|
*/
|
aic7xxx.c:
Style nits.
Make sure that our selection hardware is disabled
as soon as possible after detecting a busfree and
even go so far as to disable the selection hardware
in advance of an event that will cause a busfree
(ABORT or BUS DEVICE RESET message). The concern
is that the selection hardware will select a target
for which, after processing the bus free, there
will be no commands pending. The sequencer idle
loop will re-enable the selection should it still be
necessary.
In ahc_handle_scsiint(), clear SSTAT0 events several
PCI transactions (most notably reads) prior to clearing
SCSIINT. The newer chips seem to take a bit of time to
see the change which can make the clearing of SCSIINT
ineffective.
Don't bother panicing at the end of ahc_handle_scsiint().
Getting to the final else just means we lost the race
with clearing SCSIINT.
In ahc_free(), handle init-level 0. This can happen when we
fail the attach for RAID devices. While I'm here, also kill
the parent dma tag.
In ahc_match_scb(), consider initiator ccbs to be any
that are not from the target mode group. This fixes
a bug where an external target reset CCB was not getting
cleaned up by the reset code.
Don't bother freezing a ccb in any of our "abort" routines
when the status is set to CAM_REQ_CMP. This can happen
for a target reset ccb.
aic7xxx.reg:
Reserve space for a completion queue. This will be used
to enhance performance in the near future.
aic7xxx.seq:
Remove an optimization for the 7890 autoflush bug that
turned out to allow, in rare cases, some data to get
lost.
Implement a simpler, faster, fix for the PCI_2_1 retry
bug that hangs the sequencer on an SCB dma for certain chips.
Test against SAVED_SCSIID rather than SELID during target
reselections. This is how we always did it in the past,
but the code was modified while trying to work around an
issue with the 7895. SAVED_SCSIID takes into account
twin channel adapters such as the 2742T, whereas SELID
does not have the channel bit. This caused invalid
selection warnings and other strangeness on these cards.
aic7xxx_pci.c
Use the correct mask for checking the generic aic7892
entry.
2001-02-10 18:04:27 +00:00
|
|
|
lastphase = ahc_inb(ahc, LASTPHASE);
|
|
|
|
saved_scsiid = ahc_inb(ahc, SAVED_SCSIID);
|
|
|
|
saved_lun = ahc_inb(ahc, SAVED_LUN);
|
|
|
|
target = SCSIID_TARGET(ahc, saved_scsiid);
|
|
|
|
initiator_role_id = SCSIID_OUR_ID(saved_scsiid);
|
|
|
|
channel = SCSIID_CHANNEL(ahc, saved_scsiid);
|
2003-05-03 23:55:38 +00:00
|
|
|
ahc_compile_devinfo(&devinfo, initiator_role_id,
|
|
|
|
target, saved_lun, channel, ROLE_INITIATOR);
|
aic7xxx.c:
Style nits.
Make sure that our selection hardware is disabled
as soon as possible after detecting a busfree and
even go so far as to disable the selection hardware
in advance of an event that will cause a busfree
(ABORT or BUS DEVICE RESET message). The concern
is that the selection hardware will select a target
for which, after processing the bus free, there
will be no commands pending. The sequencer idle
loop will re-enable the selection should it still be
necessary.
In ahc_handle_scsiint(), clear SSTAT0 events several
PCI transactions (most notably reads) prior to clearing
SCSIINT. The newer chips seem to take a bit of time to
see the change which can make the clearing of SCSIINT
ineffective.
Don't bother panicing at the end of ahc_handle_scsiint().
Getting to the final else just means we lost the race
with clearing SCSIINT.
In ahc_free(), handle init-level 0. This can happen when we
fail the attach for RAID devices. While I'm here, also kill
the parent dma tag.
In ahc_match_scb(), consider initiator ccbs to be any
that are not from the target mode group. This fixes
a bug where an external target reset CCB was not getting
cleaned up by the reset code.
Don't bother freezing a ccb in any of our "abort" routines
when the status is set to CAM_REQ_CMP. This can happen
for a target reset ccb.
aic7xxx.reg:
Reserve space for a completion queue. This will be used
to enhance performance in the near future.
aic7xxx.seq:
Remove an optimization for the 7890 autoflush bug that
turned out to allow, in rare cases, some data to get
lost.
Implement a simpler, faster, fix for the PCI_2_1 retry
bug that hangs the sequencer on an SCB dma for certain chips.
Test against SAVED_SCSIID rather than SELID during target
reselections. This is how we always did it in the past,
but the code was modified while trying to work around an
issue with the 7895. SAVED_SCSIID takes into account
twin channel adapters such as the 2742T, whereas SELID
does not have the channel bit. This caused invalid
selection warnings and other strangeness on these cards.
aic7xxx_pci.c
Use the correct mask for checking the generic aic7892
entry.
2001-02-10 18:04:27 +00:00
|
|
|
printerror = 1;
|
1999-04-23 23:27:31 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
if (lastphase == P_MESGOUT) {
|
|
|
|
u_int tag;
|
1999-04-23 23:27:31 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
tag = SCB_LIST_NULL;
|
ahc_eisa.c:
ahc_pci.c:
Add detach support.
Make use of soft allocated on our behalf by newbus.
For PCI devices, disable the mapping type we aren't
using for extra protection from rogue code.
aic7xxx_93cx6.c:
aic7xxx_93cx6.h:
Sync perforce IDs.
aic7xxx_freebsd.c:
Capture the eventhandle returned by EVENTHANDER_REGISTER
so we can kill the handler off during detach.
Use AHC_* constants instead of hard coded numbers in a
few more places.
Test PPR option state when deciding to "really" negotiate
when the CAM_NEGOTIATE flag is passed in a CCB.
Make use of core "ahc_pause_and_flushwork" routine in our
timeout handler rather than re-inventing this code.
Cleanup all of our resources (really!) in ahc_platform_free().
We should be all set to become a module now.
Implement the core ahc_detach() routine shared by all of
the FreeBSD front-ends.
aic7xxx_freebsd.h:
Softc storage for our event handler.
Null implementation for the ahc_platform_flushwork() OSM
callback. FreeBSD doesn't need this as XPT callbacks are
safe from all contexts and are done directly in ahc_done().
aic7xxx_inline.h:
Implement new lazy interrupt scheme. To avoid an extra
PCI bus read, we first check our completion queues to
see if any work has completed. If work is available, we
assume that this is the source of the interrupt and skip
reading INTSTAT. Any remaining interrupt status will be
cleared by a second call to the interrupt handler should
the interrupt line still be asserted. This drops the
interrupt handler down to a single PCI bus read in the
common case of I/O completion. This is the same overhead
as in the not so distant past, but the extra sanity of
perforning a PCI read after clearing the command complete
interrupt and before running the completion queue to avoid
missing command complete interrupts added a cycle.
aic7xxx.c:
During initialization, be sure to initialize all scratch
ram locations before they are read to avoid parity errors.
In this case, we use a new function, ahc_unbusy_tcl() to
initialize the scratch ram busy target table.
Replace instances of ahc_index_busy_tcl() used to unbusy
a tcl without looking at the old value with ahc_unbusy_tcl().
Modify ahc_sent_msg so that it can find single byte messages.
ahc_sent_msg is now used to determine if a transfer negotiation
attempt resulted in a bus free.
Be more careful in filtering out only the SCSI interrupts
of interest in ahc_handle_scsiint.
Rearrange interrupt clearing code to ensure that at least
one PCI transaction occurrs after hitting CLRSINT1 and
writting to CLRINT. CLRSINT1 writes take a bit to
take effect, and the re-arrangement provides sufficient
delay to ensure the write to CLRINT is effective. The
old code might report a spurious interrupt on some "fast"
chipsets.
export ahc-update_target_msg_request for use by OSM code.
If a target does not respond to our ATN request, clear
it once we move to a non-message phase. This avoids
sending a MSG_NOOP in some later message out phase.
Use max lun and max target constants instead of
hard-coded values.
Use softc storage built into our device_t under FreeBSD.
Fix a bug in ahc_free() that caused us to delete
resources that were not allocated.
Clean up any tstate/lstate info in ahc_free().
Clear the powerdown state in ahc_reset() so that
registers can be accessed.
Add a preliminary function for pausing the chip and
processing any posted work.
Add a preliminary suspend and resume functions.
aic7xxx.h:
Limit the number of supported luns to 64. We don't
support information unit transfers, so this is the
maximum that makes sense for these chips.
Add a new flag AHC_ALL_INTERRUPTS that forces the
processing of all interrupt state in a single invokation
of ahc_intr(). When the flag is not set, we use the
lazy interrupt handling scheme.
Add data structures to store controller state while
we are suspended.
Use constants instead of hard coded values where appropriate.
Correct some harmless "unsigned/signed" conflicts.
aic7xxx.seq:
Only perform the SCSIBUSL fix on ULTRA2 or newer controllers.
Older controllers seem to be confused by this.
In target mode, ignore PHASEMIS during data phases.
This bit seems to be flakey on U160 controllers acting
in target mode.
aic7xxx_pci.c:
Add support for the 29160C CPCI adapter.
Add definitions for subvendor ID information
available for devices with the "9005" vendor id.
We currently use this information to determine
if a multi-function device doesn't have the second
channel hooked up on a board.
Add rudimentary power mode code so we can put the
controller into the D0 state. In the future this
will be an OSM callback so that in FreeBSD we don't
duplicate functionality provided by the PCI code.
The powerstate code was added after I'd completed
my regression tests on this code.
Only capture "left over BIOS state" if the POWRDN
setting is not set in HCNTRL.
In target mode, don't bother sending incremental
CRC data.
2000-12-20 01:11:37 +00:00
|
|
|
if (ahc_sent_msg(ahc, AHCMSG_1B, MSG_ABORT_TAG, TRUE)
|
|
|
|
|| ahc_sent_msg(ahc, AHCMSG_1B, MSG_ABORT, TRUE)) {
|
|
|
|
if (ahc->msgout_buf[ahc->msgout_index - 1]
|
|
|
|
== MSG_ABORT_TAG)
|
|
|
|
tag = scb->hscb->tag;
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_print_path(ahc, scb);
|
aic7xxx.c:
Style nits.
Make sure that our selection hardware is disabled
as soon as possible after detecting a busfree and
even go so far as to disable the selection hardware
in advance of an event that will cause a busfree
(ABORT or BUS DEVICE RESET message). The concern
is that the selection hardware will select a target
for which, after processing the bus free, there
will be no commands pending. The sequencer idle
loop will re-enable the selection should it still be
necessary.
In ahc_handle_scsiint(), clear SSTAT0 events several
PCI transactions (most notably reads) prior to clearing
SCSIINT. The newer chips seem to take a bit of time to
see the change which can make the clearing of SCSIINT
ineffective.
Don't bother panicing at the end of ahc_handle_scsiint().
Getting to the final else just means we lost the race
with clearing SCSIINT.
In ahc_free(), handle init-level 0. This can happen when we
fail the attach for RAID devices. While I'm here, also kill
the parent dma tag.
In ahc_match_scb(), consider initiator ccbs to be any
that are not from the target mode group. This fixes
a bug where an external target reset CCB was not getting
cleaned up by the reset code.
Don't bother freezing a ccb in any of our "abort" routines
when the status is set to CAM_REQ_CMP. This can happen
for a target reset ccb.
aic7xxx.reg:
Reserve space for a completion queue. This will be used
to enhance performance in the near future.
aic7xxx.seq:
Remove an optimization for the 7890 autoflush bug that
turned out to allow, in rare cases, some data to get
lost.
Implement a simpler, faster, fix for the PCI_2_1 retry
bug that hangs the sequencer on an SCB dma for certain chips.
Test against SAVED_SCSIID rather than SELID during target
reselections. This is how we always did it in the past,
but the code was modified while trying to work around an
issue with the 7895. SAVED_SCSIID takes into account
twin channel adapters such as the 2742T, whereas SELID
does not have the channel bit. This caused invalid
selection warnings and other strangeness on these cards.
aic7xxx_pci.c
Use the correct mask for checking the generic aic7892
entry.
2001-02-10 18:04:27 +00:00
|
|
|
printf("SCB %d - Abort%s Completed.\n",
|
2000-09-16 20:02:28 +00:00
|
|
|
scb->hscb->tag, tag == SCB_LIST_NULL ?
|
aic7xxx.c:
Style nits.
Make sure that our selection hardware is disabled
as soon as possible after detecting a busfree and
even go so far as to disable the selection hardware
in advance of an event that will cause a busfree
(ABORT or BUS DEVICE RESET message). The concern
is that the selection hardware will select a target
for which, after processing the bus free, there
will be no commands pending. The sequencer idle
loop will re-enable the selection should it still be
necessary.
In ahc_handle_scsiint(), clear SSTAT0 events several
PCI transactions (most notably reads) prior to clearing
SCSIINT. The newer chips seem to take a bit of time to
see the change which can make the clearing of SCSIINT
ineffective.
Don't bother panicing at the end of ahc_handle_scsiint().
Getting to the final else just means we lost the race
with clearing SCSIINT.
In ahc_free(), handle init-level 0. This can happen when we
fail the attach for RAID devices. While I'm here, also kill
the parent dma tag.
In ahc_match_scb(), consider initiator ccbs to be any
that are not from the target mode group. This fixes
a bug where an external target reset CCB was not getting
cleaned up by the reset code.
Don't bother freezing a ccb in any of our "abort" routines
when the status is set to CAM_REQ_CMP. This can happen
for a target reset ccb.
aic7xxx.reg:
Reserve space for a completion queue. This will be used
to enhance performance in the near future.
aic7xxx.seq:
Remove an optimization for the 7890 autoflush bug that
turned out to allow, in rare cases, some data to get
lost.
Implement a simpler, faster, fix for the PCI_2_1 retry
bug that hangs the sequencer on an SCB dma for certain chips.
Test against SAVED_SCSIID rather than SELID during target
reselections. This is how we always did it in the past,
but the code was modified while trying to work around an
issue with the 7895. SAVED_SCSIID takes into account
twin channel adapters such as the 2742T, whereas SELID
does not have the channel bit. This caused invalid
selection warnings and other strangeness on these cards.
aic7xxx_pci.c
Use the correct mask for checking the generic aic7892
entry.
2001-02-10 18:04:27 +00:00
|
|
|
"" : " Tag");
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_abort_scbs(ahc, target, channel,
|
|
|
|
saved_lun, tag,
|
|
|
|
ROLE_INITIATOR,
|
|
|
|
CAM_REQ_ABORTED);
|
|
|
|
printerror = 0;
|
ahc_eisa.c:
ahc_pci.c:
Add detach support.
Make use of soft allocated on our behalf by newbus.
For PCI devices, disable the mapping type we aren't
using for extra protection from rogue code.
aic7xxx_93cx6.c:
aic7xxx_93cx6.h:
Sync perforce IDs.
aic7xxx_freebsd.c:
Capture the eventhandle returned by EVENTHANDER_REGISTER
so we can kill the handler off during detach.
Use AHC_* constants instead of hard coded numbers in a
few more places.
Test PPR option state when deciding to "really" negotiate
when the CAM_NEGOTIATE flag is passed in a CCB.
Make use of core "ahc_pause_and_flushwork" routine in our
timeout handler rather than re-inventing this code.
Cleanup all of our resources (really!) in ahc_platform_free().
We should be all set to become a module now.
Implement the core ahc_detach() routine shared by all of
the FreeBSD front-ends.
aic7xxx_freebsd.h:
Softc storage for our event handler.
Null implementation for the ahc_platform_flushwork() OSM
callback. FreeBSD doesn't need this as XPT callbacks are
safe from all contexts and are done directly in ahc_done().
aic7xxx_inline.h:
Implement new lazy interrupt scheme. To avoid an extra
PCI bus read, we first check our completion queues to
see if any work has completed. If work is available, we
assume that this is the source of the interrupt and skip
reading INTSTAT. Any remaining interrupt status will be
cleared by a second call to the interrupt handler should
the interrupt line still be asserted. This drops the
interrupt handler down to a single PCI bus read in the
common case of I/O completion. This is the same overhead
as in the not so distant past, but the extra sanity of
perforning a PCI read after clearing the command complete
interrupt and before running the completion queue to avoid
missing command complete interrupts added a cycle.
aic7xxx.c:
During initialization, be sure to initialize all scratch
ram locations before they are read to avoid parity errors.
In this case, we use a new function, ahc_unbusy_tcl() to
initialize the scratch ram busy target table.
Replace instances of ahc_index_busy_tcl() used to unbusy
a tcl without looking at the old value with ahc_unbusy_tcl().
Modify ahc_sent_msg so that it can find single byte messages.
ahc_sent_msg is now used to determine if a transfer negotiation
attempt resulted in a bus free.
Be more careful in filtering out only the SCSI interrupts
of interest in ahc_handle_scsiint.
Rearrange interrupt clearing code to ensure that at least
one PCI transaction occurrs after hitting CLRSINT1 and
writting to CLRINT. CLRSINT1 writes take a bit to
take effect, and the re-arrangement provides sufficient
delay to ensure the write to CLRINT is effective. The
old code might report a spurious interrupt on some "fast"
chipsets.
export ahc-update_target_msg_request for use by OSM code.
If a target does not respond to our ATN request, clear
it once we move to a non-message phase. This avoids
sending a MSG_NOOP in some later message out phase.
Use max lun and max target constants instead of
hard-coded values.
Use softc storage built into our device_t under FreeBSD.
Fix a bug in ahc_free() that caused us to delete
resources that were not allocated.
Clean up any tstate/lstate info in ahc_free().
Clear the powerdown state in ahc_reset() so that
registers can be accessed.
Add a preliminary function for pausing the chip and
processing any posted work.
Add a preliminary suspend and resume functions.
aic7xxx.h:
Limit the number of supported luns to 64. We don't
support information unit transfers, so this is the
maximum that makes sense for these chips.
Add a new flag AHC_ALL_INTERRUPTS that forces the
processing of all interrupt state in a single invokation
of ahc_intr(). When the flag is not set, we use the
lazy interrupt handling scheme.
Add data structures to store controller state while
we are suspended.
Use constants instead of hard coded values where appropriate.
Correct some harmless "unsigned/signed" conflicts.
aic7xxx.seq:
Only perform the SCSIBUSL fix on ULTRA2 or newer controllers.
Older controllers seem to be confused by this.
In target mode, ignore PHASEMIS during data phases.
This bit seems to be flakey on U160 controllers acting
in target mode.
aic7xxx_pci.c:
Add support for the 29160C CPCI adapter.
Add definitions for subvendor ID information
available for devices with the "9005" vendor id.
We currently use this information to determine
if a multi-function device doesn't have the second
channel hooked up on a board.
Add rudimentary power mode code so we can put the
controller into the D0 state. In the future this
will be an OSM callback so that in FreeBSD we don't
duplicate functionality provided by the PCI code.
The powerstate code was added after I'd completed
my regression tests on this code.
Only capture "left over BIOS state" if the POWRDN
setting is not set in HCNTRL.
In target mode, don't bother sending incremental
CRC data.
2000-12-20 01:11:37 +00:00
|
|
|
} else if (ahc_sent_msg(ahc, AHCMSG_1B,
|
|
|
|
MSG_BUS_DEV_RESET, TRUE)) {
|
2000-09-16 20:02:28 +00:00
|
|
|
#ifdef __FreeBSD__
|
|
|
|
/*
|
|
|
|
* Don't mark the user's request for this BDR
|
|
|
|
* as completing with CAM_BDR_SENT. CAM3
|
|
|
|
* specifies CAM_REQ_CMP.
|
|
|
|
*/
|
|
|
|
if (scb != NULL
|
|
|
|
&& scb->io_ctx->ccb_h.func_code== XPT_RESET_DEV
|
|
|
|
&& ahc_match_scb(ahc, scb, target, channel,
|
|
|
|
CAM_LUN_WILDCARD,
|
|
|
|
SCB_LIST_NULL,
|
|
|
|
ROLE_INITIATOR)) {
|
|
|
|
ahc_set_transaction_status(scb, CAM_REQ_CMP);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
ahc_compile_devinfo(&devinfo,
|
|
|
|
initiator_role_id,
|
|
|
|
target,
|
|
|
|
CAM_LUN_WILDCARD,
|
|
|
|
channel,
|
|
|
|
ROLE_INITIATOR);
|
|
|
|
ahc_handle_devreset(ahc, &devinfo,
|
|
|
|
CAM_BDR_SENT,
|
|
|
|
"Bus Device Reset",
|
|
|
|
/*verbose_level*/0);
|
|
|
|
printerror = 0;
|
ahc_eisa.c:
ahc_pci.c:
Add detach support.
Make use of soft allocated on our behalf by newbus.
For PCI devices, disable the mapping type we aren't
using for extra protection from rogue code.
aic7xxx_93cx6.c:
aic7xxx_93cx6.h:
Sync perforce IDs.
aic7xxx_freebsd.c:
Capture the eventhandle returned by EVENTHANDER_REGISTER
so we can kill the handler off during detach.
Use AHC_* constants instead of hard coded numbers in a
few more places.
Test PPR option state when deciding to "really" negotiate
when the CAM_NEGOTIATE flag is passed in a CCB.
Make use of core "ahc_pause_and_flushwork" routine in our
timeout handler rather than re-inventing this code.
Cleanup all of our resources (really!) in ahc_platform_free().
We should be all set to become a module now.
Implement the core ahc_detach() routine shared by all of
the FreeBSD front-ends.
aic7xxx_freebsd.h:
Softc storage for our event handler.
Null implementation for the ahc_platform_flushwork() OSM
callback. FreeBSD doesn't need this as XPT callbacks are
safe from all contexts and are done directly in ahc_done().
aic7xxx_inline.h:
Implement new lazy interrupt scheme. To avoid an extra
PCI bus read, we first check our completion queues to
see if any work has completed. If work is available, we
assume that this is the source of the interrupt and skip
reading INTSTAT. Any remaining interrupt status will be
cleared by a second call to the interrupt handler should
the interrupt line still be asserted. This drops the
interrupt handler down to a single PCI bus read in the
common case of I/O completion. This is the same overhead
as in the not so distant past, but the extra sanity of
perforning a PCI read after clearing the command complete
interrupt and before running the completion queue to avoid
missing command complete interrupts added a cycle.
aic7xxx.c:
During initialization, be sure to initialize all scratch
ram locations before they are read to avoid parity errors.
In this case, we use a new function, ahc_unbusy_tcl() to
initialize the scratch ram busy target table.
Replace instances of ahc_index_busy_tcl() used to unbusy
a tcl without looking at the old value with ahc_unbusy_tcl().
Modify ahc_sent_msg so that it can find single byte messages.
ahc_sent_msg is now used to determine if a transfer negotiation
attempt resulted in a bus free.
Be more careful in filtering out only the SCSI interrupts
of interest in ahc_handle_scsiint.
Rearrange interrupt clearing code to ensure that at least
one PCI transaction occurrs after hitting CLRSINT1 and
writting to CLRINT. CLRSINT1 writes take a bit to
take effect, and the re-arrangement provides sufficient
delay to ensure the write to CLRINT is effective. The
old code might report a spurious interrupt on some "fast"
chipsets.
export ahc-update_target_msg_request for use by OSM code.
If a target does not respond to our ATN request, clear
it once we move to a non-message phase. This avoids
sending a MSG_NOOP in some later message out phase.
Use max lun and max target constants instead of
hard-coded values.
Use softc storage built into our device_t under FreeBSD.
Fix a bug in ahc_free() that caused us to delete
resources that were not allocated.
Clean up any tstate/lstate info in ahc_free().
Clear the powerdown state in ahc_reset() so that
registers can be accessed.
Add a preliminary function for pausing the chip and
processing any posted work.
Add a preliminary suspend and resume functions.
aic7xxx.h:
Limit the number of supported luns to 64. We don't
support information unit transfers, so this is the
maximum that makes sense for these chips.
Add a new flag AHC_ALL_INTERRUPTS that forces the
processing of all interrupt state in a single invokation
of ahc_intr(). When the flag is not set, we use the
lazy interrupt handling scheme.
Add data structures to store controller state while
we are suspended.
Use constants instead of hard coded values where appropriate.
Correct some harmless "unsigned/signed" conflicts.
aic7xxx.seq:
Only perform the SCSIBUSL fix on ULTRA2 or newer controllers.
Older controllers seem to be confused by this.
In target mode, ignore PHASEMIS during data phases.
This bit seems to be flakey on U160 controllers acting
in target mode.
aic7xxx_pci.c:
Add support for the 29160C CPCI adapter.
Add definitions for subvendor ID information
available for devices with the "9005" vendor id.
We currently use this information to determine
if a multi-function device doesn't have the second
channel hooked up on a board.
Add rudimentary power mode code so we can put the
controller into the D0 state. In the future this
will be an OSM callback so that in FreeBSD we don't
duplicate functionality provided by the PCI code.
The powerstate code was added after I'd completed
my regression tests on this code.
Only capture "left over BIOS state" if the POWRDN
setting is not set in HCNTRL.
In target mode, don't bother sending incremental
CRC data.
2000-12-20 01:11:37 +00:00
|
|
|
} else if (ahc_sent_msg(ahc, AHCMSG_EXT,
|
|
|
|
MSG_EXT_PPR, FALSE)) {
|
|
|
|
struct ahc_initiator_tinfo *tinfo;
|
2001-03-29 00:36:35 +00:00
|
|
|
struct ahc_tmode_tstate *tstate;
|
ahc_eisa.c:
ahc_pci.c:
Add detach support.
Make use of soft allocated on our behalf by newbus.
For PCI devices, disable the mapping type we aren't
using for extra protection from rogue code.
aic7xxx_93cx6.c:
aic7xxx_93cx6.h:
Sync perforce IDs.
aic7xxx_freebsd.c:
Capture the eventhandle returned by EVENTHANDER_REGISTER
so we can kill the handler off during detach.
Use AHC_* constants instead of hard coded numbers in a
few more places.
Test PPR option state when deciding to "really" negotiate
when the CAM_NEGOTIATE flag is passed in a CCB.
Make use of core "ahc_pause_and_flushwork" routine in our
timeout handler rather than re-inventing this code.
Cleanup all of our resources (really!) in ahc_platform_free().
We should be all set to become a module now.
Implement the core ahc_detach() routine shared by all of
the FreeBSD front-ends.
aic7xxx_freebsd.h:
Softc storage for our event handler.
Null implementation for the ahc_platform_flushwork() OSM
callback. FreeBSD doesn't need this as XPT callbacks are
safe from all contexts and are done directly in ahc_done().
aic7xxx_inline.h:
Implement new lazy interrupt scheme. To avoid an extra
PCI bus read, we first check our completion queues to
see if any work has completed. If work is available, we
assume that this is the source of the interrupt and skip
reading INTSTAT. Any remaining interrupt status will be
cleared by a second call to the interrupt handler should
the interrupt line still be asserted. This drops the
interrupt handler down to a single PCI bus read in the
common case of I/O completion. This is the same overhead
as in the not so distant past, but the extra sanity of
perforning a PCI read after clearing the command complete
interrupt and before running the completion queue to avoid
missing command complete interrupts added a cycle.
aic7xxx.c:
During initialization, be sure to initialize all scratch
ram locations before they are read to avoid parity errors.
In this case, we use a new function, ahc_unbusy_tcl() to
initialize the scratch ram busy target table.
Replace instances of ahc_index_busy_tcl() used to unbusy
a tcl without looking at the old value with ahc_unbusy_tcl().
Modify ahc_sent_msg so that it can find single byte messages.
ahc_sent_msg is now used to determine if a transfer negotiation
attempt resulted in a bus free.
Be more careful in filtering out only the SCSI interrupts
of interest in ahc_handle_scsiint.
Rearrange interrupt clearing code to ensure that at least
one PCI transaction occurrs after hitting CLRSINT1 and
writting to CLRINT. CLRSINT1 writes take a bit to
take effect, and the re-arrangement provides sufficient
delay to ensure the write to CLRINT is effective. The
old code might report a spurious interrupt on some "fast"
chipsets.
export ahc-update_target_msg_request for use by OSM code.
If a target does not respond to our ATN request, clear
it once we move to a non-message phase. This avoids
sending a MSG_NOOP in some later message out phase.
Use max lun and max target constants instead of
hard-coded values.
Use softc storage built into our device_t under FreeBSD.
Fix a bug in ahc_free() that caused us to delete
resources that were not allocated.
Clean up any tstate/lstate info in ahc_free().
Clear the powerdown state in ahc_reset() so that
registers can be accessed.
Add a preliminary function for pausing the chip and
processing any posted work.
Add a preliminary suspend and resume functions.
aic7xxx.h:
Limit the number of supported luns to 64. We don't
support information unit transfers, so this is the
maximum that makes sense for these chips.
Add a new flag AHC_ALL_INTERRUPTS that forces the
processing of all interrupt state in a single invokation
of ahc_intr(). When the flag is not set, we use the
lazy interrupt handling scheme.
Add data structures to store controller state while
we are suspended.
Use constants instead of hard coded values where appropriate.
Correct some harmless "unsigned/signed" conflicts.
aic7xxx.seq:
Only perform the SCSIBUSL fix on ULTRA2 or newer controllers.
Older controllers seem to be confused by this.
In target mode, ignore PHASEMIS during data phases.
This bit seems to be flakey on U160 controllers acting
in target mode.
aic7xxx_pci.c:
Add support for the 29160C CPCI adapter.
Add definitions for subvendor ID information
available for devices with the "9005" vendor id.
We currently use this information to determine
if a multi-function device doesn't have the second
channel hooked up on a board.
Add rudimentary power mode code so we can put the
controller into the D0 state. In the future this
will be an OSM callback so that in FreeBSD we don't
duplicate functionality provided by the PCI code.
The powerstate code was added after I'd completed
my regression tests on this code.
Only capture "left over BIOS state" if the POWRDN
setting is not set in HCNTRL.
In target mode, don't bother sending incremental
CRC data.
2000-12-20 01:11:37 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* PPR Rejected. Try non-ppr negotiation
|
|
|
|
* and retry command.
|
|
|
|
*/
|
|
|
|
tinfo = ahc_fetch_transinfo(ahc,
|
|
|
|
devinfo.channel,
|
|
|
|
devinfo.our_scsiid,
|
|
|
|
devinfo.target,
|
|
|
|
&tstate);
|
2001-05-15 19:41:12 +00:00
|
|
|
tinfo->curr.transport_version = 2;
|
ahc_eisa.c:
ahc_pci.c:
Add detach support.
Make use of soft allocated on our behalf by newbus.
For PCI devices, disable the mapping type we aren't
using for extra protection from rogue code.
aic7xxx_93cx6.c:
aic7xxx_93cx6.h:
Sync perforce IDs.
aic7xxx_freebsd.c:
Capture the eventhandle returned by EVENTHANDER_REGISTER
so we can kill the handler off during detach.
Use AHC_* constants instead of hard coded numbers in a
few more places.
Test PPR option state when deciding to "really" negotiate
when the CAM_NEGOTIATE flag is passed in a CCB.
Make use of core "ahc_pause_and_flushwork" routine in our
timeout handler rather than re-inventing this code.
Cleanup all of our resources (really!) in ahc_platform_free().
We should be all set to become a module now.
Implement the core ahc_detach() routine shared by all of
the FreeBSD front-ends.
aic7xxx_freebsd.h:
Softc storage for our event handler.
Null implementation for the ahc_platform_flushwork() OSM
callback. FreeBSD doesn't need this as XPT callbacks are
safe from all contexts and are done directly in ahc_done().
aic7xxx_inline.h:
Implement new lazy interrupt scheme. To avoid an extra
PCI bus read, we first check our completion queues to
see if any work has completed. If work is available, we
assume that this is the source of the interrupt and skip
reading INTSTAT. Any remaining interrupt status will be
cleared by a second call to the interrupt handler should
the interrupt line still be asserted. This drops the
interrupt handler down to a single PCI bus read in the
common case of I/O completion. This is the same overhead
as in the not so distant past, but the extra sanity of
perforning a PCI read after clearing the command complete
interrupt and before running the completion queue to avoid
missing command complete interrupts added a cycle.
aic7xxx.c:
During initialization, be sure to initialize all scratch
ram locations before they are read to avoid parity errors.
In this case, we use a new function, ahc_unbusy_tcl() to
initialize the scratch ram busy target table.
Replace instances of ahc_index_busy_tcl() used to unbusy
a tcl without looking at the old value with ahc_unbusy_tcl().
Modify ahc_sent_msg so that it can find single byte messages.
ahc_sent_msg is now used to determine if a transfer negotiation
attempt resulted in a bus free.
Be more careful in filtering out only the SCSI interrupts
of interest in ahc_handle_scsiint.
Rearrange interrupt clearing code to ensure that at least
one PCI transaction occurrs after hitting CLRSINT1 and
writting to CLRINT. CLRSINT1 writes take a bit to
take effect, and the re-arrangement provides sufficient
delay to ensure the write to CLRINT is effective. The
old code might report a spurious interrupt on some "fast"
chipsets.
export ahc-update_target_msg_request for use by OSM code.
If a target does not respond to our ATN request, clear
it once we move to a non-message phase. This avoids
sending a MSG_NOOP in some later message out phase.
Use max lun and max target constants instead of
hard-coded values.
Use softc storage built into our device_t under FreeBSD.
Fix a bug in ahc_free() that caused us to delete
resources that were not allocated.
Clean up any tstate/lstate info in ahc_free().
Clear the powerdown state in ahc_reset() so that
registers can be accessed.
Add a preliminary function for pausing the chip and
processing any posted work.
Add a preliminary suspend and resume functions.
aic7xxx.h:
Limit the number of supported luns to 64. We don't
support information unit transfers, so this is the
maximum that makes sense for these chips.
Add a new flag AHC_ALL_INTERRUPTS that forces the
processing of all interrupt state in a single invokation
of ahc_intr(). When the flag is not set, we use the
lazy interrupt handling scheme.
Add data structures to store controller state while
we are suspended.
Use constants instead of hard coded values where appropriate.
Correct some harmless "unsigned/signed" conflicts.
aic7xxx.seq:
Only perform the SCSIBUSL fix on ULTRA2 or newer controllers.
Older controllers seem to be confused by this.
In target mode, ignore PHASEMIS during data phases.
This bit seems to be flakey on U160 controllers acting
in target mode.
aic7xxx_pci.c:
Add support for the 29160C CPCI adapter.
Add definitions for subvendor ID information
available for devices with the "9005" vendor id.
We currently use this information to determine
if a multi-function device doesn't have the second
channel hooked up on a board.
Add rudimentary power mode code so we can put the
controller into the D0 state. In the future this
will be an OSM callback so that in FreeBSD we don't
duplicate functionality provided by the PCI code.
The powerstate code was added after I'd completed
my regression tests on this code.
Only capture "left over BIOS state" if the POWRDN
setting is not set in HCNTRL.
In target mode, don't bother sending incremental
CRC data.
2000-12-20 01:11:37 +00:00
|
|
|
tinfo->goal.transport_version = 2;
|
|
|
|
tinfo->goal.ppr_options = 0;
|
|
|
|
ahc_qinfifo_requeue_tail(ahc, scb);
|
|
|
|
printerror = 0;
|
|
|
|
} else if (ahc_sent_msg(ahc, AHCMSG_EXT,
|
|
|
|
MSG_EXT_WDTR, FALSE)
|
|
|
|
|| ahc_sent_msg(ahc, AHCMSG_EXT,
|
|
|
|
MSG_EXT_SDTR, FALSE)) {
|
|
|
|
/*
|
|
|
|
* Negotiation Rejected. Go-async and
|
|
|
|
* retry command.
|
|
|
|
*/
|
|
|
|
ahc_set_width(ahc, &devinfo,
|
|
|
|
MSG_EXT_WDTR_BUS_8_BIT,
|
|
|
|
AHC_TRANS_CUR|AHC_TRANS_GOAL,
|
|
|
|
/*paused*/TRUE);
|
|
|
|
ahc_set_syncrate(ahc, &devinfo,
|
|
|
|
/*syncrate*/NULL,
|
|
|
|
/*period*/0, /*offset*/0,
|
|
|
|
/*ppr_options*/0,
|
|
|
|
AHC_TRANS_CUR|AHC_TRANS_GOAL,
|
|
|
|
/*paused*/TRUE);
|
|
|
|
ahc_qinfifo_requeue_tail(ahc, scb);
|
|
|
|
printerror = 0;
|
2000-09-16 20:02:28 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
if (printerror != 0) {
|
|
|
|
u_int i;
|
1999-04-23 23:27:31 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
if (scb != NULL) {
|
|
|
|
u_int tag;
|
1999-04-23 23:27:31 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
if ((scb->hscb->control & TAG_ENB) != 0)
|
|
|
|
tag = scb->hscb->tag;
|
|
|
|
else
|
|
|
|
tag = SCB_LIST_NULL;
|
2000-10-08 03:37:52 +00:00
|
|
|
ahc_print_path(ahc, scb);
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_abort_scbs(ahc, target, channel,
|
|
|
|
SCB_GET_LUN(scb), tag,
|
|
|
|
ROLE_INITIATOR,
|
|
|
|
CAM_UNEXP_BUSFREE);
|
|
|
|
} else {
|
|
|
|
/*
|
|
|
|
* We had not fully identified this connection,
|
|
|
|
* so we cannot abort anything.
|
|
|
|
*/
|
|
|
|
printf("%s: ", ahc_name(ahc));
|
|
|
|
}
|
|
|
|
for (i = 0; i < num_phases; i++) {
|
This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
|
|
|
if (lastphase == ahc_phase_table[i].phase)
|
2000-09-16 20:02:28 +00:00
|
|
|
break;
|
|
|
|
}
|
2003-05-03 23:55:38 +00:00
|
|
|
if (lastphase != P_BUSFREE) {
|
|
|
|
/*
|
|
|
|
* Renegotiate with this device at the
|
|
|
|
* next oportunity just in case this busfree
|
|
|
|
* is due to a negotiation mismatch with the
|
|
|
|
* device.
|
|
|
|
*/
|
|
|
|
ahc_force_renegotiation(ahc, &devinfo);
|
|
|
|
}
|
2000-09-16 20:02:28 +00:00
|
|
|
printf("Unexpected busfree %s\n"
|
|
|
|
"SEQADDR == 0x%x\n",
|
This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
|
|
|
ahc_phase_table[i].phasemsg,
|
|
|
|
ahc_inb(ahc, SEQADDR0)
|
2000-09-16 20:02:28 +00:00
|
|
|
| (ahc_inb(ahc, SEQADDR1) << 8));
|
|
|
|
}
|
|
|
|
ahc_outb(ahc, CLRINT, CLRSCSIINT);
|
This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
|
|
|
ahc_restart(ahc);
|
2000-09-16 20:02:28 +00:00
|
|
|
} else {
|
aic7xxx.c:
Style nits.
Make sure that our selection hardware is disabled
as soon as possible after detecting a busfree and
even go so far as to disable the selection hardware
in advance of an event that will cause a busfree
(ABORT or BUS DEVICE RESET message). The concern
is that the selection hardware will select a target
for which, after processing the bus free, there
will be no commands pending. The sequencer idle
loop will re-enable the selection should it still be
necessary.
In ahc_handle_scsiint(), clear SSTAT0 events several
PCI transactions (most notably reads) prior to clearing
SCSIINT. The newer chips seem to take a bit of time to
see the change which can make the clearing of SCSIINT
ineffective.
Don't bother panicing at the end of ahc_handle_scsiint().
Getting to the final else just means we lost the race
with clearing SCSIINT.
In ahc_free(), handle init-level 0. This can happen when we
fail the attach for RAID devices. While I'm here, also kill
the parent dma tag.
In ahc_match_scb(), consider initiator ccbs to be any
that are not from the target mode group. This fixes
a bug where an external target reset CCB was not getting
cleaned up by the reset code.
Don't bother freezing a ccb in any of our "abort" routines
when the status is set to CAM_REQ_CMP. This can happen
for a target reset ccb.
aic7xxx.reg:
Reserve space for a completion queue. This will be used
to enhance performance in the near future.
aic7xxx.seq:
Remove an optimization for the 7890 autoflush bug that
turned out to allow, in rare cases, some data to get
lost.
Implement a simpler, faster, fix for the PCI_2_1 retry
bug that hangs the sequencer on an SCB dma for certain chips.
Test against SAVED_SCSIID rather than SELID during target
reselections. This is how we always did it in the past,
but the code was modified while trying to work around an
issue with the 7895. SAVED_SCSIID takes into account
twin channel adapters such as the 2742T, whereas SELID
does not have the channel bit. This caused invalid
selection warnings and other strangeness on these cards.
aic7xxx_pci.c
Use the correct mask for checking the generic aic7892
entry.
2001-02-10 18:04:27 +00:00
|
|
|
printf("%s: Missing case in ahc_handle_scsiint. status = %x\n",
|
|
|
|
ahc_name(ahc), status);
|
|
|
|
ahc_outb(ahc, CLRINT, CLRSCSIINT);
|
1999-04-23 23:27:31 +00:00
|
|
|
}
|
2000-09-16 20:02:28 +00:00
|
|
|
}
|
1999-04-23 23:27:31 +00:00
|
|
|
|
2002-04-24 16:58:51 +00:00
|
|
|
/*
|
|
|
|
* Force renegotiation to occur the next time we initiate
|
|
|
|
* a command to the current device.
|
|
|
|
*/
|
|
|
|
static void
|
2003-05-03 23:55:38 +00:00
|
|
|
ahc_force_renegotiation(struct ahc_softc *ahc, struct ahc_devinfo *devinfo)
|
2002-04-24 16:58:51 +00:00
|
|
|
{
|
|
|
|
struct ahc_initiator_tinfo *targ_info;
|
|
|
|
struct ahc_tmode_tstate *tstate;
|
|
|
|
|
|
|
|
targ_info = ahc_fetch_transinfo(ahc,
|
2003-05-03 23:55:38 +00:00
|
|
|
devinfo->channel,
|
|
|
|
devinfo->our_scsiid,
|
|
|
|
devinfo->target,
|
2002-04-24 16:58:51 +00:00
|
|
|
&tstate);
|
2003-05-03 23:55:38 +00:00
|
|
|
ahc_update_neg_request(ahc, devinfo, tstate,
|
2002-11-30 19:30:09 +00:00
|
|
|
targ_info, AHC_NEG_IF_NON_ASYNC);
|
2002-04-24 16:58:51 +00:00
|
|
|
}
|
|
|
|
|
Sync Perforce IDs, add tranceiver state change support, and correct
numerous error recovery buglets.
Many thanks to Tor Egge for his assistance in diagnosing problems with
the error recovery code.
aic7xxx.c:
Report missed bus free events using their own sequencer interrupt
code to avoid confusion with other "bad phase" interrupts.
Remove a delay used in debugging. This delay could only be hit
in certain, very extreme, error recovery scenarios.
Handle transceiver state changes correctly. You can now
plug an SE device into a hot-plug LVD bus without hanging
the controller.
When stepping through a critical section, panic if we step
more than a reasonable number of times.
After a bus reset, disable bus reset interupts until we either
our first attempt to (re)select another device, or another device
attemps to select us. This removes the need to busy wait in
kernel for the scsi reset line to fall yet still ensures we
see any reset events that impact the state of either our initiator
or target roles. Before this change, we had the potential of
servicing a "storm" of reset interrupts if the reset line was
held for a significant amount of time.
Indicate the current sequencer address whenever we dump the
card's state.
aic7xxx.reg:
Transceiver state change register definitions.
Add the missed bussfree sequencer interrupt code.
Re-enable the scsi reset interrupt if it has been
disabled before every attempt to (re)select a device
and when we have been selected as a target.
When being (re)selected, check to see if the selection
dissappeared just after we enabled our bus free interrupt.
If the bus has gone free again, go back to the idle loop
and wait for another selection.
Note two locations where we should change our behavior
if ATN is still raised. If ATN is raised during the
presentation of a command complete or disconnect message,
we should ignore the message and expect the target to put
us in msgout phase. We don't currently do this as it
requires some code re-arrangement so that critical sections
can be properly placed around our handling of these two
events. Otherwise, we cannot guarantee that the check of
ATN is atomic relative to our acking of the message in
byte (the kernel could assert ATN).
Only set the IDENTIFY_SEEN flag after we have settled
on the SCB for this transaction. The kernel looks at
this flag before assuming that SCB_TAG is valid. This
avoids confusion during certain types of error recovery.
Add a critical section around findSCB. We cannot allow
the kernel to remove an entry from the disconnected
list while we are traversing it. Ditto for get_free_or_disc_scb.
aic7xxx_freebsd.c:
Only assume that SCB_TAG is accurate if IDENTIFY_SEEN is
set in SEQ_FLAGS.
Fix a typo that caused us to execute some code for the
non-SCB paging case when paging SCBs. This only occurred
during error recovery.
2000-11-10 20:13:41 +00:00
|
|
|
#define AHC_MAX_STEPS 2000
|
2000-10-05 04:24:14 +00:00
|
|
|
void
|
|
|
|
ahc_clear_critical_section(struct ahc_softc *ahc)
|
|
|
|
{
|
|
|
|
int stepping;
|
Sync Perforce IDs, add tranceiver state change support, and correct
numerous error recovery buglets.
Many thanks to Tor Egge for his assistance in diagnosing problems with
the error recovery code.
aic7xxx.c:
Report missed bus free events using their own sequencer interrupt
code to avoid confusion with other "bad phase" interrupts.
Remove a delay used in debugging. This delay could only be hit
in certain, very extreme, error recovery scenarios.
Handle transceiver state changes correctly. You can now
plug an SE device into a hot-plug LVD bus without hanging
the controller.
When stepping through a critical section, panic if we step
more than a reasonable number of times.
After a bus reset, disable bus reset interupts until we either
our first attempt to (re)select another device, or another device
attemps to select us. This removes the need to busy wait in
kernel for the scsi reset line to fall yet still ensures we
see any reset events that impact the state of either our initiator
or target roles. Before this change, we had the potential of
servicing a "storm" of reset interrupts if the reset line was
held for a significant amount of time.
Indicate the current sequencer address whenever we dump the
card's state.
aic7xxx.reg:
Transceiver state change register definitions.
Add the missed bussfree sequencer interrupt code.
Re-enable the scsi reset interrupt if it has been
disabled before every attempt to (re)select a device
and when we have been selected as a target.
When being (re)selected, check to see if the selection
dissappeared just after we enabled our bus free interrupt.
If the bus has gone free again, go back to the idle loop
and wait for another selection.
Note two locations where we should change our behavior
if ATN is still raised. If ATN is raised during the
presentation of a command complete or disconnect message,
we should ignore the message and expect the target to put
us in msgout phase. We don't currently do this as it
requires some code re-arrangement so that critical sections
can be properly placed around our handling of these two
events. Otherwise, we cannot guarantee that the check of
ATN is atomic relative to our acking of the message in
byte (the kernel could assert ATN).
Only set the IDENTIFY_SEEN flag after we have settled
on the SCB for this transaction. The kernel looks at
this flag before assuming that SCB_TAG is valid. This
avoids confusion during certain types of error recovery.
Add a critical section around findSCB. We cannot allow
the kernel to remove an entry from the disconnected
list while we are traversing it. Ditto for get_free_or_disc_scb.
aic7xxx_freebsd.c:
Only assume that SCB_TAG is accurate if IDENTIFY_SEEN is
set in SEQ_FLAGS.
Fix a typo that caused us to execute some code for the
non-SCB paging case when paging SCBs. This only occurred
during error recovery.
2000-11-10 20:13:41 +00:00
|
|
|
int steps;
|
Clean up error recovery code:
aic7xxx.c:
In target mode, reset the TQINPOS on every restart of the sequencer.
In the past we did this only during a bus reset, but there are other
reasons the sequencer might be reset.
In ahc_clear_critical_section(), disable pausing chip interrupts while
we step the sequencer out of a critical section. This avoids the
possibility of getting a pausing interrupt (unexpected bus free,
bus reset, etc.) that would prevent the sequencer from stepping.
Send the correct async notifications in the case of a BDR or bus reset.
In ahc_loadseq(), correct the calculation of our critical sections.
In some cases, the sections would be larger than needed.
aic7xxx.h:
Remove an unused SCB flag.
aic7xxx.seq:
MK_MESSAGE is cleared by the kernel, there is no need to waste
a sequencer instruction clearing it.
aic7xxx_freebsd.c:
Go through the host message loop instead of issuing a single
byte message directly in the ahc_timeout() case where we
are currently on the bus to the device. The effect is the same,
but this way we get a nice printf saying that an expected BDR
was delivered instead of an unexpected bus free.
If we are requeuing an SCB for an error recovery action, be sure
to set the DISCONNECTED flag in the in-core version of the SCB.
This ensures that, in the SCB-paging case, the sequencer will
still recognize the reselection as valid even if the version
of the SCB with this flag set was never previously paged out
to system memory. In the non-paging case, set the MK_MESSAGE
flag in SCB_CONTROL directly.
aic7xxx_pci.c:
Enable the Memeory Write and Invalidate bug workaround for
all aic7880 chips with revs < 1. This bug is rarely triggered
in FreeBSD as most transfers end on cache-aligned boundaries,
but a recheck of my references indicates that these chips
are affected.
2000-10-09 01:46:01 +00:00
|
|
|
u_int simode0;
|
|
|
|
u_int simode1;
|
2000-10-05 04:24:14 +00:00
|
|
|
|
|
|
|
if (ahc->num_critical_sections == 0)
|
|
|
|
return;
|
|
|
|
|
|
|
|
stepping = FALSE;
|
Sync Perforce IDs, add tranceiver state change support, and correct
numerous error recovery buglets.
Many thanks to Tor Egge for his assistance in diagnosing problems with
the error recovery code.
aic7xxx.c:
Report missed bus free events using their own sequencer interrupt
code to avoid confusion with other "bad phase" interrupts.
Remove a delay used in debugging. This delay could only be hit
in certain, very extreme, error recovery scenarios.
Handle transceiver state changes correctly. You can now
plug an SE device into a hot-plug LVD bus without hanging
the controller.
When stepping through a critical section, panic if we step
more than a reasonable number of times.
After a bus reset, disable bus reset interupts until we either
our first attempt to (re)select another device, or another device
attemps to select us. This removes the need to busy wait in
kernel for the scsi reset line to fall yet still ensures we
see any reset events that impact the state of either our initiator
or target roles. Before this change, we had the potential of
servicing a "storm" of reset interrupts if the reset line was
held for a significant amount of time.
Indicate the current sequencer address whenever we dump the
card's state.
aic7xxx.reg:
Transceiver state change register definitions.
Add the missed bussfree sequencer interrupt code.
Re-enable the scsi reset interrupt if it has been
disabled before every attempt to (re)select a device
and when we have been selected as a target.
When being (re)selected, check to see if the selection
dissappeared just after we enabled our bus free interrupt.
If the bus has gone free again, go back to the idle loop
and wait for another selection.
Note two locations where we should change our behavior
if ATN is still raised. If ATN is raised during the
presentation of a command complete or disconnect message,
we should ignore the message and expect the target to put
us in msgout phase. We don't currently do this as it
requires some code re-arrangement so that critical sections
can be properly placed around our handling of these two
events. Otherwise, we cannot guarantee that the check of
ATN is atomic relative to our acking of the message in
byte (the kernel could assert ATN).
Only set the IDENTIFY_SEEN flag after we have settled
on the SCB for this transaction. The kernel looks at
this flag before assuming that SCB_TAG is valid. This
avoids confusion during certain types of error recovery.
Add a critical section around findSCB. We cannot allow
the kernel to remove an entry from the disconnected
list while we are traversing it. Ditto for get_free_or_disc_scb.
aic7xxx_freebsd.c:
Only assume that SCB_TAG is accurate if IDENTIFY_SEEN is
set in SEQ_FLAGS.
Fix a typo that caused us to execute some code for the
non-SCB paging case when paging SCBs. This only occurred
during error recovery.
2000-11-10 20:13:41 +00:00
|
|
|
steps = 0;
|
Clean up error recovery code:
aic7xxx.c:
In target mode, reset the TQINPOS on every restart of the sequencer.
In the past we did this only during a bus reset, but there are other
reasons the sequencer might be reset.
In ahc_clear_critical_section(), disable pausing chip interrupts while
we step the sequencer out of a critical section. This avoids the
possibility of getting a pausing interrupt (unexpected bus free,
bus reset, etc.) that would prevent the sequencer from stepping.
Send the correct async notifications in the case of a BDR or bus reset.
In ahc_loadseq(), correct the calculation of our critical sections.
In some cases, the sections would be larger than needed.
aic7xxx.h:
Remove an unused SCB flag.
aic7xxx.seq:
MK_MESSAGE is cleared by the kernel, there is no need to waste
a sequencer instruction clearing it.
aic7xxx_freebsd.c:
Go through the host message loop instead of issuing a single
byte message directly in the ahc_timeout() case where we
are currently on the bus to the device. The effect is the same,
but this way we get a nice printf saying that an expected BDR
was delivered instead of an unexpected bus free.
If we are requeuing an SCB for an error recovery action, be sure
to set the DISCONNECTED flag in the in-core version of the SCB.
This ensures that, in the SCB-paging case, the sequencer will
still recognize the reselection as valid even if the version
of the SCB with this flag set was never previously paged out
to system memory. In the non-paging case, set the MK_MESSAGE
flag in SCB_CONTROL directly.
aic7xxx_pci.c:
Enable the Memeory Write and Invalidate bug workaround for
all aic7880 chips with revs < 1. This bug is rarely triggered
in FreeBSD as most transfers end on cache-aligned boundaries,
but a recheck of my references indicates that these chips
are affected.
2000-10-09 01:46:01 +00:00
|
|
|
simode0 = 0;
|
|
|
|
simode1 = 0;
|
2000-10-05 04:24:14 +00:00
|
|
|
for (;;) {
|
|
|
|
struct cs *cs;
|
|
|
|
u_int seqaddr;
|
|
|
|
u_int i;
|
|
|
|
|
|
|
|
seqaddr = ahc_inb(ahc, SEQADDR0)
|
|
|
|
| (ahc_inb(ahc, SEQADDR1) << 8);
|
|
|
|
|
2001-08-05 22:20:12 +00:00
|
|
|
/*
|
|
|
|
* Seqaddr represents the next instruction to execute,
|
|
|
|
* so we are really executing the instruction just
|
|
|
|
* before it.
|
|
|
|
*/
|
|
|
|
if (seqaddr != 0)
|
|
|
|
seqaddr -= 1;
|
2000-10-05 04:24:14 +00:00
|
|
|
cs = ahc->critical_sections;
|
|
|
|
for (i = 0; i < ahc->num_critical_sections; i++, cs++) {
|
|
|
|
|
|
|
|
if (cs->begin < seqaddr && cs->end >= seqaddr)
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (i == ahc->num_critical_sections)
|
|
|
|
break;
|
|
|
|
|
Sync Perforce IDs, add tranceiver state change support, and correct
numerous error recovery buglets.
Many thanks to Tor Egge for his assistance in diagnosing problems with
the error recovery code.
aic7xxx.c:
Report missed bus free events using their own sequencer interrupt
code to avoid confusion with other "bad phase" interrupts.
Remove a delay used in debugging. This delay could only be hit
in certain, very extreme, error recovery scenarios.
Handle transceiver state changes correctly. You can now
plug an SE device into a hot-plug LVD bus without hanging
the controller.
When stepping through a critical section, panic if we step
more than a reasonable number of times.
After a bus reset, disable bus reset interupts until we either
our first attempt to (re)select another device, or another device
attemps to select us. This removes the need to busy wait in
kernel for the scsi reset line to fall yet still ensures we
see any reset events that impact the state of either our initiator
or target roles. Before this change, we had the potential of
servicing a "storm" of reset interrupts if the reset line was
held for a significant amount of time.
Indicate the current sequencer address whenever we dump the
card's state.
aic7xxx.reg:
Transceiver state change register definitions.
Add the missed bussfree sequencer interrupt code.
Re-enable the scsi reset interrupt if it has been
disabled before every attempt to (re)select a device
and when we have been selected as a target.
When being (re)selected, check to see if the selection
dissappeared just after we enabled our bus free interrupt.
If the bus has gone free again, go back to the idle loop
and wait for another selection.
Note two locations where we should change our behavior
if ATN is still raised. If ATN is raised during the
presentation of a command complete or disconnect message,
we should ignore the message and expect the target to put
us in msgout phase. We don't currently do this as it
requires some code re-arrangement so that critical sections
can be properly placed around our handling of these two
events. Otherwise, we cannot guarantee that the check of
ATN is atomic relative to our acking of the message in
byte (the kernel could assert ATN).
Only set the IDENTIFY_SEEN flag after we have settled
on the SCB for this transaction. The kernel looks at
this flag before assuming that SCB_TAG is valid. This
avoids confusion during certain types of error recovery.
Add a critical section around findSCB. We cannot allow
the kernel to remove an entry from the disconnected
list while we are traversing it. Ditto for get_free_or_disc_scb.
aic7xxx_freebsd.c:
Only assume that SCB_TAG is accurate if IDENTIFY_SEEN is
set in SEQ_FLAGS.
Fix a typo that caused us to execute some code for the
non-SCB paging case when paging SCBs. This only occurred
during error recovery.
2000-11-10 20:13:41 +00:00
|
|
|
if (steps > AHC_MAX_STEPS) {
|
|
|
|
printf("%s: Infinite loop in critical section\n",
|
|
|
|
ahc_name(ahc));
|
|
|
|
ahc_dump_card_state(ahc);
|
|
|
|
panic("critical section loop");
|
|
|
|
}
|
|
|
|
|
|
|
|
steps++;
|
Clean up error recovery code:
aic7xxx.c:
In target mode, reset the TQINPOS on every restart of the sequencer.
In the past we did this only during a bus reset, but there are other
reasons the sequencer might be reset.
In ahc_clear_critical_section(), disable pausing chip interrupts while
we step the sequencer out of a critical section. This avoids the
possibility of getting a pausing interrupt (unexpected bus free,
bus reset, etc.) that would prevent the sequencer from stepping.
Send the correct async notifications in the case of a BDR or bus reset.
In ahc_loadseq(), correct the calculation of our critical sections.
In some cases, the sections would be larger than needed.
aic7xxx.h:
Remove an unused SCB flag.
aic7xxx.seq:
MK_MESSAGE is cleared by the kernel, there is no need to waste
a sequencer instruction clearing it.
aic7xxx_freebsd.c:
Go through the host message loop instead of issuing a single
byte message directly in the ahc_timeout() case where we
are currently on the bus to the device. The effect is the same,
but this way we get a nice printf saying that an expected BDR
was delivered instead of an unexpected bus free.
If we are requeuing an SCB for an error recovery action, be sure
to set the DISCONNECTED flag in the in-core version of the SCB.
This ensures that, in the SCB-paging case, the sequencer will
still recognize the reselection as valid even if the version
of the SCB with this flag set was never previously paged out
to system memory. In the non-paging case, set the MK_MESSAGE
flag in SCB_CONTROL directly.
aic7xxx_pci.c:
Enable the Memeory Write and Invalidate bug workaround for
all aic7880 chips with revs < 1. This bug is rarely triggered
in FreeBSD as most transfers end on cache-aligned boundaries,
but a recheck of my references indicates that these chips
are affected.
2000-10-09 01:46:01 +00:00
|
|
|
if (stepping == FALSE) {
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Disable all interrupt sources so that the
|
|
|
|
* sequencer will not be stuck by a pausing
|
|
|
|
* interrupt condition while we attempt to
|
|
|
|
* leave a critical section.
|
|
|
|
*/
|
|
|
|
simode0 = ahc_inb(ahc, SIMODE0);
|
|
|
|
ahc_outb(ahc, SIMODE0, 0);
|
|
|
|
simode1 = ahc_inb(ahc, SIMODE1);
|
2002-11-30 19:30:09 +00:00
|
|
|
if ((ahc->features & AHC_DT) != 0)
|
|
|
|
/*
|
|
|
|
* On DT class controllers, we
|
|
|
|
* use the enhanced busfree logic.
|
|
|
|
* Unfortunately we cannot re-enable
|
|
|
|
* busfree detection within the
|
|
|
|
* current connection, so we must
|
|
|
|
* leave it on while single stepping.
|
|
|
|
*/
|
|
|
|
ahc_outb(ahc, SIMODE1, ENBUSFREE);
|
|
|
|
else
|
|
|
|
ahc_outb(ahc, SIMODE1, 0);
|
Clean up error recovery code:
aic7xxx.c:
In target mode, reset the TQINPOS on every restart of the sequencer.
In the past we did this only during a bus reset, but there are other
reasons the sequencer might be reset.
In ahc_clear_critical_section(), disable pausing chip interrupts while
we step the sequencer out of a critical section. This avoids the
possibility of getting a pausing interrupt (unexpected bus free,
bus reset, etc.) that would prevent the sequencer from stepping.
Send the correct async notifications in the case of a BDR or bus reset.
In ahc_loadseq(), correct the calculation of our critical sections.
In some cases, the sections would be larger than needed.
aic7xxx.h:
Remove an unused SCB flag.
aic7xxx.seq:
MK_MESSAGE is cleared by the kernel, there is no need to waste
a sequencer instruction clearing it.
aic7xxx_freebsd.c:
Go through the host message loop instead of issuing a single
byte message directly in the ahc_timeout() case where we
are currently on the bus to the device. The effect is the same,
but this way we get a nice printf saying that an expected BDR
was delivered instead of an unexpected bus free.
If we are requeuing an SCB for an error recovery action, be sure
to set the DISCONNECTED flag in the in-core version of the SCB.
This ensures that, in the SCB-paging case, the sequencer will
still recognize the reselection as valid even if the version
of the SCB with this flag set was never previously paged out
to system memory. In the non-paging case, set the MK_MESSAGE
flag in SCB_CONTROL directly.
aic7xxx_pci.c:
Enable the Memeory Write and Invalidate bug workaround for
all aic7880 chips with revs < 1. This bug is rarely triggered
in FreeBSD as most transfers end on cache-aligned boundaries,
but a recheck of my references indicates that these chips
are affected.
2000-10-09 01:46:01 +00:00
|
|
|
ahc_outb(ahc, CLRINT, CLRSCSIINT);
|
2003-05-26 21:20:47 +00:00
|
|
|
ahc_outb(ahc, SEQCTL, ahc->seqctl | STEP);
|
2000-10-05 04:24:14 +00:00
|
|
|
stepping = TRUE;
|
|
|
|
}
|
2002-11-30 19:30:09 +00:00
|
|
|
if ((ahc->features & AHC_DT) != 0) {
|
|
|
|
ahc_outb(ahc, CLRSINT1, CLRBUSFREE);
|
|
|
|
ahc_outb(ahc, CLRINT, CLRSCSIINT);
|
|
|
|
}
|
2000-10-05 04:24:14 +00:00
|
|
|
ahc_outb(ahc, HCNTRL, ahc->unpause);
|
2002-04-24 16:58:51 +00:00
|
|
|
while (!ahc_is_paused(ahc))
|
2000-10-05 04:24:14 +00:00
|
|
|
ahc_delay(200);
|
|
|
|
}
|
Clean up error recovery code:
aic7xxx.c:
In target mode, reset the TQINPOS on every restart of the sequencer.
In the past we did this only during a bus reset, but there are other
reasons the sequencer might be reset.
In ahc_clear_critical_section(), disable pausing chip interrupts while
we step the sequencer out of a critical section. This avoids the
possibility of getting a pausing interrupt (unexpected bus free,
bus reset, etc.) that would prevent the sequencer from stepping.
Send the correct async notifications in the case of a BDR or bus reset.
In ahc_loadseq(), correct the calculation of our critical sections.
In some cases, the sections would be larger than needed.
aic7xxx.h:
Remove an unused SCB flag.
aic7xxx.seq:
MK_MESSAGE is cleared by the kernel, there is no need to waste
a sequencer instruction clearing it.
aic7xxx_freebsd.c:
Go through the host message loop instead of issuing a single
byte message directly in the ahc_timeout() case where we
are currently on the bus to the device. The effect is the same,
but this way we get a nice printf saying that an expected BDR
was delivered instead of an unexpected bus free.
If we are requeuing an SCB for an error recovery action, be sure
to set the DISCONNECTED flag in the in-core version of the SCB.
This ensures that, in the SCB-paging case, the sequencer will
still recognize the reselection as valid even if the version
of the SCB with this flag set was never previously paged out
to system memory. In the non-paging case, set the MK_MESSAGE
flag in SCB_CONTROL directly.
aic7xxx_pci.c:
Enable the Memeory Write and Invalidate bug workaround for
all aic7880 chips with revs < 1. This bug is rarely triggered
in FreeBSD as most transfers end on cache-aligned boundaries,
but a recheck of my references indicates that these chips
are affected.
2000-10-09 01:46:01 +00:00
|
|
|
if (stepping) {
|
|
|
|
ahc_outb(ahc, SIMODE0, simode0);
|
|
|
|
ahc_outb(ahc, SIMODE1, simode1);
|
2003-05-26 21:20:47 +00:00
|
|
|
ahc_outb(ahc, SEQCTL, ahc->seqctl);
|
Clean up error recovery code:
aic7xxx.c:
In target mode, reset the TQINPOS on every restart of the sequencer.
In the past we did this only during a bus reset, but there are other
reasons the sequencer might be reset.
In ahc_clear_critical_section(), disable pausing chip interrupts while
we step the sequencer out of a critical section. This avoids the
possibility of getting a pausing interrupt (unexpected bus free,
bus reset, etc.) that would prevent the sequencer from stepping.
Send the correct async notifications in the case of a BDR or bus reset.
In ahc_loadseq(), correct the calculation of our critical sections.
In some cases, the sections would be larger than needed.
aic7xxx.h:
Remove an unused SCB flag.
aic7xxx.seq:
MK_MESSAGE is cleared by the kernel, there is no need to waste
a sequencer instruction clearing it.
aic7xxx_freebsd.c:
Go through the host message loop instead of issuing a single
byte message directly in the ahc_timeout() case where we
are currently on the bus to the device. The effect is the same,
but this way we get a nice printf saying that an expected BDR
was delivered instead of an unexpected bus free.
If we are requeuing an SCB for an error recovery action, be sure
to set the DISCONNECTED flag in the in-core version of the SCB.
This ensures that, in the SCB-paging case, the sequencer will
still recognize the reselection as valid even if the version
of the SCB with this flag set was never previously paged out
to system memory. In the non-paging case, set the MK_MESSAGE
flag in SCB_CONTROL directly.
aic7xxx_pci.c:
Enable the Memeory Write and Invalidate bug workaround for
all aic7880 chips with revs < 1. This bug is rarely triggered
in FreeBSD as most transfers end on cache-aligned boundaries,
but a recheck of my references indicates that these chips
are affected.
2000-10-09 01:46:01 +00:00
|
|
|
}
|
2000-10-05 04:24:14 +00:00
|
|
|
}
|
1999-04-23 23:27:31 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/*
|
|
|
|
* Clear any pending interrupt status.
|
|
|
|
*/
|
|
|
|
void
|
|
|
|
ahc_clear_intstat(struct ahc_softc *ahc)
|
|
|
|
{
|
|
|
|
/* Clear any interrupt conditions this may have caused */
|
|
|
|
ahc_outb(ahc, CLRSINT1, CLRSELTIMEO|CLRATNO|CLRSCSIRSTI
|
|
|
|
|CLRBUSFREE|CLRSCSIPERR|CLRPHASECHG|
|
|
|
|
CLRREQINIT);
|
2002-04-24 16:58:51 +00:00
|
|
|
ahc_flush_device_writes(ahc);
|
ahc_eisa.c:
ahc_pci.c:
Add detach support.
Make use of soft allocated on our behalf by newbus.
For PCI devices, disable the mapping type we aren't
using for extra protection from rogue code.
aic7xxx_93cx6.c:
aic7xxx_93cx6.h:
Sync perforce IDs.
aic7xxx_freebsd.c:
Capture the eventhandle returned by EVENTHANDER_REGISTER
so we can kill the handler off during detach.
Use AHC_* constants instead of hard coded numbers in a
few more places.
Test PPR option state when deciding to "really" negotiate
when the CAM_NEGOTIATE flag is passed in a CCB.
Make use of core "ahc_pause_and_flushwork" routine in our
timeout handler rather than re-inventing this code.
Cleanup all of our resources (really!) in ahc_platform_free().
We should be all set to become a module now.
Implement the core ahc_detach() routine shared by all of
the FreeBSD front-ends.
aic7xxx_freebsd.h:
Softc storage for our event handler.
Null implementation for the ahc_platform_flushwork() OSM
callback. FreeBSD doesn't need this as XPT callbacks are
safe from all contexts and are done directly in ahc_done().
aic7xxx_inline.h:
Implement new lazy interrupt scheme. To avoid an extra
PCI bus read, we first check our completion queues to
see if any work has completed. If work is available, we
assume that this is the source of the interrupt and skip
reading INTSTAT. Any remaining interrupt status will be
cleared by a second call to the interrupt handler should
the interrupt line still be asserted. This drops the
interrupt handler down to a single PCI bus read in the
common case of I/O completion. This is the same overhead
as in the not so distant past, but the extra sanity of
perforning a PCI read after clearing the command complete
interrupt and before running the completion queue to avoid
missing command complete interrupts added a cycle.
aic7xxx.c:
During initialization, be sure to initialize all scratch
ram locations before they are read to avoid parity errors.
In this case, we use a new function, ahc_unbusy_tcl() to
initialize the scratch ram busy target table.
Replace instances of ahc_index_busy_tcl() used to unbusy
a tcl without looking at the old value with ahc_unbusy_tcl().
Modify ahc_sent_msg so that it can find single byte messages.
ahc_sent_msg is now used to determine if a transfer negotiation
attempt resulted in a bus free.
Be more careful in filtering out only the SCSI interrupts
of interest in ahc_handle_scsiint.
Rearrange interrupt clearing code to ensure that at least
one PCI transaction occurrs after hitting CLRSINT1 and
writting to CLRINT. CLRSINT1 writes take a bit to
take effect, and the re-arrangement provides sufficient
delay to ensure the write to CLRINT is effective. The
old code might report a spurious interrupt on some "fast"
chipsets.
export ahc-update_target_msg_request for use by OSM code.
If a target does not respond to our ATN request, clear
it once we move to a non-message phase. This avoids
sending a MSG_NOOP in some later message out phase.
Use max lun and max target constants instead of
hard-coded values.
Use softc storage built into our device_t under FreeBSD.
Fix a bug in ahc_free() that caused us to delete
resources that were not allocated.
Clean up any tstate/lstate info in ahc_free().
Clear the powerdown state in ahc_reset() so that
registers can be accessed.
Add a preliminary function for pausing the chip and
processing any posted work.
Add a preliminary suspend and resume functions.
aic7xxx.h:
Limit the number of supported luns to 64. We don't
support information unit transfers, so this is the
maximum that makes sense for these chips.
Add a new flag AHC_ALL_INTERRUPTS that forces the
processing of all interrupt state in a single invokation
of ahc_intr(). When the flag is not set, we use the
lazy interrupt handling scheme.
Add data structures to store controller state while
we are suspended.
Use constants instead of hard coded values where appropriate.
Correct some harmless "unsigned/signed" conflicts.
aic7xxx.seq:
Only perform the SCSIBUSL fix on ULTRA2 or newer controllers.
Older controllers seem to be confused by this.
In target mode, ignore PHASEMIS during data phases.
This bit seems to be flakey on U160 controllers acting
in target mode.
aic7xxx_pci.c:
Add support for the 29160C CPCI adapter.
Add definitions for subvendor ID information
available for devices with the "9005" vendor id.
We currently use this information to determine
if a multi-function device doesn't have the second
channel hooked up on a board.
Add rudimentary power mode code so we can put the
controller into the D0 state. In the future this
will be an OSM callback so that in FreeBSD we don't
duplicate functionality provided by the PCI code.
The powerstate code was added after I'd completed
my regression tests on this code.
Only capture "left over BIOS state" if the POWRDN
setting is not set in HCNTRL.
In target mode, don't bother sending incremental
CRC data.
2000-12-20 01:11:37 +00:00
|
|
|
ahc_outb(ahc, CLRSINT0, CLRSELDO|CLRSELDI|CLRSELINGO);
|
2002-04-24 16:58:51 +00:00
|
|
|
ahc_flush_device_writes(ahc);
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_outb(ahc, CLRINT, CLRSCSIINT);
|
2002-04-24 16:58:51 +00:00
|
|
|
ahc_flush_device_writes(ahc);
|
1999-04-23 23:27:31 +00:00
|
|
|
}
|
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/**************************** Debugging Routines ******************************/
|
2002-04-24 16:58:51 +00:00
|
|
|
#ifdef AHC_DEBUG
|
2002-08-31 06:41:37 +00:00
|
|
|
uint32_t ahc_debug = AHC_DEBUG_OPTS;
|
2002-04-24 16:58:51 +00:00
|
|
|
#endif
|
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
void
|
|
|
|
ahc_print_scb(struct scb *scb)
|
1999-04-23 23:27:31 +00:00
|
|
|
{
|
2000-09-16 20:02:28 +00:00
|
|
|
int i;
|
1999-04-23 23:27:31 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
struct hardware_scb *hscb = scb->hscb;
|
1999-04-23 23:27:31 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
printf("scb:%p control:0x%x scsiid:0x%x lun:%d cdb_len:%d\n",
|
2001-07-18 21:39:48 +00:00
|
|
|
(void *)scb,
|
2000-09-16 20:02:28 +00:00
|
|
|
hscb->control,
|
|
|
|
hscb->scsiid,
|
|
|
|
hscb->lun,
|
|
|
|
hscb->cdb_len);
|
2001-12-16 17:38:30 +00:00
|
|
|
printf("Shared Data: ");
|
|
|
|
for (i = 0; i < sizeof(hscb->shared_data.cdb); i++)
|
|
|
|
printf("%#02x", hscb->shared_data.cdb[i]);
|
2000-09-16 20:02:28 +00:00
|
|
|
printf(" dataptr:%#x datacnt:%#x sgptr:%#x tag:%#x\n",
|
2001-01-05 19:15:37 +00:00
|
|
|
ahc_le32toh(hscb->dataptr),
|
|
|
|
ahc_le32toh(hscb->datacnt),
|
|
|
|
ahc_le32toh(hscb->sgptr),
|
2000-09-16 20:02:28 +00:00
|
|
|
hscb->tag);
|
|
|
|
if (scb->sg_count > 0) {
|
|
|
|
for (i = 0; i < scb->sg_count; i++) {
|
2001-07-18 21:39:48 +00:00
|
|
|
printf("sg[%d] - Addr 0x%x%x : Length %d\n",
|
2000-09-16 20:02:28 +00:00
|
|
|
i,
|
2001-07-18 21:39:48 +00:00
|
|
|
(ahc_le32toh(scb->sg_list[i].len) >> 24
|
|
|
|
& SG_HIGH_ADDR_BITS),
|
2001-01-05 19:15:37 +00:00
|
|
|
ahc_le32toh(scb->sg_list[i].addr),
|
|
|
|
ahc_le32toh(scb->sg_list[i].len));
|
1999-04-23 23:27:31 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/************************* Transfer Negotiation *******************************/
|
|
|
|
/*
|
|
|
|
* Allocate per target mode instance (ID we respond to as a target)
|
|
|
|
* transfer negotiation data structures.
|
|
|
|
*/
|
2001-03-29 00:36:35 +00:00
|
|
|
static struct ahc_tmode_tstate *
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_alloc_tstate(struct ahc_softc *ahc, u_int scsi_id, char channel)
|
1999-04-23 23:27:31 +00:00
|
|
|
{
|
2001-03-29 00:36:35 +00:00
|
|
|
struct ahc_tmode_tstate *master_tstate;
|
|
|
|
struct ahc_tmode_tstate *tstate;
|
2000-09-16 20:02:28 +00:00
|
|
|
int i;
|
1999-04-23 23:27:31 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
master_tstate = ahc->enabled_targets[ahc->our_id];
|
|
|
|
if (channel == 'B') {
|
|
|
|
scsi_id += 8;
|
|
|
|
master_tstate = ahc->enabled_targets[ahc->our_id_b + 8];
|
|
|
|
}
|
|
|
|
if (ahc->enabled_targets[scsi_id] != NULL
|
|
|
|
&& ahc->enabled_targets[scsi_id] != master_tstate)
|
|
|
|
panic("%s: ahc_alloc_tstate - Target already allocated",
|
|
|
|
ahc_name(ahc));
|
2002-08-31 06:41:37 +00:00
|
|
|
tstate = (struct ahc_tmode_tstate*)malloc(sizeof(*tstate),
|
|
|
|
M_DEVBUF, M_NOWAIT);
|
2000-09-16 20:02:28 +00:00
|
|
|
if (tstate == NULL)
|
|
|
|
return (NULL);
|
2000-07-18 20:12:14 +00:00
|
|
|
|
1998-09-15 07:24:17 +00:00
|
|
|
/*
|
2000-09-16 20:02:28 +00:00
|
|
|
* If we have allocated a master tstate, copy user settings from
|
|
|
|
* the master tstate (taken from SRAM or the EEPROM) for this
|
|
|
|
* channel, but reset our current and goal settings to async/narrow
|
|
|
|
* until an initiator talks to us.
|
1998-09-15 07:24:17 +00:00
|
|
|
*/
|
2000-09-16 20:02:28 +00:00
|
|
|
if (master_tstate != NULL) {
|
|
|
|
memcpy(tstate, master_tstate, sizeof(*tstate));
|
|
|
|
memset(tstate->enabled_luns, 0, sizeof(tstate->enabled_luns));
|
|
|
|
tstate->ultraenb = 0;
|
2002-04-24 16:58:51 +00:00
|
|
|
for (i = 0; i < AHC_NUM_TARGETS; i++) {
|
2001-05-15 19:41:12 +00:00
|
|
|
memset(&tstate->transinfo[i].curr, 0,
|
|
|
|
sizeof(tstate->transinfo[i].curr));
|
2000-09-16 20:02:28 +00:00
|
|
|
memset(&tstate->transinfo[i].goal, 0,
|
|
|
|
sizeof(tstate->transinfo[i].goal));
|
|
|
|
}
|
|
|
|
} else
|
|
|
|
memset(tstate, 0, sizeof(*tstate));
|
|
|
|
ahc->enabled_targets[scsi_id] = tstate;
|
|
|
|
return (tstate);
|
|
|
|
}
|
1999-12-06 18:23:31 +00:00
|
|
|
|
2001-01-27 20:54:24 +00:00
|
|
|
#ifdef AHC_TARGET_MODE
|
2000-09-16 20:02:28 +00:00
|
|
|
/*
|
|
|
|
* Free per target mode instance (ID we respond to as a target)
|
|
|
|
* transfer negotiation data structures.
|
|
|
|
*/
|
|
|
|
static void
|
|
|
|
ahc_free_tstate(struct ahc_softc *ahc, u_int scsi_id, char channel, int force)
|
|
|
|
{
|
2001-03-29 00:36:35 +00:00
|
|
|
struct ahc_tmode_tstate *tstate;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2001-03-29 00:36:35 +00:00
|
|
|
/*
|
|
|
|
* Don't clean up our "master" tstate.
|
|
|
|
* It has our default user settings.
|
|
|
|
*/
|
|
|
|
if (((channel == 'B' && scsi_id == ahc->our_id_b)
|
2000-09-16 20:02:28 +00:00
|
|
|
|| (channel == 'A' && scsi_id == ahc->our_id))
|
|
|
|
&& force == FALSE)
|
|
|
|
return;
|
2000-02-09 21:25:00 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
if (channel == 'B')
|
|
|
|
scsi_id += 8;
|
|
|
|
tstate = ahc->enabled_targets[scsi_id];
|
|
|
|
if (tstate != NULL)
|
|
|
|
free(tstate, M_DEVBUF);
|
|
|
|
ahc->enabled_targets[scsi_id] = NULL;
|
1998-09-15 07:24:17 +00:00
|
|
|
}
|
2001-01-27 20:54:24 +00:00
|
|
|
#endif
|
1998-09-15 07:24:17 +00:00
|
|
|
|
1998-12-10 04:14:50 +00:00
|
|
|
/*
|
|
|
|
* Called when we have an active connection to a target on the bus,
|
|
|
|
* this function finds the nearest syncrate to the input period limited
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
* by the capabilities of the bus connectivity of and sync settings for
|
|
|
|
* the target.
|
1998-12-10 04:14:50 +00:00
|
|
|
*/
|
2002-11-30 19:30:09 +00:00
|
|
|
struct ahc_syncrate *
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
ahc_devlimited_syncrate(struct ahc_softc *ahc,
|
|
|
|
struct ahc_initiator_tinfo *tinfo,
|
2002-04-24 16:58:51 +00:00
|
|
|
u_int *period, u_int *ppr_options, role_t role)
|
|
|
|
{
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
struct ahc_transinfo *transinfo;
|
1998-12-10 04:14:50 +00:00
|
|
|
u_int maxsync;
|
|
|
|
|
|
|
|
if ((ahc->features & AHC_ULTRA2) != 0) {
|
|
|
|
if ((ahc_inb(ahc, SBLKCTL) & ENAB40) != 0
|
|
|
|
&& (ahc_inb(ahc, SSTAT2) & EXP_ACTIVE) == 0) {
|
2000-07-18 20:12:14 +00:00
|
|
|
maxsync = AHC_SYNCRATE_DT;
|
1998-12-10 04:14:50 +00:00
|
|
|
} else {
|
|
|
|
maxsync = AHC_SYNCRATE_ULTRA;
|
2000-07-18 20:12:14 +00:00
|
|
|
/* Can't do DT on an SE bus */
|
|
|
|
*ppr_options &= ~MSG_EXT_PPR_DT_REQ;
|
1998-12-10 04:14:50 +00:00
|
|
|
}
|
2001-05-15 19:41:12 +00:00
|
|
|
} else if ((ahc->features & AHC_ULTRA) != 0) {
|
1998-12-10 04:14:50 +00:00
|
|
|
maxsync = AHC_SYNCRATE_ULTRA;
|
|
|
|
} else {
|
|
|
|
maxsync = AHC_SYNCRATE_FAST;
|
|
|
|
}
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
/*
|
|
|
|
* Never allow a value higher than our current goal
|
|
|
|
* period otherwise we may allow a target initiated
|
|
|
|
* negotiation to go above the limit as set by the
|
|
|
|
* user. In the case of an initiator initiated
|
|
|
|
* sync negotiation, we limit based on the user
|
|
|
|
* setting. This allows the system to still accept
|
|
|
|
* incoming negotiations even if target initiated
|
|
|
|
* negotiation is not performed.
|
|
|
|
*/
|
|
|
|
if (role == ROLE_TARGET)
|
|
|
|
transinfo = &tinfo->user;
|
|
|
|
else
|
|
|
|
transinfo = &tinfo->goal;
|
|
|
|
*ppr_options &= transinfo->ppr_options;
|
aic7xxx.reg:
Add a constant for the controller's stack size and the
maximum scsi offset.
aic7xxx.seq:
Style nit. The source is implied to be the destination
unless overridden in an "and" instruction.
Update target mode code for changes in identify seen
sequencer flags.
aic7xxx_pci.c:
Ensure that the PCIERRGENDIS bit is set in the
PCIERRGEN config space register. Perhaps this
is a reason for the spurios parity errors reported
on U160 controllers.
Honor the AHC_NO_BIOS_INIT flag.
Allow PCI interrupt reporting to be disabled,
by clearing the PERRRESEN bit in the command
register. This option is now enabled via a new
softc flag: AHC_DISABLE_PCI_PERR.
Disable SERR and pause the controller prior to performing
our mmapped I/O test. This should handle the case of
controllers that do not "auto-access pause". For legacy
controllers, use SCB ram instead of scratch ram since
the latter may contain settings left over from the BIOS
that we will use if an seeprom is not found.
Make use of new ahc_inl/outl() inlines.
aic7xxx.h:
Reformat a few comments to follow driver style.
Add a controller flags that indicate that a controller
has not been initialized by the BIOS and whether to
disable PCI parity errors..
Remove stack probing softc members.
Add a few more syncrate constants that are useful in speed
fallback calculations.
Add the SHOW_MASKED_ERRORS debug flag.
aic7xxx.h:
aic7xxx.c:
Implement the SCB_SILENT flag. This is useful for
hushing up the driver during DV or other operations
that we expect to cause transmission errors. The
messages will still print if the SHOW_MASKED_ERRORS
debug option is enabled.
aic7xxx_inline.h:
Implement ahc_[in|out][w|l|q]. This removes the need
for manual 'or and shift" type operations throughout
the driver.
aic7xxx.c:
Move SELTO dignostic so that the SCB is still valid
when we use it for printing path information.
If we are narrow, limit syncrate to Ultra2.
Don't clobber ppr_options when forcing a renegotiation.
The current ppr_options may be referenced while queuing
new commands. Don't set our width to unknown when forcing
negotiation on narrow controllers. This will confuse the
negotiation code into negotiating with a wide message on
narrow controllers.
Add an "asserting atn" diagnostic with controller/target
information.
Remove the probe_stack code. The stack is always
4 deep on legacy controllers, so probing is pointless.
This also avoids an issue where probing the stack would
upset the aic7770.
In ahc_reset(), record whether or not we found the
controller in a reset state. If the controller was
already reset, assume that no BIOS has initialized
the controller and ignore left over scratch ram
settings.
Fix an ifdef bug that caused sequencer debugging to
be enabled always.
Clear the ultraenb flag in our tstate during startup.
The ultraenbled'ness of a device is recorded in the user
transfer settings. tstate->ultraenb bitmask indicates
which devices we have negotiated an ultra speed with.
Just after initialization, we are async. Setting the
ultraenb flag while async seems to be harmless, but it
was confusing to see the ULTRAENB flag set in the SCB.
Enhance residual diagnostic to indicate if the residual
if for sense information or normal data transfers.
Indicate the features, bugs, and flags set in the softc
that are used to control firmware patch download when
booting verbose.
In ahc_dump_card_state() fix a logic reversal. The
SCSIPHASE register only exists on U160 controllers.
The SCSISIGI register exists on all controllers. Not
the other way around. Also print out the ERROR register.
Allow ahc_dump_card_state() to be called when the sequencer
is not paused. Add dump card state markers as in the U320
driver.
2003-01-20 20:44:55 +00:00
|
|
|
if (transinfo->width == MSG_EXT_WDTR_BUS_8_BIT) {
|
|
|
|
maxsync = MAX(maxsync, AHC_SYNCRATE_ULTRA2);
|
|
|
|
*ppr_options &= ~MSG_EXT_PPR_DT_REQ;
|
|
|
|
}
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
if (transinfo->period == 0) {
|
|
|
|
*period = 0;
|
|
|
|
*ppr_options = 0;
|
|
|
|
return (NULL);
|
|
|
|
}
|
|
|
|
*period = MAX(*period, transinfo->period);
|
2000-07-18 20:12:14 +00:00
|
|
|
return (ahc_find_syncrate(ahc, period, ppr_options, maxsync));
|
1998-12-10 04:14:50 +00:00
|
|
|
}
|
|
|
|
|
1998-09-15 07:24:17 +00:00
|
|
|
/*
|
|
|
|
* Look up the valid period to SCSIRATE conversion in our table.
|
|
|
|
* Return the period and offset that should be sent to the target
|
|
|
|
* if this was the beginning of an SDTR.
|
|
|
|
*/
|
2000-09-16 20:02:28 +00:00
|
|
|
struct ahc_syncrate *
|
2000-07-18 20:12:14 +00:00
|
|
|
ahc_find_syncrate(struct ahc_softc *ahc, u_int *period,
|
|
|
|
u_int *ppr_options, u_int maxsync)
|
1998-09-15 07:24:17 +00:00
|
|
|
{
|
|
|
|
struct ahc_syncrate *syncrate;
|
|
|
|
|
2000-07-18 20:12:14 +00:00
|
|
|
if ((ahc->features & AHC_DT) == 0)
|
|
|
|
*ppr_options &= ~MSG_EXT_PPR_DT_REQ;
|
2001-05-15 19:41:12 +00:00
|
|
|
|
|
|
|
/* Skip all DT only entries if DT is not available */
|
|
|
|
if ((*ppr_options & MSG_EXT_PPR_DT_REQ) == 0
|
|
|
|
&& maxsync < AHC_SYNCRATE_ULTRA2)
|
|
|
|
maxsync = AHC_SYNCRATE_ULTRA2;
|
2000-07-18 20:12:14 +00:00
|
|
|
|
|
|
|
for (syncrate = &ahc_syncrates[maxsync];
|
|
|
|
syncrate->rate != NULL;
|
|
|
|
syncrate++) {
|
|
|
|
|
|
|
|
/*
|
|
|
|
* The Ultra2 table doesn't go as low
|
|
|
|
* as for the Fast/Ultra cards.
|
|
|
|
*/
|
|
|
|
if ((ahc->features & AHC_ULTRA2) != 0
|
|
|
|
&& (syncrate->sxfr_u2 == 0))
|
|
|
|
break;
|
|
|
|
|
1998-09-15 07:24:17 +00:00
|
|
|
if (*period <= syncrate->period) {
|
|
|
|
/*
|
|
|
|
* When responding to a target that requests
|
|
|
|
* sync, the requested rate may fall between
|
|
|
|
* two rates that we can output, but still be
|
|
|
|
* a rate that we can receive. Because of this,
|
|
|
|
* we want to respond to the target with
|
|
|
|
* the same rate that it sent to us even
|
|
|
|
* if the period we use to send data to it
|
|
|
|
* is lower. Only lower the response period
|
|
|
|
* if we must.
|
|
|
|
*/
|
2000-01-07 23:08:20 +00:00
|
|
|
if (syncrate == &ahc_syncrates[maxsync])
|
1998-09-15 07:24:17 +00:00
|
|
|
*period = syncrate->period;
|
2000-07-18 20:12:14 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* At some speeds, we only support
|
|
|
|
* ST transfers.
|
|
|
|
*/
|
|
|
|
if ((syncrate->sxfr_u2 & ST_SXFR) != 0)
|
|
|
|
*ppr_options &= ~MSG_EXT_PPR_DT_REQ;
|
1998-09-15 07:24:17 +00:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if ((*period == 0)
|
|
|
|
|| (syncrate->rate == NULL)
|
|
|
|
|| ((ahc->features & AHC_ULTRA2) != 0
|
2000-01-07 23:08:20 +00:00
|
|
|
&& (syncrate->sxfr_u2 == 0))) {
|
1998-09-15 07:24:17 +00:00
|
|
|
/* Use asynchronous transfers. */
|
|
|
|
*period = 0;
|
|
|
|
syncrate = NULL;
|
2000-07-18 20:12:14 +00:00
|
|
|
*ppr_options &= ~MSG_EXT_PPR_DT_REQ;
|
1998-09-15 07:24:17 +00:00
|
|
|
}
|
|
|
|
return (syncrate);
|
|
|
|
}
|
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/*
|
|
|
|
* Convert from an entry in our syncrate table to the SCSI equivalent
|
|
|
|
* sync "period" factor.
|
|
|
|
*/
|
|
|
|
u_int
|
1998-09-15 07:24:17 +00:00
|
|
|
ahc_find_period(struct ahc_softc *ahc, u_int scsirate, u_int maxsync)
|
|
|
|
{
|
|
|
|
struct ahc_syncrate *syncrate;
|
|
|
|
|
2000-01-07 23:08:20 +00:00
|
|
|
if ((ahc->features & AHC_ULTRA2) != 0)
|
1998-09-15 07:24:17 +00:00
|
|
|
scsirate &= SXFR_ULTRA2;
|
2000-01-07 23:08:20 +00:00
|
|
|
else
|
1998-09-15 07:24:17 +00:00
|
|
|
scsirate &= SXFR;
|
|
|
|
|
|
|
|
syncrate = &ahc_syncrates[maxsync];
|
|
|
|
while (syncrate->rate != NULL) {
|
|
|
|
|
|
|
|
if ((ahc->features & AHC_ULTRA2) != 0) {
|
2000-01-07 23:08:20 +00:00
|
|
|
if (syncrate->sxfr_u2 == 0)
|
1998-09-15 07:24:17 +00:00
|
|
|
break;
|
2000-01-07 23:08:20 +00:00
|
|
|
else if (scsirate == (syncrate->sxfr_u2 & SXFR_ULTRA2))
|
1998-09-15 07:24:17 +00:00
|
|
|
return (syncrate->period);
|
2000-01-07 23:08:20 +00:00
|
|
|
} else if (scsirate == (syncrate->sxfr & SXFR)) {
|
1998-09-15 07:24:17 +00:00
|
|
|
return (syncrate->period);
|
|
|
|
}
|
|
|
|
syncrate++;
|
|
|
|
}
|
|
|
|
return (0); /* async */
|
|
|
|
}
|
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/*
|
|
|
|
* Truncate the given synchronous offset to a value the
|
|
|
|
* current adapter type and syncrate are capable of.
|
|
|
|
*/
|
|
|
|
void
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
ahc_validate_offset(struct ahc_softc *ahc,
|
|
|
|
struct ahc_initiator_tinfo *tinfo,
|
|
|
|
struct ahc_syncrate *syncrate,
|
|
|
|
u_int *offset, int wide, role_t role)
|
1998-09-15 07:24:17 +00:00
|
|
|
{
|
|
|
|
u_int maxoffset;
|
|
|
|
|
|
|
|
/* Limit offset to what we can do */
|
|
|
|
if (syncrate == NULL) {
|
|
|
|
maxoffset = 0;
|
|
|
|
} else if ((ahc->features & AHC_ULTRA2) != 0) {
|
|
|
|
maxoffset = MAX_OFFSET_ULTRA2;
|
|
|
|
} else {
|
|
|
|
if (wide)
|
|
|
|
maxoffset = MAX_OFFSET_16BIT;
|
|
|
|
else
|
|
|
|
maxoffset = MAX_OFFSET_8BIT;
|
|
|
|
}
|
|
|
|
*offset = MIN(*offset, maxoffset);
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
if (tinfo != NULL) {
|
|
|
|
if (role == ROLE_TARGET)
|
|
|
|
*offset = MIN(*offset, tinfo->user.offset);
|
|
|
|
else
|
|
|
|
*offset = MIN(*offset, tinfo->goal.offset);
|
|
|
|
}
|
1998-09-15 07:24:17 +00:00
|
|
|
}
|
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/*
|
|
|
|
* Truncate the given transfer width parameter to a value the
|
|
|
|
* current adapter type is capable of.
|
|
|
|
*/
|
|
|
|
void
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
ahc_validate_width(struct ahc_softc *ahc, struct ahc_initiator_tinfo *tinfo,
|
|
|
|
u_int *bus_width, role_t role)
|
2000-07-18 20:12:14 +00:00
|
|
|
{
|
|
|
|
switch (*bus_width) {
|
|
|
|
default:
|
|
|
|
if (ahc->features & AHC_WIDE) {
|
|
|
|
/* Respond Wide */
|
|
|
|
*bus_width = MSG_EXT_WDTR_BUS_16_BIT;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
/* FALLTHROUGH */
|
|
|
|
case MSG_EXT_WDTR_BUS_8_BIT:
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
*bus_width = MSG_EXT_WDTR_BUS_8_BIT;
|
2000-07-18 20:12:14 +00:00
|
|
|
break;
|
|
|
|
}
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
if (tinfo != NULL) {
|
|
|
|
if (role == ROLE_TARGET)
|
|
|
|
*bus_width = MIN(tinfo->user.width, *bus_width);
|
|
|
|
else
|
|
|
|
*bus_width = MIN(tinfo->goal.width, *bus_width);
|
|
|
|
}
|
2000-07-18 20:12:14 +00:00
|
|
|
}
|
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/*
|
|
|
|
* Update the bitmask of targets for which the controller should
|
|
|
|
* negotiate with at the next convenient oportunity. This currently
|
|
|
|
* means the next time we send the initial identify messages for
|
|
|
|
* a new transaction.
|
|
|
|
*/
|
2001-03-29 00:36:35 +00:00
|
|
|
int
|
|
|
|
ahc_update_neg_request(struct ahc_softc *ahc, struct ahc_devinfo *devinfo,
|
|
|
|
struct ahc_tmode_tstate *tstate,
|
2002-11-30 19:30:09 +00:00
|
|
|
struct ahc_initiator_tinfo *tinfo, ahc_neg_type neg_type)
|
1998-12-10 04:14:50 +00:00
|
|
|
{
|
2001-03-29 00:36:35 +00:00
|
|
|
u_int auto_negotiate_orig;
|
1998-12-10 04:14:50 +00:00
|
|
|
|
2001-03-29 00:36:35 +00:00
|
|
|
auto_negotiate_orig = tstate->auto_negotiate;
|
2002-11-30 19:30:09 +00:00
|
|
|
if (neg_type == AHC_NEG_ALWAYS) {
|
|
|
|
/*
|
|
|
|
* Force our "current" settings to be
|
|
|
|
* unknown so that unless a bus reset
|
|
|
|
* occurs the need to renegotiate is
|
|
|
|
* recorded persistently.
|
|
|
|
*/
|
aic7xxx.reg:
Add a constant for the controller's stack size and the
maximum scsi offset.
aic7xxx.seq:
Style nit. The source is implied to be the destination
unless overridden in an "and" instruction.
Update target mode code for changes in identify seen
sequencer flags.
aic7xxx_pci.c:
Ensure that the PCIERRGENDIS bit is set in the
PCIERRGEN config space register. Perhaps this
is a reason for the spurios parity errors reported
on U160 controllers.
Honor the AHC_NO_BIOS_INIT flag.
Allow PCI interrupt reporting to be disabled,
by clearing the PERRRESEN bit in the command
register. This option is now enabled via a new
softc flag: AHC_DISABLE_PCI_PERR.
Disable SERR and pause the controller prior to performing
our mmapped I/O test. This should handle the case of
controllers that do not "auto-access pause". For legacy
controllers, use SCB ram instead of scratch ram since
the latter may contain settings left over from the BIOS
that we will use if an seeprom is not found.
Make use of new ahc_inl/outl() inlines.
aic7xxx.h:
Reformat a few comments to follow driver style.
Add a controller flags that indicate that a controller
has not been initialized by the BIOS and whether to
disable PCI parity errors..
Remove stack probing softc members.
Add a few more syncrate constants that are useful in speed
fallback calculations.
Add the SHOW_MASKED_ERRORS debug flag.
aic7xxx.h:
aic7xxx.c:
Implement the SCB_SILENT flag. This is useful for
hushing up the driver during DV or other operations
that we expect to cause transmission errors. The
messages will still print if the SHOW_MASKED_ERRORS
debug option is enabled.
aic7xxx_inline.h:
Implement ahc_[in|out][w|l|q]. This removes the need
for manual 'or and shift" type operations throughout
the driver.
aic7xxx.c:
Move SELTO dignostic so that the SCB is still valid
when we use it for printing path information.
If we are narrow, limit syncrate to Ultra2.
Don't clobber ppr_options when forcing a renegotiation.
The current ppr_options may be referenced while queuing
new commands. Don't set our width to unknown when forcing
negotiation on narrow controllers. This will confuse the
negotiation code into negotiating with a wide message on
narrow controllers.
Add an "asserting atn" diagnostic with controller/target
information.
Remove the probe_stack code. The stack is always
4 deep on legacy controllers, so probing is pointless.
This also avoids an issue where probing the stack would
upset the aic7770.
In ahc_reset(), record whether or not we found the
controller in a reset state. If the controller was
already reset, assume that no BIOS has initialized
the controller and ignore left over scratch ram
settings.
Fix an ifdef bug that caused sequencer debugging to
be enabled always.
Clear the ultraenb flag in our tstate during startup.
The ultraenbled'ness of a device is recorded in the user
transfer settings. tstate->ultraenb bitmask indicates
which devices we have negotiated an ultra speed with.
Just after initialization, we are async. Setting the
ultraenb flag while async seems to be harmless, but it
was confusing to see the ULTRAENB flag set in the SCB.
Enhance residual diagnostic to indicate if the residual
if for sense information or normal data transfers.
Indicate the features, bugs, and flags set in the softc
that are used to control firmware patch download when
booting verbose.
In ahc_dump_card_state() fix a logic reversal. The
SCSIPHASE register only exists on U160 controllers.
The SCSISIGI register exists on all controllers. Not
the other way around. Also print out the ERROR register.
Allow ahc_dump_card_state() to be called when the sequencer
is not paused. Add dump card state markers as in the U320
driver.
2003-01-20 20:44:55 +00:00
|
|
|
if ((ahc->features & AHC_WIDE) != 0)
|
|
|
|
tinfo->curr.width = AHC_WIDTH_UNKNOWN;
|
2002-11-30 19:30:09 +00:00
|
|
|
tinfo->curr.period = AHC_PERIOD_UNKNOWN;
|
|
|
|
tinfo->curr.offset = AHC_OFFSET_UNKNOWN;
|
|
|
|
}
|
2001-05-15 19:41:12 +00:00
|
|
|
if (tinfo->curr.period != tinfo->goal.period
|
|
|
|
|| tinfo->curr.width != tinfo->goal.width
|
|
|
|
|| tinfo->curr.offset != tinfo->goal.offset
|
|
|
|
|| tinfo->curr.ppr_options != tinfo->goal.ppr_options
|
2002-11-30 19:30:09 +00:00
|
|
|
|| (neg_type == AHC_NEG_IF_NON_ASYNC
|
2002-08-31 06:41:37 +00:00
|
|
|
&& (tinfo->goal.offset != 0
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
|| tinfo->goal.width != MSG_EXT_WDTR_BUS_8_BIT
|
|
|
|
|| tinfo->goal.ppr_options != 0)))
|
2001-03-29 00:36:35 +00:00
|
|
|
tstate->auto_negotiate |= devinfo->target_mask;
|
1998-12-10 04:14:50 +00:00
|
|
|
else
|
2001-03-29 00:36:35 +00:00
|
|
|
tstate->auto_negotiate &= ~devinfo->target_mask;
|
1998-12-10 04:14:50 +00:00
|
|
|
|
2001-03-29 00:36:35 +00:00
|
|
|
return (auto_negotiate_orig != tstate->auto_negotiate);
|
1998-12-10 04:14:50 +00:00
|
|
|
}
|
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/*
|
2001-05-15 19:41:12 +00:00
|
|
|
* Update the user/goal/curr tables of synchronous negotiation
|
2000-09-16 20:02:28 +00:00
|
|
|
* parameters as well as, in the case of a current or active update,
|
|
|
|
* any data structures on the host controller. In the case of an
|
|
|
|
* active update, the specified target is currently talking to us on
|
|
|
|
* the bus, so the transfer parameter update must take effect
|
|
|
|
* immediately.
|
|
|
|
*/
|
|
|
|
void
|
1998-09-15 07:24:17 +00:00
|
|
|
ahc_set_syncrate(struct ahc_softc *ahc, struct ahc_devinfo *devinfo,
|
2000-09-16 20:02:28 +00:00
|
|
|
struct ahc_syncrate *syncrate, u_int period,
|
|
|
|
u_int offset, u_int ppr_options, u_int type, int paused)
|
1998-09-15 07:24:17 +00:00
|
|
|
{
|
1999-03-23 07:24:29 +00:00
|
|
|
struct ahc_initiator_tinfo *tinfo;
|
2001-03-29 00:36:35 +00:00
|
|
|
struct ahc_tmode_tstate *tstate;
|
1999-03-23 07:24:29 +00:00
|
|
|
u_int old_period;
|
|
|
|
u_int old_offset;
|
2000-10-05 04:24:14 +00:00
|
|
|
u_int old_ppr;
|
2001-03-29 00:36:35 +00:00
|
|
|
int active;
|
|
|
|
int update_needed;
|
|
|
|
|
|
|
|
active = (type & AHC_TRANS_ACTIVE) == AHC_TRANS_ACTIVE;
|
|
|
|
update_needed = 0;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
|
|
|
if (syncrate == NULL) {
|
|
|
|
period = 0;
|
|
|
|
offset = 0;
|
|
|
|
}
|
|
|
|
|
1999-03-05 23:35:48 +00:00
|
|
|
tinfo = ahc_fetch_transinfo(ahc, devinfo->channel, devinfo->our_scsiid,
|
|
|
|
devinfo->target, &tstate);
|
2001-02-21 20:50:36 +00:00
|
|
|
|
|
|
|
if ((type & AHC_TRANS_USER) != 0) {
|
|
|
|
tinfo->user.period = period;
|
|
|
|
tinfo->user.offset = offset;
|
|
|
|
tinfo->user.ppr_options = ppr_options;
|
|
|
|
}
|
|
|
|
|
|
|
|
if ((type & AHC_TRANS_GOAL) != 0) {
|
|
|
|
tinfo->goal.period = period;
|
|
|
|
tinfo->goal.offset = offset;
|
|
|
|
tinfo->goal.ppr_options = ppr_options;
|
|
|
|
}
|
|
|
|
|
2001-05-15 19:41:12 +00:00
|
|
|
old_period = tinfo->curr.period;
|
|
|
|
old_offset = tinfo->curr.offset;
|
|
|
|
old_ppr = tinfo->curr.ppr_options;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
|
|
|
if ((type & AHC_TRANS_CUR) != 0
|
2000-10-05 04:24:14 +00:00
|
|
|
&& (old_period != period
|
|
|
|
|| old_offset != offset
|
|
|
|
|| old_ppr != ppr_options)) {
|
1998-09-15 07:24:17 +00:00
|
|
|
u_int scsirate;
|
|
|
|
|
2001-03-29 00:36:35 +00:00
|
|
|
update_needed++;
|
1998-12-10 04:14:50 +00:00
|
|
|
scsirate = tinfo->scsirate;
|
1998-09-15 07:24:17 +00:00
|
|
|
if ((ahc->features & AHC_ULTRA2) != 0) {
|
|
|
|
|
2000-01-07 23:08:20 +00:00
|
|
|
scsirate &= ~(SXFR_ULTRA2|SINGLE_EDGE|ENABLE_CRC);
|
2000-07-18 20:12:14 +00:00
|
|
|
if (syncrate != NULL) {
|
|
|
|
scsirate |= syncrate->sxfr_u2;
|
|
|
|
if ((ppr_options & MSG_EXT_PPR_DT_REQ) != 0)
|
|
|
|
scsirate |= ENABLE_CRC;
|
|
|
|
else
|
|
|
|
scsirate |= SINGLE_EDGE;
|
|
|
|
}
|
1998-09-15 07:24:17 +00:00
|
|
|
} else {
|
|
|
|
|
|
|
|
scsirate &= ~(SXFR|SOFS);
|
|
|
|
/*
|
|
|
|
* Ensure Ultra mode is set properly for
|
|
|
|
* this target.
|
|
|
|
*/
|
1999-03-05 23:35:48 +00:00
|
|
|
tstate->ultraenb &= ~devinfo->target_mask;
|
1998-09-15 07:24:17 +00:00
|
|
|
if (syncrate != NULL) {
|
|
|
|
if (syncrate->sxfr & ULTRA_SXFR) {
|
1999-03-05 23:35:48 +00:00
|
|
|
tstate->ultraenb |=
|
|
|
|
devinfo->target_mask;
|
1998-09-15 07:24:17 +00:00
|
|
|
}
|
|
|
|
scsirate |= syncrate->sxfr & SXFR;
|
|
|
|
scsirate |= offset & SOFS;
|
|
|
|
}
|
1999-03-23 07:24:29 +00:00
|
|
|
if (active) {
|
1998-09-20 05:06:10 +00:00
|
|
|
u_int sxfrctl0;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
|
|
|
sxfrctl0 = ahc_inb(ahc, SXFRCTL0);
|
|
|
|
sxfrctl0 &= ~FAST20;
|
1999-03-05 23:35:48 +00:00
|
|
|
if (tstate->ultraenb & devinfo->target_mask)
|
1998-09-15 07:24:17 +00:00
|
|
|
sxfrctl0 |= FAST20;
|
|
|
|
ahc_outb(ahc, SXFRCTL0, sxfrctl0);
|
|
|
|
}
|
|
|
|
}
|
2000-09-16 20:02:28 +00:00
|
|
|
if (active) {
|
1998-09-15 07:24:17 +00:00
|
|
|
ahc_outb(ahc, SCSIRATE, scsirate);
|
2000-09-16 20:02:28 +00:00
|
|
|
if ((ahc->features & AHC_ULTRA2) != 0)
|
|
|
|
ahc_outb(ahc, SCSIOFFSET, offset);
|
|
|
|
}
|
1998-09-15 07:24:17 +00:00
|
|
|
|
1998-12-10 04:14:50 +00:00
|
|
|
tinfo->scsirate = scsirate;
|
2001-05-15 19:41:12 +00:00
|
|
|
tinfo->curr.period = period;
|
|
|
|
tinfo->curr.offset = offset;
|
|
|
|
tinfo->curr.ppr_options = ppr_options;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-22 22:18:05 +00:00
|
|
|
ahc_send_async(ahc, devinfo->channel, devinfo->target,
|
2001-05-15 19:41:12 +00:00
|
|
|
CAM_LUN_WILDCARD, AC_TRANSFER_NEG, NULL);
|
1998-09-15 07:24:17 +00:00
|
|
|
if (bootverbose) {
|
1998-12-10 04:14:50 +00:00
|
|
|
if (offset != 0) {
|
2000-07-18 20:12:14 +00:00
|
|
|
printf("%s: target %d synchronous at %sMHz%s, "
|
1998-09-15 07:24:17 +00:00
|
|
|
"offset = 0x%x\n", ahc_name(ahc),
|
2000-07-18 20:12:14 +00:00
|
|
|
devinfo->target, syncrate->rate,
|
|
|
|
(ppr_options & MSG_EXT_PPR_DT_REQ)
|
|
|
|
? " DT" : "", offset);
|
1998-09-15 07:24:17 +00:00
|
|
|
} else {
|
|
|
|
printf("%s: target %d using "
|
|
|
|
"asynchronous transfers\n",
|
|
|
|
ahc_name(ahc), devinfo->target);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2001-03-29 00:36:35 +00:00
|
|
|
update_needed += ahc_update_neg_request(ahc, devinfo, tstate,
|
2002-11-30 19:30:09 +00:00
|
|
|
tinfo, AHC_NEG_TO_GOAL);
|
2001-03-29 00:36:35 +00:00
|
|
|
|
|
|
|
if (update_needed)
|
|
|
|
ahc_update_pending_scbs(ahc);
|
1998-09-15 07:24:17 +00:00
|
|
|
}
|
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/*
|
2001-05-15 19:41:12 +00:00
|
|
|
* Update the user/goal/curr tables of wide negotiation
|
2000-09-16 20:02:28 +00:00
|
|
|
* parameters as well as, in the case of a current or active update,
|
|
|
|
* any data structures on the host controller. In the case of an
|
|
|
|
* active update, the specified target is currently talking to us on
|
|
|
|
* the bus, so the transfer parameter update must take effect
|
|
|
|
* immediately.
|
|
|
|
*/
|
|
|
|
void
|
1998-09-15 07:24:17 +00:00
|
|
|
ahc_set_width(struct ahc_softc *ahc, struct ahc_devinfo *devinfo,
|
2000-09-16 20:02:28 +00:00
|
|
|
u_int width, u_int type, int paused)
|
1998-09-15 07:24:17 +00:00
|
|
|
{
|
2001-03-29 00:36:35 +00:00
|
|
|
struct ahc_initiator_tinfo *tinfo;
|
|
|
|
struct ahc_tmode_tstate *tstate;
|
|
|
|
u_int oldwidth;
|
|
|
|
int active;
|
|
|
|
int update_needed;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2001-03-29 00:36:35 +00:00
|
|
|
active = (type & AHC_TRANS_ACTIVE) == AHC_TRANS_ACTIVE;
|
|
|
|
update_needed = 0;
|
1999-03-05 23:35:48 +00:00
|
|
|
tinfo = ahc_fetch_transinfo(ahc, devinfo->channel, devinfo->our_scsiid,
|
|
|
|
devinfo->target, &tstate);
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2001-02-21 20:50:36 +00:00
|
|
|
if ((type & AHC_TRANS_USER) != 0)
|
|
|
|
tinfo->user.width = width;
|
|
|
|
|
|
|
|
if ((type & AHC_TRANS_GOAL) != 0)
|
|
|
|
tinfo->goal.width = width;
|
|
|
|
|
2001-05-15 19:41:12 +00:00
|
|
|
oldwidth = tinfo->curr.width;
|
1998-09-15 07:24:17 +00:00
|
|
|
if ((type & AHC_TRANS_CUR) != 0 && oldwidth != width) {
|
1998-09-20 05:06:10 +00:00
|
|
|
u_int scsirate;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2001-03-29 00:36:35 +00:00
|
|
|
update_needed++;
|
1998-12-10 04:14:50 +00:00
|
|
|
scsirate = tinfo->scsirate;
|
1998-09-15 07:24:17 +00:00
|
|
|
scsirate &= ~WIDEXFER;
|
|
|
|
if (width == MSG_EXT_WDTR_BUS_16_BIT)
|
|
|
|
scsirate |= WIDEXFER;
|
|
|
|
|
1998-12-10 04:14:50 +00:00
|
|
|
tinfo->scsirate = scsirate;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
1999-03-23 07:24:29 +00:00
|
|
|
if (active)
|
1998-09-15 07:24:17 +00:00
|
|
|
ahc_outb(ahc, SCSIRATE, scsirate);
|
|
|
|
|
2001-05-15 19:41:12 +00:00
|
|
|
tinfo->curr.width = width;
|
1998-12-10 04:14:50 +00:00
|
|
|
|
2000-09-22 22:18:05 +00:00
|
|
|
ahc_send_async(ahc, devinfo->channel, devinfo->target,
|
2001-05-15 19:41:12 +00:00
|
|
|
CAM_LUN_WILDCARD, AC_TRANSFER_NEG, NULL);
|
1998-09-15 07:24:17 +00:00
|
|
|
if (bootverbose) {
|
|
|
|
printf("%s: target %d using %dbit transfers\n",
|
|
|
|
ahc_name(ahc), devinfo->target,
|
1998-12-10 04:14:50 +00:00
|
|
|
8 * (0x01 << width));
|
1998-09-15 07:24:17 +00:00
|
|
|
}
|
|
|
|
}
|
1998-12-10 04:14:50 +00:00
|
|
|
|
2001-03-29 00:36:35 +00:00
|
|
|
update_needed += ahc_update_neg_request(ahc, devinfo, tstate,
|
2002-11-30 19:30:09 +00:00
|
|
|
tinfo, AHC_NEG_TO_GOAL);
|
2001-03-29 00:36:35 +00:00
|
|
|
if (update_needed)
|
|
|
|
ahc_update_pending_scbs(ahc);
|
1998-09-15 07:24:17 +00:00
|
|
|
}
|
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/*
|
|
|
|
* Update the current state of tagged queuing for a given target.
|
|
|
|
*/
|
|
|
|
void
|
2001-05-15 19:41:12 +00:00
|
|
|
ahc_set_tags(struct ahc_softc *ahc, struct ahc_devinfo *devinfo,
|
|
|
|
ahc_queue_alg alg)
|
1999-03-05 23:35:48 +00:00
|
|
|
{
|
2001-05-15 19:41:12 +00:00
|
|
|
ahc_platform_set_tags(ahc, devinfo, alg);
|
|
|
|
ahc_send_async(ahc, devinfo->channel, devinfo->target,
|
|
|
|
devinfo->lun, AC_TRANSFER_NEG, &alg);
|
1999-03-05 23:35:48 +00:00
|
|
|
}
|
|
|
|
|
1998-09-15 07:24:17 +00:00
|
|
|
/*
|
2000-09-16 20:02:28 +00:00
|
|
|
* When the transfer settings for a connection change, update any
|
|
|
|
* in-transit SCBs to contain the new data so the hardware will
|
|
|
|
* be set correctly during future (re)selections.
|
1998-09-15 07:24:17 +00:00
|
|
|
*/
|
2000-09-16 20:02:28 +00:00
|
|
|
static void
|
2001-03-29 00:36:35 +00:00
|
|
|
ahc_update_pending_scbs(struct ahc_softc *ahc)
|
1998-09-15 07:24:17 +00:00
|
|
|
{
|
2000-09-16 20:02:28 +00:00
|
|
|
struct scb *pending_scb;
|
|
|
|
int pending_scb_count;
|
|
|
|
int i;
|
2001-04-01 00:00:09 +00:00
|
|
|
int paused;
|
2000-09-16 20:02:28 +00:00
|
|
|
u_int saved_scbptr;
|
1999-04-23 23:27:31 +00:00
|
|
|
|
1998-10-15 18:21:50 +00:00
|
|
|
/*
|
2000-09-16 20:02:28 +00:00
|
|
|
* Traverse the pending SCB list and ensure that all of the
|
|
|
|
* SCBs there have the proper settings.
|
1998-10-15 18:21:50 +00:00
|
|
|
*/
|
2000-09-16 20:02:28 +00:00
|
|
|
pending_scb_count = 0;
|
2000-10-08 03:37:52 +00:00
|
|
|
LIST_FOREACH(pending_scb, &ahc->pending_scbs, pending_links) {
|
2000-09-16 20:02:28 +00:00
|
|
|
struct ahc_devinfo devinfo;
|
|
|
|
struct hardware_scb *pending_hscb;
|
|
|
|
struct ahc_initiator_tinfo *tinfo;
|
2001-03-29 00:36:35 +00:00
|
|
|
struct ahc_tmode_tstate *tstate;
|
2001-07-18 21:39:48 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_scb_devinfo(ahc, &devinfo, pending_scb);
|
|
|
|
tinfo = ahc_fetch_transinfo(ahc, devinfo.channel,
|
|
|
|
devinfo.our_scsiid,
|
|
|
|
devinfo.target, &tstate);
|
|
|
|
pending_hscb = pending_scb->hscb;
|
|
|
|
pending_hscb->control &= ~ULTRAENB;
|
|
|
|
if ((tstate->ultraenb & devinfo.target_mask) != 0)
|
|
|
|
pending_hscb->control |= ULTRAENB;
|
|
|
|
pending_hscb->scsirate = tinfo->scsirate;
|
2001-05-15 19:41:12 +00:00
|
|
|
pending_hscb->scsioffset = tinfo->curr.offset;
|
2001-03-29 00:36:35 +00:00
|
|
|
if ((tstate->auto_negotiate & devinfo.target_mask) == 0
|
|
|
|
&& (pending_scb->flags & SCB_AUTO_NEGOTIATE) != 0) {
|
|
|
|
pending_scb->flags &= ~SCB_AUTO_NEGOTIATE;
|
|
|
|
pending_hscb->control &= ~MK_MESSAGE;
|
|
|
|
}
|
2001-07-18 21:39:48 +00:00
|
|
|
ahc_sync_scb(ahc, pending_scb,
|
|
|
|
BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
|
2000-09-16 20:02:28 +00:00
|
|
|
pending_scb_count++;
|
1998-10-15 18:21:50 +00:00
|
|
|
}
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
if (pending_scb_count == 0)
|
|
|
|
return;
|
1998-10-15 18:21:50 +00:00
|
|
|
|
2001-04-01 00:00:09 +00:00
|
|
|
if (ahc_is_paused(ahc)) {
|
|
|
|
paused = 1;
|
|
|
|
} else {
|
|
|
|
paused = 0;
|
|
|
|
ahc_pause(ahc);
|
|
|
|
}
|
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
saved_scbptr = ahc_inb(ahc, SCBPTR);
|
|
|
|
/* Ensure that the hscbs down on the card match the new information */
|
|
|
|
for (i = 0; i < ahc->scb_data->maxhscbs; i++) {
|
2000-10-08 03:37:52 +00:00
|
|
|
struct hardware_scb *pending_hscb;
|
|
|
|
u_int control;
|
|
|
|
u_int scb_tag;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_outb(ahc, SCBPTR, i);
|
|
|
|
scb_tag = ahc_inb(ahc, SCB_TAG);
|
2000-10-08 03:37:52 +00:00
|
|
|
pending_scb = ahc_lookup_scb(ahc, scb_tag);
|
|
|
|
if (pending_scb == NULL)
|
|
|
|
continue;
|
|
|
|
|
|
|
|
pending_hscb = pending_scb->hscb;
|
|
|
|
control = ahc_inb(ahc, SCB_CONTROL);
|
2001-03-29 00:36:35 +00:00
|
|
|
control &= ~(ULTRAENB|MK_MESSAGE);
|
|
|
|
control |= pending_hscb->control & (ULTRAENB|MK_MESSAGE);
|
2000-10-08 03:37:52 +00:00
|
|
|
ahc_outb(ahc, SCB_CONTROL, control);
|
|
|
|
ahc_outb(ahc, SCB_SCSIRATE, pending_hscb->scsirate);
|
|
|
|
ahc_outb(ahc, SCB_SCSIOFFSET, pending_hscb->scsioffset);
|
1999-03-05 23:35:48 +00:00
|
|
|
}
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_outb(ahc, SCBPTR, saved_scbptr);
|
2001-04-01 00:00:09 +00:00
|
|
|
|
|
|
|
if (paused == 0)
|
|
|
|
ahc_unpause(ahc);
|
1999-03-05 23:35:48 +00:00
|
|
|
}
|
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/**************************** Pathing Information *****************************/
|
1998-09-15 07:24:17 +00:00
|
|
|
static void
|
|
|
|
ahc_fetch_devinfo(struct ahc_softc *ahc, struct ahc_devinfo *devinfo)
|
|
|
|
{
|
2000-07-18 20:12:14 +00:00
|
|
|
u_int saved_scsiid;
|
1999-03-05 23:35:48 +00:00
|
|
|
role_t role;
|
|
|
|
int our_id;
|
1998-12-10 04:14:50 +00:00
|
|
|
|
|
|
|
if (ahc_inb(ahc, SSTAT0) & TARGET)
|
|
|
|
role = ROLE_TARGET;
|
|
|
|
else
|
|
|
|
role = ROLE_INITIATOR;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
1999-03-05 23:35:48 +00:00
|
|
|
if (role == ROLE_TARGET
|
|
|
|
&& (ahc->features & AHC_MULTI_TID) != 0
|
2002-08-31 06:41:37 +00:00
|
|
|
&& (ahc_inb(ahc, SEQ_FLAGS)
|
|
|
|
& (CMDPHASE_PENDING|TARG_CMD_PENDING|NO_DISCONNECT)) != 0) {
|
1999-03-05 23:35:48 +00:00
|
|
|
/* We were selected, so pull our id from TARGIDIN */
|
|
|
|
our_id = ahc_inb(ahc, TARGIDIN) & OID;
|
|
|
|
} else if ((ahc->features & AHC_ULTRA2) != 0)
|
|
|
|
our_id = ahc_inb(ahc, SCSIID_ULTRA2) & OID;
|
|
|
|
else
|
|
|
|
our_id = ahc_inb(ahc, SCSIID) & OID;
|
|
|
|
|
2000-07-18 20:12:14 +00:00
|
|
|
saved_scsiid = ahc_inb(ahc, SAVED_SCSIID);
|
|
|
|
ahc_compile_devinfo(devinfo,
|
|
|
|
our_id,
|
|
|
|
SCSIID_TARGET(ahc, saved_scsiid),
|
|
|
|
ahc_inb(ahc, SAVED_LUN),
|
|
|
|
SCSIID_CHANNEL(ahc, saved_scsiid),
|
1998-12-10 04:14:50 +00:00
|
|
|
role);
|
1998-09-15 07:24:17 +00:00
|
|
|
}
|
|
|
|
|
This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
|
|
|
struct ahc_phase_table_entry*
|
|
|
|
ahc_lookup_phase_entry(int phase)
|
|
|
|
{
|
|
|
|
struct ahc_phase_table_entry *entry;
|
2001-03-19 04:40:35 +00:00
|
|
|
struct ahc_phase_table_entry *last_entry;
|
This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* num_phases doesn't include the default entry which
|
|
|
|
* will be returned if the phase doesn't match.
|
|
|
|
*/
|
2001-03-19 04:40:35 +00:00
|
|
|
last_entry = &ahc_phase_table[num_phases];
|
|
|
|
for (entry = ahc_phase_table; entry < last_entry; entry++) {
|
This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
|
|
|
if (phase == entry->phase)
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
return (entry);
|
|
|
|
}
|
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
void
|
1999-03-05 23:35:48 +00:00
|
|
|
ahc_compile_devinfo(struct ahc_devinfo *devinfo, u_int our_id, u_int target,
|
|
|
|
u_int lun, char channel, role_t role)
|
1998-09-15 07:24:17 +00:00
|
|
|
{
|
1999-03-05 23:35:48 +00:00
|
|
|
devinfo->our_scsiid = our_id;
|
1998-09-15 07:24:17 +00:00
|
|
|
devinfo->target = target;
|
1998-12-10 04:14:50 +00:00
|
|
|
devinfo->lun = lun;
|
1998-09-15 07:24:17 +00:00
|
|
|
devinfo->target_offset = target;
|
|
|
|
devinfo->channel = channel;
|
1998-12-10 04:14:50 +00:00
|
|
|
devinfo->role = role;
|
1998-09-15 07:24:17 +00:00
|
|
|
if (channel == 'B')
|
|
|
|
devinfo->target_offset += 8;
|
|
|
|
devinfo->target_mask = (0x01 << devinfo->target_offset);
|
|
|
|
}
|
|
|
|
|
2002-11-30 19:30:09 +00:00
|
|
|
void
|
2002-08-31 06:41:37 +00:00
|
|
|
ahc_print_devinfo(struct ahc_softc *ahc, struct ahc_devinfo *devinfo)
|
|
|
|
{
|
2002-11-30 19:30:09 +00:00
|
|
|
printf("%s:%c:%d:%d: ", ahc_name(ahc), devinfo->channel,
|
2002-08-31 06:41:37 +00:00
|
|
|
devinfo->target, devinfo->lun);
|
|
|
|
}
|
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
static void
|
|
|
|
ahc_scb_devinfo(struct ahc_softc *ahc, struct ahc_devinfo *devinfo,
|
|
|
|
struct scb *scb)
|
1998-09-15 07:24:17 +00:00
|
|
|
{
|
2000-09-16 20:02:28 +00:00
|
|
|
role_t role;
|
|
|
|
int our_id;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
our_id = SCSIID_OUR_ID(scb->hscb->scsiid);
|
|
|
|
role = ROLE_INITIATOR;
|
2002-11-30 19:30:09 +00:00
|
|
|
if ((scb->flags & SCB_TARGET_SCB) != 0)
|
2000-09-16 20:02:28 +00:00
|
|
|
role = ROLE_TARGET;
|
|
|
|
ahc_compile_devinfo(devinfo, our_id, SCB_GET_TARGET(ahc, scb),
|
|
|
|
SCB_GET_LUN(scb), SCB_GET_CHANNEL(ahc, scb), role);
|
|
|
|
}
|
1998-09-15 07:24:17 +00:00
|
|
|
|
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/************************ Message Phase Processing ****************************/
|
2001-05-15 19:41:12 +00:00
|
|
|
static void
|
|
|
|
ahc_assert_atn(struct ahc_softc *ahc)
|
|
|
|
{
|
|
|
|
u_int scsisigo;
|
|
|
|
|
|
|
|
scsisigo = ATNO;
|
|
|
|
if ((ahc->features & AHC_DT) == 0)
|
|
|
|
scsisigo |= ahc_inb(ahc, SCSISIGI);
|
|
|
|
ahc_outb(ahc, SCSISIGO, scsisigo);
|
|
|
|
}
|
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/*
|
|
|
|
* When an initiator transaction with the MK_MESSAGE flag either reconnects
|
|
|
|
* or enters the initial message out phase, we are interrupted. Fill our
|
|
|
|
* outgoing message buffer with the appropriate message and beging handing
|
|
|
|
* the message phase(s) manually.
|
|
|
|
*/
|
|
|
|
static void
|
|
|
|
ahc_setup_initiator_msgout(struct ahc_softc *ahc, struct ahc_devinfo *devinfo,
|
|
|
|
struct scb *scb)
|
|
|
|
{
|
1998-09-15 07:24:17 +00:00
|
|
|
/*
|
2000-09-16 20:02:28 +00:00
|
|
|
* To facilitate adding multiple messages together,
|
|
|
|
* each routine should increment the index and len
|
|
|
|
* variables instead of setting them explicitly.
|
1998-09-15 07:24:17 +00:00
|
|
|
*/
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc->msgout_index = 0;
|
|
|
|
ahc->msgout_len = 0;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
if ((scb->flags & SCB_DEVICE_RESET) == 0
|
|
|
|
&& ahc_inb(ahc, MSG_OUT) == MSG_IDENTIFYFLAG) {
|
|
|
|
u_int identify_msg;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
identify_msg = MSG_IDENTIFYFLAG | SCB_GET_LUN(scb);
|
|
|
|
if ((scb->hscb->control & DISCENB) != 0)
|
|
|
|
identify_msg |= MSG_IDENTIFY_DISCFLAG;
|
|
|
|
ahc->msgout_buf[ahc->msgout_index++] = identify_msg;
|
|
|
|
ahc->msgout_len++;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
if ((scb->hscb->control & TAG_ENB) != 0) {
|
|
|
|
ahc->msgout_buf[ahc->msgout_index++] =
|
|
|
|
scb->hscb->control & (TAG_ENB|SCB_TAG_TYPE);
|
|
|
|
ahc->msgout_buf[ahc->msgout_index++] = scb->hscb->tag;
|
|
|
|
ahc->msgout_len += 2;
|
|
|
|
}
|
1998-09-15 07:24:17 +00:00
|
|
|
}
|
2000-07-18 20:12:14 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
if (scb->flags & SCB_DEVICE_RESET) {
|
|
|
|
ahc->msgout_buf[ahc->msgout_index++] = MSG_BUS_DEV_RESET;
|
|
|
|
ahc->msgout_len++;
|
|
|
|
ahc_print_path(ahc, scb);
|
|
|
|
printf("Bus Device Reset Message Sent\n");
|
aic7xxx.c:
Style nits.
Make sure that our selection hardware is disabled
as soon as possible after detecting a busfree and
even go so far as to disable the selection hardware
in advance of an event that will cause a busfree
(ABORT or BUS DEVICE RESET message). The concern
is that the selection hardware will select a target
for which, after processing the bus free, there
will be no commands pending. The sequencer idle
loop will re-enable the selection should it still be
necessary.
In ahc_handle_scsiint(), clear SSTAT0 events several
PCI transactions (most notably reads) prior to clearing
SCSIINT. The newer chips seem to take a bit of time to
see the change which can make the clearing of SCSIINT
ineffective.
Don't bother panicing at the end of ahc_handle_scsiint().
Getting to the final else just means we lost the race
with clearing SCSIINT.
In ahc_free(), handle init-level 0. This can happen when we
fail the attach for RAID devices. While I'm here, also kill
the parent dma tag.
In ahc_match_scb(), consider initiator ccbs to be any
that are not from the target mode group. This fixes
a bug where an external target reset CCB was not getting
cleaned up by the reset code.
Don't bother freezing a ccb in any of our "abort" routines
when the status is set to CAM_REQ_CMP. This can happen
for a target reset ccb.
aic7xxx.reg:
Reserve space for a completion queue. This will be used
to enhance performance in the near future.
aic7xxx.seq:
Remove an optimization for the 7890 autoflush bug that
turned out to allow, in rare cases, some data to get
lost.
Implement a simpler, faster, fix for the PCI_2_1 retry
bug that hangs the sequencer on an SCB dma for certain chips.
Test against SAVED_SCSIID rather than SELID during target
reselections. This is how we always did it in the past,
but the code was modified while trying to work around an
issue with the 7895. SAVED_SCSIID takes into account
twin channel adapters such as the 2742T, whereas SELID
does not have the channel bit. This caused invalid
selection warnings and other strangeness on these cards.
aic7xxx_pci.c
Use the correct mask for checking the generic aic7892
entry.
2001-02-10 18:04:27 +00:00
|
|
|
/*
|
|
|
|
* Clear our selection hardware in advance of
|
|
|
|
* the busfree. We may have an entry in the waiting
|
|
|
|
* Q for this target, and we don't want to go about
|
|
|
|
* selecting while we handle the busfree and blow it
|
|
|
|
* away.
|
|
|
|
*/
|
|
|
|
ahc_outb(ahc, SCSISEQ, (ahc_inb(ahc, SCSISEQ) & ~ENSELO));
|
2000-09-16 20:02:28 +00:00
|
|
|
} else if ((scb->flags & SCB_ABORT) != 0) {
|
|
|
|
if ((scb->hscb->control & TAG_ENB) != 0)
|
|
|
|
ahc->msgout_buf[ahc->msgout_index++] = MSG_ABORT_TAG;
|
|
|
|
else
|
|
|
|
ahc->msgout_buf[ahc->msgout_index++] = MSG_ABORT;
|
|
|
|
ahc->msgout_len++;
|
|
|
|
ahc_print_path(ahc, scb);
|
aic7xxx.c:
Style nits.
Make sure that our selection hardware is disabled
as soon as possible after detecting a busfree and
even go so far as to disable the selection hardware
in advance of an event that will cause a busfree
(ABORT or BUS DEVICE RESET message). The concern
is that the selection hardware will select a target
for which, after processing the bus free, there
will be no commands pending. The sequencer idle
loop will re-enable the selection should it still be
necessary.
In ahc_handle_scsiint(), clear SSTAT0 events several
PCI transactions (most notably reads) prior to clearing
SCSIINT. The newer chips seem to take a bit of time to
see the change which can make the clearing of SCSIINT
ineffective.
Don't bother panicing at the end of ahc_handle_scsiint().
Getting to the final else just means we lost the race
with clearing SCSIINT.
In ahc_free(), handle init-level 0. This can happen when we
fail the attach for RAID devices. While I'm here, also kill
the parent dma tag.
In ahc_match_scb(), consider initiator ccbs to be any
that are not from the target mode group. This fixes
a bug where an external target reset CCB was not getting
cleaned up by the reset code.
Don't bother freezing a ccb in any of our "abort" routines
when the status is set to CAM_REQ_CMP. This can happen
for a target reset ccb.
aic7xxx.reg:
Reserve space for a completion queue. This will be used
to enhance performance in the near future.
aic7xxx.seq:
Remove an optimization for the 7890 autoflush bug that
turned out to allow, in rare cases, some data to get
lost.
Implement a simpler, faster, fix for the PCI_2_1 retry
bug that hangs the sequencer on an SCB dma for certain chips.
Test against SAVED_SCSIID rather than SELID during target
reselections. This is how we always did it in the past,
but the code was modified while trying to work around an
issue with the 7895. SAVED_SCSIID takes into account
twin channel adapters such as the 2742T, whereas SELID
does not have the channel bit. This caused invalid
selection warnings and other strangeness on these cards.
aic7xxx_pci.c
Use the correct mask for checking the generic aic7892
entry.
2001-02-10 18:04:27 +00:00
|
|
|
printf("Abort%s Message Sent\n",
|
|
|
|
(scb->hscb->control & TAG_ENB) != 0 ? " Tag" : "");
|
|
|
|
/*
|
|
|
|
* Clear our selection hardware in advance of
|
|
|
|
* the busfree. We may have an entry in the waiting
|
|
|
|
* Q for this target, and we don't want to go about
|
|
|
|
* selecting while we handle the busfree and blow it
|
|
|
|
* away.
|
|
|
|
*/
|
|
|
|
ahc_outb(ahc, SCSISEQ, (ahc_inb(ahc, SCSISEQ) & ~ENSELO));
|
2001-03-29 00:36:35 +00:00
|
|
|
} else if ((scb->flags & (SCB_AUTO_NEGOTIATE|SCB_NEGOTIATE)) != 0) {
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_build_transfer_msg(ahc, devinfo);
|
|
|
|
} else {
|
|
|
|
printf("ahc_intr: AWAITING_MSG for an SCB that "
|
|
|
|
"does not have a waiting message\n");
|
|
|
|
printf("SCSIID = %x, target_mask = %x\n", scb->hscb->scsiid,
|
|
|
|
devinfo->target_mask);
|
|
|
|
panic("SCB = %d, SCB Control = %x, MSG_OUT = %x "
|
|
|
|
"SCB flags = %x", scb->hscb->tag, scb->hscb->control,
|
|
|
|
ahc_inb(ahc, MSG_OUT), scb->flags);
|
1999-03-05 23:35:48 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
2000-09-16 20:02:28 +00:00
|
|
|
* Clear the MK_MESSAGE flag from the SCB so we aren't
|
|
|
|
* asked to send this message again.
|
1999-03-05 23:35:48 +00:00
|
|
|
*/
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_outb(ahc, SCB_CONTROL, ahc_inb(ahc, SCB_CONTROL) & ~MK_MESSAGE);
|
2001-03-29 00:36:35 +00:00
|
|
|
scb->hscb->control &= ~MK_MESSAGE;
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc->msgout_index = 0;
|
|
|
|
ahc->msg_type = MSG_TYPE_INITIATOR_MSGOUT;
|
1999-03-05 23:35:48 +00:00
|
|
|
}
|
ahc_eisa.c:
ahc_pci.c:
Add detach support.
Make use of soft allocated on our behalf by newbus.
For PCI devices, disable the mapping type we aren't
using for extra protection from rogue code.
aic7xxx_93cx6.c:
aic7xxx_93cx6.h:
Sync perforce IDs.
aic7xxx_freebsd.c:
Capture the eventhandle returned by EVENTHANDER_REGISTER
so we can kill the handler off during detach.
Use AHC_* constants instead of hard coded numbers in a
few more places.
Test PPR option state when deciding to "really" negotiate
when the CAM_NEGOTIATE flag is passed in a CCB.
Make use of core "ahc_pause_and_flushwork" routine in our
timeout handler rather than re-inventing this code.
Cleanup all of our resources (really!) in ahc_platform_free().
We should be all set to become a module now.
Implement the core ahc_detach() routine shared by all of
the FreeBSD front-ends.
aic7xxx_freebsd.h:
Softc storage for our event handler.
Null implementation for the ahc_platform_flushwork() OSM
callback. FreeBSD doesn't need this as XPT callbacks are
safe from all contexts and are done directly in ahc_done().
aic7xxx_inline.h:
Implement new lazy interrupt scheme. To avoid an extra
PCI bus read, we first check our completion queues to
see if any work has completed. If work is available, we
assume that this is the source of the interrupt and skip
reading INTSTAT. Any remaining interrupt status will be
cleared by a second call to the interrupt handler should
the interrupt line still be asserted. This drops the
interrupt handler down to a single PCI bus read in the
common case of I/O completion. This is the same overhead
as in the not so distant past, but the extra sanity of
perforning a PCI read after clearing the command complete
interrupt and before running the completion queue to avoid
missing command complete interrupts added a cycle.
aic7xxx.c:
During initialization, be sure to initialize all scratch
ram locations before they are read to avoid parity errors.
In this case, we use a new function, ahc_unbusy_tcl() to
initialize the scratch ram busy target table.
Replace instances of ahc_index_busy_tcl() used to unbusy
a tcl without looking at the old value with ahc_unbusy_tcl().
Modify ahc_sent_msg so that it can find single byte messages.
ahc_sent_msg is now used to determine if a transfer negotiation
attempt resulted in a bus free.
Be more careful in filtering out only the SCSI interrupts
of interest in ahc_handle_scsiint.
Rearrange interrupt clearing code to ensure that at least
one PCI transaction occurrs after hitting CLRSINT1 and
writting to CLRINT. CLRSINT1 writes take a bit to
take effect, and the re-arrangement provides sufficient
delay to ensure the write to CLRINT is effective. The
old code might report a spurious interrupt on some "fast"
chipsets.
export ahc-update_target_msg_request for use by OSM code.
If a target does not respond to our ATN request, clear
it once we move to a non-message phase. This avoids
sending a MSG_NOOP in some later message out phase.
Use max lun and max target constants instead of
hard-coded values.
Use softc storage built into our device_t under FreeBSD.
Fix a bug in ahc_free() that caused us to delete
resources that were not allocated.
Clean up any tstate/lstate info in ahc_free().
Clear the powerdown state in ahc_reset() so that
registers can be accessed.
Add a preliminary function for pausing the chip and
processing any posted work.
Add a preliminary suspend and resume functions.
aic7xxx.h:
Limit the number of supported luns to 64. We don't
support information unit transfers, so this is the
maximum that makes sense for these chips.
Add a new flag AHC_ALL_INTERRUPTS that forces the
processing of all interrupt state in a single invokation
of ahc_intr(). When the flag is not set, we use the
lazy interrupt handling scheme.
Add data structures to store controller state while
we are suspended.
Use constants instead of hard coded values where appropriate.
Correct some harmless "unsigned/signed" conflicts.
aic7xxx.seq:
Only perform the SCSIBUSL fix on ULTRA2 or newer controllers.
Older controllers seem to be confused by this.
In target mode, ignore PHASEMIS during data phases.
This bit seems to be flakey on U160 controllers acting
in target mode.
aic7xxx_pci.c:
Add support for the 29160C CPCI adapter.
Add definitions for subvendor ID information
available for devices with the "9005" vendor id.
We currently use this information to determine
if a multi-function device doesn't have the second
channel hooked up on a board.
Add rudimentary power mode code so we can put the
controller into the D0 state. In the future this
will be an OSM callback so that in FreeBSD we don't
duplicate functionality provided by the PCI code.
The powerstate code was added after I'd completed
my regression tests on this code.
Only capture "left over BIOS state" if the POWRDN
setting is not set in HCNTRL.
In target mode, don't bother sending incremental
CRC data.
2000-12-20 01:11:37 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/*
|
|
|
|
* Build an appropriate transfer negotiation message for the
|
|
|
|
* currently active target.
|
|
|
|
*/
|
1999-03-05 23:35:48 +00:00
|
|
|
static void
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_build_transfer_msg(struct ahc_softc *ahc, struct ahc_devinfo *devinfo)
|
1999-03-05 23:35:48 +00:00
|
|
|
{
|
2000-09-16 20:02:28 +00:00
|
|
|
/*
|
|
|
|
* We need to initiate transfer negotiations.
|
|
|
|
* If our current and goal settings are identical,
|
|
|
|
* we want to renegotiate due to a check condition.
|
|
|
|
*/
|
|
|
|
struct ahc_initiator_tinfo *tinfo;
|
2001-03-29 00:36:35 +00:00
|
|
|
struct ahc_tmode_tstate *tstate;
|
2000-09-16 20:02:28 +00:00
|
|
|
struct ahc_syncrate *rate;
|
|
|
|
int dowide;
|
|
|
|
int dosync;
|
|
|
|
int doppr;
|
|
|
|
u_int period;
|
|
|
|
u_int ppr_options;
|
|
|
|
u_int offset;
|
1999-03-05 23:35:48 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
tinfo = ahc_fetch_transinfo(ahc, devinfo->channel, devinfo->our_scsiid,
|
|
|
|
devinfo->target, &tstate);
|
2001-05-15 19:41:12 +00:00
|
|
|
/*
|
|
|
|
* Filter our period based on the current connection.
|
|
|
|
* If we can't perform DT transfers on this segment (not in LVD
|
|
|
|
* mode for instance), then our decision to issue a PPR message
|
|
|
|
* may change.
|
|
|
|
*/
|
|
|
|
period = tinfo->goal.period;
|
|
|
|
ppr_options = tinfo->goal.ppr_options;
|
2001-07-18 21:39:48 +00:00
|
|
|
/* Target initiated PPR is not allowed in the SCSI spec */
|
|
|
|
if (devinfo->role == ROLE_TARGET)
|
|
|
|
ppr_options = 0;
|
2001-05-15 19:41:12 +00:00
|
|
|
rate = ahc_devlimited_syncrate(ahc, tinfo, &period,
|
|
|
|
&ppr_options, devinfo->role);
|
|
|
|
dowide = tinfo->curr.width != tinfo->goal.width;
|
|
|
|
dosync = tinfo->curr.period != period;
|
2002-11-30 19:30:09 +00:00
|
|
|
/*
|
|
|
|
* Only use PPR if we have options that need it, even if the device
|
|
|
|
* claims to support it. There might be an expander in the way
|
|
|
|
* that doesn't.
|
|
|
|
*/
|
|
|
|
doppr = ppr_options != 0;
|
2000-09-16 20:02:28 +00:00
|
|
|
|
|
|
|
if (!dowide && !dosync && !doppr) {
|
|
|
|
dowide = tinfo->goal.width != MSG_EXT_WDTR_BUS_8_BIT;
|
2002-08-31 06:41:37 +00:00
|
|
|
dosync = tinfo->goal.offset != 0;
|
2000-09-16 20:02:28 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
if (!dowide && !dosync && !doppr) {
|
2002-11-30 19:30:09 +00:00
|
|
|
/*
|
|
|
|
* Force async with a WDTR message if we have a wide bus,
|
|
|
|
* or just issue an SDTR with a 0 offset.
|
|
|
|
*/
|
|
|
|
if ((ahc->features & AHC_WIDE) != 0)
|
|
|
|
dowide = 1;
|
|
|
|
else
|
|
|
|
dosync = 1;
|
|
|
|
|
|
|
|
if (bootverbose) {
|
|
|
|
ahc_print_devinfo(ahc, devinfo);
|
|
|
|
printf("Ensuring async\n");
|
|
|
|
}
|
2000-09-16 20:02:28 +00:00
|
|
|
}
|
|
|
|
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
/* Target initiated PPR is not allowed in the SCSI spec */
|
|
|
|
if (devinfo->role == ROLE_TARGET)
|
2002-11-30 19:30:09 +00:00
|
|
|
doppr = 0;
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
|
2000-09-22 22:18:05 +00:00
|
|
|
/*
|
|
|
|
* Both the PPR message and SDTR message require the
|
|
|
|
* goal syncrate to be limited to what the target device
|
|
|
|
* is capable of handling (based on whether an LVD->SE
|
|
|
|
* expander is on the bus), so combine these two cases.
|
|
|
|
* Regardless, guarantee that if we are using WDTR and SDTR
|
|
|
|
* messages that WDTR comes first.
|
|
|
|
*/
|
2002-11-30 19:30:09 +00:00
|
|
|
if (doppr || (dosync && !dowide)) {
|
2000-09-16 20:02:28 +00:00
|
|
|
|
|
|
|
offset = tinfo->goal.offset;
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
ahc_validate_offset(ahc, tinfo, rate, &offset,
|
2002-11-30 19:30:09 +00:00
|
|
|
doppr ? tinfo->goal.width
|
|
|
|
: tinfo->curr.width,
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
devinfo->role);
|
2002-11-30 19:30:09 +00:00
|
|
|
if (doppr) {
|
2000-10-05 04:24:14 +00:00
|
|
|
ahc_construct_ppr(ahc, devinfo, period, offset,
|
2000-09-22 22:18:05 +00:00
|
|
|
tinfo->goal.width, ppr_options);
|
2000-10-05 04:24:14 +00:00
|
|
|
} else {
|
|
|
|
ahc_construct_sdtr(ahc, devinfo, period, offset);
|
|
|
|
}
|
2000-09-22 22:18:05 +00:00
|
|
|
} else {
|
2000-10-05 04:24:14 +00:00
|
|
|
ahc_construct_wdtr(ahc, devinfo, tinfo->goal.width);
|
2000-09-16 20:02:28 +00:00
|
|
|
}
|
1999-03-05 23:35:48 +00:00
|
|
|
}
|
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/*
|
2000-09-22 22:18:05 +00:00
|
|
|
* Build a synchronous negotiation message in our message
|
2000-09-16 20:02:28 +00:00
|
|
|
* buffer based on the input parameters.
|
|
|
|
*/
|
1998-09-15 07:24:17 +00:00
|
|
|
static void
|
2000-10-05 04:24:14 +00:00
|
|
|
ahc_construct_sdtr(struct ahc_softc *ahc, struct ahc_devinfo *devinfo,
|
|
|
|
u_int period, u_int offset)
|
1999-01-14 06:14:15 +00:00
|
|
|
{
|
2002-11-30 19:30:09 +00:00
|
|
|
if (offset == 0)
|
|
|
|
period = AHC_ASYNC_XFER_PERIOD;
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc->msgout_buf[ahc->msgout_index++] = MSG_EXTENDED;
|
|
|
|
ahc->msgout_buf[ahc->msgout_index++] = MSG_EXT_SDTR_LEN;
|
|
|
|
ahc->msgout_buf[ahc->msgout_index++] = MSG_EXT_SDTR;
|
|
|
|
ahc->msgout_buf[ahc->msgout_index++] = period;
|
|
|
|
ahc->msgout_buf[ahc->msgout_index++] = offset;
|
|
|
|
ahc->msgout_len += 5;
|
2000-10-05 04:24:14 +00:00
|
|
|
if (bootverbose) {
|
|
|
|
printf("(%s:%c:%d:%d): Sending SDTR period %x, offset %x\n",
|
|
|
|
ahc_name(ahc), devinfo->channel, devinfo->target,
|
|
|
|
devinfo->lun, period, offset);
|
|
|
|
}
|
2000-09-16 20:02:28 +00:00
|
|
|
}
|
1999-01-14 06:14:15 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/*
|
2002-04-24 16:58:51 +00:00
|
|
|
* Build a wide negotiation message in our message
|
2000-09-16 20:02:28 +00:00
|
|
|
* buffer based on the input parameters.
|
|
|
|
*/
|
|
|
|
static void
|
2000-10-05 04:24:14 +00:00
|
|
|
ahc_construct_wdtr(struct ahc_softc *ahc, struct ahc_devinfo *devinfo,
|
|
|
|
u_int bus_width)
|
2000-09-16 20:02:28 +00:00
|
|
|
{
|
|
|
|
ahc->msgout_buf[ahc->msgout_index++] = MSG_EXTENDED;
|
|
|
|
ahc->msgout_buf[ahc->msgout_index++] = MSG_EXT_WDTR_LEN;
|
|
|
|
ahc->msgout_buf[ahc->msgout_index++] = MSG_EXT_WDTR;
|
|
|
|
ahc->msgout_buf[ahc->msgout_index++] = bus_width;
|
|
|
|
ahc->msgout_len += 4;
|
2000-10-05 04:24:14 +00:00
|
|
|
if (bootverbose) {
|
|
|
|
printf("(%s:%c:%d:%d): Sending WDTR %x\n",
|
|
|
|
ahc_name(ahc), devinfo->channel, devinfo->target,
|
|
|
|
devinfo->lun, bus_width);
|
|
|
|
}
|
2000-09-16 20:02:28 +00:00
|
|
|
}
|
1999-01-14 06:14:15 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/*
|
|
|
|
* Build a parallel protocol request message in our message
|
|
|
|
* buffer based on the input parameters.
|
|
|
|
*/
|
|
|
|
static void
|
2000-10-05 04:24:14 +00:00
|
|
|
ahc_construct_ppr(struct ahc_softc *ahc, struct ahc_devinfo *devinfo,
|
|
|
|
u_int period, u_int offset, u_int bus_width,
|
|
|
|
u_int ppr_options)
|
2000-09-16 20:02:28 +00:00
|
|
|
{
|
2002-11-30 19:30:09 +00:00
|
|
|
if (offset == 0)
|
|
|
|
period = AHC_ASYNC_XFER_PERIOD;
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc->msgout_buf[ahc->msgout_index++] = MSG_EXTENDED;
|
|
|
|
ahc->msgout_buf[ahc->msgout_index++] = MSG_EXT_PPR_LEN;
|
|
|
|
ahc->msgout_buf[ahc->msgout_index++] = MSG_EXT_PPR;
|
|
|
|
ahc->msgout_buf[ahc->msgout_index++] = period;
|
|
|
|
ahc->msgout_buf[ahc->msgout_index++] = 0;
|
|
|
|
ahc->msgout_buf[ahc->msgout_index++] = offset;
|
|
|
|
ahc->msgout_buf[ahc->msgout_index++] = bus_width;
|
|
|
|
ahc->msgout_buf[ahc->msgout_index++] = ppr_options;
|
|
|
|
ahc->msgout_len += 8;
|
2000-10-05 04:24:14 +00:00
|
|
|
if (bootverbose) {
|
|
|
|
printf("(%s:%c:%d:%d): Sending PPR bus_width %x, period %x, "
|
|
|
|
"offset %x, ppr_options %x\n", ahc_name(ahc),
|
|
|
|
devinfo->channel, devinfo->target, devinfo->lun,
|
|
|
|
bus_width, period, offset, ppr_options);
|
|
|
|
}
|
2000-09-16 20:02:28 +00:00
|
|
|
}
|
1999-03-05 23:35:48 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/*
|
|
|
|
* Clear any active message state.
|
|
|
|
*/
|
|
|
|
static void
|
|
|
|
ahc_clear_msg_state(struct ahc_softc *ahc)
|
|
|
|
{
|
|
|
|
ahc->msgout_len = 0;
|
|
|
|
ahc->msgin_index = 0;
|
|
|
|
ahc->msg_type = MSG_TYPE_NONE;
|
This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
|
|
|
if ((ahc_inb(ahc, SCSISIGI) & ATNI) != 0) {
|
ahc_eisa.c:
ahc_pci.c:
Add detach support.
Make use of soft allocated on our behalf by newbus.
For PCI devices, disable the mapping type we aren't
using for extra protection from rogue code.
aic7xxx_93cx6.c:
aic7xxx_93cx6.h:
Sync perforce IDs.
aic7xxx_freebsd.c:
Capture the eventhandle returned by EVENTHANDER_REGISTER
so we can kill the handler off during detach.
Use AHC_* constants instead of hard coded numbers in a
few more places.
Test PPR option state when deciding to "really" negotiate
when the CAM_NEGOTIATE flag is passed in a CCB.
Make use of core "ahc_pause_and_flushwork" routine in our
timeout handler rather than re-inventing this code.
Cleanup all of our resources (really!) in ahc_platform_free().
We should be all set to become a module now.
Implement the core ahc_detach() routine shared by all of
the FreeBSD front-ends.
aic7xxx_freebsd.h:
Softc storage for our event handler.
Null implementation for the ahc_platform_flushwork() OSM
callback. FreeBSD doesn't need this as XPT callbacks are
safe from all contexts and are done directly in ahc_done().
aic7xxx_inline.h:
Implement new lazy interrupt scheme. To avoid an extra
PCI bus read, we first check our completion queues to
see if any work has completed. If work is available, we
assume that this is the source of the interrupt and skip
reading INTSTAT. Any remaining interrupt status will be
cleared by a second call to the interrupt handler should
the interrupt line still be asserted. This drops the
interrupt handler down to a single PCI bus read in the
common case of I/O completion. This is the same overhead
as in the not so distant past, but the extra sanity of
perforning a PCI read after clearing the command complete
interrupt and before running the completion queue to avoid
missing command complete interrupts added a cycle.
aic7xxx.c:
During initialization, be sure to initialize all scratch
ram locations before they are read to avoid parity errors.
In this case, we use a new function, ahc_unbusy_tcl() to
initialize the scratch ram busy target table.
Replace instances of ahc_index_busy_tcl() used to unbusy
a tcl without looking at the old value with ahc_unbusy_tcl().
Modify ahc_sent_msg so that it can find single byte messages.
ahc_sent_msg is now used to determine if a transfer negotiation
attempt resulted in a bus free.
Be more careful in filtering out only the SCSI interrupts
of interest in ahc_handle_scsiint.
Rearrange interrupt clearing code to ensure that at least
one PCI transaction occurrs after hitting CLRSINT1 and
writting to CLRINT. CLRSINT1 writes take a bit to
take effect, and the re-arrangement provides sufficient
delay to ensure the write to CLRINT is effective. The
old code might report a spurious interrupt on some "fast"
chipsets.
export ahc-update_target_msg_request for use by OSM code.
If a target does not respond to our ATN request, clear
it once we move to a non-message phase. This avoids
sending a MSG_NOOP in some later message out phase.
Use max lun and max target constants instead of
hard-coded values.
Use softc storage built into our device_t under FreeBSD.
Fix a bug in ahc_free() that caused us to delete
resources that were not allocated.
Clean up any tstate/lstate info in ahc_free().
Clear the powerdown state in ahc_reset() so that
registers can be accessed.
Add a preliminary function for pausing the chip and
processing any posted work.
Add a preliminary suspend and resume functions.
aic7xxx.h:
Limit the number of supported luns to 64. We don't
support information unit transfers, so this is the
maximum that makes sense for these chips.
Add a new flag AHC_ALL_INTERRUPTS that forces the
processing of all interrupt state in a single invokation
of ahc_intr(). When the flag is not set, we use the
lazy interrupt handling scheme.
Add data structures to store controller state while
we are suspended.
Use constants instead of hard coded values where appropriate.
Correct some harmless "unsigned/signed" conflicts.
aic7xxx.seq:
Only perform the SCSIBUSL fix on ULTRA2 or newer controllers.
Older controllers seem to be confused by this.
In target mode, ignore PHASEMIS during data phases.
This bit seems to be flakey on U160 controllers acting
in target mode.
aic7xxx_pci.c:
Add support for the 29160C CPCI adapter.
Add definitions for subvendor ID information
available for devices with the "9005" vendor id.
We currently use this information to determine
if a multi-function device doesn't have the second
channel hooked up on a board.
Add rudimentary power mode code so we can put the
controller into the D0 state. In the future this
will be an OSM callback so that in FreeBSD we don't
duplicate functionality provided by the PCI code.
The powerstate code was added after I'd completed
my regression tests on this code.
Only capture "left over BIOS state" if the POWRDN
setting is not set in HCNTRL.
In target mode, don't bother sending incremental
CRC data.
2000-12-20 01:11:37 +00:00
|
|
|
/*
|
|
|
|
* The target didn't care to respond to our
|
|
|
|
* message request, so clear ATN.
|
|
|
|
*/
|
|
|
|
ahc_outb(ahc, CLRSINT1, CLRATNO);
|
|
|
|
}
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_outb(ahc, MSG_OUT, MSG_NOOP);
|
2002-04-24 16:58:51 +00:00
|
|
|
ahc_outb(ahc, SEQ_FLAGS2,
|
|
|
|
ahc_inb(ahc, SEQ_FLAGS2) & ~TARGET_MSG_PENDING);
|
2000-09-16 20:02:28 +00:00
|
|
|
}
|
1999-01-14 06:14:15 +00:00
|
|
|
|
2002-11-30 19:30:09 +00:00
|
|
|
static void
|
|
|
|
ahc_handle_proto_violation(struct ahc_softc *ahc)
|
|
|
|
{
|
|
|
|
struct ahc_devinfo devinfo;
|
|
|
|
struct scb *scb;
|
|
|
|
u_int scbid;
|
|
|
|
u_int seq_flags;
|
|
|
|
u_int curphase;
|
|
|
|
u_int lastphase;
|
|
|
|
int found;
|
|
|
|
|
|
|
|
ahc_fetch_devinfo(ahc, &devinfo);
|
|
|
|
scbid = ahc_inb(ahc, SCB_TAG);
|
|
|
|
scb = ahc_lookup_scb(ahc, scbid);
|
|
|
|
seq_flags = ahc_inb(ahc, SEQ_FLAGS);
|
|
|
|
curphase = ahc_inb(ahc, SCSISIGI) & PHASE_MASK;
|
|
|
|
lastphase = ahc_inb(ahc, LASTPHASE);
|
|
|
|
if ((seq_flags & NOT_IDENTIFIED) != 0) {
|
|
|
|
|
|
|
|
/*
|
|
|
|
* The reconnecting target either did not send an
|
|
|
|
* identify message, or did, but we didn't find an SCB
|
|
|
|
* to match.
|
|
|
|
*/
|
|
|
|
ahc_print_devinfo(ahc, &devinfo);
|
|
|
|
printf("Target did not send an IDENTIFY message. "
|
|
|
|
"LASTPHASE = 0x%x.\n", lastphase);
|
|
|
|
scb = NULL;
|
|
|
|
} else if (scb == NULL) {
|
|
|
|
/*
|
|
|
|
* We don't seem to have an SCB active for this
|
|
|
|
* transaction. Print an error and reset the bus.
|
|
|
|
*/
|
|
|
|
ahc_print_devinfo(ahc, &devinfo);
|
|
|
|
printf("No SCB found during protocol violation\n");
|
|
|
|
goto proto_violation_reset;
|
|
|
|
} else {
|
|
|
|
ahc_set_transaction_status(scb, CAM_SEQUENCE_FAIL);
|
|
|
|
if ((seq_flags & NO_CDB_SENT) != 0) {
|
|
|
|
ahc_print_path(ahc, scb);
|
|
|
|
printf("No or incomplete CDB sent to device.\n");
|
|
|
|
} else if ((ahc_inb(ahc, SCB_CONTROL) & STATUS_RCVD) == 0) {
|
|
|
|
/*
|
|
|
|
* The target never bothered to provide status to
|
|
|
|
* us prior to completing the command. Since we don't
|
|
|
|
* know the disposition of this command, we must attempt
|
|
|
|
* to abort it. Assert ATN and prepare to send an abort
|
|
|
|
* message.
|
|
|
|
*/
|
|
|
|
ahc_print_path(ahc, scb);
|
|
|
|
printf("Completed command without status.\n");
|
|
|
|
} else {
|
|
|
|
ahc_print_path(ahc, scb);
|
|
|
|
printf("Unknown protocol violation.\n");
|
|
|
|
ahc_dump_card_state(ahc);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
if ((lastphase & ~P_DATAIN_DT) == 0
|
|
|
|
|| lastphase == P_COMMAND) {
|
|
|
|
proto_violation_reset:
|
|
|
|
/*
|
|
|
|
* Target either went directly to data/command
|
|
|
|
* phase or didn't respond to our ATN.
|
|
|
|
* The only safe thing to do is to blow
|
|
|
|
* it away with a bus reset.
|
|
|
|
*/
|
|
|
|
found = ahc_reset_channel(ahc, 'A', TRUE);
|
|
|
|
printf("%s: Issued Channel %c Bus Reset. "
|
|
|
|
"%d SCBs aborted\n", ahc_name(ahc), 'A', found);
|
|
|
|
} else {
|
|
|
|
/*
|
|
|
|
* Leave the selection hardware off in case
|
|
|
|
* this abort attempt will affect yet to
|
|
|
|
* be sent commands.
|
|
|
|
*/
|
|
|
|
ahc_outb(ahc, SCSISEQ,
|
|
|
|
ahc_inb(ahc, SCSISEQ) & ~ENSELO);
|
|
|
|
ahc_assert_atn(ahc);
|
|
|
|
ahc_outb(ahc, MSG_OUT, HOST_MSG);
|
|
|
|
if (scb == NULL) {
|
|
|
|
ahc_print_devinfo(ahc, &devinfo);
|
|
|
|
ahc->msgout_buf[0] = MSG_ABORT_TASK;
|
|
|
|
ahc->msgout_len = 1;
|
|
|
|
ahc->msgout_index = 0;
|
|
|
|
ahc->msg_type = MSG_TYPE_INITIATOR_MSGOUT;
|
|
|
|
} else {
|
|
|
|
ahc_print_path(ahc, scb);
|
|
|
|
scb->flags |= SCB_ABORT;
|
|
|
|
}
|
|
|
|
printf("Protocol violation %s. Attempting to abort.\n",
|
|
|
|
ahc_lookup_phase_entry(curphase)->phasemsg);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/*
|
|
|
|
* Manual message loop handler.
|
|
|
|
*/
|
|
|
|
static void
|
|
|
|
ahc_handle_message_phase(struct ahc_softc *ahc)
|
|
|
|
{
|
|
|
|
struct ahc_devinfo devinfo;
|
|
|
|
u_int bus_phase;
|
|
|
|
int end_session;
|
|
|
|
|
|
|
|
ahc_fetch_devinfo(ahc, &devinfo);
|
|
|
|
end_session = FALSE;
|
|
|
|
bus_phase = ahc_inb(ahc, SCSISIGI) & PHASE_MASK;
|
|
|
|
|
|
|
|
reswitch:
|
|
|
|
switch (ahc->msg_type) {
|
|
|
|
case MSG_TYPE_INITIATOR_MSGOUT:
|
|
|
|
{
|
|
|
|
int lastbyte;
|
|
|
|
int phasemis;
|
|
|
|
int msgdone;
|
|
|
|
|
|
|
|
if (ahc->msgout_len == 0)
|
2000-09-22 22:18:05 +00:00
|
|
|
panic("HOST_MSG_LOOP interrupt with no active message");
|
2000-09-16 20:02:28 +00:00
|
|
|
|
2002-08-31 06:41:37 +00:00
|
|
|
#ifdef AHC_DEBUG
|
2002-09-27 23:00:35 +00:00
|
|
|
if ((ahc_debug & AHC_SHOW_MESSAGES) != 0) {
|
2002-08-31 06:41:37 +00:00
|
|
|
ahc_print_devinfo(ahc, &devinfo);
|
|
|
|
printf("INITIATOR_MSG_OUT");
|
2002-09-27 23:00:35 +00:00
|
|
|
}
|
2002-08-31 06:41:37 +00:00
|
|
|
#endif
|
2000-09-16 20:02:28 +00:00
|
|
|
phasemis = bus_phase != P_MESGOUT;
|
|
|
|
if (phasemis) {
|
2002-08-31 06:41:37 +00:00
|
|
|
#ifdef AHC_DEBUG
|
|
|
|
if ((ahc_debug & AHC_SHOW_MESSAGES) != 0) {
|
|
|
|
printf(" PHASEMIS %s\n",
|
|
|
|
ahc_lookup_phase_entry(bus_phase)
|
|
|
|
->phasemsg);
|
|
|
|
}
|
|
|
|
#endif
|
2000-09-16 20:02:28 +00:00
|
|
|
if (bus_phase == P_MESGIN) {
|
|
|
|
/*
|
|
|
|
* Change gears and see if
|
|
|
|
* this messages is of interest to
|
|
|
|
* us or should be passed back to
|
|
|
|
* the sequencer.
|
|
|
|
*/
|
|
|
|
ahc_outb(ahc, CLRSINT1, CLRATNO);
|
|
|
|
ahc->send_msg_perror = FALSE;
|
|
|
|
ahc->msg_type = MSG_TYPE_INITIATOR_MSGIN;
|
|
|
|
ahc->msgin_index = 0;
|
|
|
|
goto reswitch;
|
|
|
|
}
|
|
|
|
end_session = TRUE;
|
|
|
|
break;
|
1999-01-14 06:14:15 +00:00
|
|
|
}
|
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
if (ahc->send_msg_perror) {
|
|
|
|
ahc_outb(ahc, CLRSINT1, CLRATNO);
|
|
|
|
ahc_outb(ahc, CLRSINT1, CLRREQINIT);
|
2002-08-31 06:41:37 +00:00
|
|
|
#ifdef AHC_DEBUG
|
|
|
|
if ((ahc_debug & AHC_SHOW_MESSAGES) != 0)
|
|
|
|
printf(" byte 0x%x\n", ahc->send_msg_perror);
|
|
|
|
#endif
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_outb(ahc, SCSIDATL, MSG_PARITY_ERROR);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
msgdone = ahc->msgout_index == ahc->msgout_len;
|
|
|
|
if (msgdone) {
|
1999-01-14 06:14:15 +00:00
|
|
|
/*
|
2000-09-16 20:02:28 +00:00
|
|
|
* The target has requested a retry.
|
|
|
|
* Re-assert ATN, reset our message index to
|
|
|
|
* 0, and try again.
|
1999-01-14 06:14:15 +00:00
|
|
|
*/
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc->msgout_index = 0;
|
2001-05-15 19:41:12 +00:00
|
|
|
ahc_assert_atn(ahc);
|
2000-09-16 20:02:28 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
lastbyte = ahc->msgout_index == (ahc->msgout_len - 1);
|
|
|
|
if (lastbyte) {
|
|
|
|
/* Last byte is signified by dropping ATN */
|
|
|
|
ahc_outb(ahc, CLRSINT1, CLRATNO);
|
1999-01-14 06:14:15 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
2000-09-16 20:02:28 +00:00
|
|
|
* Clear our interrupt status and present
|
|
|
|
* the next byte on the bus.
|
1999-01-14 06:14:15 +00:00
|
|
|
*/
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_outb(ahc, CLRSINT1, CLRREQINIT);
|
2002-08-31 06:41:37 +00:00
|
|
|
#ifdef AHC_DEBUG
|
|
|
|
if ((ahc_debug & AHC_SHOW_MESSAGES) != 0)
|
|
|
|
printf(" byte 0x%x\n",
|
|
|
|
ahc->msgout_buf[ahc->msgout_index]);
|
|
|
|
#endif
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_outb(ahc, SCSIDATL, ahc->msgout_buf[ahc->msgout_index++]);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
case MSG_TYPE_INITIATOR_MSGIN:
|
|
|
|
{
|
|
|
|
int phasemis;
|
|
|
|
int message_done;
|
|
|
|
|
2002-08-31 06:41:37 +00:00
|
|
|
#ifdef AHC_DEBUG
|
|
|
|
if ((ahc_debug & AHC_SHOW_MESSAGES) != 0) {
|
|
|
|
ahc_print_devinfo(ahc, &devinfo);
|
|
|
|
printf("INITIATOR_MSG_IN");
|
|
|
|
}
|
|
|
|
#endif
|
2000-09-16 20:02:28 +00:00
|
|
|
phasemis = bus_phase != P_MESGIN;
|
|
|
|
if (phasemis) {
|
2002-08-31 06:41:37 +00:00
|
|
|
#ifdef AHC_DEBUG
|
|
|
|
if ((ahc_debug & AHC_SHOW_MESSAGES) != 0) {
|
|
|
|
printf(" PHASEMIS %s\n",
|
|
|
|
ahc_lookup_phase_entry(bus_phase)
|
|
|
|
->phasemsg);
|
|
|
|
}
|
|
|
|
#endif
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc->msgin_index = 0;
|
|
|
|
if (bus_phase == P_MESGOUT
|
|
|
|
&& (ahc->send_msg_perror == TRUE
|
|
|
|
|| (ahc->msgout_len != 0
|
|
|
|
&& ahc->msgout_index == 0))) {
|
|
|
|
ahc->msg_type = MSG_TYPE_INITIATOR_MSGOUT;
|
|
|
|
goto reswitch;
|
1999-01-14 06:14:15 +00:00
|
|
|
}
|
2000-09-16 20:02:28 +00:00
|
|
|
end_session = TRUE;
|
|
|
|
break;
|
1999-01-14 06:14:15 +00:00
|
|
|
}
|
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/* Pull the byte in without acking it */
|
|
|
|
ahc->msgin_buf[ahc->msgin_index] = ahc_inb(ahc, SCSIBUSL);
|
2002-08-31 06:41:37 +00:00
|
|
|
#ifdef AHC_DEBUG
|
|
|
|
if ((ahc_debug & AHC_SHOW_MESSAGES) != 0)
|
|
|
|
printf(" byte 0x%x\n",
|
|
|
|
ahc->msgin_buf[ahc->msgin_index]);
|
|
|
|
#endif
|
1999-03-05 23:35:48 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
message_done = ahc_parse_msg(ahc, &devinfo);
|
1999-03-05 23:35:48 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
if (message_done) {
|
|
|
|
/*
|
|
|
|
* Clear our incoming message buffer in case there
|
|
|
|
* is another message following this one.
|
|
|
|
*/
|
|
|
|
ahc->msgin_index = 0;
|
1999-03-05 23:35:48 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/*
|
|
|
|
* If this message illicited a response,
|
|
|
|
* assert ATN so the target takes us to the
|
|
|
|
* message out phase.
|
|
|
|
*/
|
aic7xxx.reg:
Add a constant for the controller's stack size and the
maximum scsi offset.
aic7xxx.seq:
Style nit. The source is implied to be the destination
unless overridden in an "and" instruction.
Update target mode code for changes in identify seen
sequencer flags.
aic7xxx_pci.c:
Ensure that the PCIERRGENDIS bit is set in the
PCIERRGEN config space register. Perhaps this
is a reason for the spurios parity errors reported
on U160 controllers.
Honor the AHC_NO_BIOS_INIT flag.
Allow PCI interrupt reporting to be disabled,
by clearing the PERRRESEN bit in the command
register. This option is now enabled via a new
softc flag: AHC_DISABLE_PCI_PERR.
Disable SERR and pause the controller prior to performing
our mmapped I/O test. This should handle the case of
controllers that do not "auto-access pause". For legacy
controllers, use SCB ram instead of scratch ram since
the latter may contain settings left over from the BIOS
that we will use if an seeprom is not found.
Make use of new ahc_inl/outl() inlines.
aic7xxx.h:
Reformat a few comments to follow driver style.
Add a controller flags that indicate that a controller
has not been initialized by the BIOS and whether to
disable PCI parity errors..
Remove stack probing softc members.
Add a few more syncrate constants that are useful in speed
fallback calculations.
Add the SHOW_MASKED_ERRORS debug flag.
aic7xxx.h:
aic7xxx.c:
Implement the SCB_SILENT flag. This is useful for
hushing up the driver during DV or other operations
that we expect to cause transmission errors. The
messages will still print if the SHOW_MASKED_ERRORS
debug option is enabled.
aic7xxx_inline.h:
Implement ahc_[in|out][w|l|q]. This removes the need
for manual 'or and shift" type operations throughout
the driver.
aic7xxx.c:
Move SELTO dignostic so that the SCB is still valid
when we use it for printing path information.
If we are narrow, limit syncrate to Ultra2.
Don't clobber ppr_options when forcing a renegotiation.
The current ppr_options may be referenced while queuing
new commands. Don't set our width to unknown when forcing
negotiation on narrow controllers. This will confuse the
negotiation code into negotiating with a wide message on
narrow controllers.
Add an "asserting atn" diagnostic with controller/target
information.
Remove the probe_stack code. The stack is always
4 deep on legacy controllers, so probing is pointless.
This also avoids an issue where probing the stack would
upset the aic7770.
In ahc_reset(), record whether or not we found the
controller in a reset state. If the controller was
already reset, assume that no BIOS has initialized
the controller and ignore left over scratch ram
settings.
Fix an ifdef bug that caused sequencer debugging to
be enabled always.
Clear the ultraenb flag in our tstate during startup.
The ultraenbled'ness of a device is recorded in the user
transfer settings. tstate->ultraenb bitmask indicates
which devices we have negotiated an ultra speed with.
Just after initialization, we are async. Setting the
ultraenb flag while async seems to be harmless, but it
was confusing to see the ULTRAENB flag set in the SCB.
Enhance residual diagnostic to indicate if the residual
if for sense information or normal data transfers.
Indicate the features, bugs, and flags set in the softc
that are used to control firmware patch download when
booting verbose.
In ahc_dump_card_state() fix a logic reversal. The
SCSIPHASE register only exists on U160 controllers.
The SCSISIGI register exists on all controllers. Not
the other way around. Also print out the ERROR register.
Allow ahc_dump_card_state() to be called when the sequencer
is not paused. Add dump card state markers as in the U320
driver.
2003-01-20 20:44:55 +00:00
|
|
|
if (ahc->msgout_len != 0) {
|
|
|
|
#ifdef AHC_DEBUG
|
|
|
|
if ((ahc_debug & AHC_SHOW_MESSAGES) != 0) {
|
|
|
|
ahc_print_devinfo(ahc, &devinfo);
|
|
|
|
printf("Asserting ATN for response\n");
|
|
|
|
}
|
|
|
|
#endif
|
2001-05-15 19:41:12 +00:00
|
|
|
ahc_assert_atn(ahc);
|
aic7xxx.reg:
Add a constant for the controller's stack size and the
maximum scsi offset.
aic7xxx.seq:
Style nit. The source is implied to be the destination
unless overridden in an "and" instruction.
Update target mode code for changes in identify seen
sequencer flags.
aic7xxx_pci.c:
Ensure that the PCIERRGENDIS bit is set in the
PCIERRGEN config space register. Perhaps this
is a reason for the spurios parity errors reported
on U160 controllers.
Honor the AHC_NO_BIOS_INIT flag.
Allow PCI interrupt reporting to be disabled,
by clearing the PERRRESEN bit in the command
register. This option is now enabled via a new
softc flag: AHC_DISABLE_PCI_PERR.
Disable SERR and pause the controller prior to performing
our mmapped I/O test. This should handle the case of
controllers that do not "auto-access pause". For legacy
controllers, use SCB ram instead of scratch ram since
the latter may contain settings left over from the BIOS
that we will use if an seeprom is not found.
Make use of new ahc_inl/outl() inlines.
aic7xxx.h:
Reformat a few comments to follow driver style.
Add a controller flags that indicate that a controller
has not been initialized by the BIOS and whether to
disable PCI parity errors..
Remove stack probing softc members.
Add a few more syncrate constants that are useful in speed
fallback calculations.
Add the SHOW_MASKED_ERRORS debug flag.
aic7xxx.h:
aic7xxx.c:
Implement the SCB_SILENT flag. This is useful for
hushing up the driver during DV or other operations
that we expect to cause transmission errors. The
messages will still print if the SHOW_MASKED_ERRORS
debug option is enabled.
aic7xxx_inline.h:
Implement ahc_[in|out][w|l|q]. This removes the need
for manual 'or and shift" type operations throughout
the driver.
aic7xxx.c:
Move SELTO dignostic so that the SCB is still valid
when we use it for printing path information.
If we are narrow, limit syncrate to Ultra2.
Don't clobber ppr_options when forcing a renegotiation.
The current ppr_options may be referenced while queuing
new commands. Don't set our width to unknown when forcing
negotiation on narrow controllers. This will confuse the
negotiation code into negotiating with a wide message on
narrow controllers.
Add an "asserting atn" diagnostic with controller/target
information.
Remove the probe_stack code. The stack is always
4 deep on legacy controllers, so probing is pointless.
This also avoids an issue where probing the stack would
upset the aic7770.
In ahc_reset(), record whether or not we found the
controller in a reset state. If the controller was
already reset, assume that no BIOS has initialized
the controller and ignore left over scratch ram
settings.
Fix an ifdef bug that caused sequencer debugging to
be enabled always.
Clear the ultraenb flag in our tstate during startup.
The ultraenbled'ness of a device is recorded in the user
transfer settings. tstate->ultraenb bitmask indicates
which devices we have negotiated an ultra speed with.
Just after initialization, we are async. Setting the
ultraenb flag while async seems to be harmless, but it
was confusing to see the ULTRAENB flag set in the SCB.
Enhance residual diagnostic to indicate if the residual
if for sense information or normal data transfers.
Indicate the features, bugs, and flags set in the softc
that are used to control firmware patch download when
booting verbose.
In ahc_dump_card_state() fix a logic reversal. The
SCSIPHASE register only exists on U160 controllers.
The SCSISIGI register exists on all controllers. Not
the other way around. Also print out the ERROR register.
Allow ahc_dump_card_state() to be called when the sequencer
is not paused. Add dump card state markers as in the U320
driver.
2003-01-20 20:44:55 +00:00
|
|
|
}
|
2000-09-16 20:02:28 +00:00
|
|
|
} else
|
|
|
|
ahc->msgin_index++;
|
1999-03-05 23:35:48 +00:00
|
|
|
|
2002-08-31 06:41:37 +00:00
|
|
|
if (message_done == MSGLOOP_TERMINATED) {
|
|
|
|
end_session = TRUE;
|
|
|
|
} else {
|
|
|
|
/* Ack the byte */
|
|
|
|
ahc_outb(ahc, CLRSINT1, CLRREQINIT);
|
|
|
|
ahc_inb(ahc, SCSIDATL);
|
|
|
|
}
|
2000-09-16 20:02:28 +00:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
case MSG_TYPE_TARGET_MSGIN:
|
|
|
|
{
|
|
|
|
int msgdone;
|
|
|
|
int msgout_request;
|
1999-03-05 23:35:48 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
if (ahc->msgout_len == 0)
|
|
|
|
panic("Target MSGIN with no active message");
|
1999-03-05 23:35:48 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/*
|
|
|
|
* If we interrupted a mesgout session, the initiator
|
|
|
|
* will not know this until our first REQ. So, we
|
|
|
|
* only honor mesgout requests after we've sent our
|
|
|
|
* first byte.
|
|
|
|
*/
|
|
|
|
if ((ahc_inb(ahc, SCSISIGI) & ATNI) != 0
|
|
|
|
&& ahc->msgout_index > 0)
|
|
|
|
msgout_request = TRUE;
|
|
|
|
else
|
|
|
|
msgout_request = FALSE;
|
1999-03-05 23:35:48 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
if (msgout_request) {
|
1999-01-14 06:14:15 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/*
|
|
|
|
* Change gears and see if
|
|
|
|
* this messages is of interest to
|
|
|
|
* us or should be passed back to
|
|
|
|
* the sequencer.
|
|
|
|
*/
|
|
|
|
ahc->msg_type = MSG_TYPE_TARGET_MSGOUT;
|
|
|
|
ahc_outb(ahc, SCSISIGO, P_MESGOUT | BSYO);
|
|
|
|
ahc->msgin_index = 0;
|
|
|
|
/* Dummy read to REQ for first byte */
|
|
|
|
ahc_inb(ahc, SCSIDATL);
|
|
|
|
ahc_outb(ahc, SXFRCTL0,
|
|
|
|
ahc_inb(ahc, SXFRCTL0) | SPIOEN);
|
|
|
|
break;
|
1999-01-14 06:14:15 +00:00
|
|
|
}
|
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
msgdone = ahc->msgout_index == ahc->msgout_len;
|
|
|
|
if (msgdone) {
|
|
|
|
ahc_outb(ahc, SXFRCTL0,
|
|
|
|
ahc_inb(ahc, SXFRCTL0) & ~SPIOEN);
|
|
|
|
end_session = TRUE;
|
|
|
|
break;
|
1999-01-14 06:14:15 +00:00
|
|
|
}
|
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/*
|
|
|
|
* Present the next byte on the bus.
|
|
|
|
*/
|
|
|
|
ahc_outb(ahc, SXFRCTL0, ahc_inb(ahc, SXFRCTL0) | SPIOEN);
|
|
|
|
ahc_outb(ahc, SCSIDATL, ahc->msgout_buf[ahc->msgout_index++]);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
case MSG_TYPE_TARGET_MSGOUT:
|
|
|
|
{
|
|
|
|
int lastbyte;
|
|
|
|
int msgdone;
|
1999-01-14 06:14:15 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/*
|
|
|
|
* The initiator signals that this is
|
|
|
|
* the last byte by dropping ATN.
|
|
|
|
*/
|
|
|
|
lastbyte = (ahc_inb(ahc, SCSISIGI) & ATNI) == 0;
|
1999-01-14 06:14:15 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/*
|
|
|
|
* Read the latched byte, but turn off SPIOEN first
|
2002-04-24 16:58:51 +00:00
|
|
|
* so that we don't inadvertently cause a REQ for the
|
2000-09-16 20:02:28 +00:00
|
|
|
* next byte.
|
|
|
|
*/
|
|
|
|
ahc_outb(ahc, SXFRCTL0, ahc_inb(ahc, SXFRCTL0) & ~SPIOEN);
|
|
|
|
ahc->msgin_buf[ahc->msgin_index] = ahc_inb(ahc, SCSIDATL);
|
|
|
|
msgdone = ahc_parse_msg(ahc, &devinfo);
|
|
|
|
if (msgdone == MSGLOOP_TERMINATED) {
|
|
|
|
/*
|
|
|
|
* The message is *really* done in that it caused
|
|
|
|
* us to go to bus free. The sequencer has already
|
|
|
|
* been reset at this point, so pull the ejection
|
|
|
|
* handle.
|
|
|
|
*/
|
2000-03-18 22:28:20 +00:00
|
|
|
return;
|
|
|
|
}
|
2000-09-16 20:02:28 +00:00
|
|
|
|
|
|
|
ahc->msgin_index++;
|
1999-01-14 06:14:15 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/*
|
|
|
|
* XXX Read spec about initiator dropping ATN too soon
|
|
|
|
* and use msgdone to detect it.
|
|
|
|
*/
|
|
|
|
if (msgdone == MSGLOOP_MSGCOMPLETE) {
|
|
|
|
ahc->msgin_index = 0;
|
1999-01-14 06:14:15 +00:00
|
|
|
|
2000-03-18 22:28:20 +00:00
|
|
|
/*
|
2000-09-16 20:02:28 +00:00
|
|
|
* If this message illicited a response, transition
|
|
|
|
* to the Message in phase and send it.
|
2000-03-18 22:28:20 +00:00
|
|
|
*/
|
2000-09-16 20:02:28 +00:00
|
|
|
if (ahc->msgout_len != 0) {
|
|
|
|
ahc_outb(ahc, SCSISIGO, P_MESGIN | BSYO);
|
|
|
|
ahc_outb(ahc, SXFRCTL0,
|
|
|
|
ahc_inb(ahc, SXFRCTL0) | SPIOEN);
|
|
|
|
ahc->msg_type = MSG_TYPE_TARGET_MSGIN;
|
|
|
|
ahc->msgin_index = 0;
|
|
|
|
break;
|
|
|
|
}
|
1999-03-08 22:42:52 +00:00
|
|
|
}
|
2000-03-18 22:28:20 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
if (lastbyte)
|
|
|
|
end_session = TRUE;
|
|
|
|
else {
|
|
|
|
/* Ask for the next byte. */
|
|
|
|
ahc_outb(ahc, SXFRCTL0,
|
|
|
|
ahc_inb(ahc, SXFRCTL0) | SPIOEN);
|
2000-03-18 22:28:20 +00:00
|
|
|
}
|
2000-09-16 20:02:28 +00:00
|
|
|
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
default:
|
|
|
|
panic("Unknown REQINIT message type");
|
1999-01-14 06:14:15 +00:00
|
|
|
}
|
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
if (end_session) {
|
|
|
|
ahc_clear_msg_state(ahc);
|
|
|
|
ahc_outb(ahc, RETURN_1, EXIT_MSG_LOOP);
|
|
|
|
} else
|
|
|
|
ahc_outb(ahc, RETURN_1, CONT_MSG_LOOP);
|
|
|
|
}
|
2000-03-18 22:28:20 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/*
|
|
|
|
* See if we sent a particular extended message to the target.
|
|
|
|
* If "full" is true, return true only if the target saw the full
|
|
|
|
* message. If "full" is false, return true if the target saw at
|
|
|
|
* least the first byte of the message.
|
|
|
|
*/
|
1999-01-14 06:14:15 +00:00
|
|
|
static int
|
ahc_eisa.c:
ahc_pci.c:
Add detach support.
Make use of soft allocated on our behalf by newbus.
For PCI devices, disable the mapping type we aren't
using for extra protection from rogue code.
aic7xxx_93cx6.c:
aic7xxx_93cx6.h:
Sync perforce IDs.
aic7xxx_freebsd.c:
Capture the eventhandle returned by EVENTHANDER_REGISTER
so we can kill the handler off during detach.
Use AHC_* constants instead of hard coded numbers in a
few more places.
Test PPR option state when deciding to "really" negotiate
when the CAM_NEGOTIATE flag is passed in a CCB.
Make use of core "ahc_pause_and_flushwork" routine in our
timeout handler rather than re-inventing this code.
Cleanup all of our resources (really!) in ahc_platform_free().
We should be all set to become a module now.
Implement the core ahc_detach() routine shared by all of
the FreeBSD front-ends.
aic7xxx_freebsd.h:
Softc storage for our event handler.
Null implementation for the ahc_platform_flushwork() OSM
callback. FreeBSD doesn't need this as XPT callbacks are
safe from all contexts and are done directly in ahc_done().
aic7xxx_inline.h:
Implement new lazy interrupt scheme. To avoid an extra
PCI bus read, we first check our completion queues to
see if any work has completed. If work is available, we
assume that this is the source of the interrupt and skip
reading INTSTAT. Any remaining interrupt status will be
cleared by a second call to the interrupt handler should
the interrupt line still be asserted. This drops the
interrupt handler down to a single PCI bus read in the
common case of I/O completion. This is the same overhead
as in the not so distant past, but the extra sanity of
perforning a PCI read after clearing the command complete
interrupt and before running the completion queue to avoid
missing command complete interrupts added a cycle.
aic7xxx.c:
During initialization, be sure to initialize all scratch
ram locations before they are read to avoid parity errors.
In this case, we use a new function, ahc_unbusy_tcl() to
initialize the scratch ram busy target table.
Replace instances of ahc_index_busy_tcl() used to unbusy
a tcl without looking at the old value with ahc_unbusy_tcl().
Modify ahc_sent_msg so that it can find single byte messages.
ahc_sent_msg is now used to determine if a transfer negotiation
attempt resulted in a bus free.
Be more careful in filtering out only the SCSI interrupts
of interest in ahc_handle_scsiint.
Rearrange interrupt clearing code to ensure that at least
one PCI transaction occurrs after hitting CLRSINT1 and
writting to CLRINT. CLRSINT1 writes take a bit to
take effect, and the re-arrangement provides sufficient
delay to ensure the write to CLRINT is effective. The
old code might report a spurious interrupt on some "fast"
chipsets.
export ahc-update_target_msg_request for use by OSM code.
If a target does not respond to our ATN request, clear
it once we move to a non-message phase. This avoids
sending a MSG_NOOP in some later message out phase.
Use max lun and max target constants instead of
hard-coded values.
Use softc storage built into our device_t under FreeBSD.
Fix a bug in ahc_free() that caused us to delete
resources that were not allocated.
Clean up any tstate/lstate info in ahc_free().
Clear the powerdown state in ahc_reset() so that
registers can be accessed.
Add a preliminary function for pausing the chip and
processing any posted work.
Add a preliminary suspend and resume functions.
aic7xxx.h:
Limit the number of supported luns to 64. We don't
support information unit transfers, so this is the
maximum that makes sense for these chips.
Add a new flag AHC_ALL_INTERRUPTS that forces the
processing of all interrupt state in a single invokation
of ahc_intr(). When the flag is not set, we use the
lazy interrupt handling scheme.
Add data structures to store controller state while
we are suspended.
Use constants instead of hard coded values where appropriate.
Correct some harmless "unsigned/signed" conflicts.
aic7xxx.seq:
Only perform the SCSIBUSL fix on ULTRA2 or newer controllers.
Older controllers seem to be confused by this.
In target mode, ignore PHASEMIS during data phases.
This bit seems to be flakey on U160 controllers acting
in target mode.
aic7xxx_pci.c:
Add support for the 29160C CPCI adapter.
Add definitions for subvendor ID information
available for devices with the "9005" vendor id.
We currently use this information to determine
if a multi-function device doesn't have the second
channel hooked up on a board.
Add rudimentary power mode code so we can put the
controller into the D0 state. In the future this
will be an OSM callback so that in FreeBSD we don't
duplicate functionality provided by the PCI code.
The powerstate code was added after I'd completed
my regression tests on this code.
Only capture "left over BIOS state" if the POWRDN
setting is not set in HCNTRL.
In target mode, don't bother sending incremental
CRC data.
2000-12-20 01:11:37 +00:00
|
|
|
ahc_sent_msg(struct ahc_softc *ahc, ahc_msgtype type, u_int msgval, int full)
|
1998-09-15 07:24:17 +00:00
|
|
|
{
|
2000-09-16 20:02:28 +00:00
|
|
|
int found;
|
|
|
|
u_int index;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
found = FALSE;
|
|
|
|
index = 0;
|
1999-03-05 23:35:48 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
while (index < ahc->msgout_len) {
|
|
|
|
if (ahc->msgout_buf[index] == MSG_EXTENDED) {
|
ahc_eisa.c:
ahc_pci.c:
Add detach support.
Make use of soft allocated on our behalf by newbus.
For PCI devices, disable the mapping type we aren't
using for extra protection from rogue code.
aic7xxx_93cx6.c:
aic7xxx_93cx6.h:
Sync perforce IDs.
aic7xxx_freebsd.c:
Capture the eventhandle returned by EVENTHANDER_REGISTER
so we can kill the handler off during detach.
Use AHC_* constants instead of hard coded numbers in a
few more places.
Test PPR option state when deciding to "really" negotiate
when the CAM_NEGOTIATE flag is passed in a CCB.
Make use of core "ahc_pause_and_flushwork" routine in our
timeout handler rather than re-inventing this code.
Cleanup all of our resources (really!) in ahc_platform_free().
We should be all set to become a module now.
Implement the core ahc_detach() routine shared by all of
the FreeBSD front-ends.
aic7xxx_freebsd.h:
Softc storage for our event handler.
Null implementation for the ahc_platform_flushwork() OSM
callback. FreeBSD doesn't need this as XPT callbacks are
safe from all contexts and are done directly in ahc_done().
aic7xxx_inline.h:
Implement new lazy interrupt scheme. To avoid an extra
PCI bus read, we first check our completion queues to
see if any work has completed. If work is available, we
assume that this is the source of the interrupt and skip
reading INTSTAT. Any remaining interrupt status will be
cleared by a second call to the interrupt handler should
the interrupt line still be asserted. This drops the
interrupt handler down to a single PCI bus read in the
common case of I/O completion. This is the same overhead
as in the not so distant past, but the extra sanity of
perforning a PCI read after clearing the command complete
interrupt and before running the completion queue to avoid
missing command complete interrupts added a cycle.
aic7xxx.c:
During initialization, be sure to initialize all scratch
ram locations before they are read to avoid parity errors.
In this case, we use a new function, ahc_unbusy_tcl() to
initialize the scratch ram busy target table.
Replace instances of ahc_index_busy_tcl() used to unbusy
a tcl without looking at the old value with ahc_unbusy_tcl().
Modify ahc_sent_msg so that it can find single byte messages.
ahc_sent_msg is now used to determine if a transfer negotiation
attempt resulted in a bus free.
Be more careful in filtering out only the SCSI interrupts
of interest in ahc_handle_scsiint.
Rearrange interrupt clearing code to ensure that at least
one PCI transaction occurrs after hitting CLRSINT1 and
writting to CLRINT. CLRSINT1 writes take a bit to
take effect, and the re-arrangement provides sufficient
delay to ensure the write to CLRINT is effective. The
old code might report a spurious interrupt on some "fast"
chipsets.
export ahc-update_target_msg_request for use by OSM code.
If a target does not respond to our ATN request, clear
it once we move to a non-message phase. This avoids
sending a MSG_NOOP in some later message out phase.
Use max lun and max target constants instead of
hard-coded values.
Use softc storage built into our device_t under FreeBSD.
Fix a bug in ahc_free() that caused us to delete
resources that were not allocated.
Clean up any tstate/lstate info in ahc_free().
Clear the powerdown state in ahc_reset() so that
registers can be accessed.
Add a preliminary function for pausing the chip and
processing any posted work.
Add a preliminary suspend and resume functions.
aic7xxx.h:
Limit the number of supported luns to 64. We don't
support information unit transfers, so this is the
maximum that makes sense for these chips.
Add a new flag AHC_ALL_INTERRUPTS that forces the
processing of all interrupt state in a single invokation
of ahc_intr(). When the flag is not set, we use the
lazy interrupt handling scheme.
Add data structures to store controller state while
we are suspended.
Use constants instead of hard coded values where appropriate.
Correct some harmless "unsigned/signed" conflicts.
aic7xxx.seq:
Only perform the SCSIBUSL fix on ULTRA2 or newer controllers.
Older controllers seem to be confused by this.
In target mode, ignore PHASEMIS during data phases.
This bit seems to be flakey on U160 controllers acting
in target mode.
aic7xxx_pci.c:
Add support for the 29160C CPCI adapter.
Add definitions for subvendor ID information
available for devices with the "9005" vendor id.
We currently use this information to determine
if a multi-function device doesn't have the second
channel hooked up on a board.
Add rudimentary power mode code so we can put the
controller into the D0 state. In the future this
will be an OSM callback so that in FreeBSD we don't
duplicate functionality provided by the PCI code.
The powerstate code was added after I'd completed
my regression tests on this code.
Only capture "left over BIOS state" if the POWRDN
setting is not set in HCNTRL.
In target mode, don't bother sending incremental
CRC data.
2000-12-20 01:11:37 +00:00
|
|
|
u_int end_index;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
ahc_eisa.c:
ahc_pci.c:
Add detach support.
Make use of soft allocated on our behalf by newbus.
For PCI devices, disable the mapping type we aren't
using for extra protection from rogue code.
aic7xxx_93cx6.c:
aic7xxx_93cx6.h:
Sync perforce IDs.
aic7xxx_freebsd.c:
Capture the eventhandle returned by EVENTHANDER_REGISTER
so we can kill the handler off during detach.
Use AHC_* constants instead of hard coded numbers in a
few more places.
Test PPR option state when deciding to "really" negotiate
when the CAM_NEGOTIATE flag is passed in a CCB.
Make use of core "ahc_pause_and_flushwork" routine in our
timeout handler rather than re-inventing this code.
Cleanup all of our resources (really!) in ahc_platform_free().
We should be all set to become a module now.
Implement the core ahc_detach() routine shared by all of
the FreeBSD front-ends.
aic7xxx_freebsd.h:
Softc storage for our event handler.
Null implementation for the ahc_platform_flushwork() OSM
callback. FreeBSD doesn't need this as XPT callbacks are
safe from all contexts and are done directly in ahc_done().
aic7xxx_inline.h:
Implement new lazy interrupt scheme. To avoid an extra
PCI bus read, we first check our completion queues to
see if any work has completed. If work is available, we
assume that this is the source of the interrupt and skip
reading INTSTAT. Any remaining interrupt status will be
cleared by a second call to the interrupt handler should
the interrupt line still be asserted. This drops the
interrupt handler down to a single PCI bus read in the
common case of I/O completion. This is the same overhead
as in the not so distant past, but the extra sanity of
perforning a PCI read after clearing the command complete
interrupt and before running the completion queue to avoid
missing command complete interrupts added a cycle.
aic7xxx.c:
During initialization, be sure to initialize all scratch
ram locations before they are read to avoid parity errors.
In this case, we use a new function, ahc_unbusy_tcl() to
initialize the scratch ram busy target table.
Replace instances of ahc_index_busy_tcl() used to unbusy
a tcl without looking at the old value with ahc_unbusy_tcl().
Modify ahc_sent_msg so that it can find single byte messages.
ahc_sent_msg is now used to determine if a transfer negotiation
attempt resulted in a bus free.
Be more careful in filtering out only the SCSI interrupts
of interest in ahc_handle_scsiint.
Rearrange interrupt clearing code to ensure that at least
one PCI transaction occurrs after hitting CLRSINT1 and
writting to CLRINT. CLRSINT1 writes take a bit to
take effect, and the re-arrangement provides sufficient
delay to ensure the write to CLRINT is effective. The
old code might report a spurious interrupt on some "fast"
chipsets.
export ahc-update_target_msg_request for use by OSM code.
If a target does not respond to our ATN request, clear
it once we move to a non-message phase. This avoids
sending a MSG_NOOP in some later message out phase.
Use max lun and max target constants instead of
hard-coded values.
Use softc storage built into our device_t under FreeBSD.
Fix a bug in ahc_free() that caused us to delete
resources that were not allocated.
Clean up any tstate/lstate info in ahc_free().
Clear the powerdown state in ahc_reset() so that
registers can be accessed.
Add a preliminary function for pausing the chip and
processing any posted work.
Add a preliminary suspend and resume functions.
aic7xxx.h:
Limit the number of supported luns to 64. We don't
support information unit transfers, so this is the
maximum that makes sense for these chips.
Add a new flag AHC_ALL_INTERRUPTS that forces the
processing of all interrupt state in a single invokation
of ahc_intr(). When the flag is not set, we use the
lazy interrupt handling scheme.
Add data structures to store controller state while
we are suspended.
Use constants instead of hard coded values where appropriate.
Correct some harmless "unsigned/signed" conflicts.
aic7xxx.seq:
Only perform the SCSIBUSL fix on ULTRA2 or newer controllers.
Older controllers seem to be confused by this.
In target mode, ignore PHASEMIS during data phases.
This bit seems to be flakey on U160 controllers acting
in target mode.
aic7xxx_pci.c:
Add support for the 29160C CPCI adapter.
Add definitions for subvendor ID information
available for devices with the "9005" vendor id.
We currently use this information to determine
if a multi-function device doesn't have the second
channel hooked up on a board.
Add rudimentary power mode code so we can put the
controller into the D0 state. In the future this
will be an OSM callback so that in FreeBSD we don't
duplicate functionality provided by the PCI code.
The powerstate code was added after I'd completed
my regression tests on this code.
Only capture "left over BIOS state" if the POWRDN
setting is not set in HCNTRL.
In target mode, don't bother sending incremental
CRC data.
2000-12-20 01:11:37 +00:00
|
|
|
end_index = index + 1 + ahc->msgout_buf[index + 1];
|
|
|
|
if (ahc->msgout_buf[index+2] == msgval
|
|
|
|
&& type == AHCMSG_EXT) {
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
if (full) {
|
|
|
|
if (ahc->msgout_index > end_index)
|
|
|
|
found = TRUE;
|
|
|
|
} else if (ahc->msgout_index > index)
|
|
|
|
found = TRUE;
|
|
|
|
}
|
ahc_eisa.c:
ahc_pci.c:
Add detach support.
Make use of soft allocated on our behalf by newbus.
For PCI devices, disable the mapping type we aren't
using for extra protection from rogue code.
aic7xxx_93cx6.c:
aic7xxx_93cx6.h:
Sync perforce IDs.
aic7xxx_freebsd.c:
Capture the eventhandle returned by EVENTHANDER_REGISTER
so we can kill the handler off during detach.
Use AHC_* constants instead of hard coded numbers in a
few more places.
Test PPR option state when deciding to "really" negotiate
when the CAM_NEGOTIATE flag is passed in a CCB.
Make use of core "ahc_pause_and_flushwork" routine in our
timeout handler rather than re-inventing this code.
Cleanup all of our resources (really!) in ahc_platform_free().
We should be all set to become a module now.
Implement the core ahc_detach() routine shared by all of
the FreeBSD front-ends.
aic7xxx_freebsd.h:
Softc storage for our event handler.
Null implementation for the ahc_platform_flushwork() OSM
callback. FreeBSD doesn't need this as XPT callbacks are
safe from all contexts and are done directly in ahc_done().
aic7xxx_inline.h:
Implement new lazy interrupt scheme. To avoid an extra
PCI bus read, we first check our completion queues to
see if any work has completed. If work is available, we
assume that this is the source of the interrupt and skip
reading INTSTAT. Any remaining interrupt status will be
cleared by a second call to the interrupt handler should
the interrupt line still be asserted. This drops the
interrupt handler down to a single PCI bus read in the
common case of I/O completion. This is the same overhead
as in the not so distant past, but the extra sanity of
perforning a PCI read after clearing the command complete
interrupt and before running the completion queue to avoid
missing command complete interrupts added a cycle.
aic7xxx.c:
During initialization, be sure to initialize all scratch
ram locations before they are read to avoid parity errors.
In this case, we use a new function, ahc_unbusy_tcl() to
initialize the scratch ram busy target table.
Replace instances of ahc_index_busy_tcl() used to unbusy
a tcl without looking at the old value with ahc_unbusy_tcl().
Modify ahc_sent_msg so that it can find single byte messages.
ahc_sent_msg is now used to determine if a transfer negotiation
attempt resulted in a bus free.
Be more careful in filtering out only the SCSI interrupts
of interest in ahc_handle_scsiint.
Rearrange interrupt clearing code to ensure that at least
one PCI transaction occurrs after hitting CLRSINT1 and
writting to CLRINT. CLRSINT1 writes take a bit to
take effect, and the re-arrangement provides sufficient
delay to ensure the write to CLRINT is effective. The
old code might report a spurious interrupt on some "fast"
chipsets.
export ahc-update_target_msg_request for use by OSM code.
If a target does not respond to our ATN request, clear
it once we move to a non-message phase. This avoids
sending a MSG_NOOP in some later message out phase.
Use max lun and max target constants instead of
hard-coded values.
Use softc storage built into our device_t under FreeBSD.
Fix a bug in ahc_free() that caused us to delete
resources that were not allocated.
Clean up any tstate/lstate info in ahc_free().
Clear the powerdown state in ahc_reset() so that
registers can be accessed.
Add a preliminary function for pausing the chip and
processing any posted work.
Add a preliminary suspend and resume functions.
aic7xxx.h:
Limit the number of supported luns to 64. We don't
support information unit transfers, so this is the
maximum that makes sense for these chips.
Add a new flag AHC_ALL_INTERRUPTS that forces the
processing of all interrupt state in a single invokation
of ahc_intr(). When the flag is not set, we use the
lazy interrupt handling scheme.
Add data structures to store controller state while
we are suspended.
Use constants instead of hard coded values where appropriate.
Correct some harmless "unsigned/signed" conflicts.
aic7xxx.seq:
Only perform the SCSIBUSL fix on ULTRA2 or newer controllers.
Older controllers seem to be confused by this.
In target mode, ignore PHASEMIS during data phases.
This bit seems to be flakey on U160 controllers acting
in target mode.
aic7xxx_pci.c:
Add support for the 29160C CPCI adapter.
Add definitions for subvendor ID information
available for devices with the "9005" vendor id.
We currently use this information to determine
if a multi-function device doesn't have the second
channel hooked up on a board.
Add rudimentary power mode code so we can put the
controller into the D0 state. In the future this
will be an OSM callback so that in FreeBSD we don't
duplicate functionality provided by the PCI code.
The powerstate code was added after I'd completed
my regression tests on this code.
Only capture "left over BIOS state" if the POWRDN
setting is not set in HCNTRL.
In target mode, don't bother sending incremental
CRC data.
2000-12-20 01:11:37 +00:00
|
|
|
index = end_index;
|
2001-05-15 19:41:12 +00:00
|
|
|
} else if (ahc->msgout_buf[index] >= MSG_SIMPLE_TASK
|
2000-09-16 20:02:28 +00:00
|
|
|
&& ahc->msgout_buf[index] <= MSG_IGN_WIDE_RESIDUE) {
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/* Skip tag type and tag id or residue param*/
|
|
|
|
index += 2;
|
|
|
|
} else {
|
|
|
|
/* Single byte message */
|
ahc_eisa.c:
ahc_pci.c:
Add detach support.
Make use of soft allocated on our behalf by newbus.
For PCI devices, disable the mapping type we aren't
using for extra protection from rogue code.
aic7xxx_93cx6.c:
aic7xxx_93cx6.h:
Sync perforce IDs.
aic7xxx_freebsd.c:
Capture the eventhandle returned by EVENTHANDER_REGISTER
so we can kill the handler off during detach.
Use AHC_* constants instead of hard coded numbers in a
few more places.
Test PPR option state when deciding to "really" negotiate
when the CAM_NEGOTIATE flag is passed in a CCB.
Make use of core "ahc_pause_and_flushwork" routine in our
timeout handler rather than re-inventing this code.
Cleanup all of our resources (really!) in ahc_platform_free().
We should be all set to become a module now.
Implement the core ahc_detach() routine shared by all of
the FreeBSD front-ends.
aic7xxx_freebsd.h:
Softc storage for our event handler.
Null implementation for the ahc_platform_flushwork() OSM
callback. FreeBSD doesn't need this as XPT callbacks are
safe from all contexts and are done directly in ahc_done().
aic7xxx_inline.h:
Implement new lazy interrupt scheme. To avoid an extra
PCI bus read, we first check our completion queues to
see if any work has completed. If work is available, we
assume that this is the source of the interrupt and skip
reading INTSTAT. Any remaining interrupt status will be
cleared by a second call to the interrupt handler should
the interrupt line still be asserted. This drops the
interrupt handler down to a single PCI bus read in the
common case of I/O completion. This is the same overhead
as in the not so distant past, but the extra sanity of
perforning a PCI read after clearing the command complete
interrupt and before running the completion queue to avoid
missing command complete interrupts added a cycle.
aic7xxx.c:
During initialization, be sure to initialize all scratch
ram locations before they are read to avoid parity errors.
In this case, we use a new function, ahc_unbusy_tcl() to
initialize the scratch ram busy target table.
Replace instances of ahc_index_busy_tcl() used to unbusy
a tcl without looking at the old value with ahc_unbusy_tcl().
Modify ahc_sent_msg so that it can find single byte messages.
ahc_sent_msg is now used to determine if a transfer negotiation
attempt resulted in a bus free.
Be more careful in filtering out only the SCSI interrupts
of interest in ahc_handle_scsiint.
Rearrange interrupt clearing code to ensure that at least
one PCI transaction occurrs after hitting CLRSINT1 and
writting to CLRINT. CLRSINT1 writes take a bit to
take effect, and the re-arrangement provides sufficient
delay to ensure the write to CLRINT is effective. The
old code might report a spurious interrupt on some "fast"
chipsets.
export ahc-update_target_msg_request for use by OSM code.
If a target does not respond to our ATN request, clear
it once we move to a non-message phase. This avoids
sending a MSG_NOOP in some later message out phase.
Use max lun and max target constants instead of
hard-coded values.
Use softc storage built into our device_t under FreeBSD.
Fix a bug in ahc_free() that caused us to delete
resources that were not allocated.
Clean up any tstate/lstate info in ahc_free().
Clear the powerdown state in ahc_reset() so that
registers can be accessed.
Add a preliminary function for pausing the chip and
processing any posted work.
Add a preliminary suspend and resume functions.
aic7xxx.h:
Limit the number of supported luns to 64. We don't
support information unit transfers, so this is the
maximum that makes sense for these chips.
Add a new flag AHC_ALL_INTERRUPTS that forces the
processing of all interrupt state in a single invokation
of ahc_intr(). When the flag is not set, we use the
lazy interrupt handling scheme.
Add data structures to store controller state while
we are suspended.
Use constants instead of hard coded values where appropriate.
Correct some harmless "unsigned/signed" conflicts.
aic7xxx.seq:
Only perform the SCSIBUSL fix on ULTRA2 or newer controllers.
Older controllers seem to be confused by this.
In target mode, ignore PHASEMIS during data phases.
This bit seems to be flakey on U160 controllers acting
in target mode.
aic7xxx_pci.c:
Add support for the 29160C CPCI adapter.
Add definitions for subvendor ID information
available for devices with the "9005" vendor id.
We currently use this information to determine
if a multi-function device doesn't have the second
channel hooked up on a board.
Add rudimentary power mode code so we can put the
controller into the D0 state. In the future this
will be an OSM callback so that in FreeBSD we don't
duplicate functionality provided by the PCI code.
The powerstate code was added after I'd completed
my regression tests on this code.
Only capture "left over BIOS state" if the POWRDN
setting is not set in HCNTRL.
In target mode, don't bother sending incremental
CRC data.
2000-12-20 01:11:37 +00:00
|
|
|
if (type == AHCMSG_1B
|
|
|
|
&& ahc->msgout_buf[index] == msgval
|
|
|
|
&& ahc->msgout_index > index)
|
|
|
|
found = TRUE;
|
2000-09-16 20:02:28 +00:00
|
|
|
index++;
|
|
|
|
}
|
ahc_eisa.c:
ahc_pci.c:
Add detach support.
Make use of soft allocated on our behalf by newbus.
For PCI devices, disable the mapping type we aren't
using for extra protection from rogue code.
aic7xxx_93cx6.c:
aic7xxx_93cx6.h:
Sync perforce IDs.
aic7xxx_freebsd.c:
Capture the eventhandle returned by EVENTHANDER_REGISTER
so we can kill the handler off during detach.
Use AHC_* constants instead of hard coded numbers in a
few more places.
Test PPR option state when deciding to "really" negotiate
when the CAM_NEGOTIATE flag is passed in a CCB.
Make use of core "ahc_pause_and_flushwork" routine in our
timeout handler rather than re-inventing this code.
Cleanup all of our resources (really!) in ahc_platform_free().
We should be all set to become a module now.
Implement the core ahc_detach() routine shared by all of
the FreeBSD front-ends.
aic7xxx_freebsd.h:
Softc storage for our event handler.
Null implementation for the ahc_platform_flushwork() OSM
callback. FreeBSD doesn't need this as XPT callbacks are
safe from all contexts and are done directly in ahc_done().
aic7xxx_inline.h:
Implement new lazy interrupt scheme. To avoid an extra
PCI bus read, we first check our completion queues to
see if any work has completed. If work is available, we
assume that this is the source of the interrupt and skip
reading INTSTAT. Any remaining interrupt status will be
cleared by a second call to the interrupt handler should
the interrupt line still be asserted. This drops the
interrupt handler down to a single PCI bus read in the
common case of I/O completion. This is the same overhead
as in the not so distant past, but the extra sanity of
perforning a PCI read after clearing the command complete
interrupt and before running the completion queue to avoid
missing command complete interrupts added a cycle.
aic7xxx.c:
During initialization, be sure to initialize all scratch
ram locations before they are read to avoid parity errors.
In this case, we use a new function, ahc_unbusy_tcl() to
initialize the scratch ram busy target table.
Replace instances of ahc_index_busy_tcl() used to unbusy
a tcl without looking at the old value with ahc_unbusy_tcl().
Modify ahc_sent_msg so that it can find single byte messages.
ahc_sent_msg is now used to determine if a transfer negotiation
attempt resulted in a bus free.
Be more careful in filtering out only the SCSI interrupts
of interest in ahc_handle_scsiint.
Rearrange interrupt clearing code to ensure that at least
one PCI transaction occurrs after hitting CLRSINT1 and
writting to CLRINT. CLRSINT1 writes take a bit to
take effect, and the re-arrangement provides sufficient
delay to ensure the write to CLRINT is effective. The
old code might report a spurious interrupt on some "fast"
chipsets.
export ahc-update_target_msg_request for use by OSM code.
If a target does not respond to our ATN request, clear
it once we move to a non-message phase. This avoids
sending a MSG_NOOP in some later message out phase.
Use max lun and max target constants instead of
hard-coded values.
Use softc storage built into our device_t under FreeBSD.
Fix a bug in ahc_free() that caused us to delete
resources that were not allocated.
Clean up any tstate/lstate info in ahc_free().
Clear the powerdown state in ahc_reset() so that
registers can be accessed.
Add a preliminary function for pausing the chip and
processing any posted work.
Add a preliminary suspend and resume functions.
aic7xxx.h:
Limit the number of supported luns to 64. We don't
support information unit transfers, so this is the
maximum that makes sense for these chips.
Add a new flag AHC_ALL_INTERRUPTS that forces the
processing of all interrupt state in a single invokation
of ahc_intr(). When the flag is not set, we use the
lazy interrupt handling scheme.
Add data structures to store controller state while
we are suspended.
Use constants instead of hard coded values where appropriate.
Correct some harmless "unsigned/signed" conflicts.
aic7xxx.seq:
Only perform the SCSIBUSL fix on ULTRA2 or newer controllers.
Older controllers seem to be confused by this.
In target mode, ignore PHASEMIS during data phases.
This bit seems to be flakey on U160 controllers acting
in target mode.
aic7xxx_pci.c:
Add support for the 29160C CPCI adapter.
Add definitions for subvendor ID information
available for devices with the "9005" vendor id.
We currently use this information to determine
if a multi-function device doesn't have the second
channel hooked up on a board.
Add rudimentary power mode code so we can put the
controller into the D0 state. In the future this
will be an OSM callback so that in FreeBSD we don't
duplicate functionality provided by the PCI code.
The powerstate code was added after I'd completed
my regression tests on this code.
Only capture "left over BIOS state" if the POWRDN
setting is not set in HCNTRL.
In target mode, don't bother sending incremental
CRC data.
2000-12-20 01:11:37 +00:00
|
|
|
|
|
|
|
if (found)
|
|
|
|
break;
|
1998-09-15 07:24:17 +00:00
|
|
|
}
|
2000-09-16 20:02:28 +00:00
|
|
|
return (found);
|
1998-09-15 07:24:17 +00:00
|
|
|
}
|
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/*
|
2001-05-15 19:41:12 +00:00
|
|
|
* Wait for a complete incoming message, parse it, and respond accordingly.
|
2000-09-16 20:02:28 +00:00
|
|
|
*/
|
|
|
|
static int
|
|
|
|
ahc_parse_msg(struct ahc_softc *ahc, struct ahc_devinfo *devinfo)
|
1998-09-15 07:24:17 +00:00
|
|
|
{
|
2000-09-16 20:02:28 +00:00
|
|
|
struct ahc_initiator_tinfo *tinfo;
|
2001-03-29 00:36:35 +00:00
|
|
|
struct ahc_tmode_tstate *tstate;
|
2000-09-16 20:02:28 +00:00
|
|
|
int reject;
|
|
|
|
int done;
|
|
|
|
int response;
|
|
|
|
u_int targ_scsirate;
|
|
|
|
|
|
|
|
done = MSGLOOP_IN_PROG;
|
|
|
|
response = FALSE;
|
|
|
|
reject = FALSE;
|
|
|
|
tinfo = ahc_fetch_transinfo(ahc, devinfo->channel, devinfo->our_scsiid,
|
|
|
|
devinfo->target, &tstate);
|
|
|
|
targ_scsirate = tinfo->scsirate;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
|
|
|
/*
|
2003-05-03 23:55:38 +00:00
|
|
|
* Parse as much of the message as is available,
|
2000-09-16 20:02:28 +00:00
|
|
|
* rejecting it if we don't support it. When
|
2003-05-03 23:55:38 +00:00
|
|
|
* the entire message is available and has been
|
2000-09-16 20:02:28 +00:00
|
|
|
* handled, return MSGLOOP_MSGCOMPLETE, indicating
|
|
|
|
* that we have parsed an entire message.
|
|
|
|
*
|
|
|
|
* In the case of extended messages, we accept the length
|
|
|
|
* byte outright and perform more checking once we know the
|
|
|
|
* extended message type.
|
1998-09-15 07:24:17 +00:00
|
|
|
*/
|
2000-09-16 20:02:28 +00:00
|
|
|
switch (ahc->msgin_buf[0]) {
|
2002-08-31 06:41:37 +00:00
|
|
|
case MSG_DISCONNECT:
|
|
|
|
case MSG_SAVEDATAPOINTER:
|
|
|
|
case MSG_CMDCOMPLETE:
|
|
|
|
case MSG_RESTOREPOINTERS:
|
|
|
|
case MSG_IGN_WIDE_RESIDUE:
|
|
|
|
/*
|
|
|
|
* End our message loop as these are messages
|
|
|
|
* the sequencer handles on its own.
|
|
|
|
*/
|
|
|
|
done = MSGLOOP_TERMINATED;
|
|
|
|
break;
|
2000-09-16 20:02:28 +00:00
|
|
|
case MSG_MESSAGE_REJECT:
|
|
|
|
response = ahc_handle_msg_reject(ahc, devinfo);
|
|
|
|
/* FALLTHROUGH */
|
|
|
|
case MSG_NOOP:
|
|
|
|
done = MSGLOOP_MSGCOMPLETE;
|
|
|
|
break;
|
|
|
|
case MSG_EXTENDED:
|
1998-09-15 07:24:17 +00:00
|
|
|
{
|
2000-09-16 20:02:28 +00:00
|
|
|
/* Wait for enough of the message to begin validation */
|
|
|
|
if (ahc->msgin_index < 2)
|
|
|
|
break;
|
|
|
|
switch (ahc->msgin_buf[2]) {
|
|
|
|
case MSG_EXT_SDTR:
|
|
|
|
{
|
|
|
|
struct ahc_syncrate *syncrate;
|
|
|
|
u_int period;
|
|
|
|
u_int ppr_options;
|
|
|
|
u_int offset;
|
|
|
|
u_int saved_offset;
|
|
|
|
|
|
|
|
if (ahc->msgin_buf[1] != MSG_EXT_SDTR_LEN) {
|
|
|
|
reject = TRUE;
|
|
|
|
break;
|
|
|
|
}
|
1999-05-23 18:55:58 +00:00
|
|
|
|
1998-09-15 07:24:17 +00:00
|
|
|
/*
|
2000-09-16 20:02:28 +00:00
|
|
|
* Wait until we have both args before validating
|
|
|
|
* and acting on this message.
|
|
|
|
*
|
|
|
|
* Add one to MSG_EXT_SDTR_LEN to account for
|
|
|
|
* the extended message preamble.
|
1998-09-15 07:24:17 +00:00
|
|
|
*/
|
2000-09-16 20:02:28 +00:00
|
|
|
if (ahc->msgin_index < (MSG_EXT_SDTR_LEN + 1))
|
|
|
|
break;
|
2000-07-18 20:12:14 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
period = ahc->msgin_buf[3];
|
|
|
|
ppr_options = 0;
|
|
|
|
saved_offset = offset = ahc->msgin_buf[4];
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
syncrate = ahc_devlimited_syncrate(ahc, tinfo, &period,
|
|
|
|
&ppr_options,
|
|
|
|
devinfo->role);
|
|
|
|
ahc_validate_offset(ahc, tinfo, syncrate, &offset,
|
|
|
|
targ_scsirate & WIDEXFER,
|
|
|
|
devinfo->role);
|
2000-10-05 04:24:14 +00:00
|
|
|
if (bootverbose) {
|
|
|
|
printf("(%s:%c:%d:%d): Received "
|
|
|
|
"SDTR period %x, offset %x\n\t"
|
|
|
|
"Filtered to period %x, offset %x\n",
|
|
|
|
ahc_name(ahc), devinfo->channel,
|
|
|
|
devinfo->target, devinfo->lun,
|
|
|
|
ahc->msgin_buf[3], saved_offset,
|
|
|
|
period, offset);
|
|
|
|
}
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_set_syncrate(ahc, devinfo,
|
|
|
|
syncrate, period,
|
|
|
|
offset, ppr_options,
|
|
|
|
AHC_TRANS_ACTIVE|AHC_TRANS_GOAL,
|
|
|
|
/*paused*/TRUE);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* See if we initiated Sync Negotiation
|
|
|
|
* and didn't have to fall down to async
|
|
|
|
* transfers.
|
|
|
|
*/
|
ahc_eisa.c:
ahc_pci.c:
Add detach support.
Make use of soft allocated on our behalf by newbus.
For PCI devices, disable the mapping type we aren't
using for extra protection from rogue code.
aic7xxx_93cx6.c:
aic7xxx_93cx6.h:
Sync perforce IDs.
aic7xxx_freebsd.c:
Capture the eventhandle returned by EVENTHANDER_REGISTER
so we can kill the handler off during detach.
Use AHC_* constants instead of hard coded numbers in a
few more places.
Test PPR option state when deciding to "really" negotiate
when the CAM_NEGOTIATE flag is passed in a CCB.
Make use of core "ahc_pause_and_flushwork" routine in our
timeout handler rather than re-inventing this code.
Cleanup all of our resources (really!) in ahc_platform_free().
We should be all set to become a module now.
Implement the core ahc_detach() routine shared by all of
the FreeBSD front-ends.
aic7xxx_freebsd.h:
Softc storage for our event handler.
Null implementation for the ahc_platform_flushwork() OSM
callback. FreeBSD doesn't need this as XPT callbacks are
safe from all contexts and are done directly in ahc_done().
aic7xxx_inline.h:
Implement new lazy interrupt scheme. To avoid an extra
PCI bus read, we first check our completion queues to
see if any work has completed. If work is available, we
assume that this is the source of the interrupt and skip
reading INTSTAT. Any remaining interrupt status will be
cleared by a second call to the interrupt handler should
the interrupt line still be asserted. This drops the
interrupt handler down to a single PCI bus read in the
common case of I/O completion. This is the same overhead
as in the not so distant past, but the extra sanity of
perforning a PCI read after clearing the command complete
interrupt and before running the completion queue to avoid
missing command complete interrupts added a cycle.
aic7xxx.c:
During initialization, be sure to initialize all scratch
ram locations before they are read to avoid parity errors.
In this case, we use a new function, ahc_unbusy_tcl() to
initialize the scratch ram busy target table.
Replace instances of ahc_index_busy_tcl() used to unbusy
a tcl without looking at the old value with ahc_unbusy_tcl().
Modify ahc_sent_msg so that it can find single byte messages.
ahc_sent_msg is now used to determine if a transfer negotiation
attempt resulted in a bus free.
Be more careful in filtering out only the SCSI interrupts
of interest in ahc_handle_scsiint.
Rearrange interrupt clearing code to ensure that at least
one PCI transaction occurrs after hitting CLRSINT1 and
writting to CLRINT. CLRSINT1 writes take a bit to
take effect, and the re-arrangement provides sufficient
delay to ensure the write to CLRINT is effective. The
old code might report a spurious interrupt on some "fast"
chipsets.
export ahc-update_target_msg_request for use by OSM code.
If a target does not respond to our ATN request, clear
it once we move to a non-message phase. This avoids
sending a MSG_NOOP in some later message out phase.
Use max lun and max target constants instead of
hard-coded values.
Use softc storage built into our device_t under FreeBSD.
Fix a bug in ahc_free() that caused us to delete
resources that were not allocated.
Clean up any tstate/lstate info in ahc_free().
Clear the powerdown state in ahc_reset() so that
registers can be accessed.
Add a preliminary function for pausing the chip and
processing any posted work.
Add a preliminary suspend and resume functions.
aic7xxx.h:
Limit the number of supported luns to 64. We don't
support information unit transfers, so this is the
maximum that makes sense for these chips.
Add a new flag AHC_ALL_INTERRUPTS that forces the
processing of all interrupt state in a single invokation
of ahc_intr(). When the flag is not set, we use the
lazy interrupt handling scheme.
Add data structures to store controller state while
we are suspended.
Use constants instead of hard coded values where appropriate.
Correct some harmless "unsigned/signed" conflicts.
aic7xxx.seq:
Only perform the SCSIBUSL fix on ULTRA2 or newer controllers.
Older controllers seem to be confused by this.
In target mode, ignore PHASEMIS during data phases.
This bit seems to be flakey on U160 controllers acting
in target mode.
aic7xxx_pci.c:
Add support for the 29160C CPCI adapter.
Add definitions for subvendor ID information
available for devices with the "9005" vendor id.
We currently use this information to determine
if a multi-function device doesn't have the second
channel hooked up on a board.
Add rudimentary power mode code so we can put the
controller into the D0 state. In the future this
will be an OSM callback so that in FreeBSD we don't
duplicate functionality provided by the PCI code.
The powerstate code was added after I'd completed
my regression tests on this code.
Only capture "left over BIOS state" if the POWRDN
setting is not set in HCNTRL.
In target mode, don't bother sending incremental
CRC data.
2000-12-20 01:11:37 +00:00
|
|
|
if (ahc_sent_msg(ahc, AHCMSG_EXT, MSG_EXT_SDTR, TRUE)) {
|
2000-09-16 20:02:28 +00:00
|
|
|
/* We started it */
|
|
|
|
if (saved_offset != offset) {
|
|
|
|
/* Went too low - force async */
|
|
|
|
reject = TRUE;
|
|
|
|
}
|
|
|
|
} else {
|
1998-09-15 07:24:17 +00:00
|
|
|
/*
|
2000-09-16 20:02:28 +00:00
|
|
|
* Send our own SDTR in reply
|
1998-09-15 07:24:17 +00:00
|
|
|
*/
|
2001-03-29 00:36:35 +00:00
|
|
|
if (bootverbose
|
|
|
|
&& devinfo->role == ROLE_INITIATOR) {
|
2000-10-05 04:24:14 +00:00
|
|
|
printf("(%s:%c:%d:%d): Target "
|
|
|
|
"Initiated SDTR\n",
|
|
|
|
ahc_name(ahc), devinfo->channel,
|
|
|
|
devinfo->target, devinfo->lun);
|
|
|
|
}
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc->msgout_index = 0;
|
|
|
|
ahc->msgout_len = 0;
|
2000-10-05 04:24:14 +00:00
|
|
|
ahc_construct_sdtr(ahc, devinfo,
|
|
|
|
period, offset);
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc->msgout_index = 0;
|
|
|
|
response = TRUE;
|
|
|
|
}
|
|
|
|
done = MSGLOOP_MSGCOMPLETE;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
case MSG_EXT_WDTR:
|
|
|
|
{
|
|
|
|
u_int bus_width;
|
|
|
|
u_int saved_width;
|
|
|
|
u_int sending_reply;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
sending_reply = FALSE;
|
|
|
|
if (ahc->msgin_buf[1] != MSG_EXT_WDTR_LEN) {
|
|
|
|
reject = TRUE;
|
|
|
|
break;
|
|
|
|
}
|
1999-04-23 23:27:31 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/*
|
|
|
|
* Wait until we have our arg before validating
|
|
|
|
* and acting on this message.
|
|
|
|
*
|
|
|
|
* Add one to MSG_EXT_WDTR_LEN to account for
|
|
|
|
* the extended message preamble.
|
|
|
|
*/
|
|
|
|
if (ahc->msgin_index < (MSG_EXT_WDTR_LEN + 1))
|
|
|
|
break;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
bus_width = ahc->msgin_buf[3];
|
|
|
|
saved_width = bus_width;
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
ahc_validate_width(ahc, tinfo, &bus_width,
|
|
|
|
devinfo->role);
|
2000-10-05 04:24:14 +00:00
|
|
|
if (bootverbose) {
|
|
|
|
printf("(%s:%c:%d:%d): Received WDTR "
|
|
|
|
"%x filtered to %x\n",
|
|
|
|
ahc_name(ahc), devinfo->channel,
|
|
|
|
devinfo->target, devinfo->lun,
|
|
|
|
saved_width, bus_width);
|
|
|
|
}
|
1998-12-10 04:14:50 +00:00
|
|
|
|
ahc_eisa.c:
ahc_pci.c:
Add detach support.
Make use of soft allocated on our behalf by newbus.
For PCI devices, disable the mapping type we aren't
using for extra protection from rogue code.
aic7xxx_93cx6.c:
aic7xxx_93cx6.h:
Sync perforce IDs.
aic7xxx_freebsd.c:
Capture the eventhandle returned by EVENTHANDER_REGISTER
so we can kill the handler off during detach.
Use AHC_* constants instead of hard coded numbers in a
few more places.
Test PPR option state when deciding to "really" negotiate
when the CAM_NEGOTIATE flag is passed in a CCB.
Make use of core "ahc_pause_and_flushwork" routine in our
timeout handler rather than re-inventing this code.
Cleanup all of our resources (really!) in ahc_platform_free().
We should be all set to become a module now.
Implement the core ahc_detach() routine shared by all of
the FreeBSD front-ends.
aic7xxx_freebsd.h:
Softc storage for our event handler.
Null implementation for the ahc_platform_flushwork() OSM
callback. FreeBSD doesn't need this as XPT callbacks are
safe from all contexts and are done directly in ahc_done().
aic7xxx_inline.h:
Implement new lazy interrupt scheme. To avoid an extra
PCI bus read, we first check our completion queues to
see if any work has completed. If work is available, we
assume that this is the source of the interrupt and skip
reading INTSTAT. Any remaining interrupt status will be
cleared by a second call to the interrupt handler should
the interrupt line still be asserted. This drops the
interrupt handler down to a single PCI bus read in the
common case of I/O completion. This is the same overhead
as in the not so distant past, but the extra sanity of
perforning a PCI read after clearing the command complete
interrupt and before running the completion queue to avoid
missing command complete interrupts added a cycle.
aic7xxx.c:
During initialization, be sure to initialize all scratch
ram locations before they are read to avoid parity errors.
In this case, we use a new function, ahc_unbusy_tcl() to
initialize the scratch ram busy target table.
Replace instances of ahc_index_busy_tcl() used to unbusy
a tcl without looking at the old value with ahc_unbusy_tcl().
Modify ahc_sent_msg so that it can find single byte messages.
ahc_sent_msg is now used to determine if a transfer negotiation
attempt resulted in a bus free.
Be more careful in filtering out only the SCSI interrupts
of interest in ahc_handle_scsiint.
Rearrange interrupt clearing code to ensure that at least
one PCI transaction occurrs after hitting CLRSINT1 and
writting to CLRINT. CLRSINT1 writes take a bit to
take effect, and the re-arrangement provides sufficient
delay to ensure the write to CLRINT is effective. The
old code might report a spurious interrupt on some "fast"
chipsets.
export ahc-update_target_msg_request for use by OSM code.
If a target does not respond to our ATN request, clear
it once we move to a non-message phase. This avoids
sending a MSG_NOOP in some later message out phase.
Use max lun and max target constants instead of
hard-coded values.
Use softc storage built into our device_t under FreeBSD.
Fix a bug in ahc_free() that caused us to delete
resources that were not allocated.
Clean up any tstate/lstate info in ahc_free().
Clear the powerdown state in ahc_reset() so that
registers can be accessed.
Add a preliminary function for pausing the chip and
processing any posted work.
Add a preliminary suspend and resume functions.
aic7xxx.h:
Limit the number of supported luns to 64. We don't
support information unit transfers, so this is the
maximum that makes sense for these chips.
Add a new flag AHC_ALL_INTERRUPTS that forces the
processing of all interrupt state in a single invokation
of ahc_intr(). When the flag is not set, we use the
lazy interrupt handling scheme.
Add data structures to store controller state while
we are suspended.
Use constants instead of hard coded values where appropriate.
Correct some harmless "unsigned/signed" conflicts.
aic7xxx.seq:
Only perform the SCSIBUSL fix on ULTRA2 or newer controllers.
Older controllers seem to be confused by this.
In target mode, ignore PHASEMIS during data phases.
This bit seems to be flakey on U160 controllers acting
in target mode.
aic7xxx_pci.c:
Add support for the 29160C CPCI adapter.
Add definitions for subvendor ID information
available for devices with the "9005" vendor id.
We currently use this information to determine
if a multi-function device doesn't have the second
channel hooked up on a board.
Add rudimentary power mode code so we can put the
controller into the D0 state. In the future this
will be an OSM callback so that in FreeBSD we don't
duplicate functionality provided by the PCI code.
The powerstate code was added after I'd completed
my regression tests on this code.
Only capture "left over BIOS state" if the POWRDN
setting is not set in HCNTRL.
In target mode, don't bother sending incremental
CRC data.
2000-12-20 01:11:37 +00:00
|
|
|
if (ahc_sent_msg(ahc, AHCMSG_EXT, MSG_EXT_WDTR, TRUE)) {
|
1998-09-15 07:24:17 +00:00
|
|
|
/*
|
2000-09-16 20:02:28 +00:00
|
|
|
* Don't send a WDTR back to the
|
|
|
|
* target, since we asked first.
|
|
|
|
* If the width went higher than our
|
|
|
|
* request, reject it.
|
1998-09-15 07:24:17 +00:00
|
|
|
*/
|
2000-09-16 20:02:28 +00:00
|
|
|
if (saved_width > bus_width) {
|
|
|
|
reject = TRUE;
|
2000-10-05 04:24:14 +00:00
|
|
|
printf("(%s:%c:%d:%d): requested %dBit "
|
2000-09-16 20:02:28 +00:00
|
|
|
"transfers. Rejecting...\n",
|
2000-10-05 04:24:14 +00:00
|
|
|
ahc_name(ahc), devinfo->channel,
|
|
|
|
devinfo->target, devinfo->lun,
|
2000-09-16 20:02:28 +00:00
|
|
|
8 * (0x01 << bus_width));
|
|
|
|
bus_width = 0;
|
2000-02-09 21:25:00 +00:00
|
|
|
}
|
2000-09-16 20:02:28 +00:00
|
|
|
} else {
|
1998-09-15 07:24:17 +00:00
|
|
|
/*
|
2000-09-16 20:02:28 +00:00
|
|
|
* Send our own WDTR in reply
|
1998-09-15 07:24:17 +00:00
|
|
|
*/
|
2001-03-29 00:36:35 +00:00
|
|
|
if (bootverbose
|
|
|
|
&& devinfo->role == ROLE_INITIATOR) {
|
2000-10-05 04:24:14 +00:00
|
|
|
printf("(%s:%c:%d:%d): Target "
|
|
|
|
"Initiated WDTR\n",
|
|
|
|
ahc_name(ahc), devinfo->channel,
|
|
|
|
devinfo->target, devinfo->lun);
|
|
|
|
}
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc->msgout_index = 0;
|
|
|
|
ahc->msgout_len = 0;
|
2000-10-05 04:24:14 +00:00
|
|
|
ahc_construct_wdtr(ahc, devinfo, bus_width);
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc->msgout_index = 0;
|
|
|
|
response = TRUE;
|
|
|
|
sending_reply = TRUE;
|
1998-09-15 07:24:17 +00:00
|
|
|
}
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_set_width(ahc, devinfo, bus_width,
|
|
|
|
AHC_TRANS_ACTIVE|AHC_TRANS_GOAL,
|
|
|
|
/*paused*/TRUE);
|
|
|
|
/* After a wide message, we are async */
|
|
|
|
ahc_set_syncrate(ahc, devinfo,
|
|
|
|
/*syncrate*/NULL, /*period*/0,
|
|
|
|
/*offset*/0, /*ppr_options*/0,
|
|
|
|
AHC_TRANS_ACTIVE, /*paused*/TRUE);
|
|
|
|
if (sending_reply == FALSE && reject == FALSE) {
|
|
|
|
|
2002-08-31 06:41:37 +00:00
|
|
|
if (tinfo->goal.offset) {
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc->msgout_index = 0;
|
|
|
|
ahc->msgout_len = 0;
|
2000-10-05 04:24:14 +00:00
|
|
|
ahc_build_transfer_msg(ahc, devinfo);
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc->msgout_index = 0;
|
|
|
|
response = TRUE;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
done = MSGLOOP_MSGCOMPLETE;
|
1998-09-15 07:24:17 +00:00
|
|
|
break;
|
|
|
|
}
|
2000-09-16 20:02:28 +00:00
|
|
|
case MSG_EXT_PPR:
|
|
|
|
{
|
|
|
|
struct ahc_syncrate *syncrate;
|
|
|
|
u_int period;
|
|
|
|
u_int offset;
|
|
|
|
u_int bus_width;
|
|
|
|
u_int ppr_options;
|
|
|
|
u_int saved_width;
|
|
|
|
u_int saved_offset;
|
|
|
|
u_int saved_ppr_options;
|
2000-07-18 20:12:14 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
if (ahc->msgin_buf[1] != MSG_EXT_PPR_LEN) {
|
|
|
|
reject = TRUE;
|
|
|
|
break;
|
1999-08-16 22:49:29 +00:00
|
|
|
}
|
1998-12-10 04:14:50 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/*
|
|
|
|
* Wait until we have all args before validating
|
|
|
|
* and acting on this message.
|
|
|
|
*
|
|
|
|
* Add one to MSG_EXT_PPR_LEN to account for
|
|
|
|
* the extended message preamble.
|
|
|
|
*/
|
|
|
|
if (ahc->msgin_index < (MSG_EXT_PPR_LEN + 1))
|
|
|
|
break;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
period = ahc->msgin_buf[3];
|
|
|
|
offset = ahc->msgin_buf[5];
|
|
|
|
bus_width = ahc->msgin_buf[6];
|
|
|
|
saved_width = bus_width;
|
|
|
|
ppr_options = ahc->msgin_buf[7];
|
|
|
|
/*
|
|
|
|
* According to the spec, a DT only
|
|
|
|
* period factor with no DT option
|
|
|
|
* set implies async.
|
|
|
|
*/
|
|
|
|
if ((ppr_options & MSG_EXT_PPR_DT_REQ) == 0
|
|
|
|
&& period == 9)
|
|
|
|
offset = 0;
|
|
|
|
saved_ppr_options = ppr_options;
|
|
|
|
saved_offset = offset;
|
2000-02-09 21:25:00 +00:00
|
|
|
|
|
|
|
/*
|
2000-09-16 20:02:28 +00:00
|
|
|
* Mask out any options we don't support
|
|
|
|
* on any controller. Transfer options are
|
|
|
|
* only available if we are negotiating wide.
|
2000-02-09 21:25:00 +00:00
|
|
|
*/
|
2000-09-16 20:02:28 +00:00
|
|
|
ppr_options &= MSG_EXT_PPR_DT_REQ;
|
|
|
|
if (bus_width == 0)
|
|
|
|
ppr_options = 0;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
ahc_validate_width(ahc, tinfo, &bus_width,
|
|
|
|
devinfo->role);
|
|
|
|
syncrate = ahc_devlimited_syncrate(ahc, tinfo, &period,
|
|
|
|
&ppr_options,
|
|
|
|
devinfo->role);
|
|
|
|
ahc_validate_offset(ahc, tinfo, syncrate,
|
|
|
|
&offset, bus_width,
|
|
|
|
devinfo->role);
|
2000-09-16 20:02:28 +00:00
|
|
|
|
ahc_eisa.c:
ahc_pci.c:
Add detach support.
Make use of soft allocated on our behalf by newbus.
For PCI devices, disable the mapping type we aren't
using for extra protection from rogue code.
aic7xxx_93cx6.c:
aic7xxx_93cx6.h:
Sync perforce IDs.
aic7xxx_freebsd.c:
Capture the eventhandle returned by EVENTHANDER_REGISTER
so we can kill the handler off during detach.
Use AHC_* constants instead of hard coded numbers in a
few more places.
Test PPR option state when deciding to "really" negotiate
when the CAM_NEGOTIATE flag is passed in a CCB.
Make use of core "ahc_pause_and_flushwork" routine in our
timeout handler rather than re-inventing this code.
Cleanup all of our resources (really!) in ahc_platform_free().
We should be all set to become a module now.
Implement the core ahc_detach() routine shared by all of
the FreeBSD front-ends.
aic7xxx_freebsd.h:
Softc storage for our event handler.
Null implementation for the ahc_platform_flushwork() OSM
callback. FreeBSD doesn't need this as XPT callbacks are
safe from all contexts and are done directly in ahc_done().
aic7xxx_inline.h:
Implement new lazy interrupt scheme. To avoid an extra
PCI bus read, we first check our completion queues to
see if any work has completed. If work is available, we
assume that this is the source of the interrupt and skip
reading INTSTAT. Any remaining interrupt status will be
cleared by a second call to the interrupt handler should
the interrupt line still be asserted. This drops the
interrupt handler down to a single PCI bus read in the
common case of I/O completion. This is the same overhead
as in the not so distant past, but the extra sanity of
perforning a PCI read after clearing the command complete
interrupt and before running the completion queue to avoid
missing command complete interrupts added a cycle.
aic7xxx.c:
During initialization, be sure to initialize all scratch
ram locations before they are read to avoid parity errors.
In this case, we use a new function, ahc_unbusy_tcl() to
initialize the scratch ram busy target table.
Replace instances of ahc_index_busy_tcl() used to unbusy
a tcl without looking at the old value with ahc_unbusy_tcl().
Modify ahc_sent_msg so that it can find single byte messages.
ahc_sent_msg is now used to determine if a transfer negotiation
attempt resulted in a bus free.
Be more careful in filtering out only the SCSI interrupts
of interest in ahc_handle_scsiint.
Rearrange interrupt clearing code to ensure that at least
one PCI transaction occurrs after hitting CLRSINT1 and
writting to CLRINT. CLRSINT1 writes take a bit to
take effect, and the re-arrangement provides sufficient
delay to ensure the write to CLRINT is effective. The
old code might report a spurious interrupt on some "fast"
chipsets.
export ahc-update_target_msg_request for use by OSM code.
If a target does not respond to our ATN request, clear
it once we move to a non-message phase. This avoids
sending a MSG_NOOP in some later message out phase.
Use max lun and max target constants instead of
hard-coded values.
Use softc storage built into our device_t under FreeBSD.
Fix a bug in ahc_free() that caused us to delete
resources that were not allocated.
Clean up any tstate/lstate info in ahc_free().
Clear the powerdown state in ahc_reset() so that
registers can be accessed.
Add a preliminary function for pausing the chip and
processing any posted work.
Add a preliminary suspend and resume functions.
aic7xxx.h:
Limit the number of supported luns to 64. We don't
support information unit transfers, so this is the
maximum that makes sense for these chips.
Add a new flag AHC_ALL_INTERRUPTS that forces the
processing of all interrupt state in a single invokation
of ahc_intr(). When the flag is not set, we use the
lazy interrupt handling scheme.
Add data structures to store controller state while
we are suspended.
Use constants instead of hard coded values where appropriate.
Correct some harmless "unsigned/signed" conflicts.
aic7xxx.seq:
Only perform the SCSIBUSL fix on ULTRA2 or newer controllers.
Older controllers seem to be confused by this.
In target mode, ignore PHASEMIS during data phases.
This bit seems to be flakey on U160 controllers acting
in target mode.
aic7xxx_pci.c:
Add support for the 29160C CPCI adapter.
Add definitions for subvendor ID information
available for devices with the "9005" vendor id.
We currently use this information to determine
if a multi-function device doesn't have the second
channel hooked up on a board.
Add rudimentary power mode code so we can put the
controller into the D0 state. In the future this
will be an OSM callback so that in FreeBSD we don't
duplicate functionality provided by the PCI code.
The powerstate code was added after I'd completed
my regression tests on this code.
Only capture "left over BIOS state" if the POWRDN
setting is not set in HCNTRL.
In target mode, don't bother sending incremental
CRC data.
2000-12-20 01:11:37 +00:00
|
|
|
if (ahc_sent_msg(ahc, AHCMSG_EXT, MSG_EXT_PPR, TRUE)) {
|
2000-09-16 20:02:28 +00:00
|
|
|
/*
|
|
|
|
* If we are unable to do any of the
|
|
|
|
* requested options (we went too low),
|
|
|
|
* then we'll have to reject the message.
|
|
|
|
*/
|
|
|
|
if (saved_width > bus_width
|
|
|
|
|| saved_offset != offset
|
2000-10-05 04:24:14 +00:00
|
|
|
|| saved_ppr_options != ppr_options) {
|
2000-09-16 20:02:28 +00:00
|
|
|
reject = TRUE;
|
2000-10-05 04:24:14 +00:00
|
|
|
period = 0;
|
|
|
|
offset = 0;
|
|
|
|
bus_width = 0;
|
|
|
|
ppr_options = 0;
|
|
|
|
syncrate = NULL;
|
|
|
|
}
|
2000-09-16 20:02:28 +00:00
|
|
|
} else {
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
if (devinfo->role != ROLE_TARGET)
|
|
|
|
printf("(%s:%c:%d:%d): Target "
|
|
|
|
"Initiated PPR\n",
|
|
|
|
ahc_name(ahc), devinfo->channel,
|
|
|
|
devinfo->target, devinfo->lun);
|
|
|
|
else
|
|
|
|
printf("(%s:%c:%d:%d): Initiator "
|
|
|
|
"Initiated PPR\n",
|
|
|
|
ahc_name(ahc), devinfo->channel,
|
|
|
|
devinfo->target, devinfo->lun);
|
|
|
|
ahc->msgout_index = 0;
|
|
|
|
ahc->msgout_len = 0;
|
|
|
|
ahc_construct_ppr(ahc, devinfo, period, offset,
|
|
|
|
bus_width, ppr_options);
|
|
|
|
ahc->msgout_index = 0;
|
2000-09-16 20:02:28 +00:00
|
|
|
response = TRUE;
|
1999-03-05 23:35:48 +00:00
|
|
|
}
|
2000-10-05 04:24:14 +00:00
|
|
|
if (bootverbose) {
|
|
|
|
printf("(%s:%c:%d:%d): Received PPR width %x, "
|
|
|
|
"period %x, offset %x,options %x\n"
|
|
|
|
"\tFiltered to width %x, period %x, "
|
|
|
|
"offset %x, options %x\n",
|
|
|
|
ahc_name(ahc), devinfo->channel,
|
|
|
|
devinfo->target, devinfo->lun,
|
This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
|
|
|
saved_width, ahc->msgin_buf[3],
|
2000-10-05 04:24:14 +00:00
|
|
|
saved_offset, saved_ppr_options,
|
|
|
|
bus_width, period, offset, ppr_options);
|
|
|
|
}
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_set_width(ahc, devinfo, bus_width,
|
|
|
|
AHC_TRANS_ACTIVE|AHC_TRANS_GOAL,
|
|
|
|
/*paused*/TRUE);
|
|
|
|
ahc_set_syncrate(ahc, devinfo,
|
|
|
|
syncrate, period,
|
|
|
|
offset, ppr_options,
|
|
|
|
AHC_TRANS_ACTIVE|AHC_TRANS_GOAL,
|
|
|
|
/*paused*/TRUE);
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
done = MSGLOOP_MSGCOMPLETE;
|
2000-09-16 20:02:28 +00:00
|
|
|
break;
|
1998-09-15 07:24:17 +00:00
|
|
|
}
|
2000-09-16 20:02:28 +00:00
|
|
|
default:
|
|
|
|
/* Unknown extended message. Reject it. */
|
|
|
|
reject = TRUE;
|
2000-07-18 20:12:14 +00:00
|
|
|
break;
|
|
|
|
}
|
1998-09-15 07:24:17 +00:00
|
|
|
break;
|
|
|
|
}
|
2002-04-24 16:58:51 +00:00
|
|
|
#ifdef AHC_TARGET_MODE
|
2000-09-16 20:02:28 +00:00
|
|
|
case MSG_BUS_DEV_RESET:
|
|
|
|
ahc_handle_devreset(ahc, devinfo,
|
|
|
|
CAM_BDR_SENT,
|
|
|
|
"Bus Device Reset Received",
|
|
|
|
/*verbose_level*/0);
|
This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
|
|
|
ahc_restart(ahc);
|
2000-09-16 20:02:28 +00:00
|
|
|
done = MSGLOOP_TERMINATED;
|
1998-09-15 07:24:17 +00:00
|
|
|
break;
|
2000-09-16 20:02:28 +00:00
|
|
|
case MSG_ABORT_TAG:
|
|
|
|
case MSG_ABORT:
|
|
|
|
case MSG_CLEAR_QUEUE:
|
2002-04-24 16:58:51 +00:00
|
|
|
{
|
|
|
|
int tag;
|
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/* Target mode messages */
|
|
|
|
if (devinfo->role != ROLE_TARGET) {
|
|
|
|
reject = TRUE;
|
1998-09-15 07:24:17 +00:00
|
|
|
break;
|
|
|
|
}
|
2002-04-24 16:58:51 +00:00
|
|
|
tag = SCB_LIST_NULL;
|
|
|
|
if (ahc->msgin_buf[0] == MSG_ABORT_TAG)
|
|
|
|
tag = ahc_inb(ahc, INITIATOR_TAG);
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_abort_scbs(ahc, devinfo->target, devinfo->channel,
|
2002-04-24 16:58:51 +00:00
|
|
|
devinfo->lun, tag, ROLE_TARGET,
|
|
|
|
CAM_REQ_ABORTED);
|
1999-04-23 23:27:31 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
tstate = ahc->enabled_targets[devinfo->our_scsiid];
|
|
|
|
if (tstate != NULL) {
|
2001-03-29 00:36:35 +00:00
|
|
|
struct ahc_tmode_lstate* lstate;
|
1999-04-23 23:27:31 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
lstate = tstate->enabled_luns[devinfo->lun];
|
|
|
|
if (lstate != NULL) {
|
|
|
|
ahc_queue_lstate_event(ahc, lstate,
|
|
|
|
devinfo->our_scsiid,
|
|
|
|
ahc->msgin_buf[0],
|
2002-04-24 16:58:51 +00:00
|
|
|
/*arg*/tag);
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_send_lstate_events(ahc, lstate);
|
|
|
|
}
|
|
|
|
}
|
2002-04-24 16:58:51 +00:00
|
|
|
ahc_restart(ahc);
|
|
|
|
done = MSGLOOP_TERMINATED;
|
2000-09-16 20:02:28 +00:00
|
|
|
break;
|
2002-04-24 16:58:51 +00:00
|
|
|
}
|
2000-09-16 20:02:28 +00:00
|
|
|
#endif
|
|
|
|
case MSG_TERM_IO_PROC:
|
|
|
|
default:
|
|
|
|
reject = TRUE;
|
|
|
|
break;
|
|
|
|
}
|
2000-07-18 20:12:14 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
if (reject) {
|
|
|
|
/*
|
|
|
|
* Setup to reject the message.
|
|
|
|
*/
|
|
|
|
ahc->msgout_index = 0;
|
|
|
|
ahc->msgout_len = 1;
|
|
|
|
ahc->msgout_buf[0] = MSG_MESSAGE_REJECT;
|
|
|
|
done = MSGLOOP_MSGCOMPLETE;
|
|
|
|
response = TRUE;
|
2000-07-18 20:12:14 +00:00
|
|
|
}
|
1999-04-23 23:27:31 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
if (done != MSGLOOP_IN_PROG && !response)
|
|
|
|
/* Clear the outgoing message buffer */
|
|
|
|
ahc->msgout_len = 0;
|
1999-04-23 23:27:31 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
return (done);
|
|
|
|
}
|
1999-04-23 23:27:31 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/*
|
|
|
|
* Process a message reject message.
|
|
|
|
*/
|
|
|
|
static int
|
|
|
|
ahc_handle_msg_reject(struct ahc_softc *ahc, struct ahc_devinfo *devinfo)
|
|
|
|
{
|
1999-03-05 23:35:48 +00:00
|
|
|
/*
|
2000-09-16 20:02:28 +00:00
|
|
|
* What we care about here is if we had an
|
|
|
|
* outstanding SDTR or WDTR message for this
|
|
|
|
* target. If we did, this is a signal that
|
|
|
|
* the target is refusing negotiation.
|
1999-03-05 23:35:48 +00:00
|
|
|
*/
|
2000-09-16 20:02:28 +00:00
|
|
|
struct scb *scb;
|
|
|
|
struct ahc_initiator_tinfo *tinfo;
|
2001-03-29 00:36:35 +00:00
|
|
|
struct ahc_tmode_tstate *tstate;
|
2000-09-16 20:02:28 +00:00
|
|
|
u_int scb_index;
|
|
|
|
u_int last_msg;
|
|
|
|
int response = 0;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
scb_index = ahc_inb(ahc, SCB_TAG);
|
2000-10-05 04:24:14 +00:00
|
|
|
scb = ahc_lookup_scb(ahc, scb_index);
|
2000-09-16 20:02:28 +00:00
|
|
|
tinfo = ahc_fetch_transinfo(ahc, devinfo->channel,
|
|
|
|
devinfo->our_scsiid,
|
|
|
|
devinfo->target, &tstate);
|
|
|
|
/* Might be necessary */
|
|
|
|
last_msg = ahc_inb(ahc, LAST_MSG);
|
1998-09-15 07:24:17 +00:00
|
|
|
|
ahc_eisa.c:
ahc_pci.c:
Add detach support.
Make use of soft allocated on our behalf by newbus.
For PCI devices, disable the mapping type we aren't
using for extra protection from rogue code.
aic7xxx_93cx6.c:
aic7xxx_93cx6.h:
Sync perforce IDs.
aic7xxx_freebsd.c:
Capture the eventhandle returned by EVENTHANDER_REGISTER
so we can kill the handler off during detach.
Use AHC_* constants instead of hard coded numbers in a
few more places.
Test PPR option state when deciding to "really" negotiate
when the CAM_NEGOTIATE flag is passed in a CCB.
Make use of core "ahc_pause_and_flushwork" routine in our
timeout handler rather than re-inventing this code.
Cleanup all of our resources (really!) in ahc_platform_free().
We should be all set to become a module now.
Implement the core ahc_detach() routine shared by all of
the FreeBSD front-ends.
aic7xxx_freebsd.h:
Softc storage for our event handler.
Null implementation for the ahc_platform_flushwork() OSM
callback. FreeBSD doesn't need this as XPT callbacks are
safe from all contexts and are done directly in ahc_done().
aic7xxx_inline.h:
Implement new lazy interrupt scheme. To avoid an extra
PCI bus read, we first check our completion queues to
see if any work has completed. If work is available, we
assume that this is the source of the interrupt and skip
reading INTSTAT. Any remaining interrupt status will be
cleared by a second call to the interrupt handler should
the interrupt line still be asserted. This drops the
interrupt handler down to a single PCI bus read in the
common case of I/O completion. This is the same overhead
as in the not so distant past, but the extra sanity of
perforning a PCI read after clearing the command complete
interrupt and before running the completion queue to avoid
missing command complete interrupts added a cycle.
aic7xxx.c:
During initialization, be sure to initialize all scratch
ram locations before they are read to avoid parity errors.
In this case, we use a new function, ahc_unbusy_tcl() to
initialize the scratch ram busy target table.
Replace instances of ahc_index_busy_tcl() used to unbusy
a tcl without looking at the old value with ahc_unbusy_tcl().
Modify ahc_sent_msg so that it can find single byte messages.
ahc_sent_msg is now used to determine if a transfer negotiation
attempt resulted in a bus free.
Be more careful in filtering out only the SCSI interrupts
of interest in ahc_handle_scsiint.
Rearrange interrupt clearing code to ensure that at least
one PCI transaction occurrs after hitting CLRSINT1 and
writting to CLRINT. CLRSINT1 writes take a bit to
take effect, and the re-arrangement provides sufficient
delay to ensure the write to CLRINT is effective. The
old code might report a spurious interrupt on some "fast"
chipsets.
export ahc-update_target_msg_request for use by OSM code.
If a target does not respond to our ATN request, clear
it once we move to a non-message phase. This avoids
sending a MSG_NOOP in some later message out phase.
Use max lun and max target constants instead of
hard-coded values.
Use softc storage built into our device_t under FreeBSD.
Fix a bug in ahc_free() that caused us to delete
resources that were not allocated.
Clean up any tstate/lstate info in ahc_free().
Clear the powerdown state in ahc_reset() so that
registers can be accessed.
Add a preliminary function for pausing the chip and
processing any posted work.
Add a preliminary suspend and resume functions.
aic7xxx.h:
Limit the number of supported luns to 64. We don't
support information unit transfers, so this is the
maximum that makes sense for these chips.
Add a new flag AHC_ALL_INTERRUPTS that forces the
processing of all interrupt state in a single invokation
of ahc_intr(). When the flag is not set, we use the
lazy interrupt handling scheme.
Add data structures to store controller state while
we are suspended.
Use constants instead of hard coded values where appropriate.
Correct some harmless "unsigned/signed" conflicts.
aic7xxx.seq:
Only perform the SCSIBUSL fix on ULTRA2 or newer controllers.
Older controllers seem to be confused by this.
In target mode, ignore PHASEMIS during data phases.
This bit seems to be flakey on U160 controllers acting
in target mode.
aic7xxx_pci.c:
Add support for the 29160C CPCI adapter.
Add definitions for subvendor ID information
available for devices with the "9005" vendor id.
We currently use this information to determine
if a multi-function device doesn't have the second
channel hooked up on a board.
Add rudimentary power mode code so we can put the
controller into the D0 state. In the future this
will be an OSM callback so that in FreeBSD we don't
duplicate functionality provided by the PCI code.
The powerstate code was added after I'd completed
my regression tests on this code.
Only capture "left over BIOS state" if the POWRDN
setting is not set in HCNTRL.
In target mode, don't bother sending incremental
CRC data.
2000-12-20 01:11:37 +00:00
|
|
|
if (ahc_sent_msg(ahc, AHCMSG_EXT, MSG_EXT_PPR, /*full*/FALSE)) {
|
2000-09-22 22:18:05 +00:00
|
|
|
/*
|
|
|
|
* Target does not support the PPR message.
|
|
|
|
* Attempt to negotiate SPI-2 style.
|
|
|
|
*/
|
2000-10-05 04:24:14 +00:00
|
|
|
if (bootverbose) {
|
|
|
|
printf("(%s:%c:%d:%d): PPR Rejected. "
|
|
|
|
"Trying WDTR/SDTR\n",
|
|
|
|
ahc_name(ahc), devinfo->channel,
|
|
|
|
devinfo->target, devinfo->lun);
|
|
|
|
}
|
2000-09-22 22:18:05 +00:00
|
|
|
tinfo->goal.ppr_options = 0;
|
2001-05-15 19:41:12 +00:00
|
|
|
tinfo->curr.transport_version = 2;
|
2000-09-22 22:18:05 +00:00
|
|
|
tinfo->goal.transport_version = 2;
|
|
|
|
ahc->msgout_index = 0;
|
|
|
|
ahc->msgout_len = 0;
|
|
|
|
ahc_build_transfer_msg(ahc, devinfo);
|
|
|
|
ahc->msgout_index = 0;
|
|
|
|
response = 1;
|
ahc_eisa.c:
ahc_pci.c:
Add detach support.
Make use of soft allocated on our behalf by newbus.
For PCI devices, disable the mapping type we aren't
using for extra protection from rogue code.
aic7xxx_93cx6.c:
aic7xxx_93cx6.h:
Sync perforce IDs.
aic7xxx_freebsd.c:
Capture the eventhandle returned by EVENTHANDER_REGISTER
so we can kill the handler off during detach.
Use AHC_* constants instead of hard coded numbers in a
few more places.
Test PPR option state when deciding to "really" negotiate
when the CAM_NEGOTIATE flag is passed in a CCB.
Make use of core "ahc_pause_and_flushwork" routine in our
timeout handler rather than re-inventing this code.
Cleanup all of our resources (really!) in ahc_platform_free().
We should be all set to become a module now.
Implement the core ahc_detach() routine shared by all of
the FreeBSD front-ends.
aic7xxx_freebsd.h:
Softc storage for our event handler.
Null implementation for the ahc_platform_flushwork() OSM
callback. FreeBSD doesn't need this as XPT callbacks are
safe from all contexts and are done directly in ahc_done().
aic7xxx_inline.h:
Implement new lazy interrupt scheme. To avoid an extra
PCI bus read, we first check our completion queues to
see if any work has completed. If work is available, we
assume that this is the source of the interrupt and skip
reading INTSTAT. Any remaining interrupt status will be
cleared by a second call to the interrupt handler should
the interrupt line still be asserted. This drops the
interrupt handler down to a single PCI bus read in the
common case of I/O completion. This is the same overhead
as in the not so distant past, but the extra sanity of
perforning a PCI read after clearing the command complete
interrupt and before running the completion queue to avoid
missing command complete interrupts added a cycle.
aic7xxx.c:
During initialization, be sure to initialize all scratch
ram locations before they are read to avoid parity errors.
In this case, we use a new function, ahc_unbusy_tcl() to
initialize the scratch ram busy target table.
Replace instances of ahc_index_busy_tcl() used to unbusy
a tcl without looking at the old value with ahc_unbusy_tcl().
Modify ahc_sent_msg so that it can find single byte messages.
ahc_sent_msg is now used to determine if a transfer negotiation
attempt resulted in a bus free.
Be more careful in filtering out only the SCSI interrupts
of interest in ahc_handle_scsiint.
Rearrange interrupt clearing code to ensure that at least
one PCI transaction occurrs after hitting CLRSINT1 and
writting to CLRINT. CLRSINT1 writes take a bit to
take effect, and the re-arrangement provides sufficient
delay to ensure the write to CLRINT is effective. The
old code might report a spurious interrupt on some "fast"
chipsets.
export ahc-update_target_msg_request for use by OSM code.
If a target does not respond to our ATN request, clear
it once we move to a non-message phase. This avoids
sending a MSG_NOOP in some later message out phase.
Use max lun and max target constants instead of
hard-coded values.
Use softc storage built into our device_t under FreeBSD.
Fix a bug in ahc_free() that caused us to delete
resources that were not allocated.
Clean up any tstate/lstate info in ahc_free().
Clear the powerdown state in ahc_reset() so that
registers can be accessed.
Add a preliminary function for pausing the chip and
processing any posted work.
Add a preliminary suspend and resume functions.
aic7xxx.h:
Limit the number of supported luns to 64. We don't
support information unit transfers, so this is the
maximum that makes sense for these chips.
Add a new flag AHC_ALL_INTERRUPTS that forces the
processing of all interrupt state in a single invokation
of ahc_intr(). When the flag is not set, we use the
lazy interrupt handling scheme.
Add data structures to store controller state while
we are suspended.
Use constants instead of hard coded values where appropriate.
Correct some harmless "unsigned/signed" conflicts.
aic7xxx.seq:
Only perform the SCSIBUSL fix on ULTRA2 or newer controllers.
Older controllers seem to be confused by this.
In target mode, ignore PHASEMIS during data phases.
This bit seems to be flakey on U160 controllers acting
in target mode.
aic7xxx_pci.c:
Add support for the 29160C CPCI adapter.
Add definitions for subvendor ID information
available for devices with the "9005" vendor id.
We currently use this information to determine
if a multi-function device doesn't have the second
channel hooked up on a board.
Add rudimentary power mode code so we can put the
controller into the D0 state. In the future this
will be an OSM callback so that in FreeBSD we don't
duplicate functionality provided by the PCI code.
The powerstate code was added after I'd completed
my regression tests on this code.
Only capture "left over BIOS state" if the POWRDN
setting is not set in HCNTRL.
In target mode, don't bother sending incremental
CRC data.
2000-12-20 01:11:37 +00:00
|
|
|
} else if (ahc_sent_msg(ahc, AHCMSG_EXT, MSG_EXT_WDTR, /*full*/FALSE)) {
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/* note 8bit xfers */
|
2000-10-05 04:24:14 +00:00
|
|
|
printf("(%s:%c:%d:%d): refuses WIDE negotiation. Using "
|
2000-09-16 20:02:28 +00:00
|
|
|
"8bit transfers\n", ahc_name(ahc),
|
2000-10-05 04:24:14 +00:00
|
|
|
devinfo->channel, devinfo->target, devinfo->lun);
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_set_width(ahc, devinfo, MSG_EXT_WDTR_BUS_8_BIT,
|
|
|
|
AHC_TRANS_ACTIVE|AHC_TRANS_GOAL,
|
|
|
|
/*paused*/TRUE);
|
|
|
|
/*
|
|
|
|
* No need to clear the sync rate. If the target
|
|
|
|
* did not accept the command, our syncrate is
|
|
|
|
* unaffected. If the target started the negotiation,
|
|
|
|
* but rejected our response, we already cleared the
|
|
|
|
* sync rate before sending our WDTR.
|
|
|
|
*/
|
aic7xxx.reg:
Add a constant for the controller's stack size and the
maximum scsi offset.
aic7xxx.seq:
Style nit. The source is implied to be the destination
unless overridden in an "and" instruction.
Update target mode code for changes in identify seen
sequencer flags.
aic7xxx_pci.c:
Ensure that the PCIERRGENDIS bit is set in the
PCIERRGEN config space register. Perhaps this
is a reason for the spurios parity errors reported
on U160 controllers.
Honor the AHC_NO_BIOS_INIT flag.
Allow PCI interrupt reporting to be disabled,
by clearing the PERRRESEN bit in the command
register. This option is now enabled via a new
softc flag: AHC_DISABLE_PCI_PERR.
Disable SERR and pause the controller prior to performing
our mmapped I/O test. This should handle the case of
controllers that do not "auto-access pause". For legacy
controllers, use SCB ram instead of scratch ram since
the latter may contain settings left over from the BIOS
that we will use if an seeprom is not found.
Make use of new ahc_inl/outl() inlines.
aic7xxx.h:
Reformat a few comments to follow driver style.
Add a controller flags that indicate that a controller
has not been initialized by the BIOS and whether to
disable PCI parity errors..
Remove stack probing softc members.
Add a few more syncrate constants that are useful in speed
fallback calculations.
Add the SHOW_MASKED_ERRORS debug flag.
aic7xxx.h:
aic7xxx.c:
Implement the SCB_SILENT flag. This is useful for
hushing up the driver during DV or other operations
that we expect to cause transmission errors. The
messages will still print if the SHOW_MASKED_ERRORS
debug option is enabled.
aic7xxx_inline.h:
Implement ahc_[in|out][w|l|q]. This removes the need
for manual 'or and shift" type operations throughout
the driver.
aic7xxx.c:
Move SELTO dignostic so that the SCB is still valid
when we use it for printing path information.
If we are narrow, limit syncrate to Ultra2.
Don't clobber ppr_options when forcing a renegotiation.
The current ppr_options may be referenced while queuing
new commands. Don't set our width to unknown when forcing
negotiation on narrow controllers. This will confuse the
negotiation code into negotiating with a wide message on
narrow controllers.
Add an "asserting atn" diagnostic with controller/target
information.
Remove the probe_stack code. The stack is always
4 deep on legacy controllers, so probing is pointless.
This also avoids an issue where probing the stack would
upset the aic7770.
In ahc_reset(), record whether or not we found the
controller in a reset state. If the controller was
already reset, assume that no BIOS has initialized
the controller and ignore left over scratch ram
settings.
Fix an ifdef bug that caused sequencer debugging to
be enabled always.
Clear the ultraenb flag in our tstate during startup.
The ultraenbled'ness of a device is recorded in the user
transfer settings. tstate->ultraenb bitmask indicates
which devices we have negotiated an ultra speed with.
Just after initialization, we are async. Setting the
ultraenb flag while async seems to be harmless, but it
was confusing to see the ULTRAENB flag set in the SCB.
Enhance residual diagnostic to indicate if the residual
if for sense information or normal data transfers.
Indicate the features, bugs, and flags set in the softc
that are used to control firmware patch download when
booting verbose.
In ahc_dump_card_state() fix a logic reversal. The
SCSIPHASE register only exists on U160 controllers.
The SCSISIGI register exists on all controllers. Not
the other way around. Also print out the ERROR register.
Allow ahc_dump_card_state() to be called when the sequencer
is not paused. Add dump card state markers as in the U320
driver.
2003-01-20 20:44:55 +00:00
|
|
|
if (tinfo->goal.offset != tinfo->curr.offset) {
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/* Start the sync negotiation */
|
|
|
|
ahc->msgout_index = 0;
|
|
|
|
ahc->msgout_len = 0;
|
2000-09-22 22:18:05 +00:00
|
|
|
ahc_build_transfer_msg(ahc, devinfo);
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc->msgout_index = 0;
|
|
|
|
response = 1;
|
|
|
|
}
|
ahc_eisa.c:
ahc_pci.c:
Add detach support.
Make use of soft allocated on our behalf by newbus.
For PCI devices, disable the mapping type we aren't
using for extra protection from rogue code.
aic7xxx_93cx6.c:
aic7xxx_93cx6.h:
Sync perforce IDs.
aic7xxx_freebsd.c:
Capture the eventhandle returned by EVENTHANDER_REGISTER
so we can kill the handler off during detach.
Use AHC_* constants instead of hard coded numbers in a
few more places.
Test PPR option state when deciding to "really" negotiate
when the CAM_NEGOTIATE flag is passed in a CCB.
Make use of core "ahc_pause_and_flushwork" routine in our
timeout handler rather than re-inventing this code.
Cleanup all of our resources (really!) in ahc_platform_free().
We should be all set to become a module now.
Implement the core ahc_detach() routine shared by all of
the FreeBSD front-ends.
aic7xxx_freebsd.h:
Softc storage for our event handler.
Null implementation for the ahc_platform_flushwork() OSM
callback. FreeBSD doesn't need this as XPT callbacks are
safe from all contexts and are done directly in ahc_done().
aic7xxx_inline.h:
Implement new lazy interrupt scheme. To avoid an extra
PCI bus read, we first check our completion queues to
see if any work has completed. If work is available, we
assume that this is the source of the interrupt and skip
reading INTSTAT. Any remaining interrupt status will be
cleared by a second call to the interrupt handler should
the interrupt line still be asserted. This drops the
interrupt handler down to a single PCI bus read in the
common case of I/O completion. This is the same overhead
as in the not so distant past, but the extra sanity of
perforning a PCI read after clearing the command complete
interrupt and before running the completion queue to avoid
missing command complete interrupts added a cycle.
aic7xxx.c:
During initialization, be sure to initialize all scratch
ram locations before they are read to avoid parity errors.
In this case, we use a new function, ahc_unbusy_tcl() to
initialize the scratch ram busy target table.
Replace instances of ahc_index_busy_tcl() used to unbusy
a tcl without looking at the old value with ahc_unbusy_tcl().
Modify ahc_sent_msg so that it can find single byte messages.
ahc_sent_msg is now used to determine if a transfer negotiation
attempt resulted in a bus free.
Be more careful in filtering out only the SCSI interrupts
of interest in ahc_handle_scsiint.
Rearrange interrupt clearing code to ensure that at least
one PCI transaction occurrs after hitting CLRSINT1 and
writting to CLRINT. CLRSINT1 writes take a bit to
take effect, and the re-arrangement provides sufficient
delay to ensure the write to CLRINT is effective. The
old code might report a spurious interrupt on some "fast"
chipsets.
export ahc-update_target_msg_request for use by OSM code.
If a target does not respond to our ATN request, clear
it once we move to a non-message phase. This avoids
sending a MSG_NOOP in some later message out phase.
Use max lun and max target constants instead of
hard-coded values.
Use softc storage built into our device_t under FreeBSD.
Fix a bug in ahc_free() that caused us to delete
resources that were not allocated.
Clean up any tstate/lstate info in ahc_free().
Clear the powerdown state in ahc_reset() so that
registers can be accessed.
Add a preliminary function for pausing the chip and
processing any posted work.
Add a preliminary suspend and resume functions.
aic7xxx.h:
Limit the number of supported luns to 64. We don't
support information unit transfers, so this is the
maximum that makes sense for these chips.
Add a new flag AHC_ALL_INTERRUPTS that forces the
processing of all interrupt state in a single invokation
of ahc_intr(). When the flag is not set, we use the
lazy interrupt handling scheme.
Add data structures to store controller state while
we are suspended.
Use constants instead of hard coded values where appropriate.
Correct some harmless "unsigned/signed" conflicts.
aic7xxx.seq:
Only perform the SCSIBUSL fix on ULTRA2 or newer controllers.
Older controllers seem to be confused by this.
In target mode, ignore PHASEMIS during data phases.
This bit seems to be flakey on U160 controllers acting
in target mode.
aic7xxx_pci.c:
Add support for the 29160C CPCI adapter.
Add definitions for subvendor ID information
available for devices with the "9005" vendor id.
We currently use this information to determine
if a multi-function device doesn't have the second
channel hooked up on a board.
Add rudimentary power mode code so we can put the
controller into the D0 state. In the future this
will be an OSM callback so that in FreeBSD we don't
duplicate functionality provided by the PCI code.
The powerstate code was added after I'd completed
my regression tests on this code.
Only capture "left over BIOS state" if the POWRDN
setting is not set in HCNTRL.
In target mode, don't bother sending incremental
CRC data.
2000-12-20 01:11:37 +00:00
|
|
|
} else if (ahc_sent_msg(ahc, AHCMSG_EXT, MSG_EXT_SDTR, /*full*/FALSE)) {
|
2000-09-16 20:02:28 +00:00
|
|
|
/* note asynch xfers and clear flag */
|
|
|
|
ahc_set_syncrate(ahc, devinfo, /*syncrate*/NULL, /*period*/0,
|
|
|
|
/*offset*/0, /*ppr_options*/0,
|
|
|
|
AHC_TRANS_ACTIVE|AHC_TRANS_GOAL,
|
|
|
|
/*paused*/TRUE);
|
2000-10-05 04:24:14 +00:00
|
|
|
printf("(%s:%c:%d:%d): refuses synchronous negotiation. "
|
2000-09-16 20:02:28 +00:00
|
|
|
"Using asynchronous transfers\n",
|
2000-10-05 04:24:14 +00:00
|
|
|
ahc_name(ahc), devinfo->channel,
|
|
|
|
devinfo->target, devinfo->lun);
|
2001-05-15 19:41:12 +00:00
|
|
|
} else if ((scb->hscb->control & MSG_SIMPLE_TASK) != 0) {
|
|
|
|
int tag_type;
|
|
|
|
int mask;
|
|
|
|
|
|
|
|
tag_type = (scb->hscb->control & MSG_SIMPLE_TASK);
|
|
|
|
|
|
|
|
if (tag_type == MSG_SIMPLE_TASK) {
|
|
|
|
printf("(%s:%c:%d:%d): refuses tagged commands. "
|
|
|
|
"Performing non-tagged I/O\n", ahc_name(ahc),
|
|
|
|
devinfo->channel, devinfo->target, devinfo->lun);
|
|
|
|
ahc_set_tags(ahc, devinfo, AHC_QUEUE_NONE);
|
|
|
|
mask = ~0x23;
|
|
|
|
} else {
|
|
|
|
printf("(%s:%c:%d:%d): refuses %s tagged commands. "
|
|
|
|
"Performing simple queue tagged I/O only\n",
|
|
|
|
ahc_name(ahc), devinfo->channel, devinfo->target,
|
|
|
|
devinfo->lun, tag_type == MSG_ORDERED_TASK
|
|
|
|
? "ordered" : "head of queue");
|
|
|
|
ahc_set_tags(ahc, devinfo, AHC_QUEUE_BASIC);
|
|
|
|
mask = ~0x03;
|
|
|
|
}
|
1998-09-15 07:24:17 +00:00
|
|
|
|
|
|
|
/*
|
2000-09-16 20:02:28 +00:00
|
|
|
* Resend the identify for this CCB as the target
|
|
|
|
* may believe that the selection is invalid otherwise.
|
1998-09-15 07:24:17 +00:00
|
|
|
*/
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_outb(ahc, SCB_CONTROL,
|
2001-05-15 19:41:12 +00:00
|
|
|
ahc_inb(ahc, SCB_CONTROL) & mask);
|
|
|
|
scb->hscb->control &= mask;
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_set_transaction_tag(scb, /*enabled*/FALSE,
|
2001-05-15 19:41:12 +00:00
|
|
|
/*type*/MSG_SIMPLE_TASK);
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_outb(ahc, MSG_OUT, MSG_IDENTIFYFLAG);
|
2001-05-15 19:41:12 +00:00
|
|
|
ahc_assert_atn(ahc);
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/*
|
|
|
|
* This transaction is now at the head of
|
|
|
|
* the untagged queue for this target.
|
|
|
|
*/
|
2001-01-22 21:03:48 +00:00
|
|
|
if ((ahc->flags & AHC_SCB_BTT) == 0) {
|
2000-09-16 20:02:28 +00:00
|
|
|
struct scb_tailq *untagged_q;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2001-02-21 20:50:36 +00:00
|
|
|
untagged_q =
|
|
|
|
&(ahc->untagged_queues[devinfo->target_offset]);
|
2000-09-16 20:02:28 +00:00
|
|
|
TAILQ_INSERT_HEAD(untagged_q, scb, links.tqe);
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
scb->flags |= SCB_UNTAGGEDQ;
|
2000-09-16 20:02:28 +00:00
|
|
|
}
|
|
|
|
ahc_busy_tcl(ahc, BUILD_TCL(scb->hscb->scsiid, devinfo->lun),
|
|
|
|
scb->hscb->tag);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Requeue all tagged commands for this target
|
|
|
|
* currently in our posession so they can be
|
|
|
|
* converted to untagged commands.
|
|
|
|
*/
|
|
|
|
ahc_search_qinfifo(ahc, SCB_GET_TARGET(ahc, scb),
|
|
|
|
SCB_GET_CHANNEL(ahc, scb),
|
|
|
|
SCB_GET_LUN(scb), /*tag*/SCB_LIST_NULL,
|
|
|
|
ROLE_INITIATOR, CAM_REQUEUE_REQ,
|
|
|
|
SEARCH_COMPLETE);
|
|
|
|
} else {
|
|
|
|
/*
|
|
|
|
* Otherwise, we ignore it.
|
|
|
|
*/
|
|
|
|
printf("%s:%c:%d: Message reject for %x -- ignored\n",
|
|
|
|
ahc_name(ahc), devinfo->channel, devinfo->target,
|
|
|
|
last_msg);
|
1998-09-15 07:24:17 +00:00
|
|
|
}
|
2000-09-16 20:02:28 +00:00
|
|
|
return (response);
|
|
|
|
}
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/*
|
|
|
|
* Process an ingnore wide residue message.
|
|
|
|
*/
|
|
|
|
static void
|
|
|
|
ahc_handle_ign_wide_residue(struct ahc_softc *ahc, struct ahc_devinfo *devinfo)
|
|
|
|
{
|
|
|
|
u_int scb_index;
|
|
|
|
struct scb *scb;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
scb_index = ahc_inb(ahc, SCB_TAG);
|
2000-10-05 04:24:14 +00:00
|
|
|
scb = ahc_lookup_scb(ahc, scb_index);
|
1998-09-15 07:24:17 +00:00
|
|
|
/*
|
2000-09-16 20:02:28 +00:00
|
|
|
* XXX Actually check data direction in the sequencer?
|
|
|
|
* Perhaps add datadir to some spare bits in the hscb?
|
1998-09-15 07:24:17 +00:00
|
|
|
*/
|
2000-09-16 20:02:28 +00:00
|
|
|
if ((ahc_inb(ahc, SEQ_FLAGS) & DPHASE) == 0
|
|
|
|
|| ahc_get_transfer_dir(scb) != CAM_DIR_IN) {
|
|
|
|
/*
|
|
|
|
* Ignore the message if we haven't
|
|
|
|
* seen an appropriate data phase yet.
|
|
|
|
*/
|
1998-09-15 07:24:17 +00:00
|
|
|
} else {
|
2000-09-16 20:02:28 +00:00
|
|
|
/*
|
|
|
|
* If the residual occurred on the last
|
|
|
|
* transfer and the transfer request was
|
|
|
|
* expected to end on an odd count, do
|
|
|
|
* nothing. Otherwise, subtract a byte
|
|
|
|
* and update the residual count accordingly.
|
|
|
|
*/
|
|
|
|
uint32_t sgptr;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
sgptr = ahc_inb(ahc, SCB_RESIDUAL_SGPTR);
|
|
|
|
if ((sgptr & SG_LIST_NULL) != 0
|
2003-05-26 21:24:01 +00:00
|
|
|
&& (ahc_inb(ahc, SCB_LUN) & SCB_XFERLEN_ODD) != 0) {
|
2000-09-16 20:02:28 +00:00
|
|
|
/*
|
|
|
|
* If the residual occurred on the last
|
|
|
|
* transfer and the transfer request was
|
|
|
|
* expected to end on an odd count, do
|
|
|
|
* nothing.
|
|
|
|
*/
|
|
|
|
} else {
|
|
|
|
struct ahc_dma_seg *sg;
|
|
|
|
uint32_t data_cnt;
|
|
|
|
uint32_t data_addr;
|
2001-07-18 21:39:48 +00:00
|
|
|
uint32_t sglen;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2003-05-26 21:24:01 +00:00
|
|
|
/* Pull in all of the sgptr */
|
|
|
|
sgptr = ahc_inl(ahc, SCB_RESIDUAL_SGPTR);
|
|
|
|
data_cnt = ahc_inl(ahc, SCB_RESIDUAL_DATACNT);
|
|
|
|
|
|
|
|
if ((sgptr & SG_LIST_NULL) != 0) {
|
|
|
|
/*
|
|
|
|
* The residual data count is not updated
|
|
|
|
* for the command run to completion case.
|
|
|
|
* Explicitly zero the count.
|
|
|
|
*/
|
|
|
|
data_cnt &= ~AHC_SG_LEN_MASK;
|
|
|
|
}
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2003-05-26 21:24:01 +00:00
|
|
|
data_addr = ahc_inl(ahc, SHADDR);
|
2000-09-16 20:02:28 +00:00
|
|
|
|
|
|
|
data_cnt += 1;
|
|
|
|
data_addr -= 1;
|
2003-05-26 21:24:01 +00:00
|
|
|
sgptr &= SG_PTR_MASK;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
sg = ahc_sg_bus_to_virt(scb, sgptr);
|
2003-05-26 21:24:01 +00:00
|
|
|
|
1998-09-15 07:24:17 +00:00
|
|
|
/*
|
2000-09-16 20:02:28 +00:00
|
|
|
* The residual sg ptr points to the next S/G
|
|
|
|
* to load so we must go back one.
|
1998-09-15 07:24:17 +00:00
|
|
|
*/
|
2000-09-16 20:02:28 +00:00
|
|
|
sg--;
|
2001-07-18 21:39:48 +00:00
|
|
|
sglen = ahc_le32toh(sg->len) & AHC_SG_LEN_MASK;
|
2000-09-16 20:02:28 +00:00
|
|
|
if (sg != scb->sg_list
|
2001-07-18 21:39:48 +00:00
|
|
|
&& sglen < (data_cnt & AHC_SG_LEN_MASK)) {
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
sg--;
|
2001-07-18 21:39:48 +00:00
|
|
|
sglen = ahc_le32toh(sg->len);
|
|
|
|
/*
|
|
|
|
* Preserve High Address and SG_LIST bits
|
|
|
|
* while setting the count to 1.
|
|
|
|
*/
|
|
|
|
data_cnt = 1 | (sglen & (~AHC_SG_LEN_MASK));
|
|
|
|
data_addr = ahc_le32toh(sg->addr)
|
|
|
|
+ (sglen & AHC_SG_LEN_MASK) - 1;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/*
|
|
|
|
* Increment sg so it points to the
|
|
|
|
* "next" sg.
|
|
|
|
*/
|
|
|
|
sg++;
|
|
|
|
sgptr = ahc_sg_virt_to_bus(scb, sg);
|
1998-09-15 07:24:17 +00:00
|
|
|
}
|
2003-05-26 21:24:01 +00:00
|
|
|
ahc_outl(ahc, SCB_RESIDUAL_SGPTR, sgptr);
|
|
|
|
ahc_outl(ahc, SCB_RESIDUAL_DATACNT, data_cnt);
|
|
|
|
/*
|
|
|
|
* Toggle the "oddness" of the transfer length
|
|
|
|
* to handle this mid-transfer ignore wide
|
|
|
|
* residue. This ensures that the oddness is
|
|
|
|
* correct for subsequent data transfers.
|
|
|
|
*/
|
|
|
|
ahc_outb(ahc, SCB_LUN,
|
|
|
|
ahc_inb(ahc, SCB_LUN) ^ SCB_XFERLEN_ODD);
|
2000-07-24 22:27:40 +00:00
|
|
|
}
|
|
|
|
}
|
2000-09-16 20:02:28 +00:00
|
|
|
}
|
2000-07-24 22:27:40 +00:00
|
|
|
|
2001-07-18 21:39:48 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Reinitialize the data pointers for the active transfer
|
|
|
|
* based on its current residual.
|
|
|
|
*/
|
|
|
|
static void
|
|
|
|
ahc_reinitialize_dataptrs(struct ahc_softc *ahc)
|
|
|
|
{
|
|
|
|
struct scb *scb;
|
|
|
|
struct ahc_dma_seg *sg;
|
|
|
|
u_int scb_index;
|
|
|
|
uint32_t sgptr;
|
|
|
|
uint32_t resid;
|
|
|
|
uint32_t dataptr;
|
|
|
|
|
|
|
|
scb_index = ahc_inb(ahc, SCB_TAG);
|
|
|
|
scb = ahc_lookup_scb(ahc, scb_index);
|
|
|
|
sgptr = (ahc_inb(ahc, SCB_RESIDUAL_SGPTR + 3) << 24)
|
|
|
|
| (ahc_inb(ahc, SCB_RESIDUAL_SGPTR + 2) << 16)
|
|
|
|
| (ahc_inb(ahc, SCB_RESIDUAL_SGPTR + 1) << 8)
|
|
|
|
| ahc_inb(ahc, SCB_RESIDUAL_SGPTR);
|
|
|
|
|
|
|
|
sgptr &= SG_PTR_MASK;
|
|
|
|
sg = ahc_sg_bus_to_virt(scb, sgptr);
|
|
|
|
|
|
|
|
/* The residual sg_ptr always points to the next sg */
|
|
|
|
sg--;
|
|
|
|
|
|
|
|
resid = (ahc_inb(ahc, SCB_RESIDUAL_DATACNT + 2) << 16)
|
|
|
|
| (ahc_inb(ahc, SCB_RESIDUAL_DATACNT + 1) << 8)
|
|
|
|
| ahc_inb(ahc, SCB_RESIDUAL_DATACNT);
|
|
|
|
|
|
|
|
dataptr = ahc_le32toh(sg->addr)
|
|
|
|
+ (ahc_le32toh(sg->len) & AHC_SG_LEN_MASK)
|
|
|
|
- resid;
|
|
|
|
if ((ahc->flags & AHC_39BIT_ADDRESSING) != 0) {
|
|
|
|
u_int dscommand1;
|
|
|
|
|
|
|
|
dscommand1 = ahc_inb(ahc, DSCOMMAND1);
|
|
|
|
ahc_outb(ahc, DSCOMMAND1, dscommand1 | HADDLDSEL0);
|
|
|
|
ahc_outb(ahc, HADDR,
|
|
|
|
(ahc_le32toh(sg->len) >> 24) & SG_HIGH_ADDR_BITS);
|
|
|
|
ahc_outb(ahc, DSCOMMAND1, dscommand1);
|
|
|
|
}
|
|
|
|
ahc_outb(ahc, HADDR + 3, dataptr >> 24);
|
|
|
|
ahc_outb(ahc, HADDR + 2, dataptr >> 16);
|
|
|
|
ahc_outb(ahc, HADDR + 1, dataptr >> 8);
|
|
|
|
ahc_outb(ahc, HADDR, dataptr);
|
|
|
|
ahc_outb(ahc, HCNT + 2, resid >> 16);
|
|
|
|
ahc_outb(ahc, HCNT + 1, resid >> 8);
|
|
|
|
ahc_outb(ahc, HCNT, resid);
|
|
|
|
if ((ahc->features & AHC_ULTRA2) == 0) {
|
|
|
|
ahc_outb(ahc, STCNT + 2, resid >> 16);
|
|
|
|
ahc_outb(ahc, STCNT + 1, resid >> 8);
|
|
|
|
ahc_outb(ahc, STCNT, resid);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/*
|
|
|
|
* Handle the effects of issuing a bus device reset message.
|
|
|
|
*/
|
|
|
|
static void
|
|
|
|
ahc_handle_devreset(struct ahc_softc *ahc, struct ahc_devinfo *devinfo,
|
|
|
|
cam_status status, char *message, int verbose_level)
|
|
|
|
{
|
|
|
|
#ifdef AHC_TARGET_MODE
|
2001-03-29 00:36:35 +00:00
|
|
|
struct ahc_tmode_tstate* tstate;
|
2000-09-16 20:02:28 +00:00
|
|
|
u_int lun;
|
|
|
|
#endif
|
|
|
|
int found;
|
2000-07-24 22:27:40 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
found = ahc_abort_scbs(ahc, devinfo->target, devinfo->channel,
|
|
|
|
CAM_LUN_WILDCARD, SCB_LIST_NULL, devinfo->role,
|
|
|
|
status);
|
2000-07-24 22:27:40 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
#ifdef AHC_TARGET_MODE
|
1999-04-26 22:03:44 +00:00
|
|
|
/*
|
2000-09-16 20:02:28 +00:00
|
|
|
* Send an immediate notify ccb to all target mord peripheral
|
|
|
|
* drivers affected by this action.
|
1999-04-26 22:03:44 +00:00
|
|
|
*/
|
2000-09-16 20:02:28 +00:00
|
|
|
tstate = ahc->enabled_targets[devinfo->our_scsiid];
|
|
|
|
if (tstate != NULL) {
|
ahc_eisa.c:
ahc_pci.c:
Add detach support.
Make use of soft allocated on our behalf by newbus.
For PCI devices, disable the mapping type we aren't
using for extra protection from rogue code.
aic7xxx_93cx6.c:
aic7xxx_93cx6.h:
Sync perforce IDs.
aic7xxx_freebsd.c:
Capture the eventhandle returned by EVENTHANDER_REGISTER
so we can kill the handler off during detach.
Use AHC_* constants instead of hard coded numbers in a
few more places.
Test PPR option state when deciding to "really" negotiate
when the CAM_NEGOTIATE flag is passed in a CCB.
Make use of core "ahc_pause_and_flushwork" routine in our
timeout handler rather than re-inventing this code.
Cleanup all of our resources (really!) in ahc_platform_free().
We should be all set to become a module now.
Implement the core ahc_detach() routine shared by all of
the FreeBSD front-ends.
aic7xxx_freebsd.h:
Softc storage for our event handler.
Null implementation for the ahc_platform_flushwork() OSM
callback. FreeBSD doesn't need this as XPT callbacks are
safe from all contexts and are done directly in ahc_done().
aic7xxx_inline.h:
Implement new lazy interrupt scheme. To avoid an extra
PCI bus read, we first check our completion queues to
see if any work has completed. If work is available, we
assume that this is the source of the interrupt and skip
reading INTSTAT. Any remaining interrupt status will be
cleared by a second call to the interrupt handler should
the interrupt line still be asserted. This drops the
interrupt handler down to a single PCI bus read in the
common case of I/O completion. This is the same overhead
as in the not so distant past, but the extra sanity of
perforning a PCI read after clearing the command complete
interrupt and before running the completion queue to avoid
missing command complete interrupts added a cycle.
aic7xxx.c:
During initialization, be sure to initialize all scratch
ram locations before they are read to avoid parity errors.
In this case, we use a new function, ahc_unbusy_tcl() to
initialize the scratch ram busy target table.
Replace instances of ahc_index_busy_tcl() used to unbusy
a tcl without looking at the old value with ahc_unbusy_tcl().
Modify ahc_sent_msg so that it can find single byte messages.
ahc_sent_msg is now used to determine if a transfer negotiation
attempt resulted in a bus free.
Be more careful in filtering out only the SCSI interrupts
of interest in ahc_handle_scsiint.
Rearrange interrupt clearing code to ensure that at least
one PCI transaction occurrs after hitting CLRSINT1 and
writting to CLRINT. CLRSINT1 writes take a bit to
take effect, and the re-arrangement provides sufficient
delay to ensure the write to CLRINT is effective. The
old code might report a spurious interrupt on some "fast"
chipsets.
export ahc-update_target_msg_request for use by OSM code.
If a target does not respond to our ATN request, clear
it once we move to a non-message phase. This avoids
sending a MSG_NOOP in some later message out phase.
Use max lun and max target constants instead of
hard-coded values.
Use softc storage built into our device_t under FreeBSD.
Fix a bug in ahc_free() that caused us to delete
resources that were not allocated.
Clean up any tstate/lstate info in ahc_free().
Clear the powerdown state in ahc_reset() so that
registers can be accessed.
Add a preliminary function for pausing the chip and
processing any posted work.
Add a preliminary suspend and resume functions.
aic7xxx.h:
Limit the number of supported luns to 64. We don't
support information unit transfers, so this is the
maximum that makes sense for these chips.
Add a new flag AHC_ALL_INTERRUPTS that forces the
processing of all interrupt state in a single invokation
of ahc_intr(). When the flag is not set, we use the
lazy interrupt handling scheme.
Add data structures to store controller state while
we are suspended.
Use constants instead of hard coded values where appropriate.
Correct some harmless "unsigned/signed" conflicts.
aic7xxx.seq:
Only perform the SCSIBUSL fix on ULTRA2 or newer controllers.
Older controllers seem to be confused by this.
In target mode, ignore PHASEMIS during data phases.
This bit seems to be flakey on U160 controllers acting
in target mode.
aic7xxx_pci.c:
Add support for the 29160C CPCI adapter.
Add definitions for subvendor ID information
available for devices with the "9005" vendor id.
We currently use this information to determine
if a multi-function device doesn't have the second
channel hooked up on a board.
Add rudimentary power mode code so we can put the
controller into the D0 state. In the future this
will be an OSM callback so that in FreeBSD we don't
duplicate functionality provided by the PCI code.
The powerstate code was added after I'd completed
my regression tests on this code.
Only capture "left over BIOS state" if the POWRDN
setting is not set in HCNTRL.
In target mode, don't bother sending incremental
CRC data.
2000-12-20 01:11:37 +00:00
|
|
|
for (lun = 0; lun < AHC_NUM_LUNS; lun++) {
|
2001-03-29 00:36:35 +00:00
|
|
|
struct ahc_tmode_lstate* lstate;
|
1999-04-26 22:03:44 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
lstate = tstate->enabled_luns[lun];
|
|
|
|
if (lstate == NULL)
|
|
|
|
continue;
|
1999-04-26 22:03:44 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_queue_lstate_event(ahc, lstate, devinfo->our_scsiid,
|
|
|
|
MSG_BUS_DEV_RESET, /*arg*/0);
|
|
|
|
ahc_send_lstate_events(ahc, lstate);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
#endif
|
1998-12-10 04:14:50 +00:00
|
|
|
|
1998-09-15 07:24:17 +00:00
|
|
|
/*
|
2000-09-16 20:02:28 +00:00
|
|
|
* Go back to async/narrow transfers and renegotiate.
|
1998-09-15 07:24:17 +00:00
|
|
|
*/
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_set_width(ahc, devinfo, MSG_EXT_WDTR_BUS_8_BIT,
|
|
|
|
AHC_TRANS_CUR, /*paused*/TRUE);
|
|
|
|
ahc_set_syncrate(ahc, devinfo, /*syncrate*/NULL,
|
|
|
|
/*period*/0, /*offset*/0, /*ppr_options*/0,
|
|
|
|
AHC_TRANS_CUR, /*paused*/TRUE);
|
|
|
|
|
2000-09-22 22:18:05 +00:00
|
|
|
ahc_send_async(ahc, devinfo->channel, devinfo->target,
|
2001-05-15 19:41:12 +00:00
|
|
|
CAM_LUN_WILDCARD, AC_SENT_BDR, NULL);
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
if (message != NULL
|
|
|
|
&& (verbose_level <= bootverbose))
|
|
|
|
printf("%s: %s on %c:%d. %d SCBs aborted\n", ahc_name(ahc),
|
|
|
|
message, devinfo->channel, devinfo->target, found);
|
|
|
|
}
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
#ifdef AHC_TARGET_MODE
|
2001-03-29 00:36:35 +00:00
|
|
|
static void
|
|
|
|
ahc_setup_target_msgin(struct ahc_softc *ahc, struct ahc_devinfo *devinfo,
|
|
|
|
struct scb *scb)
|
2000-09-16 20:02:28 +00:00
|
|
|
{
|
2001-03-29 00:36:35 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/*
|
|
|
|
* To facilitate adding multiple messages together,
|
|
|
|
* each routine should increment the index and len
|
|
|
|
* variables instead of setting them explicitly.
|
|
|
|
*/
|
|
|
|
ahc->msgout_index = 0;
|
|
|
|
ahc->msgout_len = 0;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2001-03-29 00:36:35 +00:00
|
|
|
if (scb != NULL && (scb->flags & SCB_AUTO_NEGOTIATE) != 0)
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_build_transfer_msg(ahc, devinfo);
|
|
|
|
else
|
|
|
|
panic("ahc_intr: AWAITING target message with no message");
|
1998-12-15 08:22:42 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc->msgout_index = 0;
|
|
|
|
ahc->msg_type = MSG_TYPE_TARGET_MSGIN;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
/**************************** Initialization **********************************/
|
|
|
|
/*
|
|
|
|
* Allocate a controller structure for a new device
|
|
|
|
* and perform initial initializion.
|
|
|
|
*/
|
|
|
|
struct ahc_softc *
|
|
|
|
ahc_alloc(void *platform_arg, char *name)
|
|
|
|
{
|
|
|
|
struct ahc_softc *ahc;
|
|
|
|
int i;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
ahc_eisa.c:
ahc_pci.c:
Add detach support.
Make use of soft allocated on our behalf by newbus.
For PCI devices, disable the mapping type we aren't
using for extra protection from rogue code.
aic7xxx_93cx6.c:
aic7xxx_93cx6.h:
Sync perforce IDs.
aic7xxx_freebsd.c:
Capture the eventhandle returned by EVENTHANDER_REGISTER
so we can kill the handler off during detach.
Use AHC_* constants instead of hard coded numbers in a
few more places.
Test PPR option state when deciding to "really" negotiate
when the CAM_NEGOTIATE flag is passed in a CCB.
Make use of core "ahc_pause_and_flushwork" routine in our
timeout handler rather than re-inventing this code.
Cleanup all of our resources (really!) in ahc_platform_free().
We should be all set to become a module now.
Implement the core ahc_detach() routine shared by all of
the FreeBSD front-ends.
aic7xxx_freebsd.h:
Softc storage for our event handler.
Null implementation for the ahc_platform_flushwork() OSM
callback. FreeBSD doesn't need this as XPT callbacks are
safe from all contexts and are done directly in ahc_done().
aic7xxx_inline.h:
Implement new lazy interrupt scheme. To avoid an extra
PCI bus read, we first check our completion queues to
see if any work has completed. If work is available, we
assume that this is the source of the interrupt and skip
reading INTSTAT. Any remaining interrupt status will be
cleared by a second call to the interrupt handler should
the interrupt line still be asserted. This drops the
interrupt handler down to a single PCI bus read in the
common case of I/O completion. This is the same overhead
as in the not so distant past, but the extra sanity of
perforning a PCI read after clearing the command complete
interrupt and before running the completion queue to avoid
missing command complete interrupts added a cycle.
aic7xxx.c:
During initialization, be sure to initialize all scratch
ram locations before they are read to avoid parity errors.
In this case, we use a new function, ahc_unbusy_tcl() to
initialize the scratch ram busy target table.
Replace instances of ahc_index_busy_tcl() used to unbusy
a tcl without looking at the old value with ahc_unbusy_tcl().
Modify ahc_sent_msg so that it can find single byte messages.
ahc_sent_msg is now used to determine if a transfer negotiation
attempt resulted in a bus free.
Be more careful in filtering out only the SCSI interrupts
of interest in ahc_handle_scsiint.
Rearrange interrupt clearing code to ensure that at least
one PCI transaction occurrs after hitting CLRSINT1 and
writting to CLRINT. CLRSINT1 writes take a bit to
take effect, and the re-arrangement provides sufficient
delay to ensure the write to CLRINT is effective. The
old code might report a spurious interrupt on some "fast"
chipsets.
export ahc-update_target_msg_request for use by OSM code.
If a target does not respond to our ATN request, clear
it once we move to a non-message phase. This avoids
sending a MSG_NOOP in some later message out phase.
Use max lun and max target constants instead of
hard-coded values.
Use softc storage built into our device_t under FreeBSD.
Fix a bug in ahc_free() that caused us to delete
resources that were not allocated.
Clean up any tstate/lstate info in ahc_free().
Clear the powerdown state in ahc_reset() so that
registers can be accessed.
Add a preliminary function for pausing the chip and
processing any posted work.
Add a preliminary suspend and resume functions.
aic7xxx.h:
Limit the number of supported luns to 64. We don't
support information unit transfers, so this is the
maximum that makes sense for these chips.
Add a new flag AHC_ALL_INTERRUPTS that forces the
processing of all interrupt state in a single invokation
of ahc_intr(). When the flag is not set, we use the
lazy interrupt handling scheme.
Add data structures to store controller state while
we are suspended.
Use constants instead of hard coded values where appropriate.
Correct some harmless "unsigned/signed" conflicts.
aic7xxx.seq:
Only perform the SCSIBUSL fix on ULTRA2 or newer controllers.
Older controllers seem to be confused by this.
In target mode, ignore PHASEMIS during data phases.
This bit seems to be flakey on U160 controllers acting
in target mode.
aic7xxx_pci.c:
Add support for the 29160C CPCI adapter.
Add definitions for subvendor ID information
available for devices with the "9005" vendor id.
We currently use this information to determine
if a multi-function device doesn't have the second
channel hooked up on a board.
Add rudimentary power mode code so we can put the
controller into the D0 state. In the future this
will be an OSM callback so that in FreeBSD we don't
duplicate functionality provided by the PCI code.
The powerstate code was added after I'd completed
my regression tests on this code.
Only capture "left over BIOS state" if the POWRDN
setting is not set in HCNTRL.
In target mode, don't bother sending incremental
CRC data.
2000-12-20 01:11:37 +00:00
|
|
|
#ifndef __FreeBSD__
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc = malloc(sizeof(*ahc), M_DEVBUF, M_NOWAIT);
|
|
|
|
if (!ahc) {
|
|
|
|
printf("aic7xxx: cannot malloc softc!\n");
|
|
|
|
free(name, M_DEVBUF);
|
|
|
|
return NULL;
|
|
|
|
}
|
ahc_eisa.c:
ahc_pci.c:
Add detach support.
Make use of soft allocated on our behalf by newbus.
For PCI devices, disable the mapping type we aren't
using for extra protection from rogue code.
aic7xxx_93cx6.c:
aic7xxx_93cx6.h:
Sync perforce IDs.
aic7xxx_freebsd.c:
Capture the eventhandle returned by EVENTHANDER_REGISTER
so we can kill the handler off during detach.
Use AHC_* constants instead of hard coded numbers in a
few more places.
Test PPR option state when deciding to "really" negotiate
when the CAM_NEGOTIATE flag is passed in a CCB.
Make use of core "ahc_pause_and_flushwork" routine in our
timeout handler rather than re-inventing this code.
Cleanup all of our resources (really!) in ahc_platform_free().
We should be all set to become a module now.
Implement the core ahc_detach() routine shared by all of
the FreeBSD front-ends.
aic7xxx_freebsd.h:
Softc storage for our event handler.
Null implementation for the ahc_platform_flushwork() OSM
callback. FreeBSD doesn't need this as XPT callbacks are
safe from all contexts and are done directly in ahc_done().
aic7xxx_inline.h:
Implement new lazy interrupt scheme. To avoid an extra
PCI bus read, we first check our completion queues to
see if any work has completed. If work is available, we
assume that this is the source of the interrupt and skip
reading INTSTAT. Any remaining interrupt status will be
cleared by a second call to the interrupt handler should
the interrupt line still be asserted. This drops the
interrupt handler down to a single PCI bus read in the
common case of I/O completion. This is the same overhead
as in the not so distant past, but the extra sanity of
perforning a PCI read after clearing the command complete
interrupt and before running the completion queue to avoid
missing command complete interrupts added a cycle.
aic7xxx.c:
During initialization, be sure to initialize all scratch
ram locations before they are read to avoid parity errors.
In this case, we use a new function, ahc_unbusy_tcl() to
initialize the scratch ram busy target table.
Replace instances of ahc_index_busy_tcl() used to unbusy
a tcl without looking at the old value with ahc_unbusy_tcl().
Modify ahc_sent_msg so that it can find single byte messages.
ahc_sent_msg is now used to determine if a transfer negotiation
attempt resulted in a bus free.
Be more careful in filtering out only the SCSI interrupts
of interest in ahc_handle_scsiint.
Rearrange interrupt clearing code to ensure that at least
one PCI transaction occurrs after hitting CLRSINT1 and
writting to CLRINT. CLRSINT1 writes take a bit to
take effect, and the re-arrangement provides sufficient
delay to ensure the write to CLRINT is effective. The
old code might report a spurious interrupt on some "fast"
chipsets.
export ahc-update_target_msg_request for use by OSM code.
If a target does not respond to our ATN request, clear
it once we move to a non-message phase. This avoids
sending a MSG_NOOP in some later message out phase.
Use max lun and max target constants instead of
hard-coded values.
Use softc storage built into our device_t under FreeBSD.
Fix a bug in ahc_free() that caused us to delete
resources that were not allocated.
Clean up any tstate/lstate info in ahc_free().
Clear the powerdown state in ahc_reset() so that
registers can be accessed.
Add a preliminary function for pausing the chip and
processing any posted work.
Add a preliminary suspend and resume functions.
aic7xxx.h:
Limit the number of supported luns to 64. We don't
support information unit transfers, so this is the
maximum that makes sense for these chips.
Add a new flag AHC_ALL_INTERRUPTS that forces the
processing of all interrupt state in a single invokation
of ahc_intr(). When the flag is not set, we use the
lazy interrupt handling scheme.
Add data structures to store controller state while
we are suspended.
Use constants instead of hard coded values where appropriate.
Correct some harmless "unsigned/signed" conflicts.
aic7xxx.seq:
Only perform the SCSIBUSL fix on ULTRA2 or newer controllers.
Older controllers seem to be confused by this.
In target mode, ignore PHASEMIS during data phases.
This bit seems to be flakey on U160 controllers acting
in target mode.
aic7xxx_pci.c:
Add support for the 29160C CPCI adapter.
Add definitions for subvendor ID information
available for devices with the "9005" vendor id.
We currently use this information to determine
if a multi-function device doesn't have the second
channel hooked up on a board.
Add rudimentary power mode code so we can put the
controller into the D0 state. In the future this
will be an OSM callback so that in FreeBSD we don't
duplicate functionality provided by the PCI code.
The powerstate code was added after I'd completed
my regression tests on this code.
Only capture "left over BIOS state" if the POWRDN
setting is not set in HCNTRL.
In target mode, don't bother sending incremental
CRC data.
2000-12-20 01:11:37 +00:00
|
|
|
#else
|
|
|
|
ahc = device_get_softc((device_t)platform_arg);
|
|
|
|
#endif
|
2000-09-16 20:02:28 +00:00
|
|
|
memset(ahc, 0, sizeof(*ahc));
|
2002-08-31 06:41:37 +00:00
|
|
|
ahc->seep_config = malloc(sizeof(*ahc->seep_config),
|
|
|
|
M_DEVBUF, M_NOWAIT);
|
|
|
|
if (ahc->seep_config == NULL) {
|
|
|
|
#ifndef __FreeBSD__
|
|
|
|
free(ahc, M_DEVBUF);
|
|
|
|
#endif
|
|
|
|
free(name, M_DEVBUF);
|
|
|
|
return (NULL);
|
|
|
|
}
|
2000-09-16 20:02:28 +00:00
|
|
|
LIST_INIT(&ahc->pending_scbs);
|
aic7xxx.c:
Style nits.
Make sure that our selection hardware is disabled
as soon as possible after detecting a busfree and
even go so far as to disable the selection hardware
in advance of an event that will cause a busfree
(ABORT or BUS DEVICE RESET message). The concern
is that the selection hardware will select a target
for which, after processing the bus free, there
will be no commands pending. The sequencer idle
loop will re-enable the selection should it still be
necessary.
In ahc_handle_scsiint(), clear SSTAT0 events several
PCI transactions (most notably reads) prior to clearing
SCSIINT. The newer chips seem to take a bit of time to
see the change which can make the clearing of SCSIINT
ineffective.
Don't bother panicing at the end of ahc_handle_scsiint().
Getting to the final else just means we lost the race
with clearing SCSIINT.
In ahc_free(), handle init-level 0. This can happen when we
fail the attach for RAID devices. While I'm here, also kill
the parent dma tag.
In ahc_match_scb(), consider initiator ccbs to be any
that are not from the target mode group. This fixes
a bug where an external target reset CCB was not getting
cleaned up by the reset code.
Don't bother freezing a ccb in any of our "abort" routines
when the status is set to CAM_REQ_CMP. This can happen
for a target reset ccb.
aic7xxx.reg:
Reserve space for a completion queue. This will be used
to enhance performance in the near future.
aic7xxx.seq:
Remove an optimization for the 7890 autoflush bug that
turned out to allow, in rare cases, some data to get
lost.
Implement a simpler, faster, fix for the PCI_2_1 retry
bug that hangs the sequencer on an SCB dma for certain chips.
Test against SAVED_SCSIID rather than SELID during target
reselections. This is how we always did it in the past,
but the code was modified while trying to work around an
issue with the 7895. SAVED_SCSIID takes into account
twin channel adapters such as the 2742T, whereas SELID
does not have the channel bit. This caused invalid
selection warnings and other strangeness on these cards.
aic7xxx_pci.c
Use the correct mask for checking the generic aic7892
entry.
2001-02-10 18:04:27 +00:00
|
|
|
/* We don't know our unit number until the OSM sets it */
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc->name = name;
|
2001-03-29 00:36:35 +00:00
|
|
|
ahc->unit = -1;
|
2001-07-18 21:39:48 +00:00
|
|
|
ahc->description = NULL;
|
|
|
|
ahc->channel = 'A';
|
|
|
|
ahc->channel_b = 'B';
|
|
|
|
ahc->chip = AHC_NONE;
|
|
|
|
ahc->features = AHC_FENONE;
|
|
|
|
ahc->bugs = AHC_BUGNONE;
|
|
|
|
ahc->flags = AHC_FNONE;
|
2003-05-26 21:20:47 +00:00
|
|
|
/*
|
|
|
|
* Default to all error reporting enabled with the
|
|
|
|
* sequencer operating at its fastest speed.
|
|
|
|
* The bus attach code may modify this.
|
|
|
|
*/
|
|
|
|
ahc->seqctl = FASTMODE;
|
2001-07-18 21:39:48 +00:00
|
|
|
|
2002-04-24 16:58:51 +00:00
|
|
|
for (i = 0; i < AHC_NUM_TARGETS; i++)
|
2000-09-16 20:02:28 +00:00
|
|
|
TAILQ_INIT(&ahc->untagged_queues[i]);
|
|
|
|
if (ahc_platform_alloc(ahc, platform_arg) != 0) {
|
|
|
|
ahc_free(ahc);
|
|
|
|
ahc = NULL;
|
|
|
|
}
|
|
|
|
return (ahc);
|
|
|
|
}
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
int
|
2001-07-18 21:39:48 +00:00
|
|
|
ahc_softc_init(struct ahc_softc *ahc)
|
2000-09-16 20:02:28 +00:00
|
|
|
{
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/* The IRQMS bit is only valid on VL and EISA chips */
|
2001-08-17 04:22:50 +00:00
|
|
|
if ((ahc->chip & AHC_PCI) == 0)
|
|
|
|
ahc->unpause = ahc_inb(ahc, HCNTRL) & IRQMS;
|
|
|
|
else
|
|
|
|
ahc->unpause = 0;
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc->pause = ahc->unpause | PAUSE;
|
2001-02-06 10:22:22 +00:00
|
|
|
/* XXX The shared scb data stuff should be deprecated */
|
2000-09-16 20:02:28 +00:00
|
|
|
if (ahc->scb_data == NULL) {
|
|
|
|
ahc->scb_data = malloc(sizeof(*ahc->scb_data),
|
|
|
|
M_DEVBUF, M_NOWAIT);
|
|
|
|
if (ahc->scb_data == NULL)
|
|
|
|
return (ENOMEM);
|
|
|
|
memset(ahc->scb_data, 0, sizeof(*ahc->scb_data));
|
2000-07-18 20:12:14 +00:00
|
|
|
}
|
|
|
|
|
1998-09-15 07:24:17 +00:00
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
void
|
|
|
|
ahc_softc_insert(struct ahc_softc *ahc)
|
1998-09-15 07:24:17 +00:00
|
|
|
{
|
2000-09-16 20:02:28 +00:00
|
|
|
struct ahc_softc *list_ahc;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
|
|
|
#if AHC_PCI_CONFIG > 0
|
1998-09-15 07:24:17 +00:00
|
|
|
/*
|
2000-09-16 20:02:28 +00:00
|
|
|
* Second Function PCI devices need to inherit some
|
This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
|
|
|
* settings from function 0.
|
1998-09-15 07:24:17 +00:00
|
|
|
*/
|
2000-09-16 20:02:28 +00:00
|
|
|
if ((ahc->chip & AHC_BUS_MASK) == AHC_PCI
|
This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
|
|
|
&& (ahc->features & AHC_MULTI_FUNC) != 0) {
|
2000-09-16 20:02:28 +00:00
|
|
|
TAILQ_FOREACH(list_ahc, &ahc_tailq, links) {
|
|
|
|
ahc_dev_softc_t list_pci;
|
|
|
|
ahc_dev_softc_t pci;
|
|
|
|
|
|
|
|
list_pci = list_ahc->dev_softc;
|
|
|
|
pci = ahc->dev_softc;
|
This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
|
|
|
if (ahc_get_pci_slot(list_pci) == ahc_get_pci_slot(pci)
|
|
|
|
&& ahc_get_pci_bus(list_pci) == ahc_get_pci_bus(pci)) {
|
|
|
|
struct ahc_softc *master;
|
|
|
|
struct ahc_softc *slave;
|
|
|
|
|
|
|
|
if (ahc_get_pci_function(list_pci) == 0) {
|
|
|
|
master = list_ahc;
|
|
|
|
slave = ahc;
|
|
|
|
} else {
|
|
|
|
master = ahc;
|
|
|
|
slave = list_ahc;
|
|
|
|
}
|
|
|
|
slave->flags &= ~AHC_BIOS_ENABLED;
|
|
|
|
slave->flags |=
|
|
|
|
master->flags & AHC_BIOS_ENABLED;
|
|
|
|
slave->flags &= ~AHC_PRIMARY_CHANNEL;
|
|
|
|
slave->flags |=
|
|
|
|
master->flags & AHC_PRIMARY_CHANNEL;
|
2000-09-16 20:02:28 +00:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
#endif
|
1998-09-15 07:24:17 +00:00
|
|
|
|
1999-01-14 06:14:15 +00:00
|
|
|
/*
|
2000-09-16 20:02:28 +00:00
|
|
|
* Insertion sort into our list of softcs.
|
1999-01-14 06:14:15 +00:00
|
|
|
*/
|
2000-09-16 20:02:28 +00:00
|
|
|
list_ahc = TAILQ_FIRST(&ahc_tailq);
|
|
|
|
while (list_ahc != NULL
|
2003-05-03 23:55:38 +00:00
|
|
|
&& ahc_softc_comp(ahc, list_ahc) <= 0)
|
2000-09-16 20:02:28 +00:00
|
|
|
list_ahc = TAILQ_NEXT(list_ahc, links);
|
|
|
|
if (list_ahc != NULL)
|
|
|
|
TAILQ_INSERT_BEFORE(list_ahc, ahc, links);
|
|
|
|
else
|
|
|
|
TAILQ_INSERT_TAIL(&ahc_tailq, ahc, links);
|
|
|
|
ahc->init_level++;
|
|
|
|
}
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2002-04-24 16:58:51 +00:00
|
|
|
/*
|
|
|
|
* Verify that the passed in softc pointer is for a
|
|
|
|
* controller that is still configured.
|
|
|
|
*/
|
|
|
|
struct ahc_softc *
|
|
|
|
ahc_find_softc(struct ahc_softc *ahc)
|
|
|
|
{
|
|
|
|
struct ahc_softc *list_ahc;
|
|
|
|
|
|
|
|
TAILQ_FOREACH(list_ahc, &ahc_tailq, links) {
|
|
|
|
if (list_ahc == ahc)
|
|
|
|
return (ahc);
|
|
|
|
}
|
|
|
|
return (NULL);
|
|
|
|
}
|
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
void
|
|
|
|
ahc_set_unit(struct ahc_softc *ahc, int unit)
|
|
|
|
{
|
|
|
|
ahc->unit = unit;
|
|
|
|
}
|
1999-01-14 06:14:15 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
void
|
|
|
|
ahc_set_name(struct ahc_softc *ahc, char *name)
|
|
|
|
{
|
|
|
|
if (ahc->name != NULL)
|
|
|
|
free(ahc->name, M_DEVBUF);
|
|
|
|
ahc->name = name;
|
|
|
|
}
|
1999-03-05 23:35:48 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
void
|
|
|
|
ahc_free(struct ahc_softc *ahc)
|
|
|
|
{
|
ahc_eisa.c:
ahc_pci.c:
Add detach support.
Make use of soft allocated on our behalf by newbus.
For PCI devices, disable the mapping type we aren't
using for extra protection from rogue code.
aic7xxx_93cx6.c:
aic7xxx_93cx6.h:
Sync perforce IDs.
aic7xxx_freebsd.c:
Capture the eventhandle returned by EVENTHANDER_REGISTER
so we can kill the handler off during detach.
Use AHC_* constants instead of hard coded numbers in a
few more places.
Test PPR option state when deciding to "really" negotiate
when the CAM_NEGOTIATE flag is passed in a CCB.
Make use of core "ahc_pause_and_flushwork" routine in our
timeout handler rather than re-inventing this code.
Cleanup all of our resources (really!) in ahc_platform_free().
We should be all set to become a module now.
Implement the core ahc_detach() routine shared by all of
the FreeBSD front-ends.
aic7xxx_freebsd.h:
Softc storage for our event handler.
Null implementation for the ahc_platform_flushwork() OSM
callback. FreeBSD doesn't need this as XPT callbacks are
safe from all contexts and are done directly in ahc_done().
aic7xxx_inline.h:
Implement new lazy interrupt scheme. To avoid an extra
PCI bus read, we first check our completion queues to
see if any work has completed. If work is available, we
assume that this is the source of the interrupt and skip
reading INTSTAT. Any remaining interrupt status will be
cleared by a second call to the interrupt handler should
the interrupt line still be asserted. This drops the
interrupt handler down to a single PCI bus read in the
common case of I/O completion. This is the same overhead
as in the not so distant past, but the extra sanity of
perforning a PCI read after clearing the command complete
interrupt and before running the completion queue to avoid
missing command complete interrupts added a cycle.
aic7xxx.c:
During initialization, be sure to initialize all scratch
ram locations before they are read to avoid parity errors.
In this case, we use a new function, ahc_unbusy_tcl() to
initialize the scratch ram busy target table.
Replace instances of ahc_index_busy_tcl() used to unbusy
a tcl without looking at the old value with ahc_unbusy_tcl().
Modify ahc_sent_msg so that it can find single byte messages.
ahc_sent_msg is now used to determine if a transfer negotiation
attempt resulted in a bus free.
Be more careful in filtering out only the SCSI interrupts
of interest in ahc_handle_scsiint.
Rearrange interrupt clearing code to ensure that at least
one PCI transaction occurrs after hitting CLRSINT1 and
writting to CLRINT. CLRSINT1 writes take a bit to
take effect, and the re-arrangement provides sufficient
delay to ensure the write to CLRINT is effective. The
old code might report a spurious interrupt on some "fast"
chipsets.
export ahc-update_target_msg_request for use by OSM code.
If a target does not respond to our ATN request, clear
it once we move to a non-message phase. This avoids
sending a MSG_NOOP in some later message out phase.
Use max lun and max target constants instead of
hard-coded values.
Use softc storage built into our device_t under FreeBSD.
Fix a bug in ahc_free() that caused us to delete
resources that were not allocated.
Clean up any tstate/lstate info in ahc_free().
Clear the powerdown state in ahc_reset() so that
registers can be accessed.
Add a preliminary function for pausing the chip and
processing any posted work.
Add a preliminary suspend and resume functions.
aic7xxx.h:
Limit the number of supported luns to 64. We don't
support information unit transfers, so this is the
maximum that makes sense for these chips.
Add a new flag AHC_ALL_INTERRUPTS that forces the
processing of all interrupt state in a single invokation
of ahc_intr(). When the flag is not set, we use the
lazy interrupt handling scheme.
Add data structures to store controller state while
we are suspended.
Use constants instead of hard coded values where appropriate.
Correct some harmless "unsigned/signed" conflicts.
aic7xxx.seq:
Only perform the SCSIBUSL fix on ULTRA2 or newer controllers.
Older controllers seem to be confused by this.
In target mode, ignore PHASEMIS during data phases.
This bit seems to be flakey on U160 controllers acting
in target mode.
aic7xxx_pci.c:
Add support for the 29160C CPCI adapter.
Add definitions for subvendor ID information
available for devices with the "9005" vendor id.
We currently use this information to determine
if a multi-function device doesn't have the second
channel hooked up on a board.
Add rudimentary power mode code so we can put the
controller into the D0 state. In the future this
will be an OSM callback so that in FreeBSD we don't
duplicate functionality provided by the PCI code.
The powerstate code was added after I'd completed
my regression tests on this code.
Only capture "left over BIOS state" if the POWRDN
setting is not set in HCNTRL.
In target mode, don't bother sending incremental
CRC data.
2000-12-20 01:11:37 +00:00
|
|
|
int i;
|
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
switch (ahc->init_level) {
|
ahc_eisa.c:
ahc_pci.c:
Add detach support.
Make use of soft allocated on our behalf by newbus.
For PCI devices, disable the mapping type we aren't
using for extra protection from rogue code.
aic7xxx_93cx6.c:
aic7xxx_93cx6.h:
Sync perforce IDs.
aic7xxx_freebsd.c:
Capture the eventhandle returned by EVENTHANDER_REGISTER
so we can kill the handler off during detach.
Use AHC_* constants instead of hard coded numbers in a
few more places.
Test PPR option state when deciding to "really" negotiate
when the CAM_NEGOTIATE flag is passed in a CCB.
Make use of core "ahc_pause_and_flushwork" routine in our
timeout handler rather than re-inventing this code.
Cleanup all of our resources (really!) in ahc_platform_free().
We should be all set to become a module now.
Implement the core ahc_detach() routine shared by all of
the FreeBSD front-ends.
aic7xxx_freebsd.h:
Softc storage for our event handler.
Null implementation for the ahc_platform_flushwork() OSM
callback. FreeBSD doesn't need this as XPT callbacks are
safe from all contexts and are done directly in ahc_done().
aic7xxx_inline.h:
Implement new lazy interrupt scheme. To avoid an extra
PCI bus read, we first check our completion queues to
see if any work has completed. If work is available, we
assume that this is the source of the interrupt and skip
reading INTSTAT. Any remaining interrupt status will be
cleared by a second call to the interrupt handler should
the interrupt line still be asserted. This drops the
interrupt handler down to a single PCI bus read in the
common case of I/O completion. This is the same overhead
as in the not so distant past, but the extra sanity of
perforning a PCI read after clearing the command complete
interrupt and before running the completion queue to avoid
missing command complete interrupts added a cycle.
aic7xxx.c:
During initialization, be sure to initialize all scratch
ram locations before they are read to avoid parity errors.
In this case, we use a new function, ahc_unbusy_tcl() to
initialize the scratch ram busy target table.
Replace instances of ahc_index_busy_tcl() used to unbusy
a tcl without looking at the old value with ahc_unbusy_tcl().
Modify ahc_sent_msg so that it can find single byte messages.
ahc_sent_msg is now used to determine if a transfer negotiation
attempt resulted in a bus free.
Be more careful in filtering out only the SCSI interrupts
of interest in ahc_handle_scsiint.
Rearrange interrupt clearing code to ensure that at least
one PCI transaction occurrs after hitting CLRSINT1 and
writting to CLRINT. CLRSINT1 writes take a bit to
take effect, and the re-arrangement provides sufficient
delay to ensure the write to CLRINT is effective. The
old code might report a spurious interrupt on some "fast"
chipsets.
export ahc-update_target_msg_request for use by OSM code.
If a target does not respond to our ATN request, clear
it once we move to a non-message phase. This avoids
sending a MSG_NOOP in some later message out phase.
Use max lun and max target constants instead of
hard-coded values.
Use softc storage built into our device_t under FreeBSD.
Fix a bug in ahc_free() that caused us to delete
resources that were not allocated.
Clean up any tstate/lstate info in ahc_free().
Clear the powerdown state in ahc_reset() so that
registers can be accessed.
Add a preliminary function for pausing the chip and
processing any posted work.
Add a preliminary suspend and resume functions.
aic7xxx.h:
Limit the number of supported luns to 64. We don't
support information unit transfers, so this is the
maximum that makes sense for these chips.
Add a new flag AHC_ALL_INTERRUPTS that forces the
processing of all interrupt state in a single invokation
of ahc_intr(). When the flag is not set, we use the
lazy interrupt handling scheme.
Add data structures to store controller state while
we are suspended.
Use constants instead of hard coded values where appropriate.
Correct some harmless "unsigned/signed" conflicts.
aic7xxx.seq:
Only perform the SCSIBUSL fix on ULTRA2 or newer controllers.
Older controllers seem to be confused by this.
In target mode, ignore PHASEMIS during data phases.
This bit seems to be flakey on U160 controllers acting
in target mode.
aic7xxx_pci.c:
Add support for the 29160C CPCI adapter.
Add definitions for subvendor ID information
available for devices with the "9005" vendor id.
We currently use this information to determine
if a multi-function device doesn't have the second
channel hooked up on a board.
Add rudimentary power mode code so we can put the
controller into the D0 state. In the future this
will be an OSM callback so that in FreeBSD we don't
duplicate functionality provided by the PCI code.
The powerstate code was added after I'd completed
my regression tests on this code.
Only capture "left over BIOS state" if the POWRDN
setting is not set in HCNTRL.
In target mode, don't bother sending incremental
CRC data.
2000-12-20 01:11:37 +00:00
|
|
|
default:
|
|
|
|
case 5:
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_shutdown(ahc);
|
|
|
|
TAILQ_REMOVE(&ahc_tailq, ahc, links);
|
|
|
|
/* FALLTHROUGH */
|
ahc_eisa.c:
ahc_pci.c:
Add detach support.
Make use of soft allocated on our behalf by newbus.
For PCI devices, disable the mapping type we aren't
using for extra protection from rogue code.
aic7xxx_93cx6.c:
aic7xxx_93cx6.h:
Sync perforce IDs.
aic7xxx_freebsd.c:
Capture the eventhandle returned by EVENTHANDER_REGISTER
so we can kill the handler off during detach.
Use AHC_* constants instead of hard coded numbers in a
few more places.
Test PPR option state when deciding to "really" negotiate
when the CAM_NEGOTIATE flag is passed in a CCB.
Make use of core "ahc_pause_and_flushwork" routine in our
timeout handler rather than re-inventing this code.
Cleanup all of our resources (really!) in ahc_platform_free().
We should be all set to become a module now.
Implement the core ahc_detach() routine shared by all of
the FreeBSD front-ends.
aic7xxx_freebsd.h:
Softc storage for our event handler.
Null implementation for the ahc_platform_flushwork() OSM
callback. FreeBSD doesn't need this as XPT callbacks are
safe from all contexts and are done directly in ahc_done().
aic7xxx_inline.h:
Implement new lazy interrupt scheme. To avoid an extra
PCI bus read, we first check our completion queues to
see if any work has completed. If work is available, we
assume that this is the source of the interrupt and skip
reading INTSTAT. Any remaining interrupt status will be
cleared by a second call to the interrupt handler should
the interrupt line still be asserted. This drops the
interrupt handler down to a single PCI bus read in the
common case of I/O completion. This is the same overhead
as in the not so distant past, but the extra sanity of
perforning a PCI read after clearing the command complete
interrupt and before running the completion queue to avoid
missing command complete interrupts added a cycle.
aic7xxx.c:
During initialization, be sure to initialize all scratch
ram locations before they are read to avoid parity errors.
In this case, we use a new function, ahc_unbusy_tcl() to
initialize the scratch ram busy target table.
Replace instances of ahc_index_busy_tcl() used to unbusy
a tcl without looking at the old value with ahc_unbusy_tcl().
Modify ahc_sent_msg so that it can find single byte messages.
ahc_sent_msg is now used to determine if a transfer negotiation
attempt resulted in a bus free.
Be more careful in filtering out only the SCSI interrupts
of interest in ahc_handle_scsiint.
Rearrange interrupt clearing code to ensure that at least
one PCI transaction occurrs after hitting CLRSINT1 and
writting to CLRINT. CLRSINT1 writes take a bit to
take effect, and the re-arrangement provides sufficient
delay to ensure the write to CLRINT is effective. The
old code might report a spurious interrupt on some "fast"
chipsets.
export ahc-update_target_msg_request for use by OSM code.
If a target does not respond to our ATN request, clear
it once we move to a non-message phase. This avoids
sending a MSG_NOOP in some later message out phase.
Use max lun and max target constants instead of
hard-coded values.
Use softc storage built into our device_t under FreeBSD.
Fix a bug in ahc_free() that caused us to delete
resources that were not allocated.
Clean up any tstate/lstate info in ahc_free().
Clear the powerdown state in ahc_reset() so that
registers can be accessed.
Add a preliminary function for pausing the chip and
processing any posted work.
Add a preliminary suspend and resume functions.
aic7xxx.h:
Limit the number of supported luns to 64. We don't
support information unit transfers, so this is the
maximum that makes sense for these chips.
Add a new flag AHC_ALL_INTERRUPTS that forces the
processing of all interrupt state in a single invokation
of ahc_intr(). When the flag is not set, we use the
lazy interrupt handling scheme.
Add data structures to store controller state while
we are suspended.
Use constants instead of hard coded values where appropriate.
Correct some harmless "unsigned/signed" conflicts.
aic7xxx.seq:
Only perform the SCSIBUSL fix on ULTRA2 or newer controllers.
Older controllers seem to be confused by this.
In target mode, ignore PHASEMIS during data phases.
This bit seems to be flakey on U160 controllers acting
in target mode.
aic7xxx_pci.c:
Add support for the 29160C CPCI adapter.
Add definitions for subvendor ID information
available for devices with the "9005" vendor id.
We currently use this information to determine
if a multi-function device doesn't have the second
channel hooked up on a board.
Add rudimentary power mode code so we can put the
controller into the D0 state. In the future this
will be an OSM callback so that in FreeBSD we don't
duplicate functionality provided by the PCI code.
The powerstate code was added after I'd completed
my regression tests on this code.
Only capture "left over BIOS state" if the POWRDN
setting is not set in HCNTRL.
In target mode, don't bother sending incremental
CRC data.
2000-12-20 01:11:37 +00:00
|
|
|
case 4:
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_dmamap_unload(ahc, ahc->shared_data_dmat,
|
|
|
|
ahc->shared_data_dmamap);
|
|
|
|
/* FALLTHROUGH */
|
ahc_eisa.c:
ahc_pci.c:
Add detach support.
Make use of soft allocated on our behalf by newbus.
For PCI devices, disable the mapping type we aren't
using for extra protection from rogue code.
aic7xxx_93cx6.c:
aic7xxx_93cx6.h:
Sync perforce IDs.
aic7xxx_freebsd.c:
Capture the eventhandle returned by EVENTHANDER_REGISTER
so we can kill the handler off during detach.
Use AHC_* constants instead of hard coded numbers in a
few more places.
Test PPR option state when deciding to "really" negotiate
when the CAM_NEGOTIATE flag is passed in a CCB.
Make use of core "ahc_pause_and_flushwork" routine in our
timeout handler rather than re-inventing this code.
Cleanup all of our resources (really!) in ahc_platform_free().
We should be all set to become a module now.
Implement the core ahc_detach() routine shared by all of
the FreeBSD front-ends.
aic7xxx_freebsd.h:
Softc storage for our event handler.
Null implementation for the ahc_platform_flushwork() OSM
callback. FreeBSD doesn't need this as XPT callbacks are
safe from all contexts and are done directly in ahc_done().
aic7xxx_inline.h:
Implement new lazy interrupt scheme. To avoid an extra
PCI bus read, we first check our completion queues to
see if any work has completed. If work is available, we
assume that this is the source of the interrupt and skip
reading INTSTAT. Any remaining interrupt status will be
cleared by a second call to the interrupt handler should
the interrupt line still be asserted. This drops the
interrupt handler down to a single PCI bus read in the
common case of I/O completion. This is the same overhead
as in the not so distant past, but the extra sanity of
perforning a PCI read after clearing the command complete
interrupt and before running the completion queue to avoid
missing command complete interrupts added a cycle.
aic7xxx.c:
During initialization, be sure to initialize all scratch
ram locations before they are read to avoid parity errors.
In this case, we use a new function, ahc_unbusy_tcl() to
initialize the scratch ram busy target table.
Replace instances of ahc_index_busy_tcl() used to unbusy
a tcl without looking at the old value with ahc_unbusy_tcl().
Modify ahc_sent_msg so that it can find single byte messages.
ahc_sent_msg is now used to determine if a transfer negotiation
attempt resulted in a bus free.
Be more careful in filtering out only the SCSI interrupts
of interest in ahc_handle_scsiint.
Rearrange interrupt clearing code to ensure that at least
one PCI transaction occurrs after hitting CLRSINT1 and
writting to CLRINT. CLRSINT1 writes take a bit to
take effect, and the re-arrangement provides sufficient
delay to ensure the write to CLRINT is effective. The
old code might report a spurious interrupt on some "fast"
chipsets.
export ahc-update_target_msg_request for use by OSM code.
If a target does not respond to our ATN request, clear
it once we move to a non-message phase. This avoids
sending a MSG_NOOP in some later message out phase.
Use max lun and max target constants instead of
hard-coded values.
Use softc storage built into our device_t under FreeBSD.
Fix a bug in ahc_free() that caused us to delete
resources that were not allocated.
Clean up any tstate/lstate info in ahc_free().
Clear the powerdown state in ahc_reset() so that
registers can be accessed.
Add a preliminary function for pausing the chip and
processing any posted work.
Add a preliminary suspend and resume functions.
aic7xxx.h:
Limit the number of supported luns to 64. We don't
support information unit transfers, so this is the
maximum that makes sense for these chips.
Add a new flag AHC_ALL_INTERRUPTS that forces the
processing of all interrupt state in a single invokation
of ahc_intr(). When the flag is not set, we use the
lazy interrupt handling scheme.
Add data structures to store controller state while
we are suspended.
Use constants instead of hard coded values where appropriate.
Correct some harmless "unsigned/signed" conflicts.
aic7xxx.seq:
Only perform the SCSIBUSL fix on ULTRA2 or newer controllers.
Older controllers seem to be confused by this.
In target mode, ignore PHASEMIS during data phases.
This bit seems to be flakey on U160 controllers acting
in target mode.
aic7xxx_pci.c:
Add support for the 29160C CPCI adapter.
Add definitions for subvendor ID information
available for devices with the "9005" vendor id.
We currently use this information to determine
if a multi-function device doesn't have the second
channel hooked up on a board.
Add rudimentary power mode code so we can put the
controller into the D0 state. In the future this
will be an OSM callback so that in FreeBSD we don't
duplicate functionality provided by the PCI code.
The powerstate code was added after I'd completed
my regression tests on this code.
Only capture "left over BIOS state" if the POWRDN
setting is not set in HCNTRL.
In target mode, don't bother sending incremental
CRC data.
2000-12-20 01:11:37 +00:00
|
|
|
case 3:
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_dmamem_free(ahc, ahc->shared_data_dmat, ahc->qoutfifo,
|
|
|
|
ahc->shared_data_dmamap);
|
|
|
|
ahc_dmamap_destroy(ahc, ahc->shared_data_dmat,
|
|
|
|
ahc->shared_data_dmamap);
|
|
|
|
/* FALLTHROUGH */
|
ahc_eisa.c:
ahc_pci.c:
Add detach support.
Make use of soft allocated on our behalf by newbus.
For PCI devices, disable the mapping type we aren't
using for extra protection from rogue code.
aic7xxx_93cx6.c:
aic7xxx_93cx6.h:
Sync perforce IDs.
aic7xxx_freebsd.c:
Capture the eventhandle returned by EVENTHANDER_REGISTER
so we can kill the handler off during detach.
Use AHC_* constants instead of hard coded numbers in a
few more places.
Test PPR option state when deciding to "really" negotiate
when the CAM_NEGOTIATE flag is passed in a CCB.
Make use of core "ahc_pause_and_flushwork" routine in our
timeout handler rather than re-inventing this code.
Cleanup all of our resources (really!) in ahc_platform_free().
We should be all set to become a module now.
Implement the core ahc_detach() routine shared by all of
the FreeBSD front-ends.
aic7xxx_freebsd.h:
Softc storage for our event handler.
Null implementation for the ahc_platform_flushwork() OSM
callback. FreeBSD doesn't need this as XPT callbacks are
safe from all contexts and are done directly in ahc_done().
aic7xxx_inline.h:
Implement new lazy interrupt scheme. To avoid an extra
PCI bus read, we first check our completion queues to
see if any work has completed. If work is available, we
assume that this is the source of the interrupt and skip
reading INTSTAT. Any remaining interrupt status will be
cleared by a second call to the interrupt handler should
the interrupt line still be asserted. This drops the
interrupt handler down to a single PCI bus read in the
common case of I/O completion. This is the same overhead
as in the not so distant past, but the extra sanity of
perforning a PCI read after clearing the command complete
interrupt and before running the completion queue to avoid
missing command complete interrupts added a cycle.
aic7xxx.c:
During initialization, be sure to initialize all scratch
ram locations before they are read to avoid parity errors.
In this case, we use a new function, ahc_unbusy_tcl() to
initialize the scratch ram busy target table.
Replace instances of ahc_index_busy_tcl() used to unbusy
a tcl without looking at the old value with ahc_unbusy_tcl().
Modify ahc_sent_msg so that it can find single byte messages.
ahc_sent_msg is now used to determine if a transfer negotiation
attempt resulted in a bus free.
Be more careful in filtering out only the SCSI interrupts
of interest in ahc_handle_scsiint.
Rearrange interrupt clearing code to ensure that at least
one PCI transaction occurrs after hitting CLRSINT1 and
writting to CLRINT. CLRSINT1 writes take a bit to
take effect, and the re-arrangement provides sufficient
delay to ensure the write to CLRINT is effective. The
old code might report a spurious interrupt on some "fast"
chipsets.
export ahc-update_target_msg_request for use by OSM code.
If a target does not respond to our ATN request, clear
it once we move to a non-message phase. This avoids
sending a MSG_NOOP in some later message out phase.
Use max lun and max target constants instead of
hard-coded values.
Use softc storage built into our device_t under FreeBSD.
Fix a bug in ahc_free() that caused us to delete
resources that were not allocated.
Clean up any tstate/lstate info in ahc_free().
Clear the powerdown state in ahc_reset() so that
registers can be accessed.
Add a preliminary function for pausing the chip and
processing any posted work.
Add a preliminary suspend and resume functions.
aic7xxx.h:
Limit the number of supported luns to 64. We don't
support information unit transfers, so this is the
maximum that makes sense for these chips.
Add a new flag AHC_ALL_INTERRUPTS that forces the
processing of all interrupt state in a single invokation
of ahc_intr(). When the flag is not set, we use the
lazy interrupt handling scheme.
Add data structures to store controller state while
we are suspended.
Use constants instead of hard coded values where appropriate.
Correct some harmless "unsigned/signed" conflicts.
aic7xxx.seq:
Only perform the SCSIBUSL fix on ULTRA2 or newer controllers.
Older controllers seem to be confused by this.
In target mode, ignore PHASEMIS during data phases.
This bit seems to be flakey on U160 controllers acting
in target mode.
aic7xxx_pci.c:
Add support for the 29160C CPCI adapter.
Add definitions for subvendor ID information
available for devices with the "9005" vendor id.
We currently use this information to determine
if a multi-function device doesn't have the second
channel hooked up on a board.
Add rudimentary power mode code so we can put the
controller into the D0 state. In the future this
will be an OSM callback so that in FreeBSD we don't
duplicate functionality provided by the PCI code.
The powerstate code was added after I'd completed
my regression tests on this code.
Only capture "left over BIOS state" if the POWRDN
setting is not set in HCNTRL.
In target mode, don't bother sending incremental
CRC data.
2000-12-20 01:11:37 +00:00
|
|
|
case 2:
|
|
|
|
ahc_dma_tag_destroy(ahc, ahc->shared_data_dmat);
|
2000-09-16 20:02:28 +00:00
|
|
|
case 1:
|
|
|
|
#ifndef __linux__
|
|
|
|
ahc_dma_tag_destroy(ahc, ahc->buffer_dmat);
|
|
|
|
#endif
|
|
|
|
break;
|
aic7xxx.c:
Style nits.
Make sure that our selection hardware is disabled
as soon as possible after detecting a busfree and
even go so far as to disable the selection hardware
in advance of an event that will cause a busfree
(ABORT or BUS DEVICE RESET message). The concern
is that the selection hardware will select a target
for which, after processing the bus free, there
will be no commands pending. The sequencer idle
loop will re-enable the selection should it still be
necessary.
In ahc_handle_scsiint(), clear SSTAT0 events several
PCI transactions (most notably reads) prior to clearing
SCSIINT. The newer chips seem to take a bit of time to
see the change which can make the clearing of SCSIINT
ineffective.
Don't bother panicing at the end of ahc_handle_scsiint().
Getting to the final else just means we lost the race
with clearing SCSIINT.
In ahc_free(), handle init-level 0. This can happen when we
fail the attach for RAID devices. While I'm here, also kill
the parent dma tag.
In ahc_match_scb(), consider initiator ccbs to be any
that are not from the target mode group. This fixes
a bug where an external target reset CCB was not getting
cleaned up by the reset code.
Don't bother freezing a ccb in any of our "abort" routines
when the status is set to CAM_REQ_CMP. This can happen
for a target reset ccb.
aic7xxx.reg:
Reserve space for a completion queue. This will be used
to enhance performance in the near future.
aic7xxx.seq:
Remove an optimization for the 7890 autoflush bug that
turned out to allow, in rare cases, some data to get
lost.
Implement a simpler, faster, fix for the PCI_2_1 retry
bug that hangs the sequencer on an SCB dma for certain chips.
Test against SAVED_SCSIID rather than SELID during target
reselections. This is how we always did it in the past,
but the code was modified while trying to work around an
issue with the 7895. SAVED_SCSIID takes into account
twin channel adapters such as the 2742T, whereas SELID
does not have the channel bit. This caused invalid
selection warnings and other strangeness on these cards.
aic7xxx_pci.c
Use the correct mask for checking the generic aic7892
entry.
2001-02-10 18:04:27 +00:00
|
|
|
case 0:
|
|
|
|
break;
|
1999-01-14 06:14:15 +00:00
|
|
|
}
|
1998-09-15 07:24:17 +00:00
|
|
|
|
aic7xxx.c:
Style nits.
Make sure that our selection hardware is disabled
as soon as possible after detecting a busfree and
even go so far as to disable the selection hardware
in advance of an event that will cause a busfree
(ABORT or BUS DEVICE RESET message). The concern
is that the selection hardware will select a target
for which, after processing the bus free, there
will be no commands pending. The sequencer idle
loop will re-enable the selection should it still be
necessary.
In ahc_handle_scsiint(), clear SSTAT0 events several
PCI transactions (most notably reads) prior to clearing
SCSIINT. The newer chips seem to take a bit of time to
see the change which can make the clearing of SCSIINT
ineffective.
Don't bother panicing at the end of ahc_handle_scsiint().
Getting to the final else just means we lost the race
with clearing SCSIINT.
In ahc_free(), handle init-level 0. This can happen when we
fail the attach for RAID devices. While I'm here, also kill
the parent dma tag.
In ahc_match_scb(), consider initiator ccbs to be any
that are not from the target mode group. This fixes
a bug where an external target reset CCB was not getting
cleaned up by the reset code.
Don't bother freezing a ccb in any of our "abort" routines
when the status is set to CAM_REQ_CMP. This can happen
for a target reset ccb.
aic7xxx.reg:
Reserve space for a completion queue. This will be used
to enhance performance in the near future.
aic7xxx.seq:
Remove an optimization for the 7890 autoflush bug that
turned out to allow, in rare cases, some data to get
lost.
Implement a simpler, faster, fix for the PCI_2_1 retry
bug that hangs the sequencer on an SCB dma for certain chips.
Test against SAVED_SCSIID rather than SELID during target
reselections. This is how we always did it in the past,
but the code was modified while trying to work around an
issue with the 7895. SAVED_SCSIID takes into account
twin channel adapters such as the 2742T, whereas SELID
does not have the channel bit. This caused invalid
selection warnings and other strangeness on these cards.
aic7xxx_pci.c
Use the correct mask for checking the generic aic7892
entry.
2001-02-10 18:04:27 +00:00
|
|
|
#ifndef __linux__
|
|
|
|
ahc_dma_tag_destroy(ahc, ahc->parent_dmat);
|
|
|
|
#endif
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_platform_free(ahc);
|
2003-05-03 23:55:38 +00:00
|
|
|
ahc_fini_scbdata(ahc);
|
ahc_eisa.c:
ahc_pci.c:
Add detach support.
Make use of soft allocated on our behalf by newbus.
For PCI devices, disable the mapping type we aren't
using for extra protection from rogue code.
aic7xxx_93cx6.c:
aic7xxx_93cx6.h:
Sync perforce IDs.
aic7xxx_freebsd.c:
Capture the eventhandle returned by EVENTHANDER_REGISTER
so we can kill the handler off during detach.
Use AHC_* constants instead of hard coded numbers in a
few more places.
Test PPR option state when deciding to "really" negotiate
when the CAM_NEGOTIATE flag is passed in a CCB.
Make use of core "ahc_pause_and_flushwork" routine in our
timeout handler rather than re-inventing this code.
Cleanup all of our resources (really!) in ahc_platform_free().
We should be all set to become a module now.
Implement the core ahc_detach() routine shared by all of
the FreeBSD front-ends.
aic7xxx_freebsd.h:
Softc storage for our event handler.
Null implementation for the ahc_platform_flushwork() OSM
callback. FreeBSD doesn't need this as XPT callbacks are
safe from all contexts and are done directly in ahc_done().
aic7xxx_inline.h:
Implement new lazy interrupt scheme. To avoid an extra
PCI bus read, we first check our completion queues to
see if any work has completed. If work is available, we
assume that this is the source of the interrupt and skip
reading INTSTAT. Any remaining interrupt status will be
cleared by a second call to the interrupt handler should
the interrupt line still be asserted. This drops the
interrupt handler down to a single PCI bus read in the
common case of I/O completion. This is the same overhead
as in the not so distant past, but the extra sanity of
perforning a PCI read after clearing the command complete
interrupt and before running the completion queue to avoid
missing command complete interrupts added a cycle.
aic7xxx.c:
During initialization, be sure to initialize all scratch
ram locations before they are read to avoid parity errors.
In this case, we use a new function, ahc_unbusy_tcl() to
initialize the scratch ram busy target table.
Replace instances of ahc_index_busy_tcl() used to unbusy
a tcl without looking at the old value with ahc_unbusy_tcl().
Modify ahc_sent_msg so that it can find single byte messages.
ahc_sent_msg is now used to determine if a transfer negotiation
attempt resulted in a bus free.
Be more careful in filtering out only the SCSI interrupts
of interest in ahc_handle_scsiint.
Rearrange interrupt clearing code to ensure that at least
one PCI transaction occurrs after hitting CLRSINT1 and
writting to CLRINT. CLRSINT1 writes take a bit to
take effect, and the re-arrangement provides sufficient
delay to ensure the write to CLRINT is effective. The
old code might report a spurious interrupt on some "fast"
chipsets.
export ahc-update_target_msg_request for use by OSM code.
If a target does not respond to our ATN request, clear
it once we move to a non-message phase. This avoids
sending a MSG_NOOP in some later message out phase.
Use max lun and max target constants instead of
hard-coded values.
Use softc storage built into our device_t under FreeBSD.
Fix a bug in ahc_free() that caused us to delete
resources that were not allocated.
Clean up any tstate/lstate info in ahc_free().
Clear the powerdown state in ahc_reset() so that
registers can be accessed.
Add a preliminary function for pausing the chip and
processing any posted work.
Add a preliminary suspend and resume functions.
aic7xxx.h:
Limit the number of supported luns to 64. We don't
support information unit transfers, so this is the
maximum that makes sense for these chips.
Add a new flag AHC_ALL_INTERRUPTS that forces the
processing of all interrupt state in a single invokation
of ahc_intr(). When the flag is not set, we use the
lazy interrupt handling scheme.
Add data structures to store controller state while
we are suspended.
Use constants instead of hard coded values where appropriate.
Correct some harmless "unsigned/signed" conflicts.
aic7xxx.seq:
Only perform the SCSIBUSL fix on ULTRA2 or newer controllers.
Older controllers seem to be confused by this.
In target mode, ignore PHASEMIS during data phases.
This bit seems to be flakey on U160 controllers acting
in target mode.
aic7xxx_pci.c:
Add support for the 29160C CPCI adapter.
Add definitions for subvendor ID information
available for devices with the "9005" vendor id.
We currently use this information to determine
if a multi-function device doesn't have the second
channel hooked up on a board.
Add rudimentary power mode code so we can put the
controller into the D0 state. In the future this
will be an OSM callback so that in FreeBSD we don't
duplicate functionality provided by the PCI code.
The powerstate code was added after I'd completed
my regression tests on this code.
Only capture "left over BIOS state" if the POWRDN
setting is not set in HCNTRL.
In target mode, don't bother sending incremental
CRC data.
2000-12-20 01:11:37 +00:00
|
|
|
for (i = 0; i < AHC_NUM_TARGETS; i++) {
|
2001-03-29 00:36:35 +00:00
|
|
|
struct ahc_tmode_tstate *tstate;
|
ahc_eisa.c:
ahc_pci.c:
Add detach support.
Make use of soft allocated on our behalf by newbus.
For PCI devices, disable the mapping type we aren't
using for extra protection from rogue code.
aic7xxx_93cx6.c:
aic7xxx_93cx6.h:
Sync perforce IDs.
aic7xxx_freebsd.c:
Capture the eventhandle returned by EVENTHANDER_REGISTER
so we can kill the handler off during detach.
Use AHC_* constants instead of hard coded numbers in a
few more places.
Test PPR option state when deciding to "really" negotiate
when the CAM_NEGOTIATE flag is passed in a CCB.
Make use of core "ahc_pause_and_flushwork" routine in our
timeout handler rather than re-inventing this code.
Cleanup all of our resources (really!) in ahc_platform_free().
We should be all set to become a module now.
Implement the core ahc_detach() routine shared by all of
the FreeBSD front-ends.
aic7xxx_freebsd.h:
Softc storage for our event handler.
Null implementation for the ahc_platform_flushwork() OSM
callback. FreeBSD doesn't need this as XPT callbacks are
safe from all contexts and are done directly in ahc_done().
aic7xxx_inline.h:
Implement new lazy interrupt scheme. To avoid an extra
PCI bus read, we first check our completion queues to
see if any work has completed. If work is available, we
assume that this is the source of the interrupt and skip
reading INTSTAT. Any remaining interrupt status will be
cleared by a second call to the interrupt handler should
the interrupt line still be asserted. This drops the
interrupt handler down to a single PCI bus read in the
common case of I/O completion. This is the same overhead
as in the not so distant past, but the extra sanity of
perforning a PCI read after clearing the command complete
interrupt and before running the completion queue to avoid
missing command complete interrupts added a cycle.
aic7xxx.c:
During initialization, be sure to initialize all scratch
ram locations before they are read to avoid parity errors.
In this case, we use a new function, ahc_unbusy_tcl() to
initialize the scratch ram busy target table.
Replace instances of ahc_index_busy_tcl() used to unbusy
a tcl without looking at the old value with ahc_unbusy_tcl().
Modify ahc_sent_msg so that it can find single byte messages.
ahc_sent_msg is now used to determine if a transfer negotiation
attempt resulted in a bus free.
Be more careful in filtering out only the SCSI interrupts
of interest in ahc_handle_scsiint.
Rearrange interrupt clearing code to ensure that at least
one PCI transaction occurrs after hitting CLRSINT1 and
writting to CLRINT. CLRSINT1 writes take a bit to
take effect, and the re-arrangement provides sufficient
delay to ensure the write to CLRINT is effective. The
old code might report a spurious interrupt on some "fast"
chipsets.
export ahc-update_target_msg_request for use by OSM code.
If a target does not respond to our ATN request, clear
it once we move to a non-message phase. This avoids
sending a MSG_NOOP in some later message out phase.
Use max lun and max target constants instead of
hard-coded values.
Use softc storage built into our device_t under FreeBSD.
Fix a bug in ahc_free() that caused us to delete
resources that were not allocated.
Clean up any tstate/lstate info in ahc_free().
Clear the powerdown state in ahc_reset() so that
registers can be accessed.
Add a preliminary function for pausing the chip and
processing any posted work.
Add a preliminary suspend and resume functions.
aic7xxx.h:
Limit the number of supported luns to 64. We don't
support information unit transfers, so this is the
maximum that makes sense for these chips.
Add a new flag AHC_ALL_INTERRUPTS that forces the
processing of all interrupt state in a single invokation
of ahc_intr(). When the flag is not set, we use the
lazy interrupt handling scheme.
Add data structures to store controller state while
we are suspended.
Use constants instead of hard coded values where appropriate.
Correct some harmless "unsigned/signed" conflicts.
aic7xxx.seq:
Only perform the SCSIBUSL fix on ULTRA2 or newer controllers.
Older controllers seem to be confused by this.
In target mode, ignore PHASEMIS during data phases.
This bit seems to be flakey on U160 controllers acting
in target mode.
aic7xxx_pci.c:
Add support for the 29160C CPCI adapter.
Add definitions for subvendor ID information
available for devices with the "9005" vendor id.
We currently use this information to determine
if a multi-function device doesn't have the second
channel hooked up on a board.
Add rudimentary power mode code so we can put the
controller into the D0 state. In the future this
will be an OSM callback so that in FreeBSD we don't
duplicate functionality provided by the PCI code.
The powerstate code was added after I'd completed
my regression tests on this code.
Only capture "left over BIOS state" if the POWRDN
setting is not set in HCNTRL.
In target mode, don't bother sending incremental
CRC data.
2000-12-20 01:11:37 +00:00
|
|
|
|
|
|
|
tstate = ahc->enabled_targets[i];
|
|
|
|
if (tstate != NULL) {
|
|
|
|
#if AHC_TARGET_MODE
|
|
|
|
int j;
|
|
|
|
|
|
|
|
for (j = 0; j < AHC_NUM_LUNS; j++) {
|
2001-03-29 00:36:35 +00:00
|
|
|
struct ahc_tmode_lstate *lstate;
|
ahc_eisa.c:
ahc_pci.c:
Add detach support.
Make use of soft allocated on our behalf by newbus.
For PCI devices, disable the mapping type we aren't
using for extra protection from rogue code.
aic7xxx_93cx6.c:
aic7xxx_93cx6.h:
Sync perforce IDs.
aic7xxx_freebsd.c:
Capture the eventhandle returned by EVENTHANDER_REGISTER
so we can kill the handler off during detach.
Use AHC_* constants instead of hard coded numbers in a
few more places.
Test PPR option state when deciding to "really" negotiate
when the CAM_NEGOTIATE flag is passed in a CCB.
Make use of core "ahc_pause_and_flushwork" routine in our
timeout handler rather than re-inventing this code.
Cleanup all of our resources (really!) in ahc_platform_free().
We should be all set to become a module now.
Implement the core ahc_detach() routine shared by all of
the FreeBSD front-ends.
aic7xxx_freebsd.h:
Softc storage for our event handler.
Null implementation for the ahc_platform_flushwork() OSM
callback. FreeBSD doesn't need this as XPT callbacks are
safe from all contexts and are done directly in ahc_done().
aic7xxx_inline.h:
Implement new lazy interrupt scheme. To avoid an extra
PCI bus read, we first check our completion queues to
see if any work has completed. If work is available, we
assume that this is the source of the interrupt and skip
reading INTSTAT. Any remaining interrupt status will be
cleared by a second call to the interrupt handler should
the interrupt line still be asserted. This drops the
interrupt handler down to a single PCI bus read in the
common case of I/O completion. This is the same overhead
as in the not so distant past, but the extra sanity of
perforning a PCI read after clearing the command complete
interrupt and before running the completion queue to avoid
missing command complete interrupts added a cycle.
aic7xxx.c:
During initialization, be sure to initialize all scratch
ram locations before they are read to avoid parity errors.
In this case, we use a new function, ahc_unbusy_tcl() to
initialize the scratch ram busy target table.
Replace instances of ahc_index_busy_tcl() used to unbusy
a tcl without looking at the old value with ahc_unbusy_tcl().
Modify ahc_sent_msg so that it can find single byte messages.
ahc_sent_msg is now used to determine if a transfer negotiation
attempt resulted in a bus free.
Be more careful in filtering out only the SCSI interrupts
of interest in ahc_handle_scsiint.
Rearrange interrupt clearing code to ensure that at least
one PCI transaction occurrs after hitting CLRSINT1 and
writting to CLRINT. CLRSINT1 writes take a bit to
take effect, and the re-arrangement provides sufficient
delay to ensure the write to CLRINT is effective. The
old code might report a spurious interrupt on some "fast"
chipsets.
export ahc-update_target_msg_request for use by OSM code.
If a target does not respond to our ATN request, clear
it once we move to a non-message phase. This avoids
sending a MSG_NOOP in some later message out phase.
Use max lun and max target constants instead of
hard-coded values.
Use softc storage built into our device_t under FreeBSD.
Fix a bug in ahc_free() that caused us to delete
resources that were not allocated.
Clean up any tstate/lstate info in ahc_free().
Clear the powerdown state in ahc_reset() so that
registers can be accessed.
Add a preliminary function for pausing the chip and
processing any posted work.
Add a preliminary suspend and resume functions.
aic7xxx.h:
Limit the number of supported luns to 64. We don't
support information unit transfers, so this is the
maximum that makes sense for these chips.
Add a new flag AHC_ALL_INTERRUPTS that forces the
processing of all interrupt state in a single invokation
of ahc_intr(). When the flag is not set, we use the
lazy interrupt handling scheme.
Add data structures to store controller state while
we are suspended.
Use constants instead of hard coded values where appropriate.
Correct some harmless "unsigned/signed" conflicts.
aic7xxx.seq:
Only perform the SCSIBUSL fix on ULTRA2 or newer controllers.
Older controllers seem to be confused by this.
In target mode, ignore PHASEMIS during data phases.
This bit seems to be flakey on U160 controllers acting
in target mode.
aic7xxx_pci.c:
Add support for the 29160C CPCI adapter.
Add definitions for subvendor ID information
available for devices with the "9005" vendor id.
We currently use this information to determine
if a multi-function device doesn't have the second
channel hooked up on a board.
Add rudimentary power mode code so we can put the
controller into the D0 state. In the future this
will be an OSM callback so that in FreeBSD we don't
duplicate functionality provided by the PCI code.
The powerstate code was added after I'd completed
my regression tests on this code.
Only capture "left over BIOS state" if the POWRDN
setting is not set in HCNTRL.
In target mode, don't bother sending incremental
CRC data.
2000-12-20 01:11:37 +00:00
|
|
|
|
|
|
|
lstate = tstate->enabled_luns[j];
|
|
|
|
if (lstate != NULL) {
|
|
|
|
xpt_free_path(lstate->path);
|
|
|
|
free(lstate, M_DEVBUF);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
free(tstate, M_DEVBUF);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
#if AHC_TARGET_MODE
|
|
|
|
if (ahc->black_hole != NULL) {
|
|
|
|
xpt_free_path(ahc->black_hole->path);
|
|
|
|
free(ahc->black_hole, M_DEVBUF);
|
2000-09-16 20:02:28 +00:00
|
|
|
}
|
|
|
|
#endif
|
|
|
|
if (ahc->name != NULL)
|
|
|
|
free(ahc->name, M_DEVBUF);
|
2002-08-31 06:41:37 +00:00
|
|
|
if (ahc->seep_config != NULL)
|
|
|
|
free(ahc->seep_config, M_DEVBUF);
|
ahc_eisa.c:
ahc_pci.c:
Add detach support.
Make use of soft allocated on our behalf by newbus.
For PCI devices, disable the mapping type we aren't
using for extra protection from rogue code.
aic7xxx_93cx6.c:
aic7xxx_93cx6.h:
Sync perforce IDs.
aic7xxx_freebsd.c:
Capture the eventhandle returned by EVENTHANDER_REGISTER
so we can kill the handler off during detach.
Use AHC_* constants instead of hard coded numbers in a
few more places.
Test PPR option state when deciding to "really" negotiate
when the CAM_NEGOTIATE flag is passed in a CCB.
Make use of core "ahc_pause_and_flushwork" routine in our
timeout handler rather than re-inventing this code.
Cleanup all of our resources (really!) in ahc_platform_free().
We should be all set to become a module now.
Implement the core ahc_detach() routine shared by all of
the FreeBSD front-ends.
aic7xxx_freebsd.h:
Softc storage for our event handler.
Null implementation for the ahc_platform_flushwork() OSM
callback. FreeBSD doesn't need this as XPT callbacks are
safe from all contexts and are done directly in ahc_done().
aic7xxx_inline.h:
Implement new lazy interrupt scheme. To avoid an extra
PCI bus read, we first check our completion queues to
see if any work has completed. If work is available, we
assume that this is the source of the interrupt and skip
reading INTSTAT. Any remaining interrupt status will be
cleared by a second call to the interrupt handler should
the interrupt line still be asserted. This drops the
interrupt handler down to a single PCI bus read in the
common case of I/O completion. This is the same overhead
as in the not so distant past, but the extra sanity of
perforning a PCI read after clearing the command complete
interrupt and before running the completion queue to avoid
missing command complete interrupts added a cycle.
aic7xxx.c:
During initialization, be sure to initialize all scratch
ram locations before they are read to avoid parity errors.
In this case, we use a new function, ahc_unbusy_tcl() to
initialize the scratch ram busy target table.
Replace instances of ahc_index_busy_tcl() used to unbusy
a tcl without looking at the old value with ahc_unbusy_tcl().
Modify ahc_sent_msg so that it can find single byte messages.
ahc_sent_msg is now used to determine if a transfer negotiation
attempt resulted in a bus free.
Be more careful in filtering out only the SCSI interrupts
of interest in ahc_handle_scsiint.
Rearrange interrupt clearing code to ensure that at least
one PCI transaction occurrs after hitting CLRSINT1 and
writting to CLRINT. CLRSINT1 writes take a bit to
take effect, and the re-arrangement provides sufficient
delay to ensure the write to CLRINT is effective. The
old code might report a spurious interrupt on some "fast"
chipsets.
export ahc-update_target_msg_request for use by OSM code.
If a target does not respond to our ATN request, clear
it once we move to a non-message phase. This avoids
sending a MSG_NOOP in some later message out phase.
Use max lun and max target constants instead of
hard-coded values.
Use softc storage built into our device_t under FreeBSD.
Fix a bug in ahc_free() that caused us to delete
resources that were not allocated.
Clean up any tstate/lstate info in ahc_free().
Clear the powerdown state in ahc_reset() so that
registers can be accessed.
Add a preliminary function for pausing the chip and
processing any posted work.
Add a preliminary suspend and resume functions.
aic7xxx.h:
Limit the number of supported luns to 64. We don't
support information unit transfers, so this is the
maximum that makes sense for these chips.
Add a new flag AHC_ALL_INTERRUPTS that forces the
processing of all interrupt state in a single invokation
of ahc_intr(). When the flag is not set, we use the
lazy interrupt handling scheme.
Add data structures to store controller state while
we are suspended.
Use constants instead of hard coded values where appropriate.
Correct some harmless "unsigned/signed" conflicts.
aic7xxx.seq:
Only perform the SCSIBUSL fix on ULTRA2 or newer controllers.
Older controllers seem to be confused by this.
In target mode, ignore PHASEMIS during data phases.
This bit seems to be flakey on U160 controllers acting
in target mode.
aic7xxx_pci.c:
Add support for the 29160C CPCI adapter.
Add definitions for subvendor ID information
available for devices with the "9005" vendor id.
We currently use this information to determine
if a multi-function device doesn't have the second
channel hooked up on a board.
Add rudimentary power mode code so we can put the
controller into the D0 state. In the future this
will be an OSM callback so that in FreeBSD we don't
duplicate functionality provided by the PCI code.
The powerstate code was added after I'd completed
my regression tests on this code.
Only capture "left over BIOS state" if the POWRDN
setting is not set in HCNTRL.
In target mode, don't bother sending incremental
CRC data.
2000-12-20 01:11:37 +00:00
|
|
|
#ifndef __FreeBSD__
|
2000-09-16 20:02:28 +00:00
|
|
|
free(ahc, M_DEVBUF);
|
ahc_eisa.c:
ahc_pci.c:
Add detach support.
Make use of soft allocated on our behalf by newbus.
For PCI devices, disable the mapping type we aren't
using for extra protection from rogue code.
aic7xxx_93cx6.c:
aic7xxx_93cx6.h:
Sync perforce IDs.
aic7xxx_freebsd.c:
Capture the eventhandle returned by EVENTHANDER_REGISTER
so we can kill the handler off during detach.
Use AHC_* constants instead of hard coded numbers in a
few more places.
Test PPR option state when deciding to "really" negotiate
when the CAM_NEGOTIATE flag is passed in a CCB.
Make use of core "ahc_pause_and_flushwork" routine in our
timeout handler rather than re-inventing this code.
Cleanup all of our resources (really!) in ahc_platform_free().
We should be all set to become a module now.
Implement the core ahc_detach() routine shared by all of
the FreeBSD front-ends.
aic7xxx_freebsd.h:
Softc storage for our event handler.
Null implementation for the ahc_platform_flushwork() OSM
callback. FreeBSD doesn't need this as XPT callbacks are
safe from all contexts and are done directly in ahc_done().
aic7xxx_inline.h:
Implement new lazy interrupt scheme. To avoid an extra
PCI bus read, we first check our completion queues to
see if any work has completed. If work is available, we
assume that this is the source of the interrupt and skip
reading INTSTAT. Any remaining interrupt status will be
cleared by a second call to the interrupt handler should
the interrupt line still be asserted. This drops the
interrupt handler down to a single PCI bus read in the
common case of I/O completion. This is the same overhead
as in the not so distant past, but the extra sanity of
perforning a PCI read after clearing the command complete
interrupt and before running the completion queue to avoid
missing command complete interrupts added a cycle.
aic7xxx.c:
During initialization, be sure to initialize all scratch
ram locations before they are read to avoid parity errors.
In this case, we use a new function, ahc_unbusy_tcl() to
initialize the scratch ram busy target table.
Replace instances of ahc_index_busy_tcl() used to unbusy
a tcl without looking at the old value with ahc_unbusy_tcl().
Modify ahc_sent_msg so that it can find single byte messages.
ahc_sent_msg is now used to determine if a transfer negotiation
attempt resulted in a bus free.
Be more careful in filtering out only the SCSI interrupts
of interest in ahc_handle_scsiint.
Rearrange interrupt clearing code to ensure that at least
one PCI transaction occurrs after hitting CLRSINT1 and
writting to CLRINT. CLRSINT1 writes take a bit to
take effect, and the re-arrangement provides sufficient
delay to ensure the write to CLRINT is effective. The
old code might report a spurious interrupt on some "fast"
chipsets.
export ahc-update_target_msg_request for use by OSM code.
If a target does not respond to our ATN request, clear
it once we move to a non-message phase. This avoids
sending a MSG_NOOP in some later message out phase.
Use max lun and max target constants instead of
hard-coded values.
Use softc storage built into our device_t under FreeBSD.
Fix a bug in ahc_free() that caused us to delete
resources that were not allocated.
Clean up any tstate/lstate info in ahc_free().
Clear the powerdown state in ahc_reset() so that
registers can be accessed.
Add a preliminary function for pausing the chip and
processing any posted work.
Add a preliminary suspend and resume functions.
aic7xxx.h:
Limit the number of supported luns to 64. We don't
support information unit transfers, so this is the
maximum that makes sense for these chips.
Add a new flag AHC_ALL_INTERRUPTS that forces the
processing of all interrupt state in a single invokation
of ahc_intr(). When the flag is not set, we use the
lazy interrupt handling scheme.
Add data structures to store controller state while
we are suspended.
Use constants instead of hard coded values where appropriate.
Correct some harmless "unsigned/signed" conflicts.
aic7xxx.seq:
Only perform the SCSIBUSL fix on ULTRA2 or newer controllers.
Older controllers seem to be confused by this.
In target mode, ignore PHASEMIS during data phases.
This bit seems to be flakey on U160 controllers acting
in target mode.
aic7xxx_pci.c:
Add support for the 29160C CPCI adapter.
Add definitions for subvendor ID information
available for devices with the "9005" vendor id.
We currently use this information to determine
if a multi-function device doesn't have the second
channel hooked up on a board.
Add rudimentary power mode code so we can put the
controller into the D0 state. In the future this
will be an OSM callback so that in FreeBSD we don't
duplicate functionality provided by the PCI code.
The powerstate code was added after I'd completed
my regression tests on this code.
Only capture "left over BIOS state" if the POWRDN
setting is not set in HCNTRL.
In target mode, don't bother sending incremental
CRC data.
2000-12-20 01:11:37 +00:00
|
|
|
#endif
|
2000-09-16 20:02:28 +00:00
|
|
|
return;
|
1998-09-15 07:24:17 +00:00
|
|
|
}
|
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
void
|
|
|
|
ahc_shutdown(void *arg)
|
1998-09-15 07:24:17 +00:00
|
|
|
{
|
1999-03-05 23:35:48 +00:00
|
|
|
struct ahc_softc *ahc;
|
2000-09-16 20:02:28 +00:00
|
|
|
int i;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc = (struct ahc_softc *)arg;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/* This will reset most registers to 0, but not all */
|
|
|
|
ahc_reset(ahc);
|
|
|
|
ahc_outb(ahc, SCSISEQ, 0);
|
|
|
|
ahc_outb(ahc, SXFRCTL0, 0);
|
|
|
|
ahc_outb(ahc, DSPCISTATUS, 0);
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2002-04-24 16:58:51 +00:00
|
|
|
for (i = TARG_SCSIRATE; i < SCSICONF; i++)
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_outb(ahc, i, 0);
|
|
|
|
}
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/*
|
|
|
|
* Reset the controller and record some information about it
|
2002-09-26 21:50:03 +00:00
|
|
|
* that is only available just after a reset.
|
2000-09-16 20:02:28 +00:00
|
|
|
*/
|
|
|
|
int
|
|
|
|
ahc_reset(struct ahc_softc *ahc)
|
|
|
|
{
|
|
|
|
u_int sblkctl;
|
|
|
|
u_int sxfrctl1_a, sxfrctl1_b;
|
2003-05-03 23:55:38 +00:00
|
|
|
int error;
|
2000-09-16 20:02:28 +00:00
|
|
|
int wait;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/*
|
|
|
|
* Preserve the value of the SXFRCTL1 register for all channels.
|
|
|
|
* It contains settings that affect termination and we don't want
|
|
|
|
* to disturb the integrity of the bus.
|
|
|
|
*/
|
This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
|
|
|
ahc_pause(ahc);
|
aic7xxx.reg:
Add a constant for the controller's stack size and the
maximum scsi offset.
aic7xxx.seq:
Style nit. The source is implied to be the destination
unless overridden in an "and" instruction.
Update target mode code for changes in identify seen
sequencer flags.
aic7xxx_pci.c:
Ensure that the PCIERRGENDIS bit is set in the
PCIERRGEN config space register. Perhaps this
is a reason for the spurios parity errors reported
on U160 controllers.
Honor the AHC_NO_BIOS_INIT flag.
Allow PCI interrupt reporting to be disabled,
by clearing the PERRRESEN bit in the command
register. This option is now enabled via a new
softc flag: AHC_DISABLE_PCI_PERR.
Disable SERR and pause the controller prior to performing
our mmapped I/O test. This should handle the case of
controllers that do not "auto-access pause". For legacy
controllers, use SCB ram instead of scratch ram since
the latter may contain settings left over from the BIOS
that we will use if an seeprom is not found.
Make use of new ahc_inl/outl() inlines.
aic7xxx.h:
Reformat a few comments to follow driver style.
Add a controller flags that indicate that a controller
has not been initialized by the BIOS and whether to
disable PCI parity errors..
Remove stack probing softc members.
Add a few more syncrate constants that are useful in speed
fallback calculations.
Add the SHOW_MASKED_ERRORS debug flag.
aic7xxx.h:
aic7xxx.c:
Implement the SCB_SILENT flag. This is useful for
hushing up the driver during DV or other operations
that we expect to cause transmission errors. The
messages will still print if the SHOW_MASKED_ERRORS
debug option is enabled.
aic7xxx_inline.h:
Implement ahc_[in|out][w|l|q]. This removes the need
for manual 'or and shift" type operations throughout
the driver.
aic7xxx.c:
Move SELTO dignostic so that the SCB is still valid
when we use it for printing path information.
If we are narrow, limit syncrate to Ultra2.
Don't clobber ppr_options when forcing a renegotiation.
The current ppr_options may be referenced while queuing
new commands. Don't set our width to unknown when forcing
negotiation on narrow controllers. This will confuse the
negotiation code into negotiating with a wide message on
narrow controllers.
Add an "asserting atn" diagnostic with controller/target
information.
Remove the probe_stack code. The stack is always
4 deep on legacy controllers, so probing is pointless.
This also avoids an issue where probing the stack would
upset the aic7770.
In ahc_reset(), record whether or not we found the
controller in a reset state. If the controller was
already reset, assume that no BIOS has initialized
the controller and ignore left over scratch ram
settings.
Fix an ifdef bug that caused sequencer debugging to
be enabled always.
Clear the ultraenb flag in our tstate during startup.
The ultraenbled'ness of a device is recorded in the user
transfer settings. tstate->ultraenb bitmask indicates
which devices we have negotiated an ultra speed with.
Just after initialization, we are async. Setting the
ultraenb flag while async seems to be harmless, but it
was confusing to see the ULTRAENB flag set in the SCB.
Enhance residual diagnostic to indicate if the residual
if for sense information or normal data transfers.
Indicate the features, bugs, and flags set in the softc
that are used to control firmware patch download when
booting verbose.
In ahc_dump_card_state() fix a logic reversal. The
SCSIPHASE register only exists on U160 controllers.
The SCSISIGI register exists on all controllers. Not
the other way around. Also print out the ERROR register.
Allow ahc_dump_card_state() to be called when the sequencer
is not paused. Add dump card state markers as in the U320
driver.
2003-01-20 20:44:55 +00:00
|
|
|
if ((ahc_inb(ahc, HCNTRL) & CHIPRST) != 0) {
|
|
|
|
/*
|
|
|
|
* The chip has not been initialized since
|
|
|
|
* PCI/EISA/VLB bus reset. Don't trust
|
|
|
|
* "left over BIOS data".
|
|
|
|
*/
|
|
|
|
ahc->flags |= AHC_NO_BIOS_INIT;
|
|
|
|
}
|
2000-09-16 20:02:28 +00:00
|
|
|
sxfrctl1_b = 0;
|
|
|
|
if ((ahc->chip & AHC_CHIPID_MASK) == AHC_AIC7770) {
|
|
|
|
u_int sblkctl;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
|
|
|
/*
|
2000-09-16 20:02:28 +00:00
|
|
|
* Save channel B's settings in case this chip
|
|
|
|
* is setup for TWIN channel operation.
|
1998-09-15 07:24:17 +00:00
|
|
|
*/
|
2000-09-16 20:02:28 +00:00
|
|
|
sblkctl = ahc_inb(ahc, SBLKCTL);
|
|
|
|
ahc_outb(ahc, SBLKCTL, sblkctl | SELBUSB);
|
|
|
|
sxfrctl1_b = ahc_inb(ahc, SXFRCTL1);
|
|
|
|
ahc_outb(ahc, SBLKCTL, sblkctl & ~SELBUSB);
|
|
|
|
}
|
|
|
|
sxfrctl1_a = ahc_inb(ahc, SXFRCTL1);
|
2000-07-18 20:12:14 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_outb(ahc, HCNTRL, CHIPRST | ahc->pause);
|
2000-07-18 20:12:14 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/*
|
2002-04-24 16:58:51 +00:00
|
|
|
* Ensure that the reset has finished. We delay 1000us
|
|
|
|
* prior to reading the register to make sure the chip
|
|
|
|
* has sufficiently completed its reset to handle register
|
|
|
|
* accesses.
|
2000-09-16 20:02:28 +00:00
|
|
|
*/
|
|
|
|
wait = 1000;
|
|
|
|
do {
|
|
|
|
ahc_delay(1000);
|
|
|
|
} while (--wait && !(ahc_inb(ahc, HCNTRL) & CHIPRSTACK));
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
if (wait == 0) {
|
|
|
|
printf("%s: WARNING - Failed chip reset! "
|
|
|
|
"Trying to initialize anyway.\n", ahc_name(ahc));
|
|
|
|
}
|
ahc_eisa.c:
ahc_pci.c:
Add detach support.
Make use of soft allocated on our behalf by newbus.
For PCI devices, disable the mapping type we aren't
using for extra protection from rogue code.
aic7xxx_93cx6.c:
aic7xxx_93cx6.h:
Sync perforce IDs.
aic7xxx_freebsd.c:
Capture the eventhandle returned by EVENTHANDER_REGISTER
so we can kill the handler off during detach.
Use AHC_* constants instead of hard coded numbers in a
few more places.
Test PPR option state when deciding to "really" negotiate
when the CAM_NEGOTIATE flag is passed in a CCB.
Make use of core "ahc_pause_and_flushwork" routine in our
timeout handler rather than re-inventing this code.
Cleanup all of our resources (really!) in ahc_platform_free().
We should be all set to become a module now.
Implement the core ahc_detach() routine shared by all of
the FreeBSD front-ends.
aic7xxx_freebsd.h:
Softc storage for our event handler.
Null implementation for the ahc_platform_flushwork() OSM
callback. FreeBSD doesn't need this as XPT callbacks are
safe from all contexts and are done directly in ahc_done().
aic7xxx_inline.h:
Implement new lazy interrupt scheme. To avoid an extra
PCI bus read, we first check our completion queues to
see if any work has completed. If work is available, we
assume that this is the source of the interrupt and skip
reading INTSTAT. Any remaining interrupt status will be
cleared by a second call to the interrupt handler should
the interrupt line still be asserted. This drops the
interrupt handler down to a single PCI bus read in the
common case of I/O completion. This is the same overhead
as in the not so distant past, but the extra sanity of
perforning a PCI read after clearing the command complete
interrupt and before running the completion queue to avoid
missing command complete interrupts added a cycle.
aic7xxx.c:
During initialization, be sure to initialize all scratch
ram locations before they are read to avoid parity errors.
In this case, we use a new function, ahc_unbusy_tcl() to
initialize the scratch ram busy target table.
Replace instances of ahc_index_busy_tcl() used to unbusy
a tcl without looking at the old value with ahc_unbusy_tcl().
Modify ahc_sent_msg so that it can find single byte messages.
ahc_sent_msg is now used to determine if a transfer negotiation
attempt resulted in a bus free.
Be more careful in filtering out only the SCSI interrupts
of interest in ahc_handle_scsiint.
Rearrange interrupt clearing code to ensure that at least
one PCI transaction occurrs after hitting CLRSINT1 and
writting to CLRINT. CLRSINT1 writes take a bit to
take effect, and the re-arrangement provides sufficient
delay to ensure the write to CLRINT is effective. The
old code might report a spurious interrupt on some "fast"
chipsets.
export ahc-update_target_msg_request for use by OSM code.
If a target does not respond to our ATN request, clear
it once we move to a non-message phase. This avoids
sending a MSG_NOOP in some later message out phase.
Use max lun and max target constants instead of
hard-coded values.
Use softc storage built into our device_t under FreeBSD.
Fix a bug in ahc_free() that caused us to delete
resources that were not allocated.
Clean up any tstate/lstate info in ahc_free().
Clear the powerdown state in ahc_reset() so that
registers can be accessed.
Add a preliminary function for pausing the chip and
processing any posted work.
Add a preliminary suspend and resume functions.
aic7xxx.h:
Limit the number of supported luns to 64. We don't
support information unit transfers, so this is the
maximum that makes sense for these chips.
Add a new flag AHC_ALL_INTERRUPTS that forces the
processing of all interrupt state in a single invokation
of ahc_intr(). When the flag is not set, we use the
lazy interrupt handling scheme.
Add data structures to store controller state while
we are suspended.
Use constants instead of hard coded values where appropriate.
Correct some harmless "unsigned/signed" conflicts.
aic7xxx.seq:
Only perform the SCSIBUSL fix on ULTRA2 or newer controllers.
Older controllers seem to be confused by this.
In target mode, ignore PHASEMIS during data phases.
This bit seems to be flakey on U160 controllers acting
in target mode.
aic7xxx_pci.c:
Add support for the 29160C CPCI adapter.
Add definitions for subvendor ID information
available for devices with the "9005" vendor id.
We currently use this information to determine
if a multi-function device doesn't have the second
channel hooked up on a board.
Add rudimentary power mode code so we can put the
controller into the D0 state. In the future this
will be an OSM callback so that in FreeBSD we don't
duplicate functionality provided by the PCI code.
The powerstate code was added after I'd completed
my regression tests on this code.
Only capture "left over BIOS state" if the POWRDN
setting is not set in HCNTRL.
In target mode, don't bother sending incremental
CRC data.
2000-12-20 01:11:37 +00:00
|
|
|
ahc_outb(ahc, HCNTRL, ahc->pause);
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/* Determine channel configuration */
|
|
|
|
sblkctl = ahc_inb(ahc, SBLKCTL) & (SELBUSB|SELWIDE);
|
|
|
|
/* No Twin Channel PCI cards */
|
|
|
|
if ((ahc->chip & AHC_PCI) != 0)
|
|
|
|
sblkctl &= ~SELBUSB;
|
|
|
|
switch (sblkctl) {
|
|
|
|
case 0:
|
|
|
|
/* Single Narrow Channel */
|
1998-09-15 07:24:17 +00:00
|
|
|
break;
|
2000-09-16 20:02:28 +00:00
|
|
|
case 2:
|
|
|
|
/* Wide Channel */
|
|
|
|
ahc->features |= AHC_WIDE;
|
1998-09-15 07:24:17 +00:00
|
|
|
break;
|
2000-09-16 20:02:28 +00:00
|
|
|
case 8:
|
|
|
|
/* Twin Channel */
|
|
|
|
ahc->features |= AHC_TWIN;
|
1998-09-15 07:24:17 +00:00
|
|
|
break;
|
2000-09-16 20:02:28 +00:00
|
|
|
default:
|
|
|
|
printf(" Unsupported adapter type. Ignoring\n");
|
|
|
|
return(-1);
|
1998-12-15 08:22:42 +00:00
|
|
|
}
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/*
|
|
|
|
* Reload sxfrctl1.
|
|
|
|
*
|
|
|
|
* We must always initialize STPWEN to 1 before we
|
|
|
|
* restore the saved values. STPWEN is initialized
|
|
|
|
* to a tri-state condition which can only be cleared
|
|
|
|
* by turning it on.
|
|
|
|
*/
|
|
|
|
if ((ahc->features & AHC_TWIN) != 0) {
|
|
|
|
u_int sblkctl;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
sblkctl = ahc_inb(ahc, SBLKCTL);
|
|
|
|
ahc_outb(ahc, SBLKCTL, sblkctl | SELBUSB);
|
|
|
|
ahc_outb(ahc, SXFRCTL1, sxfrctl1_b);
|
|
|
|
ahc_outb(ahc, SBLKCTL, sblkctl & ~SELBUSB);
|
|
|
|
}
|
|
|
|
ahc_outb(ahc, SXFRCTL1, sxfrctl1_a);
|
2000-07-18 20:12:14 +00:00
|
|
|
|
2003-05-03 23:55:38 +00:00
|
|
|
error = 0;
|
|
|
|
if (ahc->init_level > 0)
|
|
|
|
/*
|
|
|
|
* If a recovery action has forced a chip reset,
|
|
|
|
* re-initialize the chip to our liking.
|
|
|
|
*/
|
|
|
|
error = ahc->bus_chip_init(ahc);
|
2000-09-16 20:02:28 +00:00
|
|
|
#ifdef AHC_DUMP_SEQ
|
2003-05-03 23:55:38 +00:00
|
|
|
else
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_dumpseq(ahc);
|
|
|
|
#endif
|
2000-07-18 20:12:14 +00:00
|
|
|
|
2003-05-03 23:55:38 +00:00
|
|
|
return (error);
|
2000-09-16 20:02:28 +00:00
|
|
|
}
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/*
|
|
|
|
* Determine the number of SCBs available on the controller
|
|
|
|
*/
|
|
|
|
int
|
|
|
|
ahc_probe_scbs(struct ahc_softc *ahc) {
|
|
|
|
int i;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
for (i = 0; i < AHC_SCB_MAX; i++) {
|
ahc_eisa.c:
ahc_pci.c:
Add detach support.
Make use of soft allocated on our behalf by newbus.
For PCI devices, disable the mapping type we aren't
using for extra protection from rogue code.
aic7xxx_93cx6.c:
aic7xxx_93cx6.h:
Sync perforce IDs.
aic7xxx_freebsd.c:
Capture the eventhandle returned by EVENTHANDER_REGISTER
so we can kill the handler off during detach.
Use AHC_* constants instead of hard coded numbers in a
few more places.
Test PPR option state when deciding to "really" negotiate
when the CAM_NEGOTIATE flag is passed in a CCB.
Make use of core "ahc_pause_and_flushwork" routine in our
timeout handler rather than re-inventing this code.
Cleanup all of our resources (really!) in ahc_platform_free().
We should be all set to become a module now.
Implement the core ahc_detach() routine shared by all of
the FreeBSD front-ends.
aic7xxx_freebsd.h:
Softc storage for our event handler.
Null implementation for the ahc_platform_flushwork() OSM
callback. FreeBSD doesn't need this as XPT callbacks are
safe from all contexts and are done directly in ahc_done().
aic7xxx_inline.h:
Implement new lazy interrupt scheme. To avoid an extra
PCI bus read, we first check our completion queues to
see if any work has completed. If work is available, we
assume that this is the source of the interrupt and skip
reading INTSTAT. Any remaining interrupt status will be
cleared by a second call to the interrupt handler should
the interrupt line still be asserted. This drops the
interrupt handler down to a single PCI bus read in the
common case of I/O completion. This is the same overhead
as in the not so distant past, but the extra sanity of
perforning a PCI read after clearing the command complete
interrupt and before running the completion queue to avoid
missing command complete interrupts added a cycle.
aic7xxx.c:
During initialization, be sure to initialize all scratch
ram locations before they are read to avoid parity errors.
In this case, we use a new function, ahc_unbusy_tcl() to
initialize the scratch ram busy target table.
Replace instances of ahc_index_busy_tcl() used to unbusy
a tcl without looking at the old value with ahc_unbusy_tcl().
Modify ahc_sent_msg so that it can find single byte messages.
ahc_sent_msg is now used to determine if a transfer negotiation
attempt resulted in a bus free.
Be more careful in filtering out only the SCSI interrupts
of interest in ahc_handle_scsiint.
Rearrange interrupt clearing code to ensure that at least
one PCI transaction occurrs after hitting CLRSINT1 and
writting to CLRINT. CLRSINT1 writes take a bit to
take effect, and the re-arrangement provides sufficient
delay to ensure the write to CLRINT is effective. The
old code might report a spurious interrupt on some "fast"
chipsets.
export ahc-update_target_msg_request for use by OSM code.
If a target does not respond to our ATN request, clear
it once we move to a non-message phase. This avoids
sending a MSG_NOOP in some later message out phase.
Use max lun and max target constants instead of
hard-coded values.
Use softc storage built into our device_t under FreeBSD.
Fix a bug in ahc_free() that caused us to delete
resources that were not allocated.
Clean up any tstate/lstate info in ahc_free().
Clear the powerdown state in ahc_reset() so that
registers can be accessed.
Add a preliminary function for pausing the chip and
processing any posted work.
Add a preliminary suspend and resume functions.
aic7xxx.h:
Limit the number of supported luns to 64. We don't
support information unit transfers, so this is the
maximum that makes sense for these chips.
Add a new flag AHC_ALL_INTERRUPTS that forces the
processing of all interrupt state in a single invokation
of ahc_intr(). When the flag is not set, we use the
lazy interrupt handling scheme.
Add data structures to store controller state while
we are suspended.
Use constants instead of hard coded values where appropriate.
Correct some harmless "unsigned/signed" conflicts.
aic7xxx.seq:
Only perform the SCSIBUSL fix on ULTRA2 or newer controllers.
Older controllers seem to be confused by this.
In target mode, ignore PHASEMIS during data phases.
This bit seems to be flakey on U160 controllers acting
in target mode.
aic7xxx_pci.c:
Add support for the 29160C CPCI adapter.
Add definitions for subvendor ID information
available for devices with the "9005" vendor id.
We currently use this information to determine
if a multi-function device doesn't have the second
channel hooked up on a board.
Add rudimentary power mode code so we can put the
controller into the D0 state. In the future this
will be an OSM callback so that in FreeBSD we don't
duplicate functionality provided by the PCI code.
The powerstate code was added after I'd completed
my regression tests on this code.
Only capture "left over BIOS state" if the POWRDN
setting is not set in HCNTRL.
In target mode, don't bother sending incremental
CRC data.
2000-12-20 01:11:37 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_outb(ahc, SCBPTR, i);
|
|
|
|
ahc_outb(ahc, SCB_BASE, i);
|
|
|
|
if (ahc_inb(ahc, SCB_BASE) != i)
|
|
|
|
break;
|
|
|
|
ahc_outb(ahc, SCBPTR, 0);
|
|
|
|
if (ahc_inb(ahc, SCB_BASE) != 0)
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
return (i);
|
|
|
|
}
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
static void
|
|
|
|
ahc_dmamap_cb(void *arg, bus_dma_segment_t *segs, int nseg, int error)
|
|
|
|
{
|
|
|
|
bus_addr_t *baddr;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
baddr = (bus_addr_t *)arg;
|
|
|
|
*baddr = segs->ds_addr;
|
|
|
|
}
|
1998-09-15 07:24:17 +00:00
|
|
|
|
ahc_eisa.c:
ahc_pci.c:
Add detach support.
Make use of soft allocated on our behalf by newbus.
For PCI devices, disable the mapping type we aren't
using for extra protection from rogue code.
aic7xxx_93cx6.c:
aic7xxx_93cx6.h:
Sync perforce IDs.
aic7xxx_freebsd.c:
Capture the eventhandle returned by EVENTHANDER_REGISTER
so we can kill the handler off during detach.
Use AHC_* constants instead of hard coded numbers in a
few more places.
Test PPR option state when deciding to "really" negotiate
when the CAM_NEGOTIATE flag is passed in a CCB.
Make use of core "ahc_pause_and_flushwork" routine in our
timeout handler rather than re-inventing this code.
Cleanup all of our resources (really!) in ahc_platform_free().
We should be all set to become a module now.
Implement the core ahc_detach() routine shared by all of
the FreeBSD front-ends.
aic7xxx_freebsd.h:
Softc storage for our event handler.
Null implementation for the ahc_platform_flushwork() OSM
callback. FreeBSD doesn't need this as XPT callbacks are
safe from all contexts and are done directly in ahc_done().
aic7xxx_inline.h:
Implement new lazy interrupt scheme. To avoid an extra
PCI bus read, we first check our completion queues to
see if any work has completed. If work is available, we
assume that this is the source of the interrupt and skip
reading INTSTAT. Any remaining interrupt status will be
cleared by a second call to the interrupt handler should
the interrupt line still be asserted. This drops the
interrupt handler down to a single PCI bus read in the
common case of I/O completion. This is the same overhead
as in the not so distant past, but the extra sanity of
perforning a PCI read after clearing the command complete
interrupt and before running the completion queue to avoid
missing command complete interrupts added a cycle.
aic7xxx.c:
During initialization, be sure to initialize all scratch
ram locations before they are read to avoid parity errors.
In this case, we use a new function, ahc_unbusy_tcl() to
initialize the scratch ram busy target table.
Replace instances of ahc_index_busy_tcl() used to unbusy
a tcl without looking at the old value with ahc_unbusy_tcl().
Modify ahc_sent_msg so that it can find single byte messages.
ahc_sent_msg is now used to determine if a transfer negotiation
attempt resulted in a bus free.
Be more careful in filtering out only the SCSI interrupts
of interest in ahc_handle_scsiint.
Rearrange interrupt clearing code to ensure that at least
one PCI transaction occurrs after hitting CLRSINT1 and
writting to CLRINT. CLRSINT1 writes take a bit to
take effect, and the re-arrangement provides sufficient
delay to ensure the write to CLRINT is effective. The
old code might report a spurious interrupt on some "fast"
chipsets.
export ahc-update_target_msg_request for use by OSM code.
If a target does not respond to our ATN request, clear
it once we move to a non-message phase. This avoids
sending a MSG_NOOP in some later message out phase.
Use max lun and max target constants instead of
hard-coded values.
Use softc storage built into our device_t under FreeBSD.
Fix a bug in ahc_free() that caused us to delete
resources that were not allocated.
Clean up any tstate/lstate info in ahc_free().
Clear the powerdown state in ahc_reset() so that
registers can be accessed.
Add a preliminary function for pausing the chip and
processing any posted work.
Add a preliminary suspend and resume functions.
aic7xxx.h:
Limit the number of supported luns to 64. We don't
support information unit transfers, so this is the
maximum that makes sense for these chips.
Add a new flag AHC_ALL_INTERRUPTS that forces the
processing of all interrupt state in a single invokation
of ahc_intr(). When the flag is not set, we use the
lazy interrupt handling scheme.
Add data structures to store controller state while
we are suspended.
Use constants instead of hard coded values where appropriate.
Correct some harmless "unsigned/signed" conflicts.
aic7xxx.seq:
Only perform the SCSIBUSL fix on ULTRA2 or newer controllers.
Older controllers seem to be confused by this.
In target mode, ignore PHASEMIS during data phases.
This bit seems to be flakey on U160 controllers acting
in target mode.
aic7xxx_pci.c:
Add support for the 29160C CPCI adapter.
Add definitions for subvendor ID information
available for devices with the "9005" vendor id.
We currently use this information to determine
if a multi-function device doesn't have the second
channel hooked up on a board.
Add rudimentary power mode code so we can put the
controller into the D0 state. In the future this
will be an OSM callback so that in FreeBSD we don't
duplicate functionality provided by the PCI code.
The powerstate code was added after I'd completed
my regression tests on this code.
Only capture "left over BIOS state" if the POWRDN
setting is not set in HCNTRL.
In target mode, don't bother sending incremental
CRC data.
2000-12-20 01:11:37 +00:00
|
|
|
static void
|
|
|
|
ahc_build_free_scb_list(struct ahc_softc *ahc)
|
|
|
|
{
|
2002-08-31 06:41:37 +00:00
|
|
|
int scbsize;
|
ahc_eisa.c:
ahc_pci.c:
Add detach support.
Make use of soft allocated on our behalf by newbus.
For PCI devices, disable the mapping type we aren't
using for extra protection from rogue code.
aic7xxx_93cx6.c:
aic7xxx_93cx6.h:
Sync perforce IDs.
aic7xxx_freebsd.c:
Capture the eventhandle returned by EVENTHANDER_REGISTER
so we can kill the handler off during detach.
Use AHC_* constants instead of hard coded numbers in a
few more places.
Test PPR option state when deciding to "really" negotiate
when the CAM_NEGOTIATE flag is passed in a CCB.
Make use of core "ahc_pause_and_flushwork" routine in our
timeout handler rather than re-inventing this code.
Cleanup all of our resources (really!) in ahc_platform_free().
We should be all set to become a module now.
Implement the core ahc_detach() routine shared by all of
the FreeBSD front-ends.
aic7xxx_freebsd.h:
Softc storage for our event handler.
Null implementation for the ahc_platform_flushwork() OSM
callback. FreeBSD doesn't need this as XPT callbacks are
safe from all contexts and are done directly in ahc_done().
aic7xxx_inline.h:
Implement new lazy interrupt scheme. To avoid an extra
PCI bus read, we first check our completion queues to
see if any work has completed. If work is available, we
assume that this is the source of the interrupt and skip
reading INTSTAT. Any remaining interrupt status will be
cleared by a second call to the interrupt handler should
the interrupt line still be asserted. This drops the
interrupt handler down to a single PCI bus read in the
common case of I/O completion. This is the same overhead
as in the not so distant past, but the extra sanity of
perforning a PCI read after clearing the command complete
interrupt and before running the completion queue to avoid
missing command complete interrupts added a cycle.
aic7xxx.c:
During initialization, be sure to initialize all scratch
ram locations before they are read to avoid parity errors.
In this case, we use a new function, ahc_unbusy_tcl() to
initialize the scratch ram busy target table.
Replace instances of ahc_index_busy_tcl() used to unbusy
a tcl without looking at the old value with ahc_unbusy_tcl().
Modify ahc_sent_msg so that it can find single byte messages.
ahc_sent_msg is now used to determine if a transfer negotiation
attempt resulted in a bus free.
Be more careful in filtering out only the SCSI interrupts
of interest in ahc_handle_scsiint.
Rearrange interrupt clearing code to ensure that at least
one PCI transaction occurrs after hitting CLRSINT1 and
writting to CLRINT. CLRSINT1 writes take a bit to
take effect, and the re-arrangement provides sufficient
delay to ensure the write to CLRINT is effective. The
old code might report a spurious interrupt on some "fast"
chipsets.
export ahc-update_target_msg_request for use by OSM code.
If a target does not respond to our ATN request, clear
it once we move to a non-message phase. This avoids
sending a MSG_NOOP in some later message out phase.
Use max lun and max target constants instead of
hard-coded values.
Use softc storage built into our device_t under FreeBSD.
Fix a bug in ahc_free() that caused us to delete
resources that were not allocated.
Clean up any tstate/lstate info in ahc_free().
Clear the powerdown state in ahc_reset() so that
registers can be accessed.
Add a preliminary function for pausing the chip and
processing any posted work.
Add a preliminary suspend and resume functions.
aic7xxx.h:
Limit the number of supported luns to 64. We don't
support information unit transfers, so this is the
maximum that makes sense for these chips.
Add a new flag AHC_ALL_INTERRUPTS that forces the
processing of all interrupt state in a single invokation
of ahc_intr(). When the flag is not set, we use the
lazy interrupt handling scheme.
Add data structures to store controller state while
we are suspended.
Use constants instead of hard coded values where appropriate.
Correct some harmless "unsigned/signed" conflicts.
aic7xxx.seq:
Only perform the SCSIBUSL fix on ULTRA2 or newer controllers.
Older controllers seem to be confused by this.
In target mode, ignore PHASEMIS during data phases.
This bit seems to be flakey on U160 controllers acting
in target mode.
aic7xxx_pci.c:
Add support for the 29160C CPCI adapter.
Add definitions for subvendor ID information
available for devices with the "9005" vendor id.
We currently use this information to determine
if a multi-function device doesn't have the second
channel hooked up on a board.
Add rudimentary power mode code so we can put the
controller into the D0 state. In the future this
will be an OSM callback so that in FreeBSD we don't
duplicate functionality provided by the PCI code.
The powerstate code was added after I'd completed
my regression tests on this code.
Only capture "left over BIOS state" if the POWRDN
setting is not set in HCNTRL.
In target mode, don't bother sending incremental
CRC data.
2000-12-20 01:11:37 +00:00
|
|
|
int i;
|
|
|
|
|
2002-08-31 06:41:37 +00:00
|
|
|
scbsize = 32;
|
|
|
|
if ((ahc->flags & AHC_LSCBS_ENABLED) != 0)
|
|
|
|
scbsize = 64;
|
|
|
|
|
ahc_eisa.c:
ahc_pci.c:
Add detach support.
Make use of soft allocated on our behalf by newbus.
For PCI devices, disable the mapping type we aren't
using for extra protection from rogue code.
aic7xxx_93cx6.c:
aic7xxx_93cx6.h:
Sync perforce IDs.
aic7xxx_freebsd.c:
Capture the eventhandle returned by EVENTHANDER_REGISTER
so we can kill the handler off during detach.
Use AHC_* constants instead of hard coded numbers in a
few more places.
Test PPR option state when deciding to "really" negotiate
when the CAM_NEGOTIATE flag is passed in a CCB.
Make use of core "ahc_pause_and_flushwork" routine in our
timeout handler rather than re-inventing this code.
Cleanup all of our resources (really!) in ahc_platform_free().
We should be all set to become a module now.
Implement the core ahc_detach() routine shared by all of
the FreeBSD front-ends.
aic7xxx_freebsd.h:
Softc storage for our event handler.
Null implementation for the ahc_platform_flushwork() OSM
callback. FreeBSD doesn't need this as XPT callbacks are
safe from all contexts and are done directly in ahc_done().
aic7xxx_inline.h:
Implement new lazy interrupt scheme. To avoid an extra
PCI bus read, we first check our completion queues to
see if any work has completed. If work is available, we
assume that this is the source of the interrupt and skip
reading INTSTAT. Any remaining interrupt status will be
cleared by a second call to the interrupt handler should
the interrupt line still be asserted. This drops the
interrupt handler down to a single PCI bus read in the
common case of I/O completion. This is the same overhead
as in the not so distant past, but the extra sanity of
perforning a PCI read after clearing the command complete
interrupt and before running the completion queue to avoid
missing command complete interrupts added a cycle.
aic7xxx.c:
During initialization, be sure to initialize all scratch
ram locations before they are read to avoid parity errors.
In this case, we use a new function, ahc_unbusy_tcl() to
initialize the scratch ram busy target table.
Replace instances of ahc_index_busy_tcl() used to unbusy
a tcl without looking at the old value with ahc_unbusy_tcl().
Modify ahc_sent_msg so that it can find single byte messages.
ahc_sent_msg is now used to determine if a transfer negotiation
attempt resulted in a bus free.
Be more careful in filtering out only the SCSI interrupts
of interest in ahc_handle_scsiint.
Rearrange interrupt clearing code to ensure that at least
one PCI transaction occurrs after hitting CLRSINT1 and
writting to CLRINT. CLRSINT1 writes take a bit to
take effect, and the re-arrangement provides sufficient
delay to ensure the write to CLRINT is effective. The
old code might report a spurious interrupt on some "fast"
chipsets.
export ahc-update_target_msg_request for use by OSM code.
If a target does not respond to our ATN request, clear
it once we move to a non-message phase. This avoids
sending a MSG_NOOP in some later message out phase.
Use max lun and max target constants instead of
hard-coded values.
Use softc storage built into our device_t under FreeBSD.
Fix a bug in ahc_free() that caused us to delete
resources that were not allocated.
Clean up any tstate/lstate info in ahc_free().
Clear the powerdown state in ahc_reset() so that
registers can be accessed.
Add a preliminary function for pausing the chip and
processing any posted work.
Add a preliminary suspend and resume functions.
aic7xxx.h:
Limit the number of supported luns to 64. We don't
support information unit transfers, so this is the
maximum that makes sense for these chips.
Add a new flag AHC_ALL_INTERRUPTS that forces the
processing of all interrupt state in a single invokation
of ahc_intr(). When the flag is not set, we use the
lazy interrupt handling scheme.
Add data structures to store controller state while
we are suspended.
Use constants instead of hard coded values where appropriate.
Correct some harmless "unsigned/signed" conflicts.
aic7xxx.seq:
Only perform the SCSIBUSL fix on ULTRA2 or newer controllers.
Older controllers seem to be confused by this.
In target mode, ignore PHASEMIS during data phases.
This bit seems to be flakey on U160 controllers acting
in target mode.
aic7xxx_pci.c:
Add support for the 29160C CPCI adapter.
Add definitions for subvendor ID information
available for devices with the "9005" vendor id.
We currently use this information to determine
if a multi-function device doesn't have the second
channel hooked up on a board.
Add rudimentary power mode code so we can put the
controller into the D0 state. In the future this
will be an OSM callback so that in FreeBSD we don't
duplicate functionality provided by the PCI code.
The powerstate code was added after I'd completed
my regression tests on this code.
Only capture "left over BIOS state" if the POWRDN
setting is not set in HCNTRL.
In target mode, don't bother sending incremental
CRC data.
2000-12-20 01:11:37 +00:00
|
|
|
for (i = 0; i < ahc->scb_data->maxhscbs; i++) {
|
2002-08-31 06:41:37 +00:00
|
|
|
int j;
|
|
|
|
|
ahc_eisa.c:
ahc_pci.c:
Add detach support.
Make use of soft allocated on our behalf by newbus.
For PCI devices, disable the mapping type we aren't
using for extra protection from rogue code.
aic7xxx_93cx6.c:
aic7xxx_93cx6.h:
Sync perforce IDs.
aic7xxx_freebsd.c:
Capture the eventhandle returned by EVENTHANDER_REGISTER
so we can kill the handler off during detach.
Use AHC_* constants instead of hard coded numbers in a
few more places.
Test PPR option state when deciding to "really" negotiate
when the CAM_NEGOTIATE flag is passed in a CCB.
Make use of core "ahc_pause_and_flushwork" routine in our
timeout handler rather than re-inventing this code.
Cleanup all of our resources (really!) in ahc_platform_free().
We should be all set to become a module now.
Implement the core ahc_detach() routine shared by all of
the FreeBSD front-ends.
aic7xxx_freebsd.h:
Softc storage for our event handler.
Null implementation for the ahc_platform_flushwork() OSM
callback. FreeBSD doesn't need this as XPT callbacks are
safe from all contexts and are done directly in ahc_done().
aic7xxx_inline.h:
Implement new lazy interrupt scheme. To avoid an extra
PCI bus read, we first check our completion queues to
see if any work has completed. If work is available, we
assume that this is the source of the interrupt and skip
reading INTSTAT. Any remaining interrupt status will be
cleared by a second call to the interrupt handler should
the interrupt line still be asserted. This drops the
interrupt handler down to a single PCI bus read in the
common case of I/O completion. This is the same overhead
as in the not so distant past, but the extra sanity of
perforning a PCI read after clearing the command complete
interrupt and before running the completion queue to avoid
missing command complete interrupts added a cycle.
aic7xxx.c:
During initialization, be sure to initialize all scratch
ram locations before they are read to avoid parity errors.
In this case, we use a new function, ahc_unbusy_tcl() to
initialize the scratch ram busy target table.
Replace instances of ahc_index_busy_tcl() used to unbusy
a tcl without looking at the old value with ahc_unbusy_tcl().
Modify ahc_sent_msg so that it can find single byte messages.
ahc_sent_msg is now used to determine if a transfer negotiation
attempt resulted in a bus free.
Be more careful in filtering out only the SCSI interrupts
of interest in ahc_handle_scsiint.
Rearrange interrupt clearing code to ensure that at least
one PCI transaction occurrs after hitting CLRSINT1 and
writting to CLRINT. CLRSINT1 writes take a bit to
take effect, and the re-arrangement provides sufficient
delay to ensure the write to CLRINT is effective. The
old code might report a spurious interrupt on some "fast"
chipsets.
export ahc-update_target_msg_request for use by OSM code.
If a target does not respond to our ATN request, clear
it once we move to a non-message phase. This avoids
sending a MSG_NOOP in some later message out phase.
Use max lun and max target constants instead of
hard-coded values.
Use softc storage built into our device_t under FreeBSD.
Fix a bug in ahc_free() that caused us to delete
resources that were not allocated.
Clean up any tstate/lstate info in ahc_free().
Clear the powerdown state in ahc_reset() so that
registers can be accessed.
Add a preliminary function for pausing the chip and
processing any posted work.
Add a preliminary suspend and resume functions.
aic7xxx.h:
Limit the number of supported luns to 64. We don't
support information unit transfers, so this is the
maximum that makes sense for these chips.
Add a new flag AHC_ALL_INTERRUPTS that forces the
processing of all interrupt state in a single invokation
of ahc_intr(). When the flag is not set, we use the
lazy interrupt handling scheme.
Add data structures to store controller state while
we are suspended.
Use constants instead of hard coded values where appropriate.
Correct some harmless "unsigned/signed" conflicts.
aic7xxx.seq:
Only perform the SCSIBUSL fix on ULTRA2 or newer controllers.
Older controllers seem to be confused by this.
In target mode, ignore PHASEMIS during data phases.
This bit seems to be flakey on U160 controllers acting
in target mode.
aic7xxx_pci.c:
Add support for the 29160C CPCI adapter.
Add definitions for subvendor ID information
available for devices with the "9005" vendor id.
We currently use this information to determine
if a multi-function device doesn't have the second
channel hooked up on a board.
Add rudimentary power mode code so we can put the
controller into the D0 state. In the future this
will be an OSM callback so that in FreeBSD we don't
duplicate functionality provided by the PCI code.
The powerstate code was added after I'd completed
my regression tests on this code.
Only capture "left over BIOS state" if the POWRDN
setting is not set in HCNTRL.
In target mode, don't bother sending incremental
CRC data.
2000-12-20 01:11:37 +00:00
|
|
|
ahc_outb(ahc, SCBPTR, i);
|
|
|
|
|
2002-08-31 06:41:37 +00:00
|
|
|
/*
|
|
|
|
* Touch all SCB bytes to avoid parity errors
|
|
|
|
* should one of our debugging routines read
|
|
|
|
* an otherwise uninitiatlized byte.
|
|
|
|
*/
|
|
|
|
for (j = 0; j < scbsize; j++)
|
|
|
|
ahc_outb(ahc, SCB_BASE+j, 0xFF);
|
|
|
|
|
ahc_eisa.c:
ahc_pci.c:
Add detach support.
Make use of soft allocated on our behalf by newbus.
For PCI devices, disable the mapping type we aren't
using for extra protection from rogue code.
aic7xxx_93cx6.c:
aic7xxx_93cx6.h:
Sync perforce IDs.
aic7xxx_freebsd.c:
Capture the eventhandle returned by EVENTHANDER_REGISTER
so we can kill the handler off during detach.
Use AHC_* constants instead of hard coded numbers in a
few more places.
Test PPR option state when deciding to "really" negotiate
when the CAM_NEGOTIATE flag is passed in a CCB.
Make use of core "ahc_pause_and_flushwork" routine in our
timeout handler rather than re-inventing this code.
Cleanup all of our resources (really!) in ahc_platform_free().
We should be all set to become a module now.
Implement the core ahc_detach() routine shared by all of
the FreeBSD front-ends.
aic7xxx_freebsd.h:
Softc storage for our event handler.
Null implementation for the ahc_platform_flushwork() OSM
callback. FreeBSD doesn't need this as XPT callbacks are
safe from all contexts and are done directly in ahc_done().
aic7xxx_inline.h:
Implement new lazy interrupt scheme. To avoid an extra
PCI bus read, we first check our completion queues to
see if any work has completed. If work is available, we
assume that this is the source of the interrupt and skip
reading INTSTAT. Any remaining interrupt status will be
cleared by a second call to the interrupt handler should
the interrupt line still be asserted. This drops the
interrupt handler down to a single PCI bus read in the
common case of I/O completion. This is the same overhead
as in the not so distant past, but the extra sanity of
perforning a PCI read after clearing the command complete
interrupt and before running the completion queue to avoid
missing command complete interrupts added a cycle.
aic7xxx.c:
During initialization, be sure to initialize all scratch
ram locations before they are read to avoid parity errors.
In this case, we use a new function, ahc_unbusy_tcl() to
initialize the scratch ram busy target table.
Replace instances of ahc_index_busy_tcl() used to unbusy
a tcl without looking at the old value with ahc_unbusy_tcl().
Modify ahc_sent_msg so that it can find single byte messages.
ahc_sent_msg is now used to determine if a transfer negotiation
attempt resulted in a bus free.
Be more careful in filtering out only the SCSI interrupts
of interest in ahc_handle_scsiint.
Rearrange interrupt clearing code to ensure that at least
one PCI transaction occurrs after hitting CLRSINT1 and
writting to CLRINT. CLRSINT1 writes take a bit to
take effect, and the re-arrangement provides sufficient
delay to ensure the write to CLRINT is effective. The
old code might report a spurious interrupt on some "fast"
chipsets.
export ahc-update_target_msg_request for use by OSM code.
If a target does not respond to our ATN request, clear
it once we move to a non-message phase. This avoids
sending a MSG_NOOP in some later message out phase.
Use max lun and max target constants instead of
hard-coded values.
Use softc storage built into our device_t under FreeBSD.
Fix a bug in ahc_free() that caused us to delete
resources that were not allocated.
Clean up any tstate/lstate info in ahc_free().
Clear the powerdown state in ahc_reset() so that
registers can be accessed.
Add a preliminary function for pausing the chip and
processing any posted work.
Add a preliminary suspend and resume functions.
aic7xxx.h:
Limit the number of supported luns to 64. We don't
support information unit transfers, so this is the
maximum that makes sense for these chips.
Add a new flag AHC_ALL_INTERRUPTS that forces the
processing of all interrupt state in a single invokation
of ahc_intr(). When the flag is not set, we use the
lazy interrupt handling scheme.
Add data structures to store controller state while
we are suspended.
Use constants instead of hard coded values where appropriate.
Correct some harmless "unsigned/signed" conflicts.
aic7xxx.seq:
Only perform the SCSIBUSL fix on ULTRA2 or newer controllers.
Older controllers seem to be confused by this.
In target mode, ignore PHASEMIS during data phases.
This bit seems to be flakey on U160 controllers acting
in target mode.
aic7xxx_pci.c:
Add support for the 29160C CPCI adapter.
Add definitions for subvendor ID information
available for devices with the "9005" vendor id.
We currently use this information to determine
if a multi-function device doesn't have the second
channel hooked up on a board.
Add rudimentary power mode code so we can put the
controller into the D0 state. In the future this
will be an OSM callback so that in FreeBSD we don't
duplicate functionality provided by the PCI code.
The powerstate code was added after I'd completed
my regression tests on this code.
Only capture "left over BIOS state" if the POWRDN
setting is not set in HCNTRL.
In target mode, don't bother sending incremental
CRC data.
2000-12-20 01:11:37 +00:00
|
|
|
/* Clear the control byte. */
|
|
|
|
ahc_outb(ahc, SCB_CONTROL, 0);
|
|
|
|
|
|
|
|
/* Set the next pointer */
|
|
|
|
if ((ahc->flags & AHC_PAGESCBS) != 0)
|
|
|
|
ahc_outb(ahc, SCB_NEXT, i+1);
|
|
|
|
else
|
|
|
|
ahc_outb(ahc, SCB_NEXT, SCB_LIST_NULL);
|
|
|
|
|
2002-08-31 06:41:37 +00:00
|
|
|
/* Make the tag number, SCSIID, and lun invalid */
|
ahc_eisa.c:
ahc_pci.c:
Add detach support.
Make use of soft allocated on our behalf by newbus.
For PCI devices, disable the mapping type we aren't
using for extra protection from rogue code.
aic7xxx_93cx6.c:
aic7xxx_93cx6.h:
Sync perforce IDs.
aic7xxx_freebsd.c:
Capture the eventhandle returned by EVENTHANDER_REGISTER
so we can kill the handler off during detach.
Use AHC_* constants instead of hard coded numbers in a
few more places.
Test PPR option state when deciding to "really" negotiate
when the CAM_NEGOTIATE flag is passed in a CCB.
Make use of core "ahc_pause_and_flushwork" routine in our
timeout handler rather than re-inventing this code.
Cleanup all of our resources (really!) in ahc_platform_free().
We should be all set to become a module now.
Implement the core ahc_detach() routine shared by all of
the FreeBSD front-ends.
aic7xxx_freebsd.h:
Softc storage for our event handler.
Null implementation for the ahc_platform_flushwork() OSM
callback. FreeBSD doesn't need this as XPT callbacks are
safe from all contexts and are done directly in ahc_done().
aic7xxx_inline.h:
Implement new lazy interrupt scheme. To avoid an extra
PCI bus read, we first check our completion queues to
see if any work has completed. If work is available, we
assume that this is the source of the interrupt and skip
reading INTSTAT. Any remaining interrupt status will be
cleared by a second call to the interrupt handler should
the interrupt line still be asserted. This drops the
interrupt handler down to a single PCI bus read in the
common case of I/O completion. This is the same overhead
as in the not so distant past, but the extra sanity of
perforning a PCI read after clearing the command complete
interrupt and before running the completion queue to avoid
missing command complete interrupts added a cycle.
aic7xxx.c:
During initialization, be sure to initialize all scratch
ram locations before they are read to avoid parity errors.
In this case, we use a new function, ahc_unbusy_tcl() to
initialize the scratch ram busy target table.
Replace instances of ahc_index_busy_tcl() used to unbusy
a tcl without looking at the old value with ahc_unbusy_tcl().
Modify ahc_sent_msg so that it can find single byte messages.
ahc_sent_msg is now used to determine if a transfer negotiation
attempt resulted in a bus free.
Be more careful in filtering out only the SCSI interrupts
of interest in ahc_handle_scsiint.
Rearrange interrupt clearing code to ensure that at least
one PCI transaction occurrs after hitting CLRSINT1 and
writting to CLRINT. CLRSINT1 writes take a bit to
take effect, and the re-arrangement provides sufficient
delay to ensure the write to CLRINT is effective. The
old code might report a spurious interrupt on some "fast"
chipsets.
export ahc-update_target_msg_request for use by OSM code.
If a target does not respond to our ATN request, clear
it once we move to a non-message phase. This avoids
sending a MSG_NOOP in some later message out phase.
Use max lun and max target constants instead of
hard-coded values.
Use softc storage built into our device_t under FreeBSD.
Fix a bug in ahc_free() that caused us to delete
resources that were not allocated.
Clean up any tstate/lstate info in ahc_free().
Clear the powerdown state in ahc_reset() so that
registers can be accessed.
Add a preliminary function for pausing the chip and
processing any posted work.
Add a preliminary suspend and resume functions.
aic7xxx.h:
Limit the number of supported luns to 64. We don't
support information unit transfers, so this is the
maximum that makes sense for these chips.
Add a new flag AHC_ALL_INTERRUPTS that forces the
processing of all interrupt state in a single invokation
of ahc_intr(). When the flag is not set, we use the
lazy interrupt handling scheme.
Add data structures to store controller state while
we are suspended.
Use constants instead of hard coded values where appropriate.
Correct some harmless "unsigned/signed" conflicts.
aic7xxx.seq:
Only perform the SCSIBUSL fix on ULTRA2 or newer controllers.
Older controllers seem to be confused by this.
In target mode, ignore PHASEMIS during data phases.
This bit seems to be flakey on U160 controllers acting
in target mode.
aic7xxx_pci.c:
Add support for the 29160C CPCI adapter.
Add definitions for subvendor ID information
available for devices with the "9005" vendor id.
We currently use this information to determine
if a multi-function device doesn't have the second
channel hooked up on a board.
Add rudimentary power mode code so we can put the
controller into the D0 state. In the future this
will be an OSM callback so that in FreeBSD we don't
duplicate functionality provided by the PCI code.
The powerstate code was added after I'd completed
my regression tests on this code.
Only capture "left over BIOS state" if the POWRDN
setting is not set in HCNTRL.
In target mode, don't bother sending incremental
CRC data.
2000-12-20 01:11:37 +00:00
|
|
|
ahc_outb(ahc, SCB_TAG, SCB_LIST_NULL);
|
2002-08-31 06:41:37 +00:00
|
|
|
ahc_outb(ahc, SCB_SCSIID, 0xFF);
|
|
|
|
ahc_outb(ahc, SCB_LUN, 0xFF);
|
ahc_eisa.c:
ahc_pci.c:
Add detach support.
Make use of soft allocated on our behalf by newbus.
For PCI devices, disable the mapping type we aren't
using for extra protection from rogue code.
aic7xxx_93cx6.c:
aic7xxx_93cx6.h:
Sync perforce IDs.
aic7xxx_freebsd.c:
Capture the eventhandle returned by EVENTHANDER_REGISTER
so we can kill the handler off during detach.
Use AHC_* constants instead of hard coded numbers in a
few more places.
Test PPR option state when deciding to "really" negotiate
when the CAM_NEGOTIATE flag is passed in a CCB.
Make use of core "ahc_pause_and_flushwork" routine in our
timeout handler rather than re-inventing this code.
Cleanup all of our resources (really!) in ahc_platform_free().
We should be all set to become a module now.
Implement the core ahc_detach() routine shared by all of
the FreeBSD front-ends.
aic7xxx_freebsd.h:
Softc storage for our event handler.
Null implementation for the ahc_platform_flushwork() OSM
callback. FreeBSD doesn't need this as XPT callbacks are
safe from all contexts and are done directly in ahc_done().
aic7xxx_inline.h:
Implement new lazy interrupt scheme. To avoid an extra
PCI bus read, we first check our completion queues to
see if any work has completed. If work is available, we
assume that this is the source of the interrupt and skip
reading INTSTAT. Any remaining interrupt status will be
cleared by a second call to the interrupt handler should
the interrupt line still be asserted. This drops the
interrupt handler down to a single PCI bus read in the
common case of I/O completion. This is the same overhead
as in the not so distant past, but the extra sanity of
perforning a PCI read after clearing the command complete
interrupt and before running the completion queue to avoid
missing command complete interrupts added a cycle.
aic7xxx.c:
During initialization, be sure to initialize all scratch
ram locations before they are read to avoid parity errors.
In this case, we use a new function, ahc_unbusy_tcl() to
initialize the scratch ram busy target table.
Replace instances of ahc_index_busy_tcl() used to unbusy
a tcl without looking at the old value with ahc_unbusy_tcl().
Modify ahc_sent_msg so that it can find single byte messages.
ahc_sent_msg is now used to determine if a transfer negotiation
attempt resulted in a bus free.
Be more careful in filtering out only the SCSI interrupts
of interest in ahc_handle_scsiint.
Rearrange interrupt clearing code to ensure that at least
one PCI transaction occurrs after hitting CLRSINT1 and
writting to CLRINT. CLRSINT1 writes take a bit to
take effect, and the re-arrangement provides sufficient
delay to ensure the write to CLRINT is effective. The
old code might report a spurious interrupt on some "fast"
chipsets.
export ahc-update_target_msg_request for use by OSM code.
If a target does not respond to our ATN request, clear
it once we move to a non-message phase. This avoids
sending a MSG_NOOP in some later message out phase.
Use max lun and max target constants instead of
hard-coded values.
Use softc storage built into our device_t under FreeBSD.
Fix a bug in ahc_free() that caused us to delete
resources that were not allocated.
Clean up any tstate/lstate info in ahc_free().
Clear the powerdown state in ahc_reset() so that
registers can be accessed.
Add a preliminary function for pausing the chip and
processing any posted work.
Add a preliminary suspend and resume functions.
aic7xxx.h:
Limit the number of supported luns to 64. We don't
support information unit transfers, so this is the
maximum that makes sense for these chips.
Add a new flag AHC_ALL_INTERRUPTS that forces the
processing of all interrupt state in a single invokation
of ahc_intr(). When the flag is not set, we use the
lazy interrupt handling scheme.
Add data structures to store controller state while
we are suspended.
Use constants instead of hard coded values where appropriate.
Correct some harmless "unsigned/signed" conflicts.
aic7xxx.seq:
Only perform the SCSIBUSL fix on ULTRA2 or newer controllers.
Older controllers seem to be confused by this.
In target mode, ignore PHASEMIS during data phases.
This bit seems to be flakey on U160 controllers acting
in target mode.
aic7xxx_pci.c:
Add support for the 29160C CPCI adapter.
Add definitions for subvendor ID information
available for devices with the "9005" vendor id.
We currently use this information to determine
if a multi-function device doesn't have the second
channel hooked up on a board.
Add rudimentary power mode code so we can put the
controller into the D0 state. In the future this
will be an OSM callback so that in FreeBSD we don't
duplicate functionality provided by the PCI code.
The powerstate code was added after I'd completed
my regression tests on this code.
Only capture "left over BIOS state" if the POWRDN
setting is not set in HCNTRL.
In target mode, don't bother sending incremental
CRC data.
2000-12-20 01:11:37 +00:00
|
|
|
}
|
|
|
|
|
2003-05-03 23:55:38 +00:00
|
|
|
if ((ahc->flags & AHC_PAGESCBS) != 0) {
|
|
|
|
/* SCB 0 heads the free list. */
|
|
|
|
ahc_outb(ahc, FREE_SCBH, 0);
|
|
|
|
} else {
|
|
|
|
/* No free list. */
|
|
|
|
ahc_outb(ahc, FREE_SCBH, SCB_LIST_NULL);
|
|
|
|
}
|
|
|
|
|
ahc_eisa.c:
ahc_pci.c:
Add detach support.
Make use of soft allocated on our behalf by newbus.
For PCI devices, disable the mapping type we aren't
using for extra protection from rogue code.
aic7xxx_93cx6.c:
aic7xxx_93cx6.h:
Sync perforce IDs.
aic7xxx_freebsd.c:
Capture the eventhandle returned by EVENTHANDER_REGISTER
so we can kill the handler off during detach.
Use AHC_* constants instead of hard coded numbers in a
few more places.
Test PPR option state when deciding to "really" negotiate
when the CAM_NEGOTIATE flag is passed in a CCB.
Make use of core "ahc_pause_and_flushwork" routine in our
timeout handler rather than re-inventing this code.
Cleanup all of our resources (really!) in ahc_platform_free().
We should be all set to become a module now.
Implement the core ahc_detach() routine shared by all of
the FreeBSD front-ends.
aic7xxx_freebsd.h:
Softc storage for our event handler.
Null implementation for the ahc_platform_flushwork() OSM
callback. FreeBSD doesn't need this as XPT callbacks are
safe from all contexts and are done directly in ahc_done().
aic7xxx_inline.h:
Implement new lazy interrupt scheme. To avoid an extra
PCI bus read, we first check our completion queues to
see if any work has completed. If work is available, we
assume that this is the source of the interrupt and skip
reading INTSTAT. Any remaining interrupt status will be
cleared by a second call to the interrupt handler should
the interrupt line still be asserted. This drops the
interrupt handler down to a single PCI bus read in the
common case of I/O completion. This is the same overhead
as in the not so distant past, but the extra sanity of
perforning a PCI read after clearing the command complete
interrupt and before running the completion queue to avoid
missing command complete interrupts added a cycle.
aic7xxx.c:
During initialization, be sure to initialize all scratch
ram locations before they are read to avoid parity errors.
In this case, we use a new function, ahc_unbusy_tcl() to
initialize the scratch ram busy target table.
Replace instances of ahc_index_busy_tcl() used to unbusy
a tcl without looking at the old value with ahc_unbusy_tcl().
Modify ahc_sent_msg so that it can find single byte messages.
ahc_sent_msg is now used to determine if a transfer negotiation
attempt resulted in a bus free.
Be more careful in filtering out only the SCSI interrupts
of interest in ahc_handle_scsiint.
Rearrange interrupt clearing code to ensure that at least
one PCI transaction occurrs after hitting CLRSINT1 and
writting to CLRINT. CLRSINT1 writes take a bit to
take effect, and the re-arrangement provides sufficient
delay to ensure the write to CLRINT is effective. The
old code might report a spurious interrupt on some "fast"
chipsets.
export ahc-update_target_msg_request for use by OSM code.
If a target does not respond to our ATN request, clear
it once we move to a non-message phase. This avoids
sending a MSG_NOOP in some later message out phase.
Use max lun and max target constants instead of
hard-coded values.
Use softc storage built into our device_t under FreeBSD.
Fix a bug in ahc_free() that caused us to delete
resources that were not allocated.
Clean up any tstate/lstate info in ahc_free().
Clear the powerdown state in ahc_reset() so that
registers can be accessed.
Add a preliminary function for pausing the chip and
processing any posted work.
Add a preliminary suspend and resume functions.
aic7xxx.h:
Limit the number of supported luns to 64. We don't
support information unit transfers, so this is the
maximum that makes sense for these chips.
Add a new flag AHC_ALL_INTERRUPTS that forces the
processing of all interrupt state in a single invokation
of ahc_intr(). When the flag is not set, we use the
lazy interrupt handling scheme.
Add data structures to store controller state while
we are suspended.
Use constants instead of hard coded values where appropriate.
Correct some harmless "unsigned/signed" conflicts.
aic7xxx.seq:
Only perform the SCSIBUSL fix on ULTRA2 or newer controllers.
Older controllers seem to be confused by this.
In target mode, ignore PHASEMIS during data phases.
This bit seems to be flakey on U160 controllers acting
in target mode.
aic7xxx_pci.c:
Add support for the 29160C CPCI adapter.
Add definitions for subvendor ID information
available for devices with the "9005" vendor id.
We currently use this information to determine
if a multi-function device doesn't have the second
channel hooked up on a board.
Add rudimentary power mode code so we can put the
controller into the D0 state. In the future this
will be an OSM callback so that in FreeBSD we don't
duplicate functionality provided by the PCI code.
The powerstate code was added after I'd completed
my regression tests on this code.
Only capture "left over BIOS state" if the POWRDN
setting is not set in HCNTRL.
In target mode, don't bother sending incremental
CRC data.
2000-12-20 01:11:37 +00:00
|
|
|
/* Make sure that the last SCB terminates the free list */
|
|
|
|
ahc_outb(ahc, SCBPTR, i-1);
|
|
|
|
ahc_outb(ahc, SCB_NEXT, SCB_LIST_NULL);
|
|
|
|
}
|
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
static int
|
|
|
|
ahc_init_scbdata(struct ahc_softc *ahc)
|
|
|
|
{
|
|
|
|
struct scb_data *scb_data;
|
1999-08-16 22:49:29 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
scb_data = ahc->scb_data;
|
|
|
|
SLIST_INIT(&scb_data->free_scbs);
|
|
|
|
SLIST_INIT(&scb_data->sg_maps);
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/* Allocate SCB resources */
|
|
|
|
scb_data->scbarray =
|
2002-04-24 16:58:51 +00:00
|
|
|
(struct scb *)malloc(sizeof(struct scb) * AHC_SCB_MAX_ALLOC,
|
2000-09-16 20:02:28 +00:00
|
|
|
M_DEVBUF, M_NOWAIT);
|
|
|
|
if (scb_data->scbarray == NULL)
|
|
|
|
return (ENOMEM);
|
2002-04-24 16:58:51 +00:00
|
|
|
memset(scb_data->scbarray, 0, sizeof(struct scb) * AHC_SCB_MAX_ALLOC);
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/* Determine the number of hardware SCBs and initialize them */
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
scb_data->maxhscbs = ahc_probe_scbs(ahc);
|
ahc_eisa.c:
ahc_pci.c:
Add detach support.
Make use of soft allocated on our behalf by newbus.
For PCI devices, disable the mapping type we aren't
using for extra protection from rogue code.
aic7xxx_93cx6.c:
aic7xxx_93cx6.h:
Sync perforce IDs.
aic7xxx_freebsd.c:
Capture the eventhandle returned by EVENTHANDER_REGISTER
so we can kill the handler off during detach.
Use AHC_* constants instead of hard coded numbers in a
few more places.
Test PPR option state when deciding to "really" negotiate
when the CAM_NEGOTIATE flag is passed in a CCB.
Make use of core "ahc_pause_and_flushwork" routine in our
timeout handler rather than re-inventing this code.
Cleanup all of our resources (really!) in ahc_platform_free().
We should be all set to become a module now.
Implement the core ahc_detach() routine shared by all of
the FreeBSD front-ends.
aic7xxx_freebsd.h:
Softc storage for our event handler.
Null implementation for the ahc_platform_flushwork() OSM
callback. FreeBSD doesn't need this as XPT callbacks are
safe from all contexts and are done directly in ahc_done().
aic7xxx_inline.h:
Implement new lazy interrupt scheme. To avoid an extra
PCI bus read, we first check our completion queues to
see if any work has completed. If work is available, we
assume that this is the source of the interrupt and skip
reading INTSTAT. Any remaining interrupt status will be
cleared by a second call to the interrupt handler should
the interrupt line still be asserted. This drops the
interrupt handler down to a single PCI bus read in the
common case of I/O completion. This is the same overhead
as in the not so distant past, but the extra sanity of
perforning a PCI read after clearing the command complete
interrupt and before running the completion queue to avoid
missing command complete interrupts added a cycle.
aic7xxx.c:
During initialization, be sure to initialize all scratch
ram locations before they are read to avoid parity errors.
In this case, we use a new function, ahc_unbusy_tcl() to
initialize the scratch ram busy target table.
Replace instances of ahc_index_busy_tcl() used to unbusy
a tcl without looking at the old value with ahc_unbusy_tcl().
Modify ahc_sent_msg so that it can find single byte messages.
ahc_sent_msg is now used to determine if a transfer negotiation
attempt resulted in a bus free.
Be more careful in filtering out only the SCSI interrupts
of interest in ahc_handle_scsiint.
Rearrange interrupt clearing code to ensure that at least
one PCI transaction occurrs after hitting CLRSINT1 and
writting to CLRINT. CLRSINT1 writes take a bit to
take effect, and the re-arrangement provides sufficient
delay to ensure the write to CLRINT is effective. The
old code might report a spurious interrupt on some "fast"
chipsets.
export ahc-update_target_msg_request for use by OSM code.
If a target does not respond to our ATN request, clear
it once we move to a non-message phase. This avoids
sending a MSG_NOOP in some later message out phase.
Use max lun and max target constants instead of
hard-coded values.
Use softc storage built into our device_t under FreeBSD.
Fix a bug in ahc_free() that caused us to delete
resources that were not allocated.
Clean up any tstate/lstate info in ahc_free().
Clear the powerdown state in ahc_reset() so that
registers can be accessed.
Add a preliminary function for pausing the chip and
processing any posted work.
Add a preliminary suspend and resume functions.
aic7xxx.h:
Limit the number of supported luns to 64. We don't
support information unit transfers, so this is the
maximum that makes sense for these chips.
Add a new flag AHC_ALL_INTERRUPTS that forces the
processing of all interrupt state in a single invokation
of ahc_intr(). When the flag is not set, we use the
lazy interrupt handling scheme.
Add data structures to store controller state while
we are suspended.
Use constants instead of hard coded values where appropriate.
Correct some harmless "unsigned/signed" conflicts.
aic7xxx.seq:
Only perform the SCSIBUSL fix on ULTRA2 or newer controllers.
Older controllers seem to be confused by this.
In target mode, ignore PHASEMIS during data phases.
This bit seems to be flakey on U160 controllers acting
in target mode.
aic7xxx_pci.c:
Add support for the 29160C CPCI adapter.
Add definitions for subvendor ID information
available for devices with the "9005" vendor id.
We currently use this information to determine
if a multi-function device doesn't have the second
channel hooked up on a board.
Add rudimentary power mode code so we can put the
controller into the D0 state. In the future this
will be an OSM callback so that in FreeBSD we don't
duplicate functionality provided by the PCI code.
The powerstate code was added after I'd completed
my regression tests on this code.
Only capture "left over BIOS state" if the POWRDN
setting is not set in HCNTRL.
In target mode, don't bother sending incremental
CRC data.
2000-12-20 01:11:37 +00:00
|
|
|
if (ahc->scb_data->maxhscbs == 0) {
|
|
|
|
printf("%s: No SCB space found\n", ahc_name(ahc));
|
|
|
|
return (ENXIO);
|
1998-09-15 07:24:17 +00:00
|
|
|
}
|
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/*
|
|
|
|
* Create our DMA tags. These tags define the kinds of device
|
|
|
|
* accessible memory allocations and memory mappings we will
|
|
|
|
* need to perform during normal operation.
|
|
|
|
*
|
|
|
|
* Unless we need to further restrict the allocation, we rely
|
|
|
|
* on the restrictions of the parent dmat, hence the common
|
|
|
|
* use of MAXADDR and MAXSIZE.
|
|
|
|
*/
|
|
|
|
|
|
|
|
/* DMA tag for our hardware scb structures */
|
|
|
|
if (ahc_dma_tag_create(ahc, ahc->parent_dmat, /*alignment*/1,
|
2001-07-18 21:39:48 +00:00
|
|
|
/*boundary*/BUS_SPACE_MAXADDR_32BIT + 1,
|
|
|
|
/*lowaddr*/BUS_SPACE_MAXADDR_32BIT,
|
2000-09-16 20:02:28 +00:00
|
|
|
/*highaddr*/BUS_SPACE_MAXADDR,
|
|
|
|
/*filter*/NULL, /*filterarg*/NULL,
|
2002-04-24 16:58:51 +00:00
|
|
|
AHC_SCB_MAX_ALLOC * sizeof(struct hardware_scb),
|
2000-09-16 20:02:28 +00:00
|
|
|
/*nsegments*/1,
|
|
|
|
/*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT,
|
|
|
|
/*flags*/0, &scb_data->hscb_dmat) != 0) {
|
|
|
|
goto error_exit;
|
2000-02-09 21:25:00 +00:00
|
|
|
}
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
scb_data->init_level++;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2001-07-18 21:39:48 +00:00
|
|
|
/* Allocation for our hscbs */
|
2000-09-16 20:02:28 +00:00
|
|
|
if (ahc_dmamem_alloc(ahc, scb_data->hscb_dmat,
|
|
|
|
(void **)&scb_data->hscbs,
|
|
|
|
BUS_DMA_NOWAIT, &scb_data->hscb_dmamap) != 0) {
|
|
|
|
goto error_exit;
|
|
|
|
}
|
2000-01-07 23:08:20 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
scb_data->init_level++;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/* And permanently map them */
|
|
|
|
ahc_dmamap_load(ahc, scb_data->hscb_dmat, scb_data->hscb_dmamap,
|
|
|
|
scb_data->hscbs,
|
2002-04-24 16:58:51 +00:00
|
|
|
AHC_SCB_MAX_ALLOC * sizeof(struct hardware_scb),
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_dmamap_cb, &scb_data->hscb_busaddr, /*flags*/0);
|
1999-02-11 07:07:27 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
scb_data->init_level++;
|
2000-07-18 20:12:14 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/* DMA tag for our sense buffers */
|
|
|
|
if (ahc_dma_tag_create(ahc, ahc->parent_dmat, /*alignment*/1,
|
2001-07-18 21:39:48 +00:00
|
|
|
/*boundary*/BUS_SPACE_MAXADDR_32BIT + 1,
|
|
|
|
/*lowaddr*/BUS_SPACE_MAXADDR_32BIT,
|
2000-09-16 20:02:28 +00:00
|
|
|
/*highaddr*/BUS_SPACE_MAXADDR,
|
|
|
|
/*filter*/NULL, /*filterarg*/NULL,
|
2002-04-24 16:58:51 +00:00
|
|
|
AHC_SCB_MAX_ALLOC * sizeof(struct scsi_sense_data),
|
2000-09-16 20:02:28 +00:00
|
|
|
/*nsegments*/1,
|
|
|
|
/*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT,
|
|
|
|
/*flags*/0, &scb_data->sense_dmat) != 0) {
|
|
|
|
goto error_exit;
|
|
|
|
}
|
2000-02-09 21:25:00 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
scb_data->init_level++;
|
2000-07-18 20:12:14 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/* Allocate them */
|
|
|
|
if (ahc_dmamem_alloc(ahc, scb_data->sense_dmat,
|
|
|
|
(void **)&scb_data->sense,
|
|
|
|
BUS_DMA_NOWAIT, &scb_data->sense_dmamap) != 0) {
|
|
|
|
goto error_exit;
|
1998-09-15 07:24:17 +00:00
|
|
|
}
|
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
scb_data->init_level++;
|
|
|
|
|
|
|
|
/* And permanently map them */
|
|
|
|
ahc_dmamap_load(ahc, scb_data->sense_dmat, scb_data->sense_dmamap,
|
|
|
|
scb_data->sense,
|
2002-04-24 16:58:51 +00:00
|
|
|
AHC_SCB_MAX_ALLOC * sizeof(struct scsi_sense_data),
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_dmamap_cb, &scb_data->sense_busaddr, /*flags*/0);
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
scb_data->init_level++;
|
|
|
|
|
|
|
|
/* DMA tag for our S/G structures. We allocate in page sized chunks */
|
2002-08-31 06:41:37 +00:00
|
|
|
if (ahc_dma_tag_create(ahc, ahc->parent_dmat, /*alignment*/8,
|
2001-07-18 21:39:48 +00:00
|
|
|
/*boundary*/BUS_SPACE_MAXADDR_32BIT + 1,
|
|
|
|
/*lowaddr*/BUS_SPACE_MAXADDR_32BIT,
|
2000-09-16 20:02:28 +00:00
|
|
|
/*highaddr*/BUS_SPACE_MAXADDR,
|
|
|
|
/*filter*/NULL, /*filterarg*/NULL,
|
|
|
|
PAGE_SIZE, /*nsegments*/1,
|
|
|
|
/*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT,
|
|
|
|
/*flags*/0, &scb_data->sg_dmat) != 0) {
|
|
|
|
goto error_exit;
|
1998-09-15 07:24:17 +00:00
|
|
|
}
|
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
scb_data->init_level++;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/* Perform initial CCB allocation */
|
2002-04-24 16:58:51 +00:00
|
|
|
memset(scb_data->hscbs, 0,
|
|
|
|
AHC_SCB_MAX_ALLOC * sizeof(struct hardware_scb));
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_alloc_scbs(ahc);
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
if (scb_data->numscbs == 0) {
|
|
|
|
printf("%s: ahc_init_scbdata - "
|
|
|
|
"Unable to allocate initial scbs\n",
|
|
|
|
ahc_name(ahc));
|
|
|
|
goto error_exit;
|
2000-03-18 22:28:20 +00:00
|
|
|
}
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-10-05 04:24:14 +00:00
|
|
|
/*
|
2003-05-03 23:55:38 +00:00
|
|
|
* Reserve the next queued SCB.
|
2000-10-05 04:24:14 +00:00
|
|
|
*/
|
|
|
|
ahc->next_queued_scb = ahc_get_scb(ahc);
|
|
|
|
|
2000-07-18 20:12:14 +00:00
|
|
|
/*
|
2000-09-16 20:02:28 +00:00
|
|
|
* Note that we were successfull
|
2000-07-18 20:12:14 +00:00
|
|
|
*/
|
2000-09-16 20:02:28 +00:00
|
|
|
return (0);
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
error_exit:
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
return (ENOMEM);
|
1998-09-15 07:24:17 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_fini_scbdata(struct ahc_softc *ahc)
|
1998-09-15 07:24:17 +00:00
|
|
|
{
|
2000-09-16 20:02:28 +00:00
|
|
|
struct scb_data *scb_data;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
scb_data = ahc->scb_data;
|
2000-11-13 03:35:43 +00:00
|
|
|
if (scb_data == NULL)
|
|
|
|
return;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
switch (scb_data->init_level) {
|
|
|
|
default:
|
|
|
|
case 7:
|
|
|
|
{
|
|
|
|
struct sg_map_node *sg_map;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
while ((sg_map = SLIST_FIRST(&scb_data->sg_maps))!= NULL) {
|
|
|
|
SLIST_REMOVE_HEAD(&scb_data->sg_maps, links);
|
|
|
|
ahc_dmamap_unload(ahc, scb_data->sg_dmat,
|
|
|
|
sg_map->sg_dmamap);
|
|
|
|
ahc_dmamem_free(ahc, scb_data->sg_dmat,
|
|
|
|
sg_map->sg_vaddr,
|
|
|
|
sg_map->sg_dmamap);
|
|
|
|
free(sg_map, M_DEVBUF);
|
1998-09-15 07:24:17 +00:00
|
|
|
}
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_dma_tag_destroy(ahc, scb_data->sg_dmat);
|
1998-09-15 07:24:17 +00:00
|
|
|
}
|
2000-09-16 20:02:28 +00:00
|
|
|
case 6:
|
|
|
|
ahc_dmamap_unload(ahc, scb_data->sense_dmat,
|
|
|
|
scb_data->sense_dmamap);
|
|
|
|
case 5:
|
|
|
|
ahc_dmamem_free(ahc, scb_data->sense_dmat, scb_data->sense,
|
|
|
|
scb_data->sense_dmamap);
|
|
|
|
ahc_dmamap_destroy(ahc, scb_data->sense_dmat,
|
|
|
|
scb_data->sense_dmamap);
|
|
|
|
case 4:
|
|
|
|
ahc_dma_tag_destroy(ahc, scb_data->sense_dmat);
|
|
|
|
case 3:
|
|
|
|
ahc_dmamap_unload(ahc, scb_data->hscb_dmat,
|
|
|
|
scb_data->hscb_dmamap);
|
|
|
|
case 2:
|
|
|
|
ahc_dmamem_free(ahc, scb_data->hscb_dmat, scb_data->hscbs,
|
|
|
|
scb_data->hscb_dmamap);
|
|
|
|
ahc_dmamap_destroy(ahc, scb_data->hscb_dmat,
|
|
|
|
scb_data->hscb_dmamap);
|
|
|
|
case 1:
|
|
|
|
ahc_dma_tag_destroy(ahc, scb_data->hscb_dmat);
|
|
|
|
break;
|
ahc_eisa.c:
ahc_pci.c:
Add detach support.
Make use of soft allocated on our behalf by newbus.
For PCI devices, disable the mapping type we aren't
using for extra protection from rogue code.
aic7xxx_93cx6.c:
aic7xxx_93cx6.h:
Sync perforce IDs.
aic7xxx_freebsd.c:
Capture the eventhandle returned by EVENTHANDER_REGISTER
so we can kill the handler off during detach.
Use AHC_* constants instead of hard coded numbers in a
few more places.
Test PPR option state when deciding to "really" negotiate
when the CAM_NEGOTIATE flag is passed in a CCB.
Make use of core "ahc_pause_and_flushwork" routine in our
timeout handler rather than re-inventing this code.
Cleanup all of our resources (really!) in ahc_platform_free().
We should be all set to become a module now.
Implement the core ahc_detach() routine shared by all of
the FreeBSD front-ends.
aic7xxx_freebsd.h:
Softc storage for our event handler.
Null implementation for the ahc_platform_flushwork() OSM
callback. FreeBSD doesn't need this as XPT callbacks are
safe from all contexts and are done directly in ahc_done().
aic7xxx_inline.h:
Implement new lazy interrupt scheme. To avoid an extra
PCI bus read, we first check our completion queues to
see if any work has completed. If work is available, we
assume that this is the source of the interrupt and skip
reading INTSTAT. Any remaining interrupt status will be
cleared by a second call to the interrupt handler should
the interrupt line still be asserted. This drops the
interrupt handler down to a single PCI bus read in the
common case of I/O completion. This is the same overhead
as in the not so distant past, but the extra sanity of
perforning a PCI read after clearing the command complete
interrupt and before running the completion queue to avoid
missing command complete interrupts added a cycle.
aic7xxx.c:
During initialization, be sure to initialize all scratch
ram locations before they are read to avoid parity errors.
In this case, we use a new function, ahc_unbusy_tcl() to
initialize the scratch ram busy target table.
Replace instances of ahc_index_busy_tcl() used to unbusy
a tcl without looking at the old value with ahc_unbusy_tcl().
Modify ahc_sent_msg so that it can find single byte messages.
ahc_sent_msg is now used to determine if a transfer negotiation
attempt resulted in a bus free.
Be more careful in filtering out only the SCSI interrupts
of interest in ahc_handle_scsiint.
Rearrange interrupt clearing code to ensure that at least
one PCI transaction occurrs after hitting CLRSINT1 and
writting to CLRINT. CLRSINT1 writes take a bit to
take effect, and the re-arrangement provides sufficient
delay to ensure the write to CLRINT is effective. The
old code might report a spurious interrupt on some "fast"
chipsets.
export ahc-update_target_msg_request for use by OSM code.
If a target does not respond to our ATN request, clear
it once we move to a non-message phase. This avoids
sending a MSG_NOOP in some later message out phase.
Use max lun and max target constants instead of
hard-coded values.
Use softc storage built into our device_t under FreeBSD.
Fix a bug in ahc_free() that caused us to delete
resources that were not allocated.
Clean up any tstate/lstate info in ahc_free().
Clear the powerdown state in ahc_reset() so that
registers can be accessed.
Add a preliminary function for pausing the chip and
processing any posted work.
Add a preliminary suspend and resume functions.
aic7xxx.h:
Limit the number of supported luns to 64. We don't
support information unit transfers, so this is the
maximum that makes sense for these chips.
Add a new flag AHC_ALL_INTERRUPTS that forces the
processing of all interrupt state in a single invokation
of ahc_intr(). When the flag is not set, we use the
lazy interrupt handling scheme.
Add data structures to store controller state while
we are suspended.
Use constants instead of hard coded values where appropriate.
Correct some harmless "unsigned/signed" conflicts.
aic7xxx.seq:
Only perform the SCSIBUSL fix on ULTRA2 or newer controllers.
Older controllers seem to be confused by this.
In target mode, ignore PHASEMIS during data phases.
This bit seems to be flakey on U160 controllers acting
in target mode.
aic7xxx_pci.c:
Add support for the 29160C CPCI adapter.
Add definitions for subvendor ID information
available for devices with the "9005" vendor id.
We currently use this information to determine
if a multi-function device doesn't have the second
channel hooked up on a board.
Add rudimentary power mode code so we can put the
controller into the D0 state. In the future this
will be an OSM callback so that in FreeBSD we don't
duplicate functionality provided by the PCI code.
The powerstate code was added after I'd completed
my regression tests on this code.
Only capture "left over BIOS state" if the POWRDN
setting is not set in HCNTRL.
In target mode, don't bother sending incremental
CRC data.
2000-12-20 01:11:37 +00:00
|
|
|
case 0:
|
|
|
|
break;
|
2000-09-16 20:02:28 +00:00
|
|
|
}
|
|
|
|
if (scb_data->scbarray != NULL)
|
|
|
|
free(scb_data->scbarray, M_DEVBUF);
|
1998-09-15 07:24:17 +00:00
|
|
|
}
|
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
void
|
|
|
|
ahc_alloc_scbs(struct ahc_softc *ahc)
|
1999-04-23 23:27:31 +00:00
|
|
|
{
|
|
|
|
struct scb_data *scb_data;
|
|
|
|
struct scb *next_scb;
|
|
|
|
struct sg_map_node *sg_map;
|
|
|
|
bus_addr_t physaddr;
|
|
|
|
struct ahc_dma_seg *segs;
|
|
|
|
int newcount;
|
|
|
|
int i;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
1999-04-23 23:27:31 +00:00
|
|
|
scb_data = ahc->scb_data;
|
2002-04-24 16:58:51 +00:00
|
|
|
if (scb_data->numscbs >= AHC_SCB_MAX_ALLOC)
|
1999-04-23 23:27:31 +00:00
|
|
|
/* Can't allocate any more */
|
|
|
|
return;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
1999-04-23 23:27:31 +00:00
|
|
|
next_scb = &scb_data->scbarray[scb_data->numscbs];
|
1998-09-15 07:24:17 +00:00
|
|
|
|
1999-04-23 23:27:31 +00:00
|
|
|
sg_map = malloc(sizeof(*sg_map), M_DEVBUF, M_NOWAIT);
|
1998-09-15 07:24:17 +00:00
|
|
|
|
1999-04-23 23:27:31 +00:00
|
|
|
if (sg_map == NULL)
|
|
|
|
return;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
1999-04-23 23:27:31 +00:00
|
|
|
/* Allocate S/G space for the next batch of SCBS */
|
2000-09-16 20:02:28 +00:00
|
|
|
if (ahc_dmamem_alloc(ahc, scb_data->sg_dmat,
|
|
|
|
(void **)&sg_map->sg_vaddr,
|
1999-04-23 23:27:31 +00:00
|
|
|
BUS_DMA_NOWAIT, &sg_map->sg_dmamap) != 0) {
|
|
|
|
free(sg_map, M_DEVBUF);
|
|
|
|
return;
|
1998-09-15 07:24:17 +00:00
|
|
|
}
|
|
|
|
|
1999-04-23 23:27:31 +00:00
|
|
|
SLIST_INSERT_HEAD(&scb_data->sg_maps, sg_map, links);
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_dmamap_load(ahc, scb_data->sg_dmat, sg_map->sg_dmamap,
|
|
|
|
sg_map->sg_vaddr, PAGE_SIZE, ahc_dmamap_cb,
|
|
|
|
&sg_map->sg_physaddr, /*flags*/0);
|
1998-09-15 07:24:17 +00:00
|
|
|
|
1999-04-23 23:27:31 +00:00
|
|
|
segs = sg_map->sg_vaddr;
|
|
|
|
physaddr = sg_map->sg_physaddr;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
1999-04-23 23:27:31 +00:00
|
|
|
newcount = (PAGE_SIZE / (AHC_NSEG * sizeof(struct ahc_dma_seg)));
|
2002-04-24 16:58:51 +00:00
|
|
|
newcount = MIN(newcount, (AHC_SCB_MAX_ALLOC - scb_data->numscbs));
|
|
|
|
for (i = 0; i < newcount; i++) {
|
2000-09-16 20:02:28 +00:00
|
|
|
struct scb_platform_data *pdata;
|
|
|
|
#ifndef __linux__
|
1999-04-23 23:27:31 +00:00
|
|
|
int error;
|
2000-09-16 20:02:28 +00:00
|
|
|
#endif
|
|
|
|
pdata = (struct scb_platform_data *)malloc(sizeof(*pdata),
|
|
|
|
M_DEVBUF, M_NOWAIT);
|
|
|
|
if (pdata == NULL)
|
|
|
|
break;
|
|
|
|
next_scb->platform_data = pdata;
|
2001-07-18 21:39:48 +00:00
|
|
|
next_scb->sg_map = sg_map;
|
1999-04-23 23:27:31 +00:00
|
|
|
next_scb->sg_list = segs;
|
2000-01-07 23:08:20 +00:00
|
|
|
/*
|
|
|
|
* The sequencer always starts with the second entry.
|
|
|
|
* The first entry is embedded in the scb.
|
|
|
|
*/
|
|
|
|
next_scb->sg_list_phys = physaddr + sizeof(struct ahc_dma_seg);
|
2000-10-11 23:46:34 +00:00
|
|
|
next_scb->ahc_softc = ahc;
|
1999-04-23 23:27:31 +00:00
|
|
|
next_scb->flags = SCB_FREE;
|
2000-09-16 20:02:28 +00:00
|
|
|
#ifndef __linux__
|
|
|
|
error = ahc_dmamap_create(ahc, ahc->buffer_dmat, /*flags*/0,
|
1999-04-23 23:27:31 +00:00
|
|
|
&next_scb->dmamap);
|
1998-09-15 07:24:17 +00:00
|
|
|
if (error != 0)
|
1999-04-23 23:27:31 +00:00
|
|
|
break;
|
2000-09-16 20:02:28 +00:00
|
|
|
#endif
|
1999-04-23 23:27:31 +00:00
|
|
|
next_scb->hscb = &scb_data->hscbs[scb_data->numscbs];
|
|
|
|
next_scb->hscb->tag = ahc->scb_data->numscbs;
|
2000-07-18 20:12:14 +00:00
|
|
|
SLIST_INSERT_HEAD(&ahc->scb_data->free_scbs,
|
|
|
|
next_scb, links.sle);
|
1999-04-23 23:27:31 +00:00
|
|
|
segs += AHC_NSEG;
|
|
|
|
physaddr += (AHC_NSEG * sizeof(struct ahc_dma_seg));
|
|
|
|
next_scb++;
|
|
|
|
ahc->scb_data->numscbs++;
|
1998-09-15 07:24:17 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
void
|
|
|
|
ahc_controller_info(struct ahc_softc *ahc, char *buf)
|
1999-12-06 18:23:31 +00:00
|
|
|
{
|
2000-09-16 20:02:28 +00:00
|
|
|
int len;
|
|
|
|
|
|
|
|
len = sprintf(buf, "%s: ", ahc_chip_names[ahc->chip & AHC_CHIPID_MASK]);
|
|
|
|
buf += len;
|
|
|
|
if ((ahc->features & AHC_TWIN) != 0)
|
|
|
|
len = sprintf(buf, "Twin Channel, A SCSI Id=%d, "
|
|
|
|
"B SCSI Id=%d, primary %c, ",
|
|
|
|
ahc->our_id, ahc->our_id_b,
|
This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
|
|
|
(ahc->flags & AHC_PRIMARY_CHANNEL) + 'A');
|
2000-09-16 20:02:28 +00:00
|
|
|
else {
|
2001-05-15 19:41:12 +00:00
|
|
|
const char *speed;
|
2000-09-16 20:02:28 +00:00
|
|
|
const char *type;
|
1999-12-06 18:23:31 +00:00
|
|
|
|
2001-05-15 19:41:12 +00:00
|
|
|
speed = "";
|
|
|
|
if ((ahc->features & AHC_ULTRA) != 0) {
|
|
|
|
speed = "Ultra ";
|
|
|
|
} else if ((ahc->features & AHC_DT) != 0) {
|
|
|
|
speed = "Ultra160 ";
|
|
|
|
} else if ((ahc->features & AHC_ULTRA2) != 0) {
|
|
|
|
speed = "Ultra2 ";
|
|
|
|
}
|
2000-09-16 20:02:28 +00:00
|
|
|
if ((ahc->features & AHC_WIDE) != 0) {
|
|
|
|
type = "Wide";
|
|
|
|
} else {
|
|
|
|
type = "Single";
|
|
|
|
}
|
2001-05-15 19:41:12 +00:00
|
|
|
len = sprintf(buf, "%s%s Channel %c, SCSI Id=%d, ",
|
|
|
|
speed, type, ahc->channel, ahc->our_id);
|
2000-09-16 20:02:28 +00:00
|
|
|
}
|
|
|
|
buf += len;
|
|
|
|
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
if ((ahc->flags & AHC_PAGESCBS) != 0)
|
2000-09-22 22:18:05 +00:00
|
|
|
sprintf(buf, "%d/%d SCBs",
|
2002-04-24 16:58:51 +00:00
|
|
|
ahc->scb_data->maxhscbs, AHC_MAX_QUEUE);
|
1999-12-06 18:23:31 +00:00
|
|
|
else
|
2000-09-22 22:18:05 +00:00
|
|
|
sprintf(buf, "%d SCBs", ahc->scb_data->maxhscbs);
|
2000-09-16 20:02:28 +00:00
|
|
|
}
|
1999-12-06 18:23:31 +00:00
|
|
|
|
2003-05-03 23:55:38 +00:00
|
|
|
int
|
|
|
|
ahc_chip_init(struct ahc_softc *ahc)
|
|
|
|
{
|
|
|
|
int term;
|
|
|
|
int error;
|
|
|
|
u_int i;
|
|
|
|
u_int scsi_conf;
|
|
|
|
u_int scsiseq_template;
|
|
|
|
uint32_t physaddr;
|
|
|
|
|
|
|
|
ahc_outb(ahc, SEQ_FLAGS, 0);
|
|
|
|
ahc_outb(ahc, SEQ_FLAGS2, 0);
|
|
|
|
|
|
|
|
/* Set the SCSI Id, SXFRCTL0, SXFRCTL1, and SIMODE1, for both channels*/
|
|
|
|
if (ahc->features & AHC_TWIN) {
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Setup Channel B first.
|
|
|
|
*/
|
|
|
|
ahc_outb(ahc, SBLKCTL, ahc_inb(ahc, SBLKCTL) | SELBUSB);
|
|
|
|
term = (ahc->flags & AHC_TERM_ENB_B) != 0 ? STPWEN : 0;
|
|
|
|
ahc_outb(ahc, SCSIID, ahc->our_id_b);
|
|
|
|
scsi_conf = ahc_inb(ahc, SCSICONF + 1);
|
|
|
|
ahc_outb(ahc, SXFRCTL1, (scsi_conf & (ENSPCHK|STIMESEL))
|
|
|
|
|term|ahc->seltime_b|ENSTIMER|ACTNEGEN);
|
|
|
|
if ((ahc->features & AHC_ULTRA2) != 0)
|
|
|
|
ahc_outb(ahc, SIMODE0, ahc_inb(ahc, SIMODE0)|ENIOERR);
|
|
|
|
ahc_outb(ahc, SIMODE1, ENSELTIMO|ENSCSIRST|ENSCSIPERR);
|
|
|
|
ahc_outb(ahc, SXFRCTL0, DFON|SPIOEN);
|
|
|
|
|
|
|
|
/* Select Channel A */
|
|
|
|
ahc_outb(ahc, SBLKCTL, ahc_inb(ahc, SBLKCTL) & ~SELBUSB);
|
|
|
|
}
|
|
|
|
term = (ahc->flags & AHC_TERM_ENB_A) != 0 ? STPWEN : 0;
|
|
|
|
if ((ahc->features & AHC_ULTRA2) != 0)
|
|
|
|
ahc_outb(ahc, SCSIID_ULTRA2, ahc->our_id);
|
|
|
|
else
|
|
|
|
ahc_outb(ahc, SCSIID, ahc->our_id);
|
|
|
|
scsi_conf = ahc_inb(ahc, SCSICONF);
|
|
|
|
ahc_outb(ahc, SXFRCTL1, (scsi_conf & (ENSPCHK|STIMESEL))
|
|
|
|
|term|ahc->seltime
|
|
|
|
|ENSTIMER|ACTNEGEN);
|
|
|
|
if ((ahc->features & AHC_ULTRA2) != 0)
|
|
|
|
ahc_outb(ahc, SIMODE0, ahc_inb(ahc, SIMODE0)|ENIOERR);
|
|
|
|
ahc_outb(ahc, SIMODE1, ENSELTIMO|ENSCSIRST|ENSCSIPERR);
|
|
|
|
ahc_outb(ahc, SXFRCTL0, DFON|SPIOEN);
|
|
|
|
|
|
|
|
/* There are no untagged SCBs active yet. */
|
|
|
|
for (i = 0; i < 16; i++) {
|
|
|
|
ahc_unbusy_tcl(ahc, BUILD_TCL(i << 4, 0));
|
|
|
|
if ((ahc->flags & AHC_SCB_BTT) != 0) {
|
|
|
|
int lun;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* The SCB based BTT allows an entry per
|
|
|
|
* target and lun pair.
|
|
|
|
*/
|
|
|
|
for (lun = 1; lun < AHC_NUM_LUNS; lun++)
|
|
|
|
ahc_unbusy_tcl(ahc, BUILD_TCL(i << 4, lun));
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* All of our queues are empty */
|
|
|
|
for (i = 0; i < 256; i++)
|
|
|
|
ahc->qoutfifo[i] = SCB_LIST_NULL;
|
|
|
|
ahc_sync_qoutfifo(ahc, BUS_DMASYNC_PREREAD);
|
|
|
|
|
|
|
|
for (i = 0; i < 256; i++)
|
|
|
|
ahc->qinfifo[i] = SCB_LIST_NULL;
|
|
|
|
|
|
|
|
if ((ahc->features & AHC_MULTI_TID) != 0) {
|
|
|
|
ahc_outb(ahc, TARGID, 0);
|
|
|
|
ahc_outb(ahc, TARGID + 1, 0);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Tell the sequencer where it can find our arrays in memory.
|
|
|
|
*/
|
|
|
|
physaddr = ahc->scb_data->hscb_busaddr;
|
|
|
|
ahc_outb(ahc, HSCB_ADDR, physaddr & 0xFF);
|
|
|
|
ahc_outb(ahc, HSCB_ADDR + 1, (physaddr >> 8) & 0xFF);
|
|
|
|
ahc_outb(ahc, HSCB_ADDR + 2, (physaddr >> 16) & 0xFF);
|
|
|
|
ahc_outb(ahc, HSCB_ADDR + 3, (physaddr >> 24) & 0xFF);
|
|
|
|
|
|
|
|
physaddr = ahc->shared_data_busaddr;
|
|
|
|
ahc_outb(ahc, SHARED_DATA_ADDR, physaddr & 0xFF);
|
|
|
|
ahc_outb(ahc, SHARED_DATA_ADDR + 1, (physaddr >> 8) & 0xFF);
|
|
|
|
ahc_outb(ahc, SHARED_DATA_ADDR + 2, (physaddr >> 16) & 0xFF);
|
|
|
|
ahc_outb(ahc, SHARED_DATA_ADDR + 3, (physaddr >> 24) & 0xFF);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Initialize the group code to command length table.
|
|
|
|
* This overrides the values in TARG_SCSIRATE, so only
|
|
|
|
* setup the table after we have processed that information.
|
|
|
|
*/
|
|
|
|
ahc_outb(ahc, CMDSIZE_TABLE, 5);
|
|
|
|
ahc_outb(ahc, CMDSIZE_TABLE + 1, 9);
|
|
|
|
ahc_outb(ahc, CMDSIZE_TABLE + 2, 9);
|
|
|
|
ahc_outb(ahc, CMDSIZE_TABLE + 3, 0);
|
|
|
|
ahc_outb(ahc, CMDSIZE_TABLE + 4, 15);
|
|
|
|
ahc_outb(ahc, CMDSIZE_TABLE + 5, 11);
|
|
|
|
ahc_outb(ahc, CMDSIZE_TABLE + 6, 0);
|
|
|
|
ahc_outb(ahc, CMDSIZE_TABLE + 7, 0);
|
|
|
|
|
|
|
|
if ((ahc->features & AHC_HS_MAILBOX) != 0)
|
|
|
|
ahc_outb(ahc, HS_MAILBOX, 0);
|
|
|
|
|
|
|
|
/* Tell the sequencer of our initial queue positions */
|
|
|
|
if ((ahc->features & AHC_TARGETMODE) != 0) {
|
|
|
|
ahc->tqinfifonext = 1;
|
|
|
|
ahc_outb(ahc, KERNEL_TQINPOS, ahc->tqinfifonext - 1);
|
|
|
|
ahc_outb(ahc, TQINPOS, ahc->tqinfifonext);
|
|
|
|
}
|
|
|
|
ahc->qinfifonext = 0;
|
|
|
|
ahc->qoutfifonext = 0;
|
|
|
|
if ((ahc->features & AHC_QUEUE_REGS) != 0) {
|
|
|
|
ahc_outb(ahc, QOFF_CTLSTA, SCB_QSIZE_256);
|
|
|
|
ahc_outb(ahc, HNSCB_QOFF, ahc->qinfifonext);
|
|
|
|
ahc_outb(ahc, SNSCB_QOFF, ahc->qinfifonext);
|
|
|
|
ahc_outb(ahc, SDSCB_QOFF, 0);
|
|
|
|
} else {
|
|
|
|
ahc_outb(ahc, KERNEL_QINPOS, ahc->qinfifonext);
|
|
|
|
ahc_outb(ahc, QINPOS, ahc->qinfifonext);
|
|
|
|
ahc_outb(ahc, QOUTPOS, ahc->qoutfifonext);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* We don't have any waiting selections */
|
|
|
|
ahc_outb(ahc, WAITING_SCBH, SCB_LIST_NULL);
|
|
|
|
|
|
|
|
/* Our disconnection list is empty too */
|
|
|
|
ahc_outb(ahc, DISCONNECTED_SCBH, SCB_LIST_NULL);
|
|
|
|
|
|
|
|
/* Message out buffer starts empty */
|
|
|
|
ahc_outb(ahc, MSG_OUT, MSG_NOOP);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Setup the allowed SCSI Sequences based on operational mode.
|
|
|
|
* If we are a target, we'll enalbe select in operations once
|
|
|
|
* we've had a lun enabled.
|
|
|
|
*/
|
|
|
|
scsiseq_template = ENSELO|ENAUTOATNO|ENAUTOATNP;
|
|
|
|
if ((ahc->flags & AHC_INITIATORROLE) != 0)
|
|
|
|
scsiseq_template |= ENRSELI;
|
|
|
|
ahc_outb(ahc, SCSISEQ_TEMPLATE, scsiseq_template);
|
|
|
|
|
|
|
|
/* Initialize our list of free SCBs. */
|
|
|
|
ahc_build_free_scb_list(ahc);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Tell the sequencer which SCB will be the next one it receives.
|
|
|
|
*/
|
|
|
|
ahc_outb(ahc, NEXT_QUEUED_SCB, ahc->next_queued_scb->hscb->tag);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Load the Sequencer program and Enable the adapter
|
|
|
|
* in "fast" mode.
|
|
|
|
*/
|
|
|
|
if (bootverbose)
|
|
|
|
printf("%s: Downloading Sequencer Program...",
|
|
|
|
ahc_name(ahc));
|
|
|
|
|
|
|
|
error = ahc_loadseq(ahc);
|
|
|
|
if (error != 0)
|
|
|
|
return (error);
|
|
|
|
|
|
|
|
if ((ahc->features & AHC_ULTRA2) != 0) {
|
|
|
|
int wait;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Wait for up to 500ms for our transceivers
|
|
|
|
* to settle. If the adapter does not have
|
|
|
|
* a cable attached, the transceivers may
|
|
|
|
* never settle, so don't complain if we
|
|
|
|
* fail here.
|
|
|
|
*/
|
|
|
|
ahc_pause(ahc);
|
|
|
|
for (wait = 5000;
|
|
|
|
(ahc_inb(ahc, SBLKCTL) & (ENAB40|ENAB20)) == 0 && wait;
|
|
|
|
wait--)
|
|
|
|
ahc_delay(100);
|
|
|
|
ahc_unpause(ahc);
|
|
|
|
}
|
|
|
|
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/*
|
|
|
|
* Start the board, ready for normal operation
|
|
|
|
*/
|
|
|
|
int
|
|
|
|
ahc_init(struct ahc_softc *ahc)
|
|
|
|
{
|
|
|
|
int max_targ;
|
2003-05-03 23:55:38 +00:00
|
|
|
u_int i;
|
2000-09-16 20:02:28 +00:00
|
|
|
u_int scsi_conf;
|
|
|
|
u_int ultraenb;
|
|
|
|
u_int discenable;
|
|
|
|
u_int tagenable;
|
|
|
|
size_t driver_data_size;
|
1999-12-06 18:23:31 +00:00
|
|
|
|
aic7xxx.reg:
Add a constant for the controller's stack size and the
maximum scsi offset.
aic7xxx.seq:
Style nit. The source is implied to be the destination
unless overridden in an "and" instruction.
Update target mode code for changes in identify seen
sequencer flags.
aic7xxx_pci.c:
Ensure that the PCIERRGENDIS bit is set in the
PCIERRGEN config space register. Perhaps this
is a reason for the spurios parity errors reported
on U160 controllers.
Honor the AHC_NO_BIOS_INIT flag.
Allow PCI interrupt reporting to be disabled,
by clearing the PERRRESEN bit in the command
register. This option is now enabled via a new
softc flag: AHC_DISABLE_PCI_PERR.
Disable SERR and pause the controller prior to performing
our mmapped I/O test. This should handle the case of
controllers that do not "auto-access pause". For legacy
controllers, use SCB ram instead of scratch ram since
the latter may contain settings left over from the BIOS
that we will use if an seeprom is not found.
Make use of new ahc_inl/outl() inlines.
aic7xxx.h:
Reformat a few comments to follow driver style.
Add a controller flags that indicate that a controller
has not been initialized by the BIOS and whether to
disable PCI parity errors..
Remove stack probing softc members.
Add a few more syncrate constants that are useful in speed
fallback calculations.
Add the SHOW_MASKED_ERRORS debug flag.
aic7xxx.h:
aic7xxx.c:
Implement the SCB_SILENT flag. This is useful for
hushing up the driver during DV or other operations
that we expect to cause transmission errors. The
messages will still print if the SHOW_MASKED_ERRORS
debug option is enabled.
aic7xxx_inline.h:
Implement ahc_[in|out][w|l|q]. This removes the need
for manual 'or and shift" type operations throughout
the driver.
aic7xxx.c:
Move SELTO dignostic so that the SCB is still valid
when we use it for printing path information.
If we are narrow, limit syncrate to Ultra2.
Don't clobber ppr_options when forcing a renegotiation.
The current ppr_options may be referenced while queuing
new commands. Don't set our width to unknown when forcing
negotiation on narrow controllers. This will confuse the
negotiation code into negotiating with a wide message on
narrow controllers.
Add an "asserting atn" diagnostic with controller/target
information.
Remove the probe_stack code. The stack is always
4 deep on legacy controllers, so probing is pointless.
This also avoids an issue where probing the stack would
upset the aic7770.
In ahc_reset(), record whether or not we found the
controller in a reset state. If the controller was
already reset, assume that no BIOS has initialized
the controller and ignore left over scratch ram
settings.
Fix an ifdef bug that caused sequencer debugging to
be enabled always.
Clear the ultraenb flag in our tstate during startup.
The ultraenbled'ness of a device is recorded in the user
transfer settings. tstate->ultraenb bitmask indicates
which devices we have negotiated an ultra speed with.
Just after initialization, we are async. Setting the
ultraenb flag while async seems to be harmless, but it
was confusing to see the ULTRAENB flag set in the SCB.
Enhance residual diagnostic to indicate if the residual
if for sense information or normal data transfers.
Indicate the features, bugs, and flags set in the softc
that are used to control firmware patch download when
booting verbose.
In ahc_dump_card_state() fix a logic reversal. The
SCSIPHASE register only exists on U160 controllers.
The SCSISIGI register exists on all controllers. Not
the other way around. Also print out the ERROR register.
Allow ahc_dump_card_state() to be called when the sequencer
is not paused. Add dump card state markers as in the U320
driver.
2003-01-20 20:44:55 +00:00
|
|
|
#ifdef AHC_DEBUG
|
|
|
|
if ((ahc_debug & AHC_DEBUG_SEQUENCER) != 0)
|
|
|
|
ahc->flags |= AHC_SEQUENCER_DEBUG;
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
#endif
|
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
#ifdef AHC_PRINT_SRAM
|
|
|
|
printf("Scratch Ram:");
|
|
|
|
for (i = 0x20; i < 0x5f; i++) {
|
|
|
|
if (((i % 8) == 0) && (i != 0)) {
|
|
|
|
printf ("\n ");
|
|
|
|
}
|
|
|
|
printf (" 0x%x", ahc_inb(ahc, i));
|
1999-12-06 18:23:31 +00:00
|
|
|
}
|
2000-09-16 20:02:28 +00:00
|
|
|
if ((ahc->features & AHC_MORE_SRAM) != 0) {
|
|
|
|
for (i = 0x70; i < 0x7f; i++) {
|
|
|
|
if (((i % 8) == 0) && (i != 0)) {
|
|
|
|
printf ("\n ");
|
|
|
|
}
|
|
|
|
printf (" 0x%x", ahc_inb(ahc, i));
|
|
|
|
}
|
|
|
|
}
|
|
|
|
printf ("\n");
|
2002-04-24 16:58:51 +00:00
|
|
|
/*
|
|
|
|
* Reading uninitialized scratch ram may
|
|
|
|
* generate parity errors.
|
|
|
|
*/
|
|
|
|
ahc_outb(ahc, CLRINT, CLRPARERR);
|
|
|
|
ahc_outb(ahc, CLRINT, CLRBRKADRINT);
|
1999-12-06 18:23:31 +00:00
|
|
|
#endif
|
2000-09-16 20:02:28 +00:00
|
|
|
max_targ = 15;
|
1999-12-06 18:23:31 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/*
|
|
|
|
* Assume we have a board at this stage and it has been reset.
|
|
|
|
*/
|
|
|
|
if ((ahc->flags & AHC_USEDEFAULTS) != 0)
|
|
|
|
ahc->our_id = ahc->our_id_b = 7;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Default to allowing initiator operations.
|
|
|
|
*/
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
ahc->flags |= AHC_INITIATORROLE;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
/*
|
|
|
|
* Only allow target mode features if this unit has them enabled.
|
|
|
|
*/
|
|
|
|
if ((AHC_TMODE_ENABLE & (0x1 << ahc->unit)) == 0)
|
|
|
|
ahc->features &= ~AHC_TARGETMODE;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
#ifndef __linux__
|
|
|
|
/* DMA tag for mapping buffers into device visible space. */
|
|
|
|
if (ahc_dma_tag_create(ahc, ahc->parent_dmat, /*alignment*/1,
|
2001-07-18 21:39:48 +00:00
|
|
|
/*boundary*/BUS_SPACE_MAXADDR_32BIT + 1,
|
2003-05-03 23:55:38 +00:00
|
|
|
/*lowaddr*/ahc->flags & AHC_39BIT_ADDRESSING
|
|
|
|
? (bus_addr_t)0x7FFFFFFFFFULL
|
|
|
|
: BUS_SPACE_MAXADDR_32BIT,
|
2000-09-16 20:02:28 +00:00
|
|
|
/*highaddr*/BUS_SPACE_MAXADDR,
|
|
|
|
/*filter*/NULL, /*filterarg*/NULL,
|
2002-12-31 04:22:36 +00:00
|
|
|
/*maxsize*/(AHC_NSEG - 1) * PAGE_SIZE,
|
|
|
|
/*nsegments*/AHC_NSEG,
|
2000-09-16 20:02:28 +00:00
|
|
|
/*maxsegsz*/AHC_MAXTRANSFER_SIZE,
|
|
|
|
/*flags*/BUS_DMA_ALLOCNOW,
|
|
|
|
&ahc->buffer_dmat) != 0) {
|
|
|
|
return (ENOMEM);
|
|
|
|
}
|
|
|
|
#endif
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc->init_level++;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* DMA tag for our command fifos and other data in system memory
|
|
|
|
* the card's sequencer must be able to access. For initiator
|
2002-08-31 06:41:37 +00:00
|
|
|
* roles, we need to allocate space for the qinfifo and qoutfifo.
|
2000-09-16 20:02:28 +00:00
|
|
|
* The qinfifo and qoutfifo are composed of 256 1 byte elements.
|
|
|
|
* When providing for the target mode role, we must additionally
|
|
|
|
* provide space for the incoming target command fifo and an extra
|
|
|
|
* byte to deal with a dma bug in some chip versions.
|
|
|
|
*/
|
|
|
|
driver_data_size = 2 * 256 * sizeof(uint8_t);
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
if ((ahc->features & AHC_TARGETMODE) != 0)
|
2000-09-16 20:02:28 +00:00
|
|
|
driver_data_size += AHC_TMODE_CMDS * sizeof(struct target_cmd)
|
|
|
|
+ /*DMA WideOdd Bug Buffer*/1;
|
|
|
|
if (ahc_dma_tag_create(ahc, ahc->parent_dmat, /*alignment*/1,
|
2001-07-18 21:39:48 +00:00
|
|
|
/*boundary*/BUS_SPACE_MAXADDR_32BIT + 1,
|
|
|
|
/*lowaddr*/BUS_SPACE_MAXADDR_32BIT,
|
2000-09-16 20:02:28 +00:00
|
|
|
/*highaddr*/BUS_SPACE_MAXADDR,
|
|
|
|
/*filter*/NULL, /*filterarg*/NULL,
|
|
|
|
driver_data_size,
|
|
|
|
/*nsegments*/1,
|
|
|
|
/*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT,
|
|
|
|
/*flags*/0, &ahc->shared_data_dmat) != 0) {
|
|
|
|
return (ENOMEM);
|
|
|
|
}
|
|
|
|
|
|
|
|
ahc->init_level++;
|
|
|
|
|
|
|
|
/* Allocation of driver data */
|
|
|
|
if (ahc_dmamem_alloc(ahc, ahc->shared_data_dmat,
|
|
|
|
(void **)&ahc->qoutfifo,
|
|
|
|
BUS_DMA_NOWAIT, &ahc->shared_data_dmamap) != 0) {
|
|
|
|
return (ENOMEM);
|
|
|
|
}
|
|
|
|
|
|
|
|
ahc->init_level++;
|
|
|
|
|
|
|
|
/* And permanently map it in */
|
|
|
|
ahc_dmamap_load(ahc, ahc->shared_data_dmat, ahc->shared_data_dmamap,
|
|
|
|
ahc->qoutfifo, driver_data_size, ahc_dmamap_cb,
|
|
|
|
&ahc->shared_data_busaddr, /*flags*/0);
|
|
|
|
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
if ((ahc->features & AHC_TARGETMODE) != 0) {
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc->targetcmds = (struct target_cmd *)ahc->qoutfifo;
|
2001-01-22 21:03:48 +00:00
|
|
|
ahc->qoutfifo = (uint8_t *)&ahc->targetcmds[AHC_TMODE_CMDS];
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc->dma_bug_buf = ahc->shared_data_busaddr
|
|
|
|
+ driver_data_size - 1;
|
|
|
|
/* All target command blocks start out invalid. */
|
|
|
|
for (i = 0; i < AHC_TMODE_CMDS; i++)
|
|
|
|
ahc->targetcmds[i].cmd_valid = 0;
|
2001-07-18 21:39:48 +00:00
|
|
|
ahc_sync_tqinfifo(ahc, BUS_DMASYNC_PREREAD);
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc->qoutfifo = (uint8_t *)&ahc->targetcmds[256];
|
1998-09-15 07:24:17 +00:00
|
|
|
}
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc->qinfifo = &ahc->qoutfifo[256];
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc->init_level++;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/* Allocate SCB data now that buffer_dmat is initialized */
|
|
|
|
if (ahc->scb_data->maxhscbs == 0)
|
|
|
|
if (ahc_init_scbdata(ahc) != 0)
|
|
|
|
return (ENOMEM);
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/*
|
|
|
|
* Allocate a tstate to house information for our
|
|
|
|
* initiator presence on the bus as well as the user
|
|
|
|
* data for any target mode initiator.
|
|
|
|
*/
|
|
|
|
if (ahc_alloc_tstate(ahc, ahc->our_id, 'A') == NULL) {
|
2001-03-29 00:36:35 +00:00
|
|
|
printf("%s: unable to allocate ahc_tmode_tstate. "
|
2000-09-16 20:02:28 +00:00
|
|
|
"Failing attach\n", ahc_name(ahc));
|
2001-03-29 00:36:35 +00:00
|
|
|
return (ENOMEM);
|
2000-09-16 20:02:28 +00:00
|
|
|
}
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
if ((ahc->features & AHC_TWIN) != 0) {
|
|
|
|
if (ahc_alloc_tstate(ahc, ahc->our_id_b, 'B') == NULL) {
|
2001-03-29 00:36:35 +00:00
|
|
|
printf("%s: unable to allocate ahc_tmode_tstate. "
|
2000-09-16 20:02:28 +00:00
|
|
|
"Failing attach\n", ahc_name(ahc));
|
2001-03-29 00:36:35 +00:00
|
|
|
return (ENOMEM);
|
2000-09-16 20:02:28 +00:00
|
|
|
}
|
|
|
|
}
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2002-04-24 16:58:51 +00:00
|
|
|
if (ahc->scb_data->maxhscbs < AHC_SCB_MAX_ALLOC) {
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc->flags |= AHC_PAGESCBS;
|
|
|
|
} else {
|
|
|
|
ahc->flags &= ~AHC_PAGESCBS;
|
1998-09-15 07:24:17 +00:00
|
|
|
}
|
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
#ifdef AHC_DEBUG
|
2002-08-31 06:41:37 +00:00
|
|
|
if (ahc_debug & AHC_SHOW_MISC) {
|
2003-05-03 23:55:38 +00:00
|
|
|
printf("%s: hardware scb %u bytes; kernel scb %u bytes; "
|
|
|
|
"ahc_dma %u bytes\n",
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_name(ahc),
|
2003-05-03 23:55:38 +00:00
|
|
|
(u_int)sizeof(struct hardware_scb),
|
|
|
|
(u_int)sizeof(struct scb),
|
|
|
|
(u_int)sizeof(struct ahc_dma_seg));
|
2000-09-16 20:02:28 +00:00
|
|
|
}
|
|
|
|
#endif /* AHC_DEBUG */
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2003-05-03 23:55:38 +00:00
|
|
|
/*
|
|
|
|
* Look at the information that board initialization or
|
|
|
|
* the board bios has left us.
|
|
|
|
*/
|
2000-09-16 20:02:28 +00:00
|
|
|
if (ahc->features & AHC_TWIN) {
|
|
|
|
scsi_conf = ahc_inb(ahc, SCSICONF + 1);
|
|
|
|
if ((scsi_conf & RESET_SCSI) != 0
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
&& (ahc->flags & AHC_INITIATORROLE) != 0)
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc->flags |= AHC_RESET_BUS_B;
|
|
|
|
}
|
2000-07-18 20:12:14 +00:00
|
|
|
|
2003-05-03 23:55:38 +00:00
|
|
|
scsi_conf = ahc_inb(ahc, SCSICONF);
|
2000-09-16 20:02:28 +00:00
|
|
|
if ((scsi_conf & RESET_SCSI) != 0
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
&& (ahc->flags & AHC_INITIATORROLE) != 0)
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc->flags |= AHC_RESET_BUS_A;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
ultraenb = 0;
|
|
|
|
tagenable = ALL_TARGETS_MASK;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/* Grab the disconnection disable table and invert it for our needs */
|
2002-04-24 16:58:51 +00:00
|
|
|
if ((ahc->flags & AHC_USEDEFAULTS) != 0) {
|
2000-09-16 20:02:28 +00:00
|
|
|
printf("%s: Host Adapter Bios disabled. Using default SCSI "
|
|
|
|
"device parameters\n", ahc_name(ahc));
|
|
|
|
ahc->flags |= AHC_EXTENDED_TRANS_A|AHC_EXTENDED_TRANS_B|
|
|
|
|
AHC_TERM_ENB_A|AHC_TERM_ENB_B;
|
|
|
|
discenable = ALL_TARGETS_MASK;
|
|
|
|
if ((ahc->features & AHC_ULTRA) != 0)
|
|
|
|
ultraenb = ALL_TARGETS_MASK;
|
|
|
|
} else {
|
|
|
|
discenable = ~((ahc_inb(ahc, DISC_DSB + 1) << 8)
|
|
|
|
| ahc_inb(ahc, DISC_DSB));
|
|
|
|
if ((ahc->features & (AHC_ULTRA|AHC_ULTRA2)) != 0)
|
|
|
|
ultraenb = (ahc_inb(ahc, ULTRA_ENB + 1) << 8)
|
|
|
|
| ahc_inb(ahc, ULTRA_ENB);
|
|
|
|
}
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
if ((ahc->features & (AHC_WIDE|AHC_TWIN)) == 0)
|
|
|
|
max_targ = 7;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
for (i = 0; i <= max_targ; i++) {
|
|
|
|
struct ahc_initiator_tinfo *tinfo;
|
2001-03-29 00:36:35 +00:00
|
|
|
struct ahc_tmode_tstate *tstate;
|
2000-09-16 20:02:28 +00:00
|
|
|
u_int our_id;
|
|
|
|
u_int target_id;
|
|
|
|
char channel;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
channel = 'A';
|
|
|
|
our_id = ahc->our_id;
|
|
|
|
target_id = i;
|
|
|
|
if (i > 7 && (ahc->features & AHC_TWIN) != 0) {
|
|
|
|
channel = 'B';
|
|
|
|
our_id = ahc->our_id_b;
|
|
|
|
target_id = i % 8;
|
|
|
|
}
|
|
|
|
tinfo = ahc_fetch_transinfo(ahc, channel, our_id,
|
|
|
|
target_id, &tstate);
|
|
|
|
/* Default to async narrow across the board */
|
|
|
|
memset(tinfo, 0, sizeof(*tinfo));
|
|
|
|
if (ahc->flags & AHC_USEDEFAULTS) {
|
|
|
|
if ((ahc->features & AHC_WIDE) != 0)
|
|
|
|
tinfo->user.width = MSG_EXT_WDTR_BUS_16_BIT;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/*
|
|
|
|
* These will be truncated when we determine the
|
|
|
|
* connection type we have with the target.
|
|
|
|
*/
|
|
|
|
tinfo->user.period = ahc_syncrates->period;
|
2003-05-03 23:55:38 +00:00
|
|
|
tinfo->user.offset = MAX_OFFSET;
|
2000-09-16 20:02:28 +00:00
|
|
|
} else {
|
|
|
|
u_int scsirate;
|
|
|
|
uint16_t mask;
|
|
|
|
|
|
|
|
/* Take the settings leftover in scratch RAM. */
|
|
|
|
scsirate = ahc_inb(ahc, TARG_SCSIRATE + i);
|
|
|
|
mask = (0x01 << i);
|
|
|
|
if ((ahc->features & AHC_ULTRA2) != 0) {
|
|
|
|
u_int offset;
|
|
|
|
u_int maxsync;
|
|
|
|
|
|
|
|
if ((scsirate & SOFS) == 0x0F) {
|
|
|
|
/*
|
|
|
|
* Haven't negotiated yet,
|
|
|
|
* so the format is different.
|
|
|
|
*/
|
|
|
|
scsirate = (scsirate & SXFR) >> 4
|
|
|
|
| (ultraenb & mask)
|
|
|
|
? 0x08 : 0x0
|
|
|
|
| (scsirate & WIDEXFER);
|
|
|
|
offset = MAX_OFFSET_ULTRA2;
|
|
|
|
} else
|
|
|
|
offset = ahc_inb(ahc, TARG_OFFSET + i);
|
This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
|
|
|
if ((scsirate & ~WIDEXFER) == 0 && offset != 0)
|
|
|
|
/* Set to the lowest sync rate, 5MHz */
|
|
|
|
scsirate |= 0x1c;
|
2000-09-16 20:02:28 +00:00
|
|
|
maxsync = AHC_SYNCRATE_ULTRA2;
|
|
|
|
if ((ahc->features & AHC_DT) != 0)
|
|
|
|
maxsync = AHC_SYNCRATE_DT;
|
|
|
|
tinfo->user.period =
|
|
|
|
ahc_find_period(ahc, scsirate, maxsync);
|
|
|
|
if (offset == 0)
|
|
|
|
tinfo->user.period = 0;
|
|
|
|
else
|
2003-05-03 23:55:38 +00:00
|
|
|
tinfo->user.offset = MAX_OFFSET;
|
2000-09-16 20:02:28 +00:00
|
|
|
if ((scsirate & SXFR_ULTRA2) <= 8/*10MHz*/
|
|
|
|
&& (ahc->features & AHC_DT) != 0)
|
|
|
|
tinfo->user.ppr_options =
|
|
|
|
MSG_EXT_PPR_DT_REQ;
|
|
|
|
} else if ((scsirate & SOFS) != 0) {
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
if ((scsirate & SXFR) == 0x40
|
|
|
|
&& (ultraenb & mask) != 0) {
|
|
|
|
/* Treat 10MHz as a non-ultra speed */
|
|
|
|
scsirate &= ~SXFR;
|
|
|
|
ultraenb &= ~mask;
|
|
|
|
}
|
2000-09-16 20:02:28 +00:00
|
|
|
tinfo->user.period =
|
|
|
|
ahc_find_period(ahc, scsirate,
|
|
|
|
(ultraenb & mask)
|
|
|
|
? AHC_SYNCRATE_ULTRA
|
|
|
|
: AHC_SYNCRATE_FAST);
|
|
|
|
if (tinfo->user.period != 0)
|
2003-05-03 23:55:38 +00:00
|
|
|
tinfo->user.offset = MAX_OFFSET;
|
1998-09-15 07:24:17 +00:00
|
|
|
}
|
This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
|
|
|
if (tinfo->user.period == 0)
|
|
|
|
tinfo->user.offset = 0;
|
2000-09-16 20:02:28 +00:00
|
|
|
if ((scsirate & WIDEXFER) != 0
|
|
|
|
&& (ahc->features & AHC_WIDE) != 0)
|
|
|
|
tinfo->user.width = MSG_EXT_WDTR_BUS_16_BIT;
|
|
|
|
tinfo->user.protocol_version = 4;
|
|
|
|
if ((ahc->features & AHC_DT) != 0)
|
|
|
|
tinfo->user.transport_version = 3;
|
|
|
|
else
|
|
|
|
tinfo->user.transport_version = 2;
|
|
|
|
tinfo->goal.protocol_version = 2;
|
|
|
|
tinfo->goal.transport_version = 2;
|
2001-05-15 19:41:12 +00:00
|
|
|
tinfo->curr.protocol_version = 2;
|
|
|
|
tinfo->curr.transport_version = 2;
|
1998-09-15 07:24:17 +00:00
|
|
|
}
|
aic7xxx.reg:
Add a constant for the controller's stack size and the
maximum scsi offset.
aic7xxx.seq:
Style nit. The source is implied to be the destination
unless overridden in an "and" instruction.
Update target mode code for changes in identify seen
sequencer flags.
aic7xxx_pci.c:
Ensure that the PCIERRGENDIS bit is set in the
PCIERRGEN config space register. Perhaps this
is a reason for the spurios parity errors reported
on U160 controllers.
Honor the AHC_NO_BIOS_INIT flag.
Allow PCI interrupt reporting to be disabled,
by clearing the PERRRESEN bit in the command
register. This option is now enabled via a new
softc flag: AHC_DISABLE_PCI_PERR.
Disable SERR and pause the controller prior to performing
our mmapped I/O test. This should handle the case of
controllers that do not "auto-access pause". For legacy
controllers, use SCB ram instead of scratch ram since
the latter may contain settings left over from the BIOS
that we will use if an seeprom is not found.
Make use of new ahc_inl/outl() inlines.
aic7xxx.h:
Reformat a few comments to follow driver style.
Add a controller flags that indicate that a controller
has not been initialized by the BIOS and whether to
disable PCI parity errors..
Remove stack probing softc members.
Add a few more syncrate constants that are useful in speed
fallback calculations.
Add the SHOW_MASKED_ERRORS debug flag.
aic7xxx.h:
aic7xxx.c:
Implement the SCB_SILENT flag. This is useful for
hushing up the driver during DV or other operations
that we expect to cause transmission errors. The
messages will still print if the SHOW_MASKED_ERRORS
debug option is enabled.
aic7xxx_inline.h:
Implement ahc_[in|out][w|l|q]. This removes the need
for manual 'or and shift" type operations throughout
the driver.
aic7xxx.c:
Move SELTO dignostic so that the SCB is still valid
when we use it for printing path information.
If we are narrow, limit syncrate to Ultra2.
Don't clobber ppr_options when forcing a renegotiation.
The current ppr_options may be referenced while queuing
new commands. Don't set our width to unknown when forcing
negotiation on narrow controllers. This will confuse the
negotiation code into negotiating with a wide message on
narrow controllers.
Add an "asserting atn" diagnostic with controller/target
information.
Remove the probe_stack code. The stack is always
4 deep on legacy controllers, so probing is pointless.
This also avoids an issue where probing the stack would
upset the aic7770.
In ahc_reset(), record whether or not we found the
controller in a reset state. If the controller was
already reset, assume that no BIOS has initialized
the controller and ignore left over scratch ram
settings.
Fix an ifdef bug that caused sequencer debugging to
be enabled always.
Clear the ultraenb flag in our tstate during startup.
The ultraenbled'ness of a device is recorded in the user
transfer settings. tstate->ultraenb bitmask indicates
which devices we have negotiated an ultra speed with.
Just after initialization, we are async. Setting the
ultraenb flag while async seems to be harmless, but it
was confusing to see the ULTRAENB flag set in the SCB.
Enhance residual diagnostic to indicate if the residual
if for sense information or normal data transfers.
Indicate the features, bugs, and flags set in the softc
that are used to control firmware patch download when
booting verbose.
In ahc_dump_card_state() fix a logic reversal. The
SCSIPHASE register only exists on U160 controllers.
The SCSISIGI register exists on all controllers. Not
the other way around. Also print out the ERROR register.
Allow ahc_dump_card_state() to be called when the sequencer
is not paused. Add dump card state markers as in the U320
driver.
2003-01-20 20:44:55 +00:00
|
|
|
tstate->ultraenb = 0;
|
1998-09-15 07:24:17 +00:00
|
|
|
}
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc->user_discenable = discenable;
|
|
|
|
ahc->user_tagenable = tagenable;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2003-05-03 23:55:38 +00:00
|
|
|
return (ahc->bus_chip_init(ahc));
|
2000-09-16 20:02:28 +00:00
|
|
|
}
|
|
|
|
|
2001-03-29 00:36:35 +00:00
|
|
|
void
|
|
|
|
ahc_intr_enable(struct ahc_softc *ahc, int enable)
|
|
|
|
{
|
|
|
|
u_int hcntrl;
|
|
|
|
|
|
|
|
hcntrl = ahc_inb(ahc, HCNTRL);
|
|
|
|
hcntrl &= ~INTEN;
|
|
|
|
ahc->pause &= ~INTEN;
|
|
|
|
ahc->unpause &= ~INTEN;
|
|
|
|
if (enable) {
|
|
|
|
hcntrl |= INTEN;
|
|
|
|
ahc->pause |= INTEN;
|
|
|
|
ahc->unpause |= INTEN;
|
|
|
|
}
|
|
|
|
ahc_outb(ahc, HCNTRL, hcntrl);
|
|
|
|
}
|
|
|
|
|
ahc_eisa.c:
ahc_pci.c:
Add detach support.
Make use of soft allocated on our behalf by newbus.
For PCI devices, disable the mapping type we aren't
using for extra protection from rogue code.
aic7xxx_93cx6.c:
aic7xxx_93cx6.h:
Sync perforce IDs.
aic7xxx_freebsd.c:
Capture the eventhandle returned by EVENTHANDER_REGISTER
so we can kill the handler off during detach.
Use AHC_* constants instead of hard coded numbers in a
few more places.
Test PPR option state when deciding to "really" negotiate
when the CAM_NEGOTIATE flag is passed in a CCB.
Make use of core "ahc_pause_and_flushwork" routine in our
timeout handler rather than re-inventing this code.
Cleanup all of our resources (really!) in ahc_platform_free().
We should be all set to become a module now.
Implement the core ahc_detach() routine shared by all of
the FreeBSD front-ends.
aic7xxx_freebsd.h:
Softc storage for our event handler.
Null implementation for the ahc_platform_flushwork() OSM
callback. FreeBSD doesn't need this as XPT callbacks are
safe from all contexts and are done directly in ahc_done().
aic7xxx_inline.h:
Implement new lazy interrupt scheme. To avoid an extra
PCI bus read, we first check our completion queues to
see if any work has completed. If work is available, we
assume that this is the source of the interrupt and skip
reading INTSTAT. Any remaining interrupt status will be
cleared by a second call to the interrupt handler should
the interrupt line still be asserted. This drops the
interrupt handler down to a single PCI bus read in the
common case of I/O completion. This is the same overhead
as in the not so distant past, but the extra sanity of
perforning a PCI read after clearing the command complete
interrupt and before running the completion queue to avoid
missing command complete interrupts added a cycle.
aic7xxx.c:
During initialization, be sure to initialize all scratch
ram locations before they are read to avoid parity errors.
In this case, we use a new function, ahc_unbusy_tcl() to
initialize the scratch ram busy target table.
Replace instances of ahc_index_busy_tcl() used to unbusy
a tcl without looking at the old value with ahc_unbusy_tcl().
Modify ahc_sent_msg so that it can find single byte messages.
ahc_sent_msg is now used to determine if a transfer negotiation
attempt resulted in a bus free.
Be more careful in filtering out only the SCSI interrupts
of interest in ahc_handle_scsiint.
Rearrange interrupt clearing code to ensure that at least
one PCI transaction occurrs after hitting CLRSINT1 and
writting to CLRINT. CLRSINT1 writes take a bit to
take effect, and the re-arrangement provides sufficient
delay to ensure the write to CLRINT is effective. The
old code might report a spurious interrupt on some "fast"
chipsets.
export ahc-update_target_msg_request for use by OSM code.
If a target does not respond to our ATN request, clear
it once we move to a non-message phase. This avoids
sending a MSG_NOOP in some later message out phase.
Use max lun and max target constants instead of
hard-coded values.
Use softc storage built into our device_t under FreeBSD.
Fix a bug in ahc_free() that caused us to delete
resources that were not allocated.
Clean up any tstate/lstate info in ahc_free().
Clear the powerdown state in ahc_reset() so that
registers can be accessed.
Add a preliminary function for pausing the chip and
processing any posted work.
Add a preliminary suspend and resume functions.
aic7xxx.h:
Limit the number of supported luns to 64. We don't
support information unit transfers, so this is the
maximum that makes sense for these chips.
Add a new flag AHC_ALL_INTERRUPTS that forces the
processing of all interrupt state in a single invokation
of ahc_intr(). When the flag is not set, we use the
lazy interrupt handling scheme.
Add data structures to store controller state while
we are suspended.
Use constants instead of hard coded values where appropriate.
Correct some harmless "unsigned/signed" conflicts.
aic7xxx.seq:
Only perform the SCSIBUSL fix on ULTRA2 or newer controllers.
Older controllers seem to be confused by this.
In target mode, ignore PHASEMIS during data phases.
This bit seems to be flakey on U160 controllers acting
in target mode.
aic7xxx_pci.c:
Add support for the 29160C CPCI adapter.
Add definitions for subvendor ID information
available for devices with the "9005" vendor id.
We currently use this information to determine
if a multi-function device doesn't have the second
channel hooked up on a board.
Add rudimentary power mode code so we can put the
controller into the D0 state. In the future this
will be an OSM callback so that in FreeBSD we don't
duplicate functionality provided by the PCI code.
The powerstate code was added after I'd completed
my regression tests on this code.
Only capture "left over BIOS state" if the POWRDN
setting is not set in HCNTRL.
In target mode, don't bother sending incremental
CRC data.
2000-12-20 01:11:37 +00:00
|
|
|
/*
|
|
|
|
* Ensure that the card is paused in a location
|
|
|
|
* outside of all critical sections and that all
|
|
|
|
* pending work is completed prior to returning.
|
|
|
|
* This routine should only be called from outside
|
|
|
|
* an interrupt context.
|
|
|
|
*/
|
|
|
|
void
|
|
|
|
ahc_pause_and_flushwork(struct ahc_softc *ahc)
|
|
|
|
{
|
2001-01-22 21:03:48 +00:00
|
|
|
int intstat;
|
|
|
|
int maxloops;
|
2002-08-31 06:41:37 +00:00
|
|
|
int paused;
|
2001-01-22 21:03:48 +00:00
|
|
|
|
|
|
|
maxloops = 1000;
|
ahc_eisa.c:
ahc_pci.c:
Add detach support.
Make use of soft allocated on our behalf by newbus.
For PCI devices, disable the mapping type we aren't
using for extra protection from rogue code.
aic7xxx_93cx6.c:
aic7xxx_93cx6.h:
Sync perforce IDs.
aic7xxx_freebsd.c:
Capture the eventhandle returned by EVENTHANDER_REGISTER
so we can kill the handler off during detach.
Use AHC_* constants instead of hard coded numbers in a
few more places.
Test PPR option state when deciding to "really" negotiate
when the CAM_NEGOTIATE flag is passed in a CCB.
Make use of core "ahc_pause_and_flushwork" routine in our
timeout handler rather than re-inventing this code.
Cleanup all of our resources (really!) in ahc_platform_free().
We should be all set to become a module now.
Implement the core ahc_detach() routine shared by all of
the FreeBSD front-ends.
aic7xxx_freebsd.h:
Softc storage for our event handler.
Null implementation for the ahc_platform_flushwork() OSM
callback. FreeBSD doesn't need this as XPT callbacks are
safe from all contexts and are done directly in ahc_done().
aic7xxx_inline.h:
Implement new lazy interrupt scheme. To avoid an extra
PCI bus read, we first check our completion queues to
see if any work has completed. If work is available, we
assume that this is the source of the interrupt and skip
reading INTSTAT. Any remaining interrupt status will be
cleared by a second call to the interrupt handler should
the interrupt line still be asserted. This drops the
interrupt handler down to a single PCI bus read in the
common case of I/O completion. This is the same overhead
as in the not so distant past, but the extra sanity of
perforning a PCI read after clearing the command complete
interrupt and before running the completion queue to avoid
missing command complete interrupts added a cycle.
aic7xxx.c:
During initialization, be sure to initialize all scratch
ram locations before they are read to avoid parity errors.
In this case, we use a new function, ahc_unbusy_tcl() to
initialize the scratch ram busy target table.
Replace instances of ahc_index_busy_tcl() used to unbusy
a tcl without looking at the old value with ahc_unbusy_tcl().
Modify ahc_sent_msg so that it can find single byte messages.
ahc_sent_msg is now used to determine if a transfer negotiation
attempt resulted in a bus free.
Be more careful in filtering out only the SCSI interrupts
of interest in ahc_handle_scsiint.
Rearrange interrupt clearing code to ensure that at least
one PCI transaction occurrs after hitting CLRSINT1 and
writting to CLRINT. CLRSINT1 writes take a bit to
take effect, and the re-arrangement provides sufficient
delay to ensure the write to CLRINT is effective. The
old code might report a spurious interrupt on some "fast"
chipsets.
export ahc-update_target_msg_request for use by OSM code.
If a target does not respond to our ATN request, clear
it once we move to a non-message phase. This avoids
sending a MSG_NOOP in some later message out phase.
Use max lun and max target constants instead of
hard-coded values.
Use softc storage built into our device_t under FreeBSD.
Fix a bug in ahc_free() that caused us to delete
resources that were not allocated.
Clean up any tstate/lstate info in ahc_free().
Clear the powerdown state in ahc_reset() so that
registers can be accessed.
Add a preliminary function for pausing the chip and
processing any posted work.
Add a preliminary suspend and resume functions.
aic7xxx.h:
Limit the number of supported luns to 64. We don't
support information unit transfers, so this is the
maximum that makes sense for these chips.
Add a new flag AHC_ALL_INTERRUPTS that forces the
processing of all interrupt state in a single invokation
of ahc_intr(). When the flag is not set, we use the
lazy interrupt handling scheme.
Add data structures to store controller state while
we are suspended.
Use constants instead of hard coded values where appropriate.
Correct some harmless "unsigned/signed" conflicts.
aic7xxx.seq:
Only perform the SCSIBUSL fix on ULTRA2 or newer controllers.
Older controllers seem to be confused by this.
In target mode, ignore PHASEMIS during data phases.
This bit seems to be flakey on U160 controllers acting
in target mode.
aic7xxx_pci.c:
Add support for the 29160C CPCI adapter.
Add definitions for subvendor ID information
available for devices with the "9005" vendor id.
We currently use this information to determine
if a multi-function device doesn't have the second
channel hooked up on a board.
Add rudimentary power mode code so we can put the
controller into the D0 state. In the future this
will be an OSM callback so that in FreeBSD we don't
duplicate functionality provided by the PCI code.
The powerstate code was added after I'd completed
my regression tests on this code.
Only capture "left over BIOS state" if the POWRDN
setting is not set in HCNTRL.
In target mode, don't bother sending incremental
CRC data.
2000-12-20 01:11:37 +00:00
|
|
|
ahc->flags |= AHC_ALL_INTERRUPTS;
|
2002-08-31 06:41:37 +00:00
|
|
|
paused = FALSE;
|
ahc_eisa.c:
ahc_pci.c:
Add detach support.
Make use of soft allocated on our behalf by newbus.
For PCI devices, disable the mapping type we aren't
using for extra protection from rogue code.
aic7xxx_93cx6.c:
aic7xxx_93cx6.h:
Sync perforce IDs.
aic7xxx_freebsd.c:
Capture the eventhandle returned by EVENTHANDER_REGISTER
so we can kill the handler off during detach.
Use AHC_* constants instead of hard coded numbers in a
few more places.
Test PPR option state when deciding to "really" negotiate
when the CAM_NEGOTIATE flag is passed in a CCB.
Make use of core "ahc_pause_and_flushwork" routine in our
timeout handler rather than re-inventing this code.
Cleanup all of our resources (really!) in ahc_platform_free().
We should be all set to become a module now.
Implement the core ahc_detach() routine shared by all of
the FreeBSD front-ends.
aic7xxx_freebsd.h:
Softc storage for our event handler.
Null implementation for the ahc_platform_flushwork() OSM
callback. FreeBSD doesn't need this as XPT callbacks are
safe from all contexts and are done directly in ahc_done().
aic7xxx_inline.h:
Implement new lazy interrupt scheme. To avoid an extra
PCI bus read, we first check our completion queues to
see if any work has completed. If work is available, we
assume that this is the source of the interrupt and skip
reading INTSTAT. Any remaining interrupt status will be
cleared by a second call to the interrupt handler should
the interrupt line still be asserted. This drops the
interrupt handler down to a single PCI bus read in the
common case of I/O completion. This is the same overhead
as in the not so distant past, but the extra sanity of
perforning a PCI read after clearing the command complete
interrupt and before running the completion queue to avoid
missing command complete interrupts added a cycle.
aic7xxx.c:
During initialization, be sure to initialize all scratch
ram locations before they are read to avoid parity errors.
In this case, we use a new function, ahc_unbusy_tcl() to
initialize the scratch ram busy target table.
Replace instances of ahc_index_busy_tcl() used to unbusy
a tcl without looking at the old value with ahc_unbusy_tcl().
Modify ahc_sent_msg so that it can find single byte messages.
ahc_sent_msg is now used to determine if a transfer negotiation
attempt resulted in a bus free.
Be more careful in filtering out only the SCSI interrupts
of interest in ahc_handle_scsiint.
Rearrange interrupt clearing code to ensure that at least
one PCI transaction occurrs after hitting CLRSINT1 and
writting to CLRINT. CLRSINT1 writes take a bit to
take effect, and the re-arrangement provides sufficient
delay to ensure the write to CLRINT is effective. The
old code might report a spurious interrupt on some "fast"
chipsets.
export ahc-update_target_msg_request for use by OSM code.
If a target does not respond to our ATN request, clear
it once we move to a non-message phase. This avoids
sending a MSG_NOOP in some later message out phase.
Use max lun and max target constants instead of
hard-coded values.
Use softc storage built into our device_t under FreeBSD.
Fix a bug in ahc_free() that caused us to delete
resources that were not allocated.
Clean up any tstate/lstate info in ahc_free().
Clear the powerdown state in ahc_reset() so that
registers can be accessed.
Add a preliminary function for pausing the chip and
processing any posted work.
Add a preliminary suspend and resume functions.
aic7xxx.h:
Limit the number of supported luns to 64. We don't
support information unit transfers, so this is the
maximum that makes sense for these chips.
Add a new flag AHC_ALL_INTERRUPTS that forces the
processing of all interrupt state in a single invokation
of ahc_intr(). When the flag is not set, we use the
lazy interrupt handling scheme.
Add data structures to store controller state while
we are suspended.
Use constants instead of hard coded values where appropriate.
Correct some harmless "unsigned/signed" conflicts.
aic7xxx.seq:
Only perform the SCSIBUSL fix on ULTRA2 or newer controllers.
Older controllers seem to be confused by this.
In target mode, ignore PHASEMIS during data phases.
This bit seems to be flakey on U160 controllers acting
in target mode.
aic7xxx_pci.c:
Add support for the 29160C CPCI adapter.
Add definitions for subvendor ID information
available for devices with the "9005" vendor id.
We currently use this information to determine
if a multi-function device doesn't have the second
channel hooked up on a board.
Add rudimentary power mode code so we can put the
controller into the D0 state. In the future this
will be an OSM callback so that in FreeBSD we don't
duplicate functionality provided by the PCI code.
The powerstate code was added after I'd completed
my regression tests on this code.
Only capture "left over BIOS state" if the POWRDN
setting is not set in HCNTRL.
In target mode, don't bother sending incremental
CRC data.
2000-12-20 01:11:37 +00:00
|
|
|
do {
|
2002-08-31 06:41:37 +00:00
|
|
|
if (paused)
|
|
|
|
ahc_unpause(ahc);
|
ahc_eisa.c:
ahc_pci.c:
Add detach support.
Make use of soft allocated on our behalf by newbus.
For PCI devices, disable the mapping type we aren't
using for extra protection from rogue code.
aic7xxx_93cx6.c:
aic7xxx_93cx6.h:
Sync perforce IDs.
aic7xxx_freebsd.c:
Capture the eventhandle returned by EVENTHANDER_REGISTER
so we can kill the handler off during detach.
Use AHC_* constants instead of hard coded numbers in a
few more places.
Test PPR option state when deciding to "really" negotiate
when the CAM_NEGOTIATE flag is passed in a CCB.
Make use of core "ahc_pause_and_flushwork" routine in our
timeout handler rather than re-inventing this code.
Cleanup all of our resources (really!) in ahc_platform_free().
We should be all set to become a module now.
Implement the core ahc_detach() routine shared by all of
the FreeBSD front-ends.
aic7xxx_freebsd.h:
Softc storage for our event handler.
Null implementation for the ahc_platform_flushwork() OSM
callback. FreeBSD doesn't need this as XPT callbacks are
safe from all contexts and are done directly in ahc_done().
aic7xxx_inline.h:
Implement new lazy interrupt scheme. To avoid an extra
PCI bus read, we first check our completion queues to
see if any work has completed. If work is available, we
assume that this is the source of the interrupt and skip
reading INTSTAT. Any remaining interrupt status will be
cleared by a second call to the interrupt handler should
the interrupt line still be asserted. This drops the
interrupt handler down to a single PCI bus read in the
common case of I/O completion. This is the same overhead
as in the not so distant past, but the extra sanity of
perforning a PCI read after clearing the command complete
interrupt and before running the completion queue to avoid
missing command complete interrupts added a cycle.
aic7xxx.c:
During initialization, be sure to initialize all scratch
ram locations before they are read to avoid parity errors.
In this case, we use a new function, ahc_unbusy_tcl() to
initialize the scratch ram busy target table.
Replace instances of ahc_index_busy_tcl() used to unbusy
a tcl without looking at the old value with ahc_unbusy_tcl().
Modify ahc_sent_msg so that it can find single byte messages.
ahc_sent_msg is now used to determine if a transfer negotiation
attempt resulted in a bus free.
Be more careful in filtering out only the SCSI interrupts
of interest in ahc_handle_scsiint.
Rearrange interrupt clearing code to ensure that at least
one PCI transaction occurrs after hitting CLRSINT1 and
writting to CLRINT. CLRSINT1 writes take a bit to
take effect, and the re-arrangement provides sufficient
delay to ensure the write to CLRINT is effective. The
old code might report a spurious interrupt on some "fast"
chipsets.
export ahc-update_target_msg_request for use by OSM code.
If a target does not respond to our ATN request, clear
it once we move to a non-message phase. This avoids
sending a MSG_NOOP in some later message out phase.
Use max lun and max target constants instead of
hard-coded values.
Use softc storage built into our device_t under FreeBSD.
Fix a bug in ahc_free() that caused us to delete
resources that were not allocated.
Clean up any tstate/lstate info in ahc_free().
Clear the powerdown state in ahc_reset() so that
registers can be accessed.
Add a preliminary function for pausing the chip and
processing any posted work.
Add a preliminary suspend and resume functions.
aic7xxx.h:
Limit the number of supported luns to 64. We don't
support information unit transfers, so this is the
maximum that makes sense for these chips.
Add a new flag AHC_ALL_INTERRUPTS that forces the
processing of all interrupt state in a single invokation
of ahc_intr(). When the flag is not set, we use the
lazy interrupt handling scheme.
Add data structures to store controller state while
we are suspended.
Use constants instead of hard coded values where appropriate.
Correct some harmless "unsigned/signed" conflicts.
aic7xxx.seq:
Only perform the SCSIBUSL fix on ULTRA2 or newer controllers.
Older controllers seem to be confused by this.
In target mode, ignore PHASEMIS during data phases.
This bit seems to be flakey on U160 controllers acting
in target mode.
aic7xxx_pci.c:
Add support for the 29160C CPCI adapter.
Add definitions for subvendor ID information
available for devices with the "9005" vendor id.
We currently use this information to determine
if a multi-function device doesn't have the second
channel hooked up on a board.
Add rudimentary power mode code so we can put the
controller into the D0 state. In the future this
will be an OSM callback so that in FreeBSD we don't
duplicate functionality provided by the PCI code.
The powerstate code was added after I'd completed
my regression tests on this code.
Only capture "left over BIOS state" if the POWRDN
setting is not set in HCNTRL.
In target mode, don't bother sending incremental
CRC data.
2000-12-20 01:11:37 +00:00
|
|
|
ahc_intr(ahc);
|
This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
|
|
|
ahc_pause(ahc);
|
2002-08-31 06:41:37 +00:00
|
|
|
paused = TRUE;
|
|
|
|
ahc_outb(ahc, SCSISEQ, ahc_inb(ahc, SCSISEQ) & ~ENSELO);
|
ahc_eisa.c:
ahc_pci.c:
Add detach support.
Make use of soft allocated on our behalf by newbus.
For PCI devices, disable the mapping type we aren't
using for extra protection from rogue code.
aic7xxx_93cx6.c:
aic7xxx_93cx6.h:
Sync perforce IDs.
aic7xxx_freebsd.c:
Capture the eventhandle returned by EVENTHANDER_REGISTER
so we can kill the handler off during detach.
Use AHC_* constants instead of hard coded numbers in a
few more places.
Test PPR option state when deciding to "really" negotiate
when the CAM_NEGOTIATE flag is passed in a CCB.
Make use of core "ahc_pause_and_flushwork" routine in our
timeout handler rather than re-inventing this code.
Cleanup all of our resources (really!) in ahc_platform_free().
We should be all set to become a module now.
Implement the core ahc_detach() routine shared by all of
the FreeBSD front-ends.
aic7xxx_freebsd.h:
Softc storage for our event handler.
Null implementation for the ahc_platform_flushwork() OSM
callback. FreeBSD doesn't need this as XPT callbacks are
safe from all contexts and are done directly in ahc_done().
aic7xxx_inline.h:
Implement new lazy interrupt scheme. To avoid an extra
PCI bus read, we first check our completion queues to
see if any work has completed. If work is available, we
assume that this is the source of the interrupt and skip
reading INTSTAT. Any remaining interrupt status will be
cleared by a second call to the interrupt handler should
the interrupt line still be asserted. This drops the
interrupt handler down to a single PCI bus read in the
common case of I/O completion. This is the same overhead
as in the not so distant past, but the extra sanity of
perforning a PCI read after clearing the command complete
interrupt and before running the completion queue to avoid
missing command complete interrupts added a cycle.
aic7xxx.c:
During initialization, be sure to initialize all scratch
ram locations before they are read to avoid parity errors.
In this case, we use a new function, ahc_unbusy_tcl() to
initialize the scratch ram busy target table.
Replace instances of ahc_index_busy_tcl() used to unbusy
a tcl without looking at the old value with ahc_unbusy_tcl().
Modify ahc_sent_msg so that it can find single byte messages.
ahc_sent_msg is now used to determine if a transfer negotiation
attempt resulted in a bus free.
Be more careful in filtering out only the SCSI interrupts
of interest in ahc_handle_scsiint.
Rearrange interrupt clearing code to ensure that at least
one PCI transaction occurrs after hitting CLRSINT1 and
writting to CLRINT. CLRSINT1 writes take a bit to
take effect, and the re-arrangement provides sufficient
delay to ensure the write to CLRINT is effective. The
old code might report a spurious interrupt on some "fast"
chipsets.
export ahc-update_target_msg_request for use by OSM code.
If a target does not respond to our ATN request, clear
it once we move to a non-message phase. This avoids
sending a MSG_NOOP in some later message out phase.
Use max lun and max target constants instead of
hard-coded values.
Use softc storage built into our device_t under FreeBSD.
Fix a bug in ahc_free() that caused us to delete
resources that were not allocated.
Clean up any tstate/lstate info in ahc_free().
Clear the powerdown state in ahc_reset() so that
registers can be accessed.
Add a preliminary function for pausing the chip and
processing any posted work.
Add a preliminary suspend and resume functions.
aic7xxx.h:
Limit the number of supported luns to 64. We don't
support information unit transfers, so this is the
maximum that makes sense for these chips.
Add a new flag AHC_ALL_INTERRUPTS that forces the
processing of all interrupt state in a single invokation
of ahc_intr(). When the flag is not set, we use the
lazy interrupt handling scheme.
Add data structures to store controller state while
we are suspended.
Use constants instead of hard coded values where appropriate.
Correct some harmless "unsigned/signed" conflicts.
aic7xxx.seq:
Only perform the SCSIBUSL fix on ULTRA2 or newer controllers.
Older controllers seem to be confused by this.
In target mode, ignore PHASEMIS during data phases.
This bit seems to be flakey on U160 controllers acting
in target mode.
aic7xxx_pci.c:
Add support for the 29160C CPCI adapter.
Add definitions for subvendor ID information
available for devices with the "9005" vendor id.
We currently use this information to determine
if a multi-function device doesn't have the second
channel hooked up on a board.
Add rudimentary power mode code so we can put the
controller into the D0 state. In the future this
will be an OSM callback so that in FreeBSD we don't
duplicate functionality provided by the PCI code.
The powerstate code was added after I'd completed
my regression tests on this code.
Only capture "left over BIOS state" if the POWRDN
setting is not set in HCNTRL.
In target mode, don't bother sending incremental
CRC data.
2000-12-20 01:11:37 +00:00
|
|
|
ahc_clear_critical_section(ahc);
|
2003-05-03 23:55:38 +00:00
|
|
|
intstat = ahc_inb(ahc, INTSTAT);
|
2002-08-31 06:41:37 +00:00
|
|
|
} while (--maxloops
|
2003-05-03 23:55:38 +00:00
|
|
|
&& (intstat != 0xFF || (ahc->features & AHC_REMOVABLE) == 0)
|
|
|
|
&& ((intstat & INT_PEND) != 0
|
|
|
|
|| (ahc_inb(ahc, SSTAT0) & (SELDO|SELINGO)) != 0));
|
2001-01-22 21:03:48 +00:00
|
|
|
if (maxloops == 0) {
|
|
|
|
printf("Infinite interrupt loop, INTSTAT = %x",
|
2002-08-31 06:41:37 +00:00
|
|
|
ahc_inb(ahc, INTSTAT));
|
2001-01-22 21:03:48 +00:00
|
|
|
}
|
ahc_eisa.c:
ahc_pci.c:
Add detach support.
Make use of soft allocated on our behalf by newbus.
For PCI devices, disable the mapping type we aren't
using for extra protection from rogue code.
aic7xxx_93cx6.c:
aic7xxx_93cx6.h:
Sync perforce IDs.
aic7xxx_freebsd.c:
Capture the eventhandle returned by EVENTHANDER_REGISTER
so we can kill the handler off during detach.
Use AHC_* constants instead of hard coded numbers in a
few more places.
Test PPR option state when deciding to "really" negotiate
when the CAM_NEGOTIATE flag is passed in a CCB.
Make use of core "ahc_pause_and_flushwork" routine in our
timeout handler rather than re-inventing this code.
Cleanup all of our resources (really!) in ahc_platform_free().
We should be all set to become a module now.
Implement the core ahc_detach() routine shared by all of
the FreeBSD front-ends.
aic7xxx_freebsd.h:
Softc storage for our event handler.
Null implementation for the ahc_platform_flushwork() OSM
callback. FreeBSD doesn't need this as XPT callbacks are
safe from all contexts and are done directly in ahc_done().
aic7xxx_inline.h:
Implement new lazy interrupt scheme. To avoid an extra
PCI bus read, we first check our completion queues to
see if any work has completed. If work is available, we
assume that this is the source of the interrupt and skip
reading INTSTAT. Any remaining interrupt status will be
cleared by a second call to the interrupt handler should
the interrupt line still be asserted. This drops the
interrupt handler down to a single PCI bus read in the
common case of I/O completion. This is the same overhead
as in the not so distant past, but the extra sanity of
perforning a PCI read after clearing the command complete
interrupt and before running the completion queue to avoid
missing command complete interrupts added a cycle.
aic7xxx.c:
During initialization, be sure to initialize all scratch
ram locations before they are read to avoid parity errors.
In this case, we use a new function, ahc_unbusy_tcl() to
initialize the scratch ram busy target table.
Replace instances of ahc_index_busy_tcl() used to unbusy
a tcl without looking at the old value with ahc_unbusy_tcl().
Modify ahc_sent_msg so that it can find single byte messages.
ahc_sent_msg is now used to determine if a transfer negotiation
attempt resulted in a bus free.
Be more careful in filtering out only the SCSI interrupts
of interest in ahc_handle_scsiint.
Rearrange interrupt clearing code to ensure that at least
one PCI transaction occurrs after hitting CLRSINT1 and
writting to CLRINT. CLRSINT1 writes take a bit to
take effect, and the re-arrangement provides sufficient
delay to ensure the write to CLRINT is effective. The
old code might report a spurious interrupt on some "fast"
chipsets.
export ahc-update_target_msg_request for use by OSM code.
If a target does not respond to our ATN request, clear
it once we move to a non-message phase. This avoids
sending a MSG_NOOP in some later message out phase.
Use max lun and max target constants instead of
hard-coded values.
Use softc storage built into our device_t under FreeBSD.
Fix a bug in ahc_free() that caused us to delete
resources that were not allocated.
Clean up any tstate/lstate info in ahc_free().
Clear the powerdown state in ahc_reset() so that
registers can be accessed.
Add a preliminary function for pausing the chip and
processing any posted work.
Add a preliminary suspend and resume functions.
aic7xxx.h:
Limit the number of supported luns to 64. We don't
support information unit transfers, so this is the
maximum that makes sense for these chips.
Add a new flag AHC_ALL_INTERRUPTS that forces the
processing of all interrupt state in a single invokation
of ahc_intr(). When the flag is not set, we use the
lazy interrupt handling scheme.
Add data structures to store controller state while
we are suspended.
Use constants instead of hard coded values where appropriate.
Correct some harmless "unsigned/signed" conflicts.
aic7xxx.seq:
Only perform the SCSIBUSL fix on ULTRA2 or newer controllers.
Older controllers seem to be confused by this.
In target mode, ignore PHASEMIS during data phases.
This bit seems to be flakey on U160 controllers acting
in target mode.
aic7xxx_pci.c:
Add support for the 29160C CPCI adapter.
Add definitions for subvendor ID information
available for devices with the "9005" vendor id.
We currently use this information to determine
if a multi-function device doesn't have the second
channel hooked up on a board.
Add rudimentary power mode code so we can put the
controller into the D0 state. In the future this
will be an OSM callback so that in FreeBSD we don't
duplicate functionality provided by the PCI code.
The powerstate code was added after I'd completed
my regression tests on this code.
Only capture "left over BIOS state" if the POWRDN
setting is not set in HCNTRL.
In target mode, don't bother sending incremental
CRC data.
2000-12-20 01:11:37 +00:00
|
|
|
ahc_platform_flushwork(ahc);
|
|
|
|
ahc->flags &= ~AHC_ALL_INTERRUPTS;
|
|
|
|
}
|
|
|
|
|
|
|
|
int
|
|
|
|
ahc_suspend(struct ahc_softc *ahc)
|
|
|
|
{
|
|
|
|
|
|
|
|
ahc_pause_and_flushwork(ahc);
|
|
|
|
|
2003-05-03 23:55:38 +00:00
|
|
|
if (LIST_FIRST(&ahc->pending_scbs) != NULL) {
|
|
|
|
ahc_unpause(ahc);
|
ahc_eisa.c:
ahc_pci.c:
Add detach support.
Make use of soft allocated on our behalf by newbus.
For PCI devices, disable the mapping type we aren't
using for extra protection from rogue code.
aic7xxx_93cx6.c:
aic7xxx_93cx6.h:
Sync perforce IDs.
aic7xxx_freebsd.c:
Capture the eventhandle returned by EVENTHANDER_REGISTER
so we can kill the handler off during detach.
Use AHC_* constants instead of hard coded numbers in a
few more places.
Test PPR option state when deciding to "really" negotiate
when the CAM_NEGOTIATE flag is passed in a CCB.
Make use of core "ahc_pause_and_flushwork" routine in our
timeout handler rather than re-inventing this code.
Cleanup all of our resources (really!) in ahc_platform_free().
We should be all set to become a module now.
Implement the core ahc_detach() routine shared by all of
the FreeBSD front-ends.
aic7xxx_freebsd.h:
Softc storage for our event handler.
Null implementation for the ahc_platform_flushwork() OSM
callback. FreeBSD doesn't need this as XPT callbacks are
safe from all contexts and are done directly in ahc_done().
aic7xxx_inline.h:
Implement new lazy interrupt scheme. To avoid an extra
PCI bus read, we first check our completion queues to
see if any work has completed. If work is available, we
assume that this is the source of the interrupt and skip
reading INTSTAT. Any remaining interrupt status will be
cleared by a second call to the interrupt handler should
the interrupt line still be asserted. This drops the
interrupt handler down to a single PCI bus read in the
common case of I/O completion. This is the same overhead
as in the not so distant past, but the extra sanity of
perforning a PCI read after clearing the command complete
interrupt and before running the completion queue to avoid
missing command complete interrupts added a cycle.
aic7xxx.c:
During initialization, be sure to initialize all scratch
ram locations before they are read to avoid parity errors.
In this case, we use a new function, ahc_unbusy_tcl() to
initialize the scratch ram busy target table.
Replace instances of ahc_index_busy_tcl() used to unbusy
a tcl without looking at the old value with ahc_unbusy_tcl().
Modify ahc_sent_msg so that it can find single byte messages.
ahc_sent_msg is now used to determine if a transfer negotiation
attempt resulted in a bus free.
Be more careful in filtering out only the SCSI interrupts
of interest in ahc_handle_scsiint.
Rearrange interrupt clearing code to ensure that at least
one PCI transaction occurrs after hitting CLRSINT1 and
writting to CLRINT. CLRSINT1 writes take a bit to
take effect, and the re-arrangement provides sufficient
delay to ensure the write to CLRINT is effective. The
old code might report a spurious interrupt on some "fast"
chipsets.
export ahc-update_target_msg_request for use by OSM code.
If a target does not respond to our ATN request, clear
it once we move to a non-message phase. This avoids
sending a MSG_NOOP in some later message out phase.
Use max lun and max target constants instead of
hard-coded values.
Use softc storage built into our device_t under FreeBSD.
Fix a bug in ahc_free() that caused us to delete
resources that were not allocated.
Clean up any tstate/lstate info in ahc_free().
Clear the powerdown state in ahc_reset() so that
registers can be accessed.
Add a preliminary function for pausing the chip and
processing any posted work.
Add a preliminary suspend and resume functions.
aic7xxx.h:
Limit the number of supported luns to 64. We don't
support information unit transfers, so this is the
maximum that makes sense for these chips.
Add a new flag AHC_ALL_INTERRUPTS that forces the
processing of all interrupt state in a single invokation
of ahc_intr(). When the flag is not set, we use the
lazy interrupt handling scheme.
Add data structures to store controller state while
we are suspended.
Use constants instead of hard coded values where appropriate.
Correct some harmless "unsigned/signed" conflicts.
aic7xxx.seq:
Only perform the SCSIBUSL fix on ULTRA2 or newer controllers.
Older controllers seem to be confused by this.
In target mode, ignore PHASEMIS during data phases.
This bit seems to be flakey on U160 controllers acting
in target mode.
aic7xxx_pci.c:
Add support for the 29160C CPCI adapter.
Add definitions for subvendor ID information
available for devices with the "9005" vendor id.
We currently use this information to determine
if a multi-function device doesn't have the second
channel hooked up on a board.
Add rudimentary power mode code so we can put the
controller into the D0 state. In the future this
will be an OSM callback so that in FreeBSD we don't
duplicate functionality provided by the PCI code.
The powerstate code was added after I'd completed
my regression tests on this code.
Only capture "left over BIOS state" if the POWRDN
setting is not set in HCNTRL.
In target mode, don't bother sending incremental
CRC data.
2000-12-20 01:11:37 +00:00
|
|
|
return (EBUSY);
|
2003-05-03 23:55:38 +00:00
|
|
|
}
|
ahc_eisa.c:
ahc_pci.c:
Add detach support.
Make use of soft allocated on our behalf by newbus.
For PCI devices, disable the mapping type we aren't
using for extra protection from rogue code.
aic7xxx_93cx6.c:
aic7xxx_93cx6.h:
Sync perforce IDs.
aic7xxx_freebsd.c:
Capture the eventhandle returned by EVENTHANDER_REGISTER
so we can kill the handler off during detach.
Use AHC_* constants instead of hard coded numbers in a
few more places.
Test PPR option state when deciding to "really" negotiate
when the CAM_NEGOTIATE flag is passed in a CCB.
Make use of core "ahc_pause_and_flushwork" routine in our
timeout handler rather than re-inventing this code.
Cleanup all of our resources (really!) in ahc_platform_free().
We should be all set to become a module now.
Implement the core ahc_detach() routine shared by all of
the FreeBSD front-ends.
aic7xxx_freebsd.h:
Softc storage for our event handler.
Null implementation for the ahc_platform_flushwork() OSM
callback. FreeBSD doesn't need this as XPT callbacks are
safe from all contexts and are done directly in ahc_done().
aic7xxx_inline.h:
Implement new lazy interrupt scheme. To avoid an extra
PCI bus read, we first check our completion queues to
see if any work has completed. If work is available, we
assume that this is the source of the interrupt and skip
reading INTSTAT. Any remaining interrupt status will be
cleared by a second call to the interrupt handler should
the interrupt line still be asserted. This drops the
interrupt handler down to a single PCI bus read in the
common case of I/O completion. This is the same overhead
as in the not so distant past, but the extra sanity of
perforning a PCI read after clearing the command complete
interrupt and before running the completion queue to avoid
missing command complete interrupts added a cycle.
aic7xxx.c:
During initialization, be sure to initialize all scratch
ram locations before they are read to avoid parity errors.
In this case, we use a new function, ahc_unbusy_tcl() to
initialize the scratch ram busy target table.
Replace instances of ahc_index_busy_tcl() used to unbusy
a tcl without looking at the old value with ahc_unbusy_tcl().
Modify ahc_sent_msg so that it can find single byte messages.
ahc_sent_msg is now used to determine if a transfer negotiation
attempt resulted in a bus free.
Be more careful in filtering out only the SCSI interrupts
of interest in ahc_handle_scsiint.
Rearrange interrupt clearing code to ensure that at least
one PCI transaction occurrs after hitting CLRSINT1 and
writting to CLRINT. CLRSINT1 writes take a bit to
take effect, and the re-arrangement provides sufficient
delay to ensure the write to CLRINT is effective. The
old code might report a spurious interrupt on some "fast"
chipsets.
export ahc-update_target_msg_request for use by OSM code.
If a target does not respond to our ATN request, clear
it once we move to a non-message phase. This avoids
sending a MSG_NOOP in some later message out phase.
Use max lun and max target constants instead of
hard-coded values.
Use softc storage built into our device_t under FreeBSD.
Fix a bug in ahc_free() that caused us to delete
resources that were not allocated.
Clean up any tstate/lstate info in ahc_free().
Clear the powerdown state in ahc_reset() so that
registers can be accessed.
Add a preliminary function for pausing the chip and
processing any posted work.
Add a preliminary suspend and resume functions.
aic7xxx.h:
Limit the number of supported luns to 64. We don't
support information unit transfers, so this is the
maximum that makes sense for these chips.
Add a new flag AHC_ALL_INTERRUPTS that forces the
processing of all interrupt state in a single invokation
of ahc_intr(). When the flag is not set, we use the
lazy interrupt handling scheme.
Add data structures to store controller state while
we are suspended.
Use constants instead of hard coded values where appropriate.
Correct some harmless "unsigned/signed" conflicts.
aic7xxx.seq:
Only perform the SCSIBUSL fix on ULTRA2 or newer controllers.
Older controllers seem to be confused by this.
In target mode, ignore PHASEMIS during data phases.
This bit seems to be flakey on U160 controllers acting
in target mode.
aic7xxx_pci.c:
Add support for the 29160C CPCI adapter.
Add definitions for subvendor ID information
available for devices with the "9005" vendor id.
We currently use this information to determine
if a multi-function device doesn't have the second
channel hooked up on a board.
Add rudimentary power mode code so we can put the
controller into the D0 state. In the future this
will be an OSM callback so that in FreeBSD we don't
duplicate functionality provided by the PCI code.
The powerstate code was added after I'd completed
my regression tests on this code.
Only capture "left over BIOS state" if the POWRDN
setting is not set in HCNTRL.
In target mode, don't bother sending incremental
CRC data.
2000-12-20 01:11:37 +00:00
|
|
|
|
|
|
|
#if AHC_TARGET_MODE
|
|
|
|
/*
|
|
|
|
* XXX What about ATIOs that have not yet been serviced?
|
|
|
|
* Perhaps we should just refuse to be suspended if we
|
|
|
|
* are acting in a target role.
|
|
|
|
*/
|
2003-05-03 23:55:38 +00:00
|
|
|
if (ahc->pending_device != NULL) {
|
|
|
|
ahc_unpause(ahc);
|
ahc_eisa.c:
ahc_pci.c:
Add detach support.
Make use of soft allocated on our behalf by newbus.
For PCI devices, disable the mapping type we aren't
using for extra protection from rogue code.
aic7xxx_93cx6.c:
aic7xxx_93cx6.h:
Sync perforce IDs.
aic7xxx_freebsd.c:
Capture the eventhandle returned by EVENTHANDER_REGISTER
so we can kill the handler off during detach.
Use AHC_* constants instead of hard coded numbers in a
few more places.
Test PPR option state when deciding to "really" negotiate
when the CAM_NEGOTIATE flag is passed in a CCB.
Make use of core "ahc_pause_and_flushwork" routine in our
timeout handler rather than re-inventing this code.
Cleanup all of our resources (really!) in ahc_platform_free().
We should be all set to become a module now.
Implement the core ahc_detach() routine shared by all of
the FreeBSD front-ends.
aic7xxx_freebsd.h:
Softc storage for our event handler.
Null implementation for the ahc_platform_flushwork() OSM
callback. FreeBSD doesn't need this as XPT callbacks are
safe from all contexts and are done directly in ahc_done().
aic7xxx_inline.h:
Implement new lazy interrupt scheme. To avoid an extra
PCI bus read, we first check our completion queues to
see if any work has completed. If work is available, we
assume that this is the source of the interrupt and skip
reading INTSTAT. Any remaining interrupt status will be
cleared by a second call to the interrupt handler should
the interrupt line still be asserted. This drops the
interrupt handler down to a single PCI bus read in the
common case of I/O completion. This is the same overhead
as in the not so distant past, but the extra sanity of
perforning a PCI read after clearing the command complete
interrupt and before running the completion queue to avoid
missing command complete interrupts added a cycle.
aic7xxx.c:
During initialization, be sure to initialize all scratch
ram locations before they are read to avoid parity errors.
In this case, we use a new function, ahc_unbusy_tcl() to
initialize the scratch ram busy target table.
Replace instances of ahc_index_busy_tcl() used to unbusy
a tcl without looking at the old value with ahc_unbusy_tcl().
Modify ahc_sent_msg so that it can find single byte messages.
ahc_sent_msg is now used to determine if a transfer negotiation
attempt resulted in a bus free.
Be more careful in filtering out only the SCSI interrupts
of interest in ahc_handle_scsiint.
Rearrange interrupt clearing code to ensure that at least
one PCI transaction occurrs after hitting CLRSINT1 and
writting to CLRINT. CLRSINT1 writes take a bit to
take effect, and the re-arrangement provides sufficient
delay to ensure the write to CLRINT is effective. The
old code might report a spurious interrupt on some "fast"
chipsets.
export ahc-update_target_msg_request for use by OSM code.
If a target does not respond to our ATN request, clear
it once we move to a non-message phase. This avoids
sending a MSG_NOOP in some later message out phase.
Use max lun and max target constants instead of
hard-coded values.
Use softc storage built into our device_t under FreeBSD.
Fix a bug in ahc_free() that caused us to delete
resources that were not allocated.
Clean up any tstate/lstate info in ahc_free().
Clear the powerdown state in ahc_reset() so that
registers can be accessed.
Add a preliminary function for pausing the chip and
processing any posted work.
Add a preliminary suspend and resume functions.
aic7xxx.h:
Limit the number of supported luns to 64. We don't
support information unit transfers, so this is the
maximum that makes sense for these chips.
Add a new flag AHC_ALL_INTERRUPTS that forces the
processing of all interrupt state in a single invokation
of ahc_intr(). When the flag is not set, we use the
lazy interrupt handling scheme.
Add data structures to store controller state while
we are suspended.
Use constants instead of hard coded values where appropriate.
Correct some harmless "unsigned/signed" conflicts.
aic7xxx.seq:
Only perform the SCSIBUSL fix on ULTRA2 or newer controllers.
Older controllers seem to be confused by this.
In target mode, ignore PHASEMIS during data phases.
This bit seems to be flakey on U160 controllers acting
in target mode.
aic7xxx_pci.c:
Add support for the 29160C CPCI adapter.
Add definitions for subvendor ID information
available for devices with the "9005" vendor id.
We currently use this information to determine
if a multi-function device doesn't have the second
channel hooked up on a board.
Add rudimentary power mode code so we can put the
controller into the D0 state. In the future this
will be an OSM callback so that in FreeBSD we don't
duplicate functionality provided by the PCI code.
The powerstate code was added after I'd completed
my regression tests on this code.
Only capture "left over BIOS state" if the POWRDN
setting is not set in HCNTRL.
In target mode, don't bother sending incremental
CRC data.
2000-12-20 01:11:37 +00:00
|
|
|
return (EBUSY);
|
|
|
|
}
|
2003-05-03 23:55:38 +00:00
|
|
|
#endif
|
ahc_eisa.c:
ahc_pci.c:
Add detach support.
Make use of soft allocated on our behalf by newbus.
For PCI devices, disable the mapping type we aren't
using for extra protection from rogue code.
aic7xxx_93cx6.c:
aic7xxx_93cx6.h:
Sync perforce IDs.
aic7xxx_freebsd.c:
Capture the eventhandle returned by EVENTHANDER_REGISTER
so we can kill the handler off during detach.
Use AHC_* constants instead of hard coded numbers in a
few more places.
Test PPR option state when deciding to "really" negotiate
when the CAM_NEGOTIATE flag is passed in a CCB.
Make use of core "ahc_pause_and_flushwork" routine in our
timeout handler rather than re-inventing this code.
Cleanup all of our resources (really!) in ahc_platform_free().
We should be all set to become a module now.
Implement the core ahc_detach() routine shared by all of
the FreeBSD front-ends.
aic7xxx_freebsd.h:
Softc storage for our event handler.
Null implementation for the ahc_platform_flushwork() OSM
callback. FreeBSD doesn't need this as XPT callbacks are
safe from all contexts and are done directly in ahc_done().
aic7xxx_inline.h:
Implement new lazy interrupt scheme. To avoid an extra
PCI bus read, we first check our completion queues to
see if any work has completed. If work is available, we
assume that this is the source of the interrupt and skip
reading INTSTAT. Any remaining interrupt status will be
cleared by a second call to the interrupt handler should
the interrupt line still be asserted. This drops the
interrupt handler down to a single PCI bus read in the
common case of I/O completion. This is the same overhead
as in the not so distant past, but the extra sanity of
perforning a PCI read after clearing the command complete
interrupt and before running the completion queue to avoid
missing command complete interrupts added a cycle.
aic7xxx.c:
During initialization, be sure to initialize all scratch
ram locations before they are read to avoid parity errors.
In this case, we use a new function, ahc_unbusy_tcl() to
initialize the scratch ram busy target table.
Replace instances of ahc_index_busy_tcl() used to unbusy
a tcl without looking at the old value with ahc_unbusy_tcl().
Modify ahc_sent_msg so that it can find single byte messages.
ahc_sent_msg is now used to determine if a transfer negotiation
attempt resulted in a bus free.
Be more careful in filtering out only the SCSI interrupts
of interest in ahc_handle_scsiint.
Rearrange interrupt clearing code to ensure that at least
one PCI transaction occurrs after hitting CLRSINT1 and
writting to CLRINT. CLRSINT1 writes take a bit to
take effect, and the re-arrangement provides sufficient
delay to ensure the write to CLRINT is effective. The
old code might report a spurious interrupt on some "fast"
chipsets.
export ahc-update_target_msg_request for use by OSM code.
If a target does not respond to our ATN request, clear
it once we move to a non-message phase. This avoids
sending a MSG_NOOP in some later message out phase.
Use max lun and max target constants instead of
hard-coded values.
Use softc storage built into our device_t under FreeBSD.
Fix a bug in ahc_free() that caused us to delete
resources that were not allocated.
Clean up any tstate/lstate info in ahc_free().
Clear the powerdown state in ahc_reset() so that
registers can be accessed.
Add a preliminary function for pausing the chip and
processing any posted work.
Add a preliminary suspend and resume functions.
aic7xxx.h:
Limit the number of supported luns to 64. We don't
support information unit transfers, so this is the
maximum that makes sense for these chips.
Add a new flag AHC_ALL_INTERRUPTS that forces the
processing of all interrupt state in a single invokation
of ahc_intr(). When the flag is not set, we use the
lazy interrupt handling scheme.
Add data structures to store controller state while
we are suspended.
Use constants instead of hard coded values where appropriate.
Correct some harmless "unsigned/signed" conflicts.
aic7xxx.seq:
Only perform the SCSIBUSL fix on ULTRA2 or newer controllers.
Older controllers seem to be confused by this.
In target mode, ignore PHASEMIS during data phases.
This bit seems to be flakey on U160 controllers acting
in target mode.
aic7xxx_pci.c:
Add support for the 29160C CPCI adapter.
Add definitions for subvendor ID information
available for devices with the "9005" vendor id.
We currently use this information to determine
if a multi-function device doesn't have the second
channel hooked up on a board.
Add rudimentary power mode code so we can put the
controller into the D0 state. In the future this
will be an OSM callback so that in FreeBSD we don't
duplicate functionality provided by the PCI code.
The powerstate code was added after I'd completed
my regression tests on this code.
Only capture "left over BIOS state" if the POWRDN
setting is not set in HCNTRL.
In target mode, don't bother sending incremental
CRC data.
2000-12-20 01:11:37 +00:00
|
|
|
ahc_shutdown(ahc);
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
int
|
|
|
|
ahc_resume(struct ahc_softc *ahc)
|
|
|
|
{
|
|
|
|
|
|
|
|
ahc_reset(ahc);
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/************************** Busy Target Table *********************************/
|
|
|
|
/*
|
|
|
|
* Return the untagged transaction id for a given target/channel lun.
|
|
|
|
* Optionally, clear the entry.
|
|
|
|
*/
|
|
|
|
u_int
|
ahc_eisa.c:
ahc_pci.c:
Add detach support.
Make use of soft allocated on our behalf by newbus.
For PCI devices, disable the mapping type we aren't
using for extra protection from rogue code.
aic7xxx_93cx6.c:
aic7xxx_93cx6.h:
Sync perforce IDs.
aic7xxx_freebsd.c:
Capture the eventhandle returned by EVENTHANDER_REGISTER
so we can kill the handler off during detach.
Use AHC_* constants instead of hard coded numbers in a
few more places.
Test PPR option state when deciding to "really" negotiate
when the CAM_NEGOTIATE flag is passed in a CCB.
Make use of core "ahc_pause_and_flushwork" routine in our
timeout handler rather than re-inventing this code.
Cleanup all of our resources (really!) in ahc_platform_free().
We should be all set to become a module now.
Implement the core ahc_detach() routine shared by all of
the FreeBSD front-ends.
aic7xxx_freebsd.h:
Softc storage for our event handler.
Null implementation for the ahc_platform_flushwork() OSM
callback. FreeBSD doesn't need this as XPT callbacks are
safe from all contexts and are done directly in ahc_done().
aic7xxx_inline.h:
Implement new lazy interrupt scheme. To avoid an extra
PCI bus read, we first check our completion queues to
see if any work has completed. If work is available, we
assume that this is the source of the interrupt and skip
reading INTSTAT. Any remaining interrupt status will be
cleared by a second call to the interrupt handler should
the interrupt line still be asserted. This drops the
interrupt handler down to a single PCI bus read in the
common case of I/O completion. This is the same overhead
as in the not so distant past, but the extra sanity of
perforning a PCI read after clearing the command complete
interrupt and before running the completion queue to avoid
missing command complete interrupts added a cycle.
aic7xxx.c:
During initialization, be sure to initialize all scratch
ram locations before they are read to avoid parity errors.
In this case, we use a new function, ahc_unbusy_tcl() to
initialize the scratch ram busy target table.
Replace instances of ahc_index_busy_tcl() used to unbusy
a tcl without looking at the old value with ahc_unbusy_tcl().
Modify ahc_sent_msg so that it can find single byte messages.
ahc_sent_msg is now used to determine if a transfer negotiation
attempt resulted in a bus free.
Be more careful in filtering out only the SCSI interrupts
of interest in ahc_handle_scsiint.
Rearrange interrupt clearing code to ensure that at least
one PCI transaction occurrs after hitting CLRSINT1 and
writting to CLRINT. CLRSINT1 writes take a bit to
take effect, and the re-arrangement provides sufficient
delay to ensure the write to CLRINT is effective. The
old code might report a spurious interrupt on some "fast"
chipsets.
export ahc-update_target_msg_request for use by OSM code.
If a target does not respond to our ATN request, clear
it once we move to a non-message phase. This avoids
sending a MSG_NOOP in some later message out phase.
Use max lun and max target constants instead of
hard-coded values.
Use softc storage built into our device_t under FreeBSD.
Fix a bug in ahc_free() that caused us to delete
resources that were not allocated.
Clean up any tstate/lstate info in ahc_free().
Clear the powerdown state in ahc_reset() so that
registers can be accessed.
Add a preliminary function for pausing the chip and
processing any posted work.
Add a preliminary suspend and resume functions.
aic7xxx.h:
Limit the number of supported luns to 64. We don't
support information unit transfers, so this is the
maximum that makes sense for these chips.
Add a new flag AHC_ALL_INTERRUPTS that forces the
processing of all interrupt state in a single invokation
of ahc_intr(). When the flag is not set, we use the
lazy interrupt handling scheme.
Add data structures to store controller state while
we are suspended.
Use constants instead of hard coded values where appropriate.
Correct some harmless "unsigned/signed" conflicts.
aic7xxx.seq:
Only perform the SCSIBUSL fix on ULTRA2 or newer controllers.
Older controllers seem to be confused by this.
In target mode, ignore PHASEMIS during data phases.
This bit seems to be flakey on U160 controllers acting
in target mode.
aic7xxx_pci.c:
Add support for the 29160C CPCI adapter.
Add definitions for subvendor ID information
available for devices with the "9005" vendor id.
We currently use this information to determine
if a multi-function device doesn't have the second
channel hooked up on a board.
Add rudimentary power mode code so we can put the
controller into the D0 state. In the future this
will be an OSM callback so that in FreeBSD we don't
duplicate functionality provided by the PCI code.
The powerstate code was added after I'd completed
my regression tests on this code.
Only capture "left over BIOS state" if the POWRDN
setting is not set in HCNTRL.
In target mode, don't bother sending incremental
CRC data.
2000-12-20 01:11:37 +00:00
|
|
|
ahc_index_busy_tcl(struct ahc_softc *ahc, u_int tcl)
|
2000-09-16 20:02:28 +00:00
|
|
|
{
|
|
|
|
u_int scbid;
|
|
|
|
u_int target_offset;
|
|
|
|
|
2001-01-22 21:03:48 +00:00
|
|
|
if ((ahc->flags & AHC_SCB_BTT) != 0) {
|
2000-09-16 20:02:28 +00:00
|
|
|
u_int saved_scbptr;
|
|
|
|
|
|
|
|
saved_scbptr = ahc_inb(ahc, SCBPTR);
|
|
|
|
ahc_outb(ahc, SCBPTR, TCL_LUN(tcl));
|
|
|
|
scbid = ahc_inb(ahc, SCB_64_BTT + TCL_TARGET_OFFSET(tcl));
|
|
|
|
ahc_outb(ahc, SCBPTR, saved_scbptr);
|
|
|
|
} else {
|
|
|
|
target_offset = TCL_TARGET_OFFSET(tcl);
|
|
|
|
scbid = ahc_inb(ahc, BUSY_TARGETS + target_offset);
|
|
|
|
}
|
1998-12-15 08:22:42 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
return (scbid);
|
|
|
|
}
|
1998-09-15 07:24:17 +00:00
|
|
|
|
ahc_eisa.c:
ahc_pci.c:
Add detach support.
Make use of soft allocated on our behalf by newbus.
For PCI devices, disable the mapping type we aren't
using for extra protection from rogue code.
aic7xxx_93cx6.c:
aic7xxx_93cx6.h:
Sync perforce IDs.
aic7xxx_freebsd.c:
Capture the eventhandle returned by EVENTHANDER_REGISTER
so we can kill the handler off during detach.
Use AHC_* constants instead of hard coded numbers in a
few more places.
Test PPR option state when deciding to "really" negotiate
when the CAM_NEGOTIATE flag is passed in a CCB.
Make use of core "ahc_pause_and_flushwork" routine in our
timeout handler rather than re-inventing this code.
Cleanup all of our resources (really!) in ahc_platform_free().
We should be all set to become a module now.
Implement the core ahc_detach() routine shared by all of
the FreeBSD front-ends.
aic7xxx_freebsd.h:
Softc storage for our event handler.
Null implementation for the ahc_platform_flushwork() OSM
callback. FreeBSD doesn't need this as XPT callbacks are
safe from all contexts and are done directly in ahc_done().
aic7xxx_inline.h:
Implement new lazy interrupt scheme. To avoid an extra
PCI bus read, we first check our completion queues to
see if any work has completed. If work is available, we
assume that this is the source of the interrupt and skip
reading INTSTAT. Any remaining interrupt status will be
cleared by a second call to the interrupt handler should
the interrupt line still be asserted. This drops the
interrupt handler down to a single PCI bus read in the
common case of I/O completion. This is the same overhead
as in the not so distant past, but the extra sanity of
perforning a PCI read after clearing the command complete
interrupt and before running the completion queue to avoid
missing command complete interrupts added a cycle.
aic7xxx.c:
During initialization, be sure to initialize all scratch
ram locations before they are read to avoid parity errors.
In this case, we use a new function, ahc_unbusy_tcl() to
initialize the scratch ram busy target table.
Replace instances of ahc_index_busy_tcl() used to unbusy
a tcl without looking at the old value with ahc_unbusy_tcl().
Modify ahc_sent_msg so that it can find single byte messages.
ahc_sent_msg is now used to determine if a transfer negotiation
attempt resulted in a bus free.
Be more careful in filtering out only the SCSI interrupts
of interest in ahc_handle_scsiint.
Rearrange interrupt clearing code to ensure that at least
one PCI transaction occurrs after hitting CLRSINT1 and
writting to CLRINT. CLRSINT1 writes take a bit to
take effect, and the re-arrangement provides sufficient
delay to ensure the write to CLRINT is effective. The
old code might report a spurious interrupt on some "fast"
chipsets.
export ahc-update_target_msg_request for use by OSM code.
If a target does not respond to our ATN request, clear
it once we move to a non-message phase. This avoids
sending a MSG_NOOP in some later message out phase.
Use max lun and max target constants instead of
hard-coded values.
Use softc storage built into our device_t under FreeBSD.
Fix a bug in ahc_free() that caused us to delete
resources that were not allocated.
Clean up any tstate/lstate info in ahc_free().
Clear the powerdown state in ahc_reset() so that
registers can be accessed.
Add a preliminary function for pausing the chip and
processing any posted work.
Add a preliminary suspend and resume functions.
aic7xxx.h:
Limit the number of supported luns to 64. We don't
support information unit transfers, so this is the
maximum that makes sense for these chips.
Add a new flag AHC_ALL_INTERRUPTS that forces the
processing of all interrupt state in a single invokation
of ahc_intr(). When the flag is not set, we use the
lazy interrupt handling scheme.
Add data structures to store controller state while
we are suspended.
Use constants instead of hard coded values where appropriate.
Correct some harmless "unsigned/signed" conflicts.
aic7xxx.seq:
Only perform the SCSIBUSL fix on ULTRA2 or newer controllers.
Older controllers seem to be confused by this.
In target mode, ignore PHASEMIS during data phases.
This bit seems to be flakey on U160 controllers acting
in target mode.
aic7xxx_pci.c:
Add support for the 29160C CPCI adapter.
Add definitions for subvendor ID information
available for devices with the "9005" vendor id.
We currently use this information to determine
if a multi-function device doesn't have the second
channel hooked up on a board.
Add rudimentary power mode code so we can put the
controller into the D0 state. In the future this
will be an OSM callback so that in FreeBSD we don't
duplicate functionality provided by the PCI code.
The powerstate code was added after I'd completed
my regression tests on this code.
Only capture "left over BIOS state" if the POWRDN
setting is not set in HCNTRL.
In target mode, don't bother sending incremental
CRC data.
2000-12-20 01:11:37 +00:00
|
|
|
void
|
|
|
|
ahc_unbusy_tcl(struct ahc_softc *ahc, u_int tcl)
|
|
|
|
{
|
|
|
|
u_int target_offset;
|
|
|
|
|
2001-01-22 21:03:48 +00:00
|
|
|
if ((ahc->flags & AHC_SCB_BTT) != 0) {
|
ahc_eisa.c:
ahc_pci.c:
Add detach support.
Make use of soft allocated on our behalf by newbus.
For PCI devices, disable the mapping type we aren't
using for extra protection from rogue code.
aic7xxx_93cx6.c:
aic7xxx_93cx6.h:
Sync perforce IDs.
aic7xxx_freebsd.c:
Capture the eventhandle returned by EVENTHANDER_REGISTER
so we can kill the handler off during detach.
Use AHC_* constants instead of hard coded numbers in a
few more places.
Test PPR option state when deciding to "really" negotiate
when the CAM_NEGOTIATE flag is passed in a CCB.
Make use of core "ahc_pause_and_flushwork" routine in our
timeout handler rather than re-inventing this code.
Cleanup all of our resources (really!) in ahc_platform_free().
We should be all set to become a module now.
Implement the core ahc_detach() routine shared by all of
the FreeBSD front-ends.
aic7xxx_freebsd.h:
Softc storage for our event handler.
Null implementation for the ahc_platform_flushwork() OSM
callback. FreeBSD doesn't need this as XPT callbacks are
safe from all contexts and are done directly in ahc_done().
aic7xxx_inline.h:
Implement new lazy interrupt scheme. To avoid an extra
PCI bus read, we first check our completion queues to
see if any work has completed. If work is available, we
assume that this is the source of the interrupt and skip
reading INTSTAT. Any remaining interrupt status will be
cleared by a second call to the interrupt handler should
the interrupt line still be asserted. This drops the
interrupt handler down to a single PCI bus read in the
common case of I/O completion. This is the same overhead
as in the not so distant past, but the extra sanity of
perforning a PCI read after clearing the command complete
interrupt and before running the completion queue to avoid
missing command complete interrupts added a cycle.
aic7xxx.c:
During initialization, be sure to initialize all scratch
ram locations before they are read to avoid parity errors.
In this case, we use a new function, ahc_unbusy_tcl() to
initialize the scratch ram busy target table.
Replace instances of ahc_index_busy_tcl() used to unbusy
a tcl without looking at the old value with ahc_unbusy_tcl().
Modify ahc_sent_msg so that it can find single byte messages.
ahc_sent_msg is now used to determine if a transfer negotiation
attempt resulted in a bus free.
Be more careful in filtering out only the SCSI interrupts
of interest in ahc_handle_scsiint.
Rearrange interrupt clearing code to ensure that at least
one PCI transaction occurrs after hitting CLRSINT1 and
writting to CLRINT. CLRSINT1 writes take a bit to
take effect, and the re-arrangement provides sufficient
delay to ensure the write to CLRINT is effective. The
old code might report a spurious interrupt on some "fast"
chipsets.
export ahc-update_target_msg_request for use by OSM code.
If a target does not respond to our ATN request, clear
it once we move to a non-message phase. This avoids
sending a MSG_NOOP in some later message out phase.
Use max lun and max target constants instead of
hard-coded values.
Use softc storage built into our device_t under FreeBSD.
Fix a bug in ahc_free() that caused us to delete
resources that were not allocated.
Clean up any tstate/lstate info in ahc_free().
Clear the powerdown state in ahc_reset() so that
registers can be accessed.
Add a preliminary function for pausing the chip and
processing any posted work.
Add a preliminary suspend and resume functions.
aic7xxx.h:
Limit the number of supported luns to 64. We don't
support information unit transfers, so this is the
maximum that makes sense for these chips.
Add a new flag AHC_ALL_INTERRUPTS that forces the
processing of all interrupt state in a single invokation
of ahc_intr(). When the flag is not set, we use the
lazy interrupt handling scheme.
Add data structures to store controller state while
we are suspended.
Use constants instead of hard coded values where appropriate.
Correct some harmless "unsigned/signed" conflicts.
aic7xxx.seq:
Only perform the SCSIBUSL fix on ULTRA2 or newer controllers.
Older controllers seem to be confused by this.
In target mode, ignore PHASEMIS during data phases.
This bit seems to be flakey on U160 controllers acting
in target mode.
aic7xxx_pci.c:
Add support for the 29160C CPCI adapter.
Add definitions for subvendor ID information
available for devices with the "9005" vendor id.
We currently use this information to determine
if a multi-function device doesn't have the second
channel hooked up on a board.
Add rudimentary power mode code so we can put the
controller into the D0 state. In the future this
will be an OSM callback so that in FreeBSD we don't
duplicate functionality provided by the PCI code.
The powerstate code was added after I'd completed
my regression tests on this code.
Only capture "left over BIOS state" if the POWRDN
setting is not set in HCNTRL.
In target mode, don't bother sending incremental
CRC data.
2000-12-20 01:11:37 +00:00
|
|
|
u_int saved_scbptr;
|
|
|
|
|
|
|
|
saved_scbptr = ahc_inb(ahc, SCBPTR);
|
|
|
|
ahc_outb(ahc, SCBPTR, TCL_LUN(tcl));
|
|
|
|
ahc_outb(ahc, SCB_64_BTT+TCL_TARGET_OFFSET(tcl), SCB_LIST_NULL);
|
|
|
|
ahc_outb(ahc, SCBPTR, saved_scbptr);
|
|
|
|
} else {
|
|
|
|
target_offset = TCL_TARGET_OFFSET(tcl);
|
|
|
|
ahc_outb(ahc, BUSY_TARGETS + target_offset, SCB_LIST_NULL);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
void
|
|
|
|
ahc_busy_tcl(struct ahc_softc *ahc, u_int tcl, u_int scbid)
|
|
|
|
{
|
|
|
|
u_int target_offset;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2001-01-22 21:03:48 +00:00
|
|
|
if ((ahc->flags & AHC_SCB_BTT) != 0) {
|
2000-09-16 20:02:28 +00:00
|
|
|
u_int saved_scbptr;
|
|
|
|
|
|
|
|
saved_scbptr = ahc_inb(ahc, SCBPTR);
|
|
|
|
ahc_outb(ahc, SCBPTR, TCL_LUN(tcl));
|
|
|
|
ahc_outb(ahc, SCB_64_BTT + TCL_TARGET_OFFSET(tcl), scbid);
|
|
|
|
ahc_outb(ahc, SCBPTR, saved_scbptr);
|
|
|
|
} else {
|
|
|
|
target_offset = TCL_TARGET_OFFSET(tcl);
|
|
|
|
ahc_outb(ahc, BUSY_TARGETS + target_offset, scbid);
|
|
|
|
}
|
|
|
|
}
|
1998-09-20 05:06:10 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/************************** SCB and SCB queue management **********************/
|
|
|
|
int
|
|
|
|
ahc_match_scb(struct ahc_softc *ahc, struct scb *scb, int target,
|
|
|
|
char channel, int lun, u_int tag, role_t role)
|
|
|
|
{
|
|
|
|
int targ = SCB_GET_TARGET(ahc, scb);
|
|
|
|
char chan = SCB_GET_CHANNEL(ahc, scb);
|
|
|
|
int slun = SCB_GET_LUN(scb);
|
|
|
|
int match;
|
1998-09-20 05:06:10 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
match = ((chan == channel) || (channel == ALL_CHANNELS));
|
|
|
|
if (match != 0)
|
|
|
|
match = ((targ == target) || (target == CAM_TARGET_WILDCARD));
|
|
|
|
if (match != 0)
|
|
|
|
match = ((lun == slun) || (lun == CAM_LUN_WILDCARD));
|
|
|
|
if (match != 0) {
|
|
|
|
#if AHC_TARGET_MODE
|
|
|
|
int group;
|
|
|
|
|
|
|
|
group = XPT_FC_GROUP(scb->io_ctx->ccb_h.func_code);
|
|
|
|
if (role == ROLE_INITIATOR) {
|
aic7xxx.c:
Style nits.
Make sure that our selection hardware is disabled
as soon as possible after detecting a busfree and
even go so far as to disable the selection hardware
in advance of an event that will cause a busfree
(ABORT or BUS DEVICE RESET message). The concern
is that the selection hardware will select a target
for which, after processing the bus free, there
will be no commands pending. The sequencer idle
loop will re-enable the selection should it still be
necessary.
In ahc_handle_scsiint(), clear SSTAT0 events several
PCI transactions (most notably reads) prior to clearing
SCSIINT. The newer chips seem to take a bit of time to
see the change which can make the clearing of SCSIINT
ineffective.
Don't bother panicing at the end of ahc_handle_scsiint().
Getting to the final else just means we lost the race
with clearing SCSIINT.
In ahc_free(), handle init-level 0. This can happen when we
fail the attach for RAID devices. While I'm here, also kill
the parent dma tag.
In ahc_match_scb(), consider initiator ccbs to be any
that are not from the target mode group. This fixes
a bug where an external target reset CCB was not getting
cleaned up by the reset code.
Don't bother freezing a ccb in any of our "abort" routines
when the status is set to CAM_REQ_CMP. This can happen
for a target reset ccb.
aic7xxx.reg:
Reserve space for a completion queue. This will be used
to enhance performance in the near future.
aic7xxx.seq:
Remove an optimization for the 7890 autoflush bug that
turned out to allow, in rare cases, some data to get
lost.
Implement a simpler, faster, fix for the PCI_2_1 retry
bug that hangs the sequencer on an SCB dma for certain chips.
Test against SAVED_SCSIID rather than SELID during target
reselections. This is how we always did it in the past,
but the code was modified while trying to work around an
issue with the 7895. SAVED_SCSIID takes into account
twin channel adapters such as the 2742T, whereas SELID
does not have the channel bit. This caused invalid
selection warnings and other strangeness on these cards.
aic7xxx_pci.c
Use the correct mask for checking the generic aic7892
entry.
2001-02-10 18:04:27 +00:00
|
|
|
match = (group != XPT_FC_GROUP_TMODE)
|
2000-09-16 20:02:28 +00:00
|
|
|
&& ((tag == scb->hscb->tag)
|
|
|
|
|| (tag == SCB_LIST_NULL));
|
|
|
|
} else if (role == ROLE_TARGET) {
|
|
|
|
match = (group == XPT_FC_GROUP_TMODE)
|
|
|
|
&& ((tag == scb->io_ctx->csio.tag_id)
|
|
|
|
|| (tag == SCB_LIST_NULL));
|
1998-09-15 07:24:17 +00:00
|
|
|
}
|
2000-09-16 20:02:28 +00:00
|
|
|
#else /* !AHC_TARGET_MODE */
|
|
|
|
match = ((tag == scb->hscb->tag) || (tag == SCB_LIST_NULL));
|
|
|
|
#endif /* AHC_TARGET_MODE */
|
1998-09-15 07:24:17 +00:00
|
|
|
}
|
2000-09-16 20:02:28 +00:00
|
|
|
|
|
|
|
return match;
|
1998-09-15 07:24:17 +00:00
|
|
|
}
|
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
void
|
|
|
|
ahc_freeze_devq(struct ahc_softc *ahc, struct scb *scb)
|
|
|
|
{
|
|
|
|
int target;
|
|
|
|
char channel;
|
|
|
|
int lun;
|
|
|
|
|
|
|
|
target = SCB_GET_TARGET(ahc, scb);
|
|
|
|
lun = SCB_GET_LUN(scb);
|
|
|
|
channel = SCB_GET_CHANNEL(ahc, scb);
|
|
|
|
|
|
|
|
ahc_search_qinfifo(ahc, target, channel, lun,
|
|
|
|
/*tag*/SCB_LIST_NULL, ROLE_UNKNOWN,
|
|
|
|
CAM_REQUEUE_REQ, SEARCH_COMPLETE);
|
|
|
|
|
|
|
|
ahc_platform_freeze_devq(ahc, scb);
|
|
|
|
}
|
|
|
|
|
2000-10-08 03:37:52 +00:00
|
|
|
void
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
ahc_qinfifo_requeue_tail(struct ahc_softc *ahc, struct scb *scb)
|
|
|
|
{
|
|
|
|
struct scb *prev_scb;
|
|
|
|
|
|
|
|
prev_scb = NULL;
|
|
|
|
if (ahc_qinfifo_count(ahc) != 0) {
|
|
|
|
u_int prev_tag;
|
2000-11-06 20:05:38 +00:00
|
|
|
uint8_t prev_pos;
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
|
2000-11-06 20:05:38 +00:00
|
|
|
prev_pos = ahc->qinfifonext - 1;
|
|
|
|
prev_tag = ahc->qinfifo[prev_pos];
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
prev_scb = ahc_lookup_scb(ahc, prev_tag);
|
|
|
|
}
|
|
|
|
ahc_qinfifo_requeue(ahc, prev_scb, scb);
|
|
|
|
if ((ahc->features & AHC_QUEUE_REGS) != 0) {
|
|
|
|
ahc_outb(ahc, HNSCB_QOFF, ahc->qinfifonext);
|
|
|
|
} else {
|
|
|
|
ahc_outb(ahc, KERNEL_QINPOS, ahc->qinfifonext);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
2000-10-05 04:24:14 +00:00
|
|
|
ahc_qinfifo_requeue(struct ahc_softc *ahc, struct scb *prev_scb,
|
|
|
|
struct scb *scb)
|
|
|
|
{
|
2001-07-18 21:39:48 +00:00
|
|
|
if (prev_scb == NULL) {
|
2000-10-05 04:24:14 +00:00
|
|
|
ahc_outb(ahc, NEXT_QUEUED_SCB, scb->hscb->tag);
|
2001-07-18 21:39:48 +00:00
|
|
|
} else {
|
2000-10-05 04:24:14 +00:00
|
|
|
prev_scb->hscb->next = scb->hscb->tag;
|
2001-07-18 21:39:48 +00:00
|
|
|
ahc_sync_scb(ahc, prev_scb,
|
|
|
|
BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
|
|
|
|
}
|
2000-10-05 04:24:14 +00:00
|
|
|
ahc->qinfifo[ahc->qinfifonext++] = scb->hscb->tag;
|
|
|
|
scb->hscb->next = ahc->next_queued_scb->hscb->tag;
|
2001-07-18 21:39:48 +00:00
|
|
|
ahc_sync_scb(ahc, scb, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
|
2000-10-05 04:24:14 +00:00
|
|
|
}
|
|
|
|
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
static int
|
2000-10-08 03:37:52 +00:00
|
|
|
ahc_qinfifo_count(struct ahc_softc *ahc)
|
|
|
|
{
|
2002-08-31 06:41:37 +00:00
|
|
|
uint8_t qinpos;
|
|
|
|
uint8_t diff;
|
2000-10-08 03:37:52 +00:00
|
|
|
|
|
|
|
if ((ahc->features & AHC_QUEUE_REGS) != 0) {
|
|
|
|
qinpos = ahc_inb(ahc, SNSCB_QOFF);
|
|
|
|
ahc_outb(ahc, SNSCB_QOFF, qinpos);
|
|
|
|
} else
|
|
|
|
qinpos = ahc_inb(ahc, QINPOS);
|
2000-11-06 20:05:38 +00:00
|
|
|
diff = ahc->qinfifonext - qinpos;
|
|
|
|
return (diff);
|
2000-10-08 03:37:52 +00:00
|
|
|
}
|
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
int
|
1998-09-15 07:24:17 +00:00
|
|
|
ahc_search_qinfifo(struct ahc_softc *ahc, int target, char channel,
|
2000-07-18 20:12:14 +00:00
|
|
|
int lun, u_int tag, role_t role, uint32_t status,
|
1998-09-15 07:24:17 +00:00
|
|
|
ahc_search_action action)
|
|
|
|
{
|
2000-09-16 20:02:28 +00:00
|
|
|
struct scb *scb;
|
2000-10-05 04:24:14 +00:00
|
|
|
struct scb *prev_scb;
|
|
|
|
uint8_t qinstart;
|
2000-07-18 20:12:14 +00:00
|
|
|
uint8_t qinpos;
|
|
|
|
uint8_t qintail;
|
2002-04-24 16:58:51 +00:00
|
|
|
uint8_t next;
|
|
|
|
uint8_t prev;
|
2000-07-18 20:12:14 +00:00
|
|
|
uint8_t curscbptr;
|
2000-09-16 20:02:28 +00:00
|
|
|
int found;
|
2000-10-08 03:37:52 +00:00
|
|
|
int have_qregs;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
|
|
|
qintail = ahc->qinfifonext;
|
2000-10-08 03:37:52 +00:00
|
|
|
have_qregs = (ahc->features & AHC_QUEUE_REGS) != 0;
|
|
|
|
if (have_qregs) {
|
2000-10-05 04:24:14 +00:00
|
|
|
qinstart = ahc_inb(ahc, SNSCB_QOFF);
|
|
|
|
ahc_outb(ahc, SNSCB_QOFF, qinstart);
|
|
|
|
} else
|
|
|
|
qinstart = ahc_inb(ahc, QINPOS);
|
|
|
|
qinpos = qinstart;
|
1998-09-15 07:24:17 +00:00
|
|
|
found = 0;
|
2000-10-05 04:24:14 +00:00
|
|
|
prev_scb = NULL;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-07-18 20:12:14 +00:00
|
|
|
if (action == SEARCH_COMPLETE) {
|
|
|
|
/*
|
|
|
|
* Don't attempt to run any queued untagged transactions
|
|
|
|
* until we are done with the abort process.
|
|
|
|
*/
|
|
|
|
ahc_freeze_untagged_queues(ahc);
|
|
|
|
}
|
|
|
|
|
1998-09-15 07:24:17 +00:00
|
|
|
/*
|
|
|
|
* Start with an empty queue. Entries that are not chosen
|
|
|
|
* for removal will be re-added to the queue as we go.
|
|
|
|
*/
|
|
|
|
ahc->qinfifonext = qinpos;
|
2000-10-05 04:24:14 +00:00
|
|
|
ahc_outb(ahc, NEXT_QUEUED_SCB, ahc->next_queued_scb->hscb->tag);
|
1998-09-15 07:24:17 +00:00
|
|
|
|
|
|
|
while (qinpos != qintail) {
|
2000-10-05 04:24:14 +00:00
|
|
|
scb = ahc_lookup_scb(ahc, ahc->qinfifo[qinpos]);
|
2001-07-18 21:39:48 +00:00
|
|
|
if (scb == NULL) {
|
|
|
|
printf("qinpos = %d, SCB index = %d\n",
|
|
|
|
qinpos, ahc->qinfifo[qinpos]);
|
|
|
|
panic("Loop 1\n");
|
|
|
|
}
|
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
if (ahc_match_scb(ahc, scb, target, channel, lun, tag, role)) {
|
1998-09-15 07:24:17 +00:00
|
|
|
/*
|
2000-07-18 20:12:14 +00:00
|
|
|
* We found an scb that needs to be acted on.
|
1998-09-15 07:24:17 +00:00
|
|
|
*/
|
2000-07-18 20:12:14 +00:00
|
|
|
found++;
|
1998-09-15 07:24:17 +00:00
|
|
|
switch (action) {
|
|
|
|
case SEARCH_COMPLETE:
|
2000-09-16 20:02:28 +00:00
|
|
|
{
|
|
|
|
cam_status ostat;
|
aic7xxx.c:
Style nits.
Make sure that our selection hardware is disabled
as soon as possible after detecting a busfree and
even go so far as to disable the selection hardware
in advance of an event that will cause a busfree
(ABORT or BUS DEVICE RESET message). The concern
is that the selection hardware will select a target
for which, after processing the bus free, there
will be no commands pending. The sequencer idle
loop will re-enable the selection should it still be
necessary.
In ahc_handle_scsiint(), clear SSTAT0 events several
PCI transactions (most notably reads) prior to clearing
SCSIINT. The newer chips seem to take a bit of time to
see the change which can make the clearing of SCSIINT
ineffective.
Don't bother panicing at the end of ahc_handle_scsiint().
Getting to the final else just means we lost the race
with clearing SCSIINT.
In ahc_free(), handle init-level 0. This can happen when we
fail the attach for RAID devices. While I'm here, also kill
the parent dma tag.
In ahc_match_scb(), consider initiator ccbs to be any
that are not from the target mode group. This fixes
a bug where an external target reset CCB was not getting
cleaned up by the reset code.
Don't bother freezing a ccb in any of our "abort" routines
when the status is set to CAM_REQ_CMP. This can happen
for a target reset ccb.
aic7xxx.reg:
Reserve space for a completion queue. This will be used
to enhance performance in the near future.
aic7xxx.seq:
Remove an optimization for the 7890 autoflush bug that
turned out to allow, in rare cases, some data to get
lost.
Implement a simpler, faster, fix for the PCI_2_1 retry
bug that hangs the sequencer on an SCB dma for certain chips.
Test against SAVED_SCSIID rather than SELID during target
reselections. This is how we always did it in the past,
but the code was modified while trying to work around an
issue with the 7895. SAVED_SCSIID takes into account
twin channel adapters such as the 2742T, whereas SELID
does not have the channel bit. This caused invalid
selection warnings and other strangeness on these cards.
aic7xxx_pci.c
Use the correct mask for checking the generic aic7892
entry.
2001-02-10 18:04:27 +00:00
|
|
|
cam_status cstat;
|
2000-09-16 20:02:28 +00:00
|
|
|
|
|
|
|
ostat = ahc_get_transaction_status(scb);
|
|
|
|
if (ostat == CAM_REQ_INPROG)
|
2002-08-31 06:41:37 +00:00
|
|
|
ahc_set_transaction_status(scb, status);
|
aic7xxx.c:
Style nits.
Make sure that our selection hardware is disabled
as soon as possible after detecting a busfree and
even go so far as to disable the selection hardware
in advance of an event that will cause a busfree
(ABORT or BUS DEVICE RESET message). The concern
is that the selection hardware will select a target
for which, after processing the bus free, there
will be no commands pending. The sequencer idle
loop will re-enable the selection should it still be
necessary.
In ahc_handle_scsiint(), clear SSTAT0 events several
PCI transactions (most notably reads) prior to clearing
SCSIINT. The newer chips seem to take a bit of time to
see the change which can make the clearing of SCSIINT
ineffective.
Don't bother panicing at the end of ahc_handle_scsiint().
Getting to the final else just means we lost the race
with clearing SCSIINT.
In ahc_free(), handle init-level 0. This can happen when we
fail the attach for RAID devices. While I'm here, also kill
the parent dma tag.
In ahc_match_scb(), consider initiator ccbs to be any
that are not from the target mode group. This fixes
a bug where an external target reset CCB was not getting
cleaned up by the reset code.
Don't bother freezing a ccb in any of our "abort" routines
when the status is set to CAM_REQ_CMP. This can happen
for a target reset ccb.
aic7xxx.reg:
Reserve space for a completion queue. This will be used
to enhance performance in the near future.
aic7xxx.seq:
Remove an optimization for the 7890 autoflush bug that
turned out to allow, in rare cases, some data to get
lost.
Implement a simpler, faster, fix for the PCI_2_1 retry
bug that hangs the sequencer on an SCB dma for certain chips.
Test against SAVED_SCSIID rather than SELID during target
reselections. This is how we always did it in the past,
but the code was modified while trying to work around an
issue with the 7895. SAVED_SCSIID takes into account
twin channel adapters such as the 2742T, whereas SELID
does not have the channel bit. This caused invalid
selection warnings and other strangeness on these cards.
aic7xxx_pci.c
Use the correct mask for checking the generic aic7892
entry.
2001-02-10 18:04:27 +00:00
|
|
|
cstat = ahc_get_transaction_status(scb);
|
|
|
|
if (cstat != CAM_REQ_CMP)
|
|
|
|
ahc_freeze_scb(scb);
|
2000-09-16 20:02:28 +00:00
|
|
|
if ((scb->flags & SCB_ACTIVE) == 0)
|
|
|
|
printf("Inactive SCB in qinfifo\n");
|
|
|
|
ahc_done(ahc, scb);
|
2000-10-05 04:24:14 +00:00
|
|
|
|
2000-10-06 04:01:06 +00:00
|
|
|
/* FALLTHROUGH */
|
2002-04-24 16:58:51 +00:00
|
|
|
}
|
2000-10-06 04:01:06 +00:00
|
|
|
case SEARCH_REMOVE:
|
1998-09-15 07:24:17 +00:00
|
|
|
break;
|
|
|
|
case SEARCH_COUNT:
|
2000-10-05 04:24:14 +00:00
|
|
|
ahc_qinfifo_requeue(ahc, prev_scb, scb);
|
|
|
|
prev_scb = scb;
|
1998-09-15 07:24:17 +00:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
} else {
|
2000-10-05 04:24:14 +00:00
|
|
|
ahc_qinfifo_requeue(ahc, prev_scb, scb);
|
|
|
|
prev_scb = scb;
|
1998-09-15 07:24:17 +00:00
|
|
|
}
|
|
|
|
qinpos++;
|
|
|
|
}
|
|
|
|
|
|
|
|
if ((ahc->features & AHC_QUEUE_REGS) != 0) {
|
|
|
|
ahc_outb(ahc, HNSCB_QOFF, ahc->qinfifonext);
|
|
|
|
} else {
|
|
|
|
ahc_outb(ahc, KERNEL_QINPOS, ahc->qinfifonext);
|
|
|
|
}
|
|
|
|
|
2001-01-22 21:03:48 +00:00
|
|
|
if (action != SEARCH_COUNT
|
|
|
|
&& (found != 0)
|
|
|
|
&& (qinstart != ahc->qinfifonext)) {
|
|
|
|
/*
|
|
|
|
* The sequencer may be in the process of dmaing
|
|
|
|
* down the SCB at the beginning of the queue.
|
|
|
|
* This could be problematic if either the first,
|
|
|
|
* or the second SCB is removed from the queue
|
|
|
|
* (the first SCB includes a pointer to the "next"
|
|
|
|
* SCB to dma). If we have removed any entries, swap
|
|
|
|
* the first element in the queue with the next HSCB
|
|
|
|
* so the sequencer will notice that NEXT_QUEUED_SCB
|
|
|
|
* has changed during its dma attempt and will retry
|
|
|
|
* the DMA.
|
|
|
|
*/
|
|
|
|
scb = ahc_lookup_scb(ahc, ahc->qinfifo[qinstart]);
|
|
|
|
|
2001-07-18 21:39:48 +00:00
|
|
|
if (scb == NULL) {
|
|
|
|
printf("found = %d, qinstart = %d, qinfifionext = %d\n",
|
|
|
|
found, qinstart, ahc->qinfifonext);
|
|
|
|
panic("First/Second Qinfifo fixup\n");
|
|
|
|
}
|
2001-01-22 21:03:48 +00:00
|
|
|
/*
|
|
|
|
* ahc_swap_with_next_hscb forces our next pointer to
|
|
|
|
* point to the reserved SCB for future commands. Save
|
|
|
|
* and restore our original next pointer to maintain
|
|
|
|
* queue integrity.
|
|
|
|
*/
|
|
|
|
next = scb->hscb->next;
|
|
|
|
ahc->scb_data->scbindex[scb->hscb->tag] = NULL;
|
|
|
|
ahc_swap_with_next_hscb(ahc, scb);
|
|
|
|
scb->hscb->next = next;
|
|
|
|
ahc->qinfifo[qinstart] = scb->hscb->tag;
|
|
|
|
|
2001-01-23 22:17:03 +00:00
|
|
|
/* Tell the card about the new head of the qinfifo. */
|
|
|
|
ahc_outb(ahc, NEXT_QUEUED_SCB, scb->hscb->tag);
|
|
|
|
|
2001-01-22 21:03:48 +00:00
|
|
|
/* Fixup the tail "next" pointer. */
|
|
|
|
qintail = ahc->qinfifonext - 1;
|
|
|
|
scb = ahc_lookup_scb(ahc, ahc->qinfifo[qintail]);
|
|
|
|
scb->hscb->next = ahc->next_queued_scb->hscb->tag;
|
|
|
|
}
|
|
|
|
|
2000-07-18 20:12:14 +00:00
|
|
|
/*
|
|
|
|
* Search waiting for selection list.
|
|
|
|
*/
|
|
|
|
curscbptr = ahc_inb(ahc, SCBPTR);
|
|
|
|
next = ahc_inb(ahc, WAITING_SCBH); /* Start at head of list. */
|
|
|
|
prev = SCB_LIST_NULL;
|
|
|
|
|
|
|
|
while (next != SCB_LIST_NULL) {
|
|
|
|
uint8_t scb_index;
|
|
|
|
|
|
|
|
ahc_outb(ahc, SCBPTR, next);
|
|
|
|
scb_index = ahc_inb(ahc, SCB_TAG);
|
|
|
|
if (scb_index >= ahc->scb_data->numscbs) {
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
printf("Waiting List inconsistency. "
|
|
|
|
"SCB index == %d, yet numscbs == %d.",
|
|
|
|
scb_index, ahc->scb_data->numscbs);
|
|
|
|
ahc_dump_card_state(ahc);
|
|
|
|
panic("for safety");
|
2000-07-18 20:12:14 +00:00
|
|
|
}
|
2000-10-05 04:24:14 +00:00
|
|
|
scb = ahc_lookup_scb(ahc, scb_index);
|
2001-07-18 21:39:48 +00:00
|
|
|
if (scb == NULL) {
|
|
|
|
printf("scb_index = %d, next = %d\n",
|
|
|
|
scb_index, next);
|
|
|
|
panic("Waiting List traversal\n");
|
|
|
|
}
|
2000-09-16 20:02:28 +00:00
|
|
|
if (ahc_match_scb(ahc, scb, target, channel,
|
2000-07-18 20:12:14 +00:00
|
|
|
lun, SCB_LIST_NULL, role)) {
|
|
|
|
/*
|
|
|
|
* We found an scb that needs to be acted on.
|
|
|
|
*/
|
|
|
|
found++;
|
|
|
|
switch (action) {
|
|
|
|
case SEARCH_COMPLETE:
|
2000-09-16 20:02:28 +00:00
|
|
|
{
|
|
|
|
cam_status ostat;
|
aic7xxx.c:
Style nits.
Make sure that our selection hardware is disabled
as soon as possible after detecting a busfree and
even go so far as to disable the selection hardware
in advance of an event that will cause a busfree
(ABORT or BUS DEVICE RESET message). The concern
is that the selection hardware will select a target
for which, after processing the bus free, there
will be no commands pending. The sequencer idle
loop will re-enable the selection should it still be
necessary.
In ahc_handle_scsiint(), clear SSTAT0 events several
PCI transactions (most notably reads) prior to clearing
SCSIINT. The newer chips seem to take a bit of time to
see the change which can make the clearing of SCSIINT
ineffective.
Don't bother panicing at the end of ahc_handle_scsiint().
Getting to the final else just means we lost the race
with clearing SCSIINT.
In ahc_free(), handle init-level 0. This can happen when we
fail the attach for RAID devices. While I'm here, also kill
the parent dma tag.
In ahc_match_scb(), consider initiator ccbs to be any
that are not from the target mode group. This fixes
a bug where an external target reset CCB was not getting
cleaned up by the reset code.
Don't bother freezing a ccb in any of our "abort" routines
when the status is set to CAM_REQ_CMP. This can happen
for a target reset ccb.
aic7xxx.reg:
Reserve space for a completion queue. This will be used
to enhance performance in the near future.
aic7xxx.seq:
Remove an optimization for the 7890 autoflush bug that
turned out to allow, in rare cases, some data to get
lost.
Implement a simpler, faster, fix for the PCI_2_1 retry
bug that hangs the sequencer on an SCB dma for certain chips.
Test against SAVED_SCSIID rather than SELID during target
reselections. This is how we always did it in the past,
but the code was modified while trying to work around an
issue with the 7895. SAVED_SCSIID takes into account
twin channel adapters such as the 2742T, whereas SELID
does not have the channel bit. This caused invalid
selection warnings and other strangeness on these cards.
aic7xxx_pci.c
Use the correct mask for checking the generic aic7892
entry.
2001-02-10 18:04:27 +00:00
|
|
|
cam_status cstat;
|
2000-09-16 20:02:28 +00:00
|
|
|
|
|
|
|
ostat = ahc_get_transaction_status(scb);
|
|
|
|
if (ostat == CAM_REQ_INPROG)
|
|
|
|
ahc_set_transaction_status(scb,
|
|
|
|
status);
|
aic7xxx.c:
Style nits.
Make sure that our selection hardware is disabled
as soon as possible after detecting a busfree and
even go so far as to disable the selection hardware
in advance of an event that will cause a busfree
(ABORT or BUS DEVICE RESET message). The concern
is that the selection hardware will select a target
for which, after processing the bus free, there
will be no commands pending. The sequencer idle
loop will re-enable the selection should it still be
necessary.
In ahc_handle_scsiint(), clear SSTAT0 events several
PCI transactions (most notably reads) prior to clearing
SCSIINT. The newer chips seem to take a bit of time to
see the change which can make the clearing of SCSIINT
ineffective.
Don't bother panicing at the end of ahc_handle_scsiint().
Getting to the final else just means we lost the race
with clearing SCSIINT.
In ahc_free(), handle init-level 0. This can happen when we
fail the attach for RAID devices. While I'm here, also kill
the parent dma tag.
In ahc_match_scb(), consider initiator ccbs to be any
that are not from the target mode group. This fixes
a bug where an external target reset CCB was not getting
cleaned up by the reset code.
Don't bother freezing a ccb in any of our "abort" routines
when the status is set to CAM_REQ_CMP. This can happen
for a target reset ccb.
aic7xxx.reg:
Reserve space for a completion queue. This will be used
to enhance performance in the near future.
aic7xxx.seq:
Remove an optimization for the 7890 autoflush bug that
turned out to allow, in rare cases, some data to get
lost.
Implement a simpler, faster, fix for the PCI_2_1 retry
bug that hangs the sequencer on an SCB dma for certain chips.
Test against SAVED_SCSIID rather than SELID during target
reselections. This is how we always did it in the past,
but the code was modified while trying to work around an
issue with the 7895. SAVED_SCSIID takes into account
twin channel adapters such as the 2742T, whereas SELID
does not have the channel bit. This caused invalid
selection warnings and other strangeness on these cards.
aic7xxx_pci.c
Use the correct mask for checking the generic aic7892
entry.
2001-02-10 18:04:27 +00:00
|
|
|
cstat = ahc_get_transaction_status(scb);
|
|
|
|
if (cstat != CAM_REQ_CMP)
|
|
|
|
ahc_freeze_scb(scb);
|
2000-09-16 20:02:28 +00:00
|
|
|
if ((scb->flags & SCB_ACTIVE) == 0)
|
|
|
|
printf("Inactive SCB in Waiting List\n");
|
|
|
|
ahc_done(ahc, scb);
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
/* FALLTHROUGH */
|
2000-09-16 20:02:28 +00:00
|
|
|
}
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
case SEARCH_REMOVE:
|
|
|
|
next = ahc_rem_wscb(ahc, next, prev);
|
|
|
|
break;
|
2000-07-18 20:12:14 +00:00
|
|
|
case SEARCH_COUNT:
|
|
|
|
prev = next;
|
|
|
|
next = ahc_inb(ahc, SCB_NEXT);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
|
|
|
|
prev = next;
|
|
|
|
next = ahc_inb(ahc, SCB_NEXT);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
ahc_outb(ahc, SCBPTR, curscbptr);
|
|
|
|
|
2002-08-31 06:41:37 +00:00
|
|
|
found += ahc_search_untagged_queues(ahc, /*ahc_io_ctx_t*/NULL, target,
|
|
|
|
channel, lun, status, action);
|
|
|
|
|
|
|
|
if (action == SEARCH_COMPLETE)
|
|
|
|
ahc_release_untagged_queues(ahc);
|
|
|
|
return (found);
|
|
|
|
}
|
|
|
|
|
|
|
|
int
|
|
|
|
ahc_search_untagged_queues(struct ahc_softc *ahc, ahc_io_ctx_t ctx,
|
|
|
|
int target, char channel, int lun, uint32_t status,
|
|
|
|
ahc_search_action action)
|
|
|
|
{
|
|
|
|
struct scb *scb;
|
|
|
|
int maxtarget;
|
|
|
|
int found;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
if (action == SEARCH_COMPLETE) {
|
|
|
|
/*
|
|
|
|
* Don't attempt to run any queued untagged transactions
|
|
|
|
* until we are done with the abort process.
|
|
|
|
*/
|
|
|
|
ahc_freeze_untagged_queues(ahc);
|
|
|
|
}
|
|
|
|
|
|
|
|
found = 0;
|
2000-09-16 20:02:28 +00:00
|
|
|
i = 0;
|
|
|
|
if ((ahc->flags & AHC_SCB_BTT) == 0) {
|
|
|
|
|
|
|
|
maxtarget = 16;
|
|
|
|
if (target != CAM_TARGET_WILDCARD) {
|
|
|
|
|
|
|
|
i = target;
|
|
|
|
if (channel == 'B')
|
|
|
|
i += 8;
|
|
|
|
maxtarget = i + 1;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
maxtarget = 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
for (; i < maxtarget; i++) {
|
|
|
|
struct scb_tailq *untagged_q;
|
|
|
|
struct scb *next_scb;
|
|
|
|
|
|
|
|
untagged_q = &(ahc->untagged_queues[i]);
|
|
|
|
next_scb = TAILQ_FIRST(untagged_q);
|
|
|
|
while (next_scb != NULL) {
|
|
|
|
|
|
|
|
scb = next_scb;
|
|
|
|
next_scb = TAILQ_NEXT(scb, links.tqe);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* The head of the list may be the currently
|
|
|
|
* active untagged command for a device.
|
|
|
|
* We're only searching for commands that
|
|
|
|
* have not been started. A transaction
|
|
|
|
* marked active but still in the qinfifo
|
|
|
|
* is removed by the qinfifo scanning code
|
|
|
|
* above.
|
|
|
|
*/
|
|
|
|
if ((scb->flags & SCB_ACTIVE) != 0)
|
|
|
|
continue;
|
|
|
|
|
2002-08-31 06:41:37 +00:00
|
|
|
if (ahc_match_scb(ahc, scb, target, channel, lun,
|
|
|
|
SCB_LIST_NULL, ROLE_INITIATOR) == 0
|
|
|
|
|| (ctx != NULL && ctx != scb->io_ctx))
|
|
|
|
continue;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* We found an scb that needs to be acted on.
|
|
|
|
*/
|
|
|
|
found++;
|
|
|
|
switch (action) {
|
|
|
|
case SEARCH_COMPLETE:
|
|
|
|
{
|
|
|
|
cam_status ostat;
|
|
|
|
cam_status cstat;
|
|
|
|
|
|
|
|
ostat = ahc_get_transaction_status(scb);
|
|
|
|
if (ostat == CAM_REQ_INPROG)
|
|
|
|
ahc_set_transaction_status(scb, status);
|
|
|
|
cstat = ahc_get_transaction_status(scb);
|
|
|
|
if (cstat != CAM_REQ_CMP)
|
|
|
|
ahc_freeze_scb(scb);
|
|
|
|
if ((scb->flags & SCB_ACTIVE) == 0)
|
|
|
|
printf("Inactive SCB in untaggedQ\n");
|
|
|
|
ahc_done(ahc, scb);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
case SEARCH_REMOVE:
|
|
|
|
scb->flags &= ~SCB_UNTAGGEDQ;
|
|
|
|
TAILQ_REMOVE(untagged_q, scb, links.tqe);
|
|
|
|
break;
|
|
|
|
case SEARCH_COUNT:
|
|
|
|
break;
|
2000-09-16 20:02:28 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2000-07-18 20:12:14 +00:00
|
|
|
if (action == SEARCH_COMPLETE)
|
|
|
|
ahc_release_untagged_queues(ahc);
|
1998-09-15 07:24:17 +00:00
|
|
|
return (found);
|
|
|
|
}
|
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
int
|
|
|
|
ahc_search_disc_list(struct ahc_softc *ahc, int target, char channel,
|
|
|
|
int lun, u_int tag, int stop_on_first, int remove,
|
|
|
|
int save_state)
|
1998-12-15 08:22:42 +00:00
|
|
|
{
|
2000-09-16 20:02:28 +00:00
|
|
|
struct scb *scbp;
|
|
|
|
u_int next;
|
|
|
|
u_int prev;
|
|
|
|
u_int count;
|
|
|
|
u_int active_scb;
|
1998-12-15 08:22:42 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
count = 0;
|
|
|
|
next = ahc_inb(ahc, DISCONNECTED_SCBH);
|
|
|
|
prev = SCB_LIST_NULL;
|
1998-12-15 08:22:42 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
if (save_state) {
|
|
|
|
/* restore this when we're done */
|
|
|
|
active_scb = ahc_inb(ahc, SCBPTR);
|
|
|
|
} else
|
|
|
|
/* Silence compiler */
|
|
|
|
active_scb = SCB_LIST_NULL;
|
1998-12-15 08:22:42 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
while (next != SCB_LIST_NULL) {
|
|
|
|
u_int scb_index;
|
1998-12-15 08:22:42 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_outb(ahc, SCBPTR, next);
|
|
|
|
scb_index = ahc_inb(ahc, SCB_TAG);
|
|
|
|
if (scb_index >= ahc->scb_data->numscbs) {
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
printf("Disconnected List inconsistency. "
|
|
|
|
"SCB index == %d, yet numscbs == %d.",
|
|
|
|
scb_index, ahc->scb_data->numscbs);
|
|
|
|
ahc_dump_card_state(ahc);
|
|
|
|
panic("for safety");
|
2000-09-16 20:02:28 +00:00
|
|
|
}
|
1998-12-15 08:22:42 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
if (next == prev) {
|
|
|
|
panic("Disconnected List Loop. "
|
|
|
|
"cur SCBPTR == %x, prev SCBPTR == %x.",
|
|
|
|
next, prev);
|
|
|
|
}
|
2000-10-05 04:24:14 +00:00
|
|
|
scbp = ahc_lookup_scb(ahc, scb_index);
|
2000-09-16 20:02:28 +00:00
|
|
|
if (ahc_match_scb(ahc, scbp, target, channel, lun,
|
|
|
|
tag, ROLE_INITIATOR)) {
|
|
|
|
count++;
|
|
|
|
if (remove) {
|
|
|
|
next =
|
|
|
|
ahc_rem_scb_from_disc_list(ahc, prev, next);
|
1999-03-05 23:35:48 +00:00
|
|
|
} else {
|
2000-09-16 20:02:28 +00:00
|
|
|
prev = next;
|
|
|
|
next = ahc_inb(ahc, SCB_NEXT);
|
1998-12-17 00:06:52 +00:00
|
|
|
}
|
2000-09-16 20:02:28 +00:00
|
|
|
if (stop_on_first)
|
|
|
|
break;
|
|
|
|
} else {
|
|
|
|
prev = next;
|
|
|
|
next = ahc_inb(ahc, SCB_NEXT);
|
1998-12-15 08:22:42 +00:00
|
|
|
}
|
|
|
|
}
|
2000-09-16 20:02:28 +00:00
|
|
|
if (save_state)
|
|
|
|
ahc_outb(ahc, SCBPTR, active_scb);
|
|
|
|
return (count);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Remove an SCB from the on chip list of disconnected transactions.
|
|
|
|
* This is empty/unused if we are not performing SCB paging.
|
|
|
|
*/
|
|
|
|
static u_int
|
|
|
|
ahc_rem_scb_from_disc_list(struct ahc_softc *ahc, u_int prev, u_int scbptr)
|
|
|
|
{
|
|
|
|
u_int next;
|
|
|
|
|
|
|
|
ahc_outb(ahc, SCBPTR, scbptr);
|
|
|
|
next = ahc_inb(ahc, SCB_NEXT);
|
|
|
|
|
|
|
|
ahc_outb(ahc, SCB_CONTROL, 0);
|
|
|
|
|
|
|
|
ahc_add_curscb_to_free_list(ahc);
|
|
|
|
|
|
|
|
if (prev != SCB_LIST_NULL) {
|
|
|
|
ahc_outb(ahc, SCBPTR, prev);
|
|
|
|
ahc_outb(ahc, SCB_NEXT, next);
|
|
|
|
} else
|
|
|
|
ahc_outb(ahc, DISCONNECTED_SCBH, next);
|
|
|
|
|
|
|
|
return (next);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Add the SCB as selected by SCBPTR onto the on chip list of
|
|
|
|
* free hardware SCBs. This list is empty/unused if we are not
|
|
|
|
* performing SCB paging.
|
|
|
|
*/
|
|
|
|
static void
|
|
|
|
ahc_add_curscb_to_free_list(struct ahc_softc *ahc)
|
|
|
|
{
|
|
|
|
/*
|
|
|
|
* Invalidate the tag so that our abort
|
|
|
|
* routines don't think it's active.
|
|
|
|
*/
|
|
|
|
ahc_outb(ahc, SCB_TAG, SCB_LIST_NULL);
|
|
|
|
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
if ((ahc->flags & AHC_PAGESCBS) != 0) {
|
|
|
|
ahc_outb(ahc, SCB_NEXT, ahc_inb(ahc, FREE_SCBH));
|
|
|
|
ahc_outb(ahc, FREE_SCBH, ahc_inb(ahc, SCBPTR));
|
|
|
|
}
|
2000-09-16 20:02:28 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Manipulate the waiting for selection list and return the
|
|
|
|
* scb that follows the one that we remove.
|
|
|
|
*/
|
|
|
|
static u_int
|
|
|
|
ahc_rem_wscb(struct ahc_softc *ahc, u_int scbpos, u_int prev)
|
|
|
|
{
|
|
|
|
u_int curscb, next;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Select the SCB we want to abort and
|
|
|
|
* pull the next pointer out of it.
|
|
|
|
*/
|
|
|
|
curscb = ahc_inb(ahc, SCBPTR);
|
|
|
|
ahc_outb(ahc, SCBPTR, scbpos);
|
|
|
|
next = ahc_inb(ahc, SCB_NEXT);
|
|
|
|
|
|
|
|
/* Clear the necessary fields */
|
|
|
|
ahc_outb(ahc, SCB_CONTROL, 0);
|
|
|
|
|
|
|
|
ahc_add_curscb_to_free_list(ahc);
|
|
|
|
|
|
|
|
/* update the waiting list */
|
|
|
|
if (prev == SCB_LIST_NULL) {
|
|
|
|
/* First in the list */
|
|
|
|
ahc_outb(ahc, WAITING_SCBH, next);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Ensure we aren't attempting to perform
|
|
|
|
* selection for this entry.
|
|
|
|
*/
|
|
|
|
ahc_outb(ahc, SCSISEQ, (ahc_inb(ahc, SCSISEQ) & ~ENSELO));
|
|
|
|
} else {
|
|
|
|
/*
|
|
|
|
* Select the scb that pointed to us
|
|
|
|
* and update its next pointer.
|
|
|
|
*/
|
|
|
|
ahc_outb(ahc, SCBPTR, prev);
|
|
|
|
ahc_outb(ahc, SCB_NEXT, next);
|
1998-12-15 08:22:42 +00:00
|
|
|
}
|
2000-09-16 20:02:28 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Point us back at the original scb position.
|
|
|
|
*/
|
|
|
|
ahc_outb(ahc, SCBPTR, curscb);
|
|
|
|
return next;
|
1998-12-15 08:22:42 +00:00
|
|
|
}
|
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/******************************** Error Handling ******************************/
|
1998-09-15 07:24:17 +00:00
|
|
|
/*
|
|
|
|
* Abort all SCBs that match the given description (target/channel/lun/tag),
|
|
|
|
* setting their status to the passed in status if the status has not already
|
|
|
|
* been modified from CAM_REQ_INPROG. This routine assumes that the sequencer
|
|
|
|
* is paused before it is called.
|
|
|
|
*/
|
2000-09-16 20:02:28 +00:00
|
|
|
int
|
1998-09-15 07:24:17 +00:00
|
|
|
ahc_abort_scbs(struct ahc_softc *ahc, int target, char channel,
|
2000-07-18 20:12:14 +00:00
|
|
|
int lun, u_int tag, role_t role, uint32_t status)
|
1998-09-15 07:24:17 +00:00
|
|
|
{
|
1998-09-20 05:06:10 +00:00
|
|
|
struct scb *scbp;
|
2000-09-16 20:02:28 +00:00
|
|
|
struct scb *scbp_next;
|
1998-09-20 05:06:10 +00:00
|
|
|
u_int active_scb;
|
2000-10-11 23:46:34 +00:00
|
|
|
int i, j;
|
2000-07-18 20:12:14 +00:00
|
|
|
int maxtarget;
|
2000-10-11 23:46:34 +00:00
|
|
|
int minlun;
|
|
|
|
int maxlun;
|
|
|
|
|
1998-09-20 05:06:10 +00:00
|
|
|
int found;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-07-18 20:12:14 +00:00
|
|
|
/*
|
|
|
|
* Don't attempt to run any queued untagged transactions
|
|
|
|
* until we are done with the abort process.
|
|
|
|
*/
|
|
|
|
ahc_freeze_untagged_queues(ahc);
|
|
|
|
|
1998-09-15 07:24:17 +00:00
|
|
|
/* restore this when we're done */
|
|
|
|
active_scb = ahc_inb(ahc, SCBPTR);
|
|
|
|
|
2000-02-09 21:25:00 +00:00
|
|
|
found = ahc_search_qinfifo(ahc, target, channel, lun, SCB_LIST_NULL,
|
1999-12-20 21:32:32 +00:00
|
|
|
role, CAM_REQUEUE_REQ, SEARCH_COMPLETE);
|
1998-09-15 07:24:17 +00:00
|
|
|
|
|
|
|
/*
|
2000-07-18 20:12:14 +00:00
|
|
|
* Clean out the busy target table for any untagged commands.
|
1998-09-15 07:24:17 +00:00
|
|
|
*/
|
2000-07-18 20:12:14 +00:00
|
|
|
i = 0;
|
|
|
|
maxtarget = 16;
|
|
|
|
if (target != CAM_TARGET_WILDCARD) {
|
|
|
|
i = target;
|
2000-09-16 20:02:28 +00:00
|
|
|
if (channel == 'B')
|
|
|
|
i += 8;
|
|
|
|
maxtarget = i + 1;
|
2000-07-18 20:12:14 +00:00
|
|
|
}
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-10-11 23:46:34 +00:00
|
|
|
if (lun == CAM_LUN_WILDCARD) {
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-10-11 23:46:34 +00:00
|
|
|
/*
|
|
|
|
* Unless we are using an SCB based
|
|
|
|
* busy targets table, there is only
|
|
|
|
* one table entry for all luns of
|
|
|
|
* a target.
|
|
|
|
*/
|
|
|
|
minlun = 0;
|
|
|
|
maxlun = 1;
|
|
|
|
if ((ahc->flags & AHC_SCB_BTT) != 0)
|
|
|
|
maxlun = AHC_NUM_LUNS;
|
|
|
|
} else {
|
|
|
|
minlun = lun;
|
|
|
|
maxlun = lun + 1;
|
|
|
|
}
|
2000-07-24 22:27:40 +00:00
|
|
|
|
2002-04-24 16:58:51 +00:00
|
|
|
if (role != ROLE_TARGET) {
|
|
|
|
for (;i < maxtarget; i++) {
|
|
|
|
for (j = minlun;j < maxlun; j++) {
|
|
|
|
u_int scbid;
|
|
|
|
u_int tcl;
|
2000-07-18 20:12:14 +00:00
|
|
|
|
2002-04-24 16:58:51 +00:00
|
|
|
tcl = BUILD_TCL(i << 4, j);
|
|
|
|
scbid = ahc_index_busy_tcl(ahc, tcl);
|
|
|
|
scbp = ahc_lookup_scb(ahc, scbid);
|
|
|
|
if (scbp == NULL
|
|
|
|
|| ahc_match_scb(ahc, scbp, target, channel,
|
|
|
|
lun, tag, role) == 0)
|
|
|
|
continue;
|
|
|
|
ahc_unbusy_tcl(ahc, BUILD_TCL(i << 4, j));
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Go through the disconnected list and remove any entries we
|
|
|
|
* have queued for completion, 0'ing their control byte too.
|
|
|
|
* We save the active SCB and restore it ourselves, so there
|
|
|
|
* is no reason for this search to restore it too.
|
|
|
|
*/
|
|
|
|
ahc_search_disc_list(ahc, target, channel, lun, tag,
|
|
|
|
/*stop_on_first*/FALSE, /*remove*/TRUE,
|
|
|
|
/*save_state*/FALSE);
|
|
|
|
}
|
1998-09-15 07:24:17 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Go through the hardware SCB array looking for commands that
|
2002-04-24 16:58:51 +00:00
|
|
|
* were active but not on any list. In some cases, these remnants
|
|
|
|
* might not still have mappings in the scbindex array (e.g. unexpected
|
|
|
|
* bus free with the same scb queued for an abort). Don't hold this
|
|
|
|
* against them.
|
1998-09-15 07:24:17 +00:00
|
|
|
*/
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
for (i = 0; i < ahc->scb_data->maxhscbs; i++) {
|
1998-09-20 23:30:14 +00:00
|
|
|
u_int scbid;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
|
|
|
ahc_outb(ahc, SCBPTR, i);
|
|
|
|
scbid = ahc_inb(ahc, SCB_TAG);
|
2000-10-05 04:24:14 +00:00
|
|
|
scbp = ahc_lookup_scb(ahc, scbid);
|
2002-04-24 16:58:51 +00:00
|
|
|
if ((scbp == NULL && scbid != SCB_LIST_NULL)
|
|
|
|
|| (scbp != NULL
|
|
|
|
&& ahc_match_scb(ahc, scbp, target, channel, lun, tag, role)))
|
2000-02-09 21:25:00 +00:00
|
|
|
ahc_add_curscb_to_free_list(ahc);
|
1998-09-15 07:24:17 +00:00
|
|
|
}
|
2000-02-09 21:25:00 +00:00
|
|
|
|
1998-09-15 07:24:17 +00:00
|
|
|
/*
|
|
|
|
* Go through the pending CCB list and look for
|
|
|
|
* commands for this target that are still active.
|
|
|
|
* These are other tagged commands that were
|
2001-05-15 19:41:12 +00:00
|
|
|
* disconnected when the reset occurred.
|
1998-09-15 07:24:17 +00:00
|
|
|
*/
|
2000-09-16 20:02:28 +00:00
|
|
|
scbp_next = LIST_FIRST(&ahc->pending_scbs);
|
|
|
|
while (scbp_next != NULL) {
|
|
|
|
scbp = scbp_next;
|
|
|
|
scbp_next = LIST_NEXT(scbp, pending_links);
|
|
|
|
if (ahc_match_scb(ahc, scbp, target, channel, lun, tag, role)) {
|
|
|
|
cam_status ostat;
|
|
|
|
|
|
|
|
ostat = ahc_get_transaction_status(scbp);
|
|
|
|
if (ostat == CAM_REQ_INPROG)
|
|
|
|
ahc_set_transaction_status(scbp, status);
|
aic7xxx.c:
Style nits.
Make sure that our selection hardware is disabled
as soon as possible after detecting a busfree and
even go so far as to disable the selection hardware
in advance of an event that will cause a busfree
(ABORT or BUS DEVICE RESET message). The concern
is that the selection hardware will select a target
for which, after processing the bus free, there
will be no commands pending. The sequencer idle
loop will re-enable the selection should it still be
necessary.
In ahc_handle_scsiint(), clear SSTAT0 events several
PCI transactions (most notably reads) prior to clearing
SCSIINT. The newer chips seem to take a bit of time to
see the change which can make the clearing of SCSIINT
ineffective.
Don't bother panicing at the end of ahc_handle_scsiint().
Getting to the final else just means we lost the race
with clearing SCSIINT.
In ahc_free(), handle init-level 0. This can happen when we
fail the attach for RAID devices. While I'm here, also kill
the parent dma tag.
In ahc_match_scb(), consider initiator ccbs to be any
that are not from the target mode group. This fixes
a bug where an external target reset CCB was not getting
cleaned up by the reset code.
Don't bother freezing a ccb in any of our "abort" routines
when the status is set to CAM_REQ_CMP. This can happen
for a target reset ccb.
aic7xxx.reg:
Reserve space for a completion queue. This will be used
to enhance performance in the near future.
aic7xxx.seq:
Remove an optimization for the 7890 autoflush bug that
turned out to allow, in rare cases, some data to get
lost.
Implement a simpler, faster, fix for the PCI_2_1 retry
bug that hangs the sequencer on an SCB dma for certain chips.
Test against SAVED_SCSIID rather than SELID during target
reselections. This is how we always did it in the past,
but the code was modified while trying to work around an
issue with the 7895. SAVED_SCSIID takes into account
twin channel adapters such as the 2742T, whereas SELID
does not have the channel bit. This caused invalid
selection warnings and other strangeness on these cards.
aic7xxx_pci.c
Use the correct mask for checking the generic aic7892
entry.
2001-02-10 18:04:27 +00:00
|
|
|
if (ahc_get_transaction_status(scbp) != CAM_REQ_CMP)
|
|
|
|
ahc_freeze_scb(scbp);
|
2000-09-16 20:02:28 +00:00
|
|
|
if ((scbp->flags & SCB_ACTIVE) == 0)
|
|
|
|
printf("Inactive SCB on pending list\n");
|
|
|
|
ahc_done(ahc, scbp);
|
|
|
|
found++;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
ahc_outb(ahc, SCBPTR, active_scb);
|
|
|
|
ahc_platform_abort_scbs(ahc, target, channel, lun, tag, role, status);
|
|
|
|
ahc_release_untagged_queues(ahc);
|
|
|
|
return found;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
ahc_reset_current_bus(struct ahc_softc *ahc)
|
|
|
|
{
|
|
|
|
uint8_t scsiseq;
|
|
|
|
|
|
|
|
ahc_outb(ahc, SIMODE1, ahc_inb(ahc, SIMODE1) & ~ENSCSIRST);
|
|
|
|
scsiseq = ahc_inb(ahc, SCSISEQ);
|
|
|
|
ahc_outb(ahc, SCSISEQ, scsiseq | SCSIRSTO);
|
2002-04-24 16:58:51 +00:00
|
|
|
ahc_flush_device_writes(ahc);
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_delay(AHC_BUSRESET_DELAY);
|
|
|
|
/* Turn off the bus reset */
|
|
|
|
ahc_outb(ahc, SCSISEQ, scsiseq & ~SCSIRSTO);
|
|
|
|
|
|
|
|
ahc_clear_intstat(ahc);
|
|
|
|
|
|
|
|
/* Re-enable reset interrupts */
|
|
|
|
ahc_outb(ahc, SIMODE1, ahc_inb(ahc, SIMODE1) | ENSCSIRST);
|
|
|
|
}
|
|
|
|
|
|
|
|
int
|
|
|
|
ahc_reset_channel(struct ahc_softc *ahc, char channel, int initiate_reset)
|
|
|
|
{
|
|
|
|
struct ahc_devinfo devinfo;
|
|
|
|
u_int initiator, target, max_scsiid;
|
|
|
|
u_int sblkctl;
|
2001-07-18 21:39:48 +00:00
|
|
|
u_int scsiseq;
|
|
|
|
u_int simode1;
|
2000-09-16 20:02:28 +00:00
|
|
|
int found;
|
|
|
|
int restart_needed;
|
|
|
|
char cur_channel;
|
|
|
|
|
|
|
|
ahc->pending_device = NULL;
|
|
|
|
|
|
|
|
ahc_compile_devinfo(&devinfo,
|
|
|
|
CAM_TARGET_WILDCARD,
|
|
|
|
CAM_TARGET_WILDCARD,
|
|
|
|
CAM_LUN_WILDCARD,
|
|
|
|
channel, ROLE_UNKNOWN);
|
This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
|
|
|
ahc_pause(ahc);
|
2000-09-16 20:02:28 +00:00
|
|
|
|
2000-10-05 04:24:14 +00:00
|
|
|
/* Make sure the sequencer is in a safe location. */
|
|
|
|
ahc_clear_critical_section(ahc);
|
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/*
|
|
|
|
* Run our command complete fifos to ensure that we perform
|
|
|
|
* completion processing on any commands that 'completed'
|
|
|
|
* before the reset occurred.
|
|
|
|
*/
|
|
|
|
ahc_run_qoutfifo(ahc);
|
|
|
|
#if AHC_TARGET_MODE
|
2002-04-24 16:58:51 +00:00
|
|
|
/*
|
|
|
|
* XXX - In Twin mode, the tqinfifo may have commands
|
|
|
|
* for an unaffected channel in it. However, if
|
|
|
|
* we have run out of ATIO resources to drain that
|
|
|
|
* queue, we may not get them all out here. Further,
|
|
|
|
* the blocked transactions for the reset channel
|
|
|
|
* should just be killed off, irrespecitve of whether
|
|
|
|
* we are blocked on ATIO resources. Write a routine
|
|
|
|
* to compact the tqinfifo appropriately.
|
|
|
|
*/
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
if ((ahc->flags & AHC_TARGETROLE) != 0) {
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_run_tqinfifo(ahc, /*paused*/TRUE);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Reset the bus if we are initiating this reset
|
|
|
|
*/
|
|
|
|
sblkctl = ahc_inb(ahc, SBLKCTL);
|
|
|
|
cur_channel = 'A';
|
|
|
|
if ((ahc->features & AHC_TWIN) != 0
|
|
|
|
&& ((sblkctl & SELBUSB) != 0))
|
|
|
|
cur_channel = 'B';
|
2001-07-18 21:39:48 +00:00
|
|
|
scsiseq = ahc_inb(ahc, SCSISEQ_TEMPLATE);
|
2000-09-16 20:02:28 +00:00
|
|
|
if (cur_channel != channel) {
|
|
|
|
/* Case 1: Command for another bus is active
|
|
|
|
* Stealthily reset the other bus without
|
|
|
|
* upsetting the current bus.
|
|
|
|
*/
|
|
|
|
ahc_outb(ahc, SBLKCTL, sblkctl ^ SELBUSB);
|
2001-07-18 21:39:48 +00:00
|
|
|
simode1 = ahc_inb(ahc, SIMODE1) & ~(ENBUSFREE|ENSCSIRST);
|
|
|
|
#if AHC_TARGET_MODE
|
|
|
|
/*
|
|
|
|
* Bus resets clear ENSELI, so we cannot
|
|
|
|
* defer re-enabling bus reset interrupts
|
|
|
|
* if we are in target mode.
|
|
|
|
*/
|
|
|
|
if ((ahc->flags & AHC_TARGETROLE) != 0)
|
2002-04-24 16:58:51 +00:00
|
|
|
simode1 |= ENSCSIRST;
|
2001-07-18 21:39:48 +00:00
|
|
|
#endif
|
2002-04-24 16:58:51 +00:00
|
|
|
ahc_outb(ahc, SIMODE1, simode1);
|
|
|
|
if (initiate_reset)
|
|
|
|
ahc_reset_current_bus(ahc);
|
|
|
|
ahc_clear_intstat(ahc);
|
2001-07-18 21:39:48 +00:00
|
|
|
ahc_outb(ahc, SCSISEQ, scsiseq & (ENSELI|ENRSELI|ENAUTOATNP));
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_outb(ahc, SBLKCTL, sblkctl);
|
|
|
|
restart_needed = FALSE;
|
|
|
|
} else {
|
|
|
|
/* Case 2: A command from this bus is active or we're idle */
|
2001-07-18 21:39:48 +00:00
|
|
|
simode1 = ahc_inb(ahc, SIMODE1) & ~(ENBUSFREE|ENSCSIRST);
|
|
|
|
#if AHC_TARGET_MODE
|
|
|
|
/*
|
|
|
|
* Bus resets clear ENSELI, so we cannot
|
|
|
|
* defer re-enabling bus reset interrupts
|
|
|
|
* if we are in target mode.
|
|
|
|
*/
|
|
|
|
if ((ahc->flags & AHC_TARGETROLE) != 0)
|
2002-04-24 16:58:51 +00:00
|
|
|
simode1 |= ENSCSIRST;
|
2001-07-18 21:39:48 +00:00
|
|
|
#endif
|
2002-04-24 16:58:51 +00:00
|
|
|
ahc_outb(ahc, SIMODE1, simode1);
|
|
|
|
if (initiate_reset)
|
|
|
|
ahc_reset_current_bus(ahc);
|
|
|
|
ahc_clear_intstat(ahc);
|
2001-07-18 21:39:48 +00:00
|
|
|
ahc_outb(ahc, SCSISEQ, scsiseq & (ENSELI|ENRSELI|ENAUTOATNP));
|
2000-09-16 20:02:28 +00:00
|
|
|
restart_needed = TRUE;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Clean up all the state information for the
|
|
|
|
* pending transactions on this bus.
|
|
|
|
*/
|
|
|
|
found = ahc_abort_scbs(ahc, CAM_TARGET_WILDCARD, channel,
|
|
|
|
CAM_LUN_WILDCARD, SCB_LIST_NULL,
|
|
|
|
ROLE_UNKNOWN, CAM_SCSI_BUS_RESET);
|
|
|
|
|
|
|
|
max_scsiid = (ahc->features & AHC_WIDE) ? 15 : 7;
|
|
|
|
|
|
|
|
#ifdef AHC_TARGET_MODE
|
|
|
|
/*
|
|
|
|
* Send an immediate notify ccb to all target more peripheral
|
|
|
|
* drivers affected by this action.
|
|
|
|
*/
|
|
|
|
for (target = 0; target <= max_scsiid; target++) {
|
2001-03-29 00:36:35 +00:00
|
|
|
struct ahc_tmode_tstate* tstate;
|
2000-09-16 20:02:28 +00:00
|
|
|
u_int lun;
|
|
|
|
|
|
|
|
tstate = ahc->enabled_targets[target];
|
|
|
|
if (tstate == NULL)
|
|
|
|
continue;
|
ahc_eisa.c:
ahc_pci.c:
Add detach support.
Make use of soft allocated on our behalf by newbus.
For PCI devices, disable the mapping type we aren't
using for extra protection from rogue code.
aic7xxx_93cx6.c:
aic7xxx_93cx6.h:
Sync perforce IDs.
aic7xxx_freebsd.c:
Capture the eventhandle returned by EVENTHANDER_REGISTER
so we can kill the handler off during detach.
Use AHC_* constants instead of hard coded numbers in a
few more places.
Test PPR option state when deciding to "really" negotiate
when the CAM_NEGOTIATE flag is passed in a CCB.
Make use of core "ahc_pause_and_flushwork" routine in our
timeout handler rather than re-inventing this code.
Cleanup all of our resources (really!) in ahc_platform_free().
We should be all set to become a module now.
Implement the core ahc_detach() routine shared by all of
the FreeBSD front-ends.
aic7xxx_freebsd.h:
Softc storage for our event handler.
Null implementation for the ahc_platform_flushwork() OSM
callback. FreeBSD doesn't need this as XPT callbacks are
safe from all contexts and are done directly in ahc_done().
aic7xxx_inline.h:
Implement new lazy interrupt scheme. To avoid an extra
PCI bus read, we first check our completion queues to
see if any work has completed. If work is available, we
assume that this is the source of the interrupt and skip
reading INTSTAT. Any remaining interrupt status will be
cleared by a second call to the interrupt handler should
the interrupt line still be asserted. This drops the
interrupt handler down to a single PCI bus read in the
common case of I/O completion. This is the same overhead
as in the not so distant past, but the extra sanity of
perforning a PCI read after clearing the command complete
interrupt and before running the completion queue to avoid
missing command complete interrupts added a cycle.
aic7xxx.c:
During initialization, be sure to initialize all scratch
ram locations before they are read to avoid parity errors.
In this case, we use a new function, ahc_unbusy_tcl() to
initialize the scratch ram busy target table.
Replace instances of ahc_index_busy_tcl() used to unbusy
a tcl without looking at the old value with ahc_unbusy_tcl().
Modify ahc_sent_msg so that it can find single byte messages.
ahc_sent_msg is now used to determine if a transfer negotiation
attempt resulted in a bus free.
Be more careful in filtering out only the SCSI interrupts
of interest in ahc_handle_scsiint.
Rearrange interrupt clearing code to ensure that at least
one PCI transaction occurrs after hitting CLRSINT1 and
writting to CLRINT. CLRSINT1 writes take a bit to
take effect, and the re-arrangement provides sufficient
delay to ensure the write to CLRINT is effective. The
old code might report a spurious interrupt on some "fast"
chipsets.
export ahc-update_target_msg_request for use by OSM code.
If a target does not respond to our ATN request, clear
it once we move to a non-message phase. This avoids
sending a MSG_NOOP in some later message out phase.
Use max lun and max target constants instead of
hard-coded values.
Use softc storage built into our device_t under FreeBSD.
Fix a bug in ahc_free() that caused us to delete
resources that were not allocated.
Clean up any tstate/lstate info in ahc_free().
Clear the powerdown state in ahc_reset() so that
registers can be accessed.
Add a preliminary function for pausing the chip and
processing any posted work.
Add a preliminary suspend and resume functions.
aic7xxx.h:
Limit the number of supported luns to 64. We don't
support information unit transfers, so this is the
maximum that makes sense for these chips.
Add a new flag AHC_ALL_INTERRUPTS that forces the
processing of all interrupt state in a single invokation
of ahc_intr(). When the flag is not set, we use the
lazy interrupt handling scheme.
Add data structures to store controller state while
we are suspended.
Use constants instead of hard coded values where appropriate.
Correct some harmless "unsigned/signed" conflicts.
aic7xxx.seq:
Only perform the SCSIBUSL fix on ULTRA2 or newer controllers.
Older controllers seem to be confused by this.
In target mode, ignore PHASEMIS during data phases.
This bit seems to be flakey on U160 controllers acting
in target mode.
aic7xxx_pci.c:
Add support for the 29160C CPCI adapter.
Add definitions for subvendor ID information
available for devices with the "9005" vendor id.
We currently use this information to determine
if a multi-function device doesn't have the second
channel hooked up on a board.
Add rudimentary power mode code so we can put the
controller into the D0 state. In the future this
will be an OSM callback so that in FreeBSD we don't
duplicate functionality provided by the PCI code.
The powerstate code was added after I'd completed
my regression tests on this code.
Only capture "left over BIOS state" if the POWRDN
setting is not set in HCNTRL.
In target mode, don't bother sending incremental
CRC data.
2000-12-20 01:11:37 +00:00
|
|
|
for (lun = 0; lun < AHC_NUM_LUNS; lun++) {
|
2001-03-29 00:36:35 +00:00
|
|
|
struct ahc_tmode_lstate* lstate;
|
2000-09-16 20:02:28 +00:00
|
|
|
|
|
|
|
lstate = tstate->enabled_luns[lun];
|
|
|
|
if (lstate == NULL)
|
|
|
|
continue;
|
|
|
|
|
|
|
|
ahc_queue_lstate_event(ahc, lstate, CAM_TARGET_WILDCARD,
|
|
|
|
EVENT_TYPE_BUS_RESET, /*arg*/0);
|
|
|
|
ahc_send_lstate_events(ahc, lstate);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
/* Notify the XPT that a bus reset occurred */
|
2000-09-22 22:18:05 +00:00
|
|
|
ahc_send_async(ahc, devinfo.channel, CAM_TARGET_WILDCARD,
|
2001-05-15 19:41:12 +00:00
|
|
|
CAM_LUN_WILDCARD, AC_BUS_RESET, NULL);
|
2000-09-16 20:02:28 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Revert to async/narrow transfers until we renegotiate.
|
|
|
|
*/
|
|
|
|
for (target = 0; target <= max_scsiid; target++) {
|
|
|
|
|
|
|
|
if (ahc->enabled_targets[target] == NULL)
|
|
|
|
continue;
|
|
|
|
for (initiator = 0; initiator <= max_scsiid; initiator++) {
|
|
|
|
struct ahc_devinfo devinfo;
|
|
|
|
|
|
|
|
ahc_compile_devinfo(&devinfo, target, initiator,
|
|
|
|
CAM_LUN_WILDCARD,
|
|
|
|
channel, ROLE_UNKNOWN);
|
|
|
|
ahc_set_width(ahc, &devinfo, MSG_EXT_WDTR_BUS_8_BIT,
|
|
|
|
AHC_TRANS_CUR, /*paused*/TRUE);
|
|
|
|
ahc_set_syncrate(ahc, &devinfo, /*syncrate*/NULL,
|
|
|
|
/*period*/0, /*offset*/0,
|
|
|
|
/*ppr_options*/0, AHC_TRANS_CUR,
|
|
|
|
/*paused*/TRUE);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (restart_needed)
|
This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
|
|
|
ahc_restart(ahc);
|
2000-09-16 20:02:28 +00:00
|
|
|
else
|
This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
|
|
|
ahc_unpause(ahc);
|
2000-09-16 20:02:28 +00:00
|
|
|
return found;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
/***************************** Residual Processing ****************************/
|
|
|
|
/*
|
|
|
|
* Calculate the residual for a just completed SCB.
|
|
|
|
*/
|
2001-05-15 19:41:12 +00:00
|
|
|
void
|
2002-04-24 16:58:51 +00:00
|
|
|
ahc_calc_residual(struct ahc_softc *ahc, struct scb *scb)
|
2000-09-16 20:02:28 +00:00
|
|
|
{
|
|
|
|
struct hardware_scb *hscb;
|
|
|
|
struct status_pkt *spkt;
|
2001-01-05 19:15:37 +00:00
|
|
|
uint32_t sgptr;
|
|
|
|
uint32_t resid_sgptr;
|
2000-09-16 20:02:28 +00:00
|
|
|
uint32_t resid;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* 5 cases.
|
|
|
|
* 1) No residual.
|
|
|
|
* SG_RESID_VALID clear in sgptr.
|
|
|
|
* 2) Transferless command
|
|
|
|
* 3) Never performed any transfers.
|
|
|
|
* sgptr has SG_FULL_RESID set.
|
|
|
|
* 4) No residual but target did not
|
|
|
|
* save data pointers after the
|
|
|
|
* last transfer, so sgptr was
|
|
|
|
* never updated.
|
|
|
|
* 5) We have a partial residual.
|
|
|
|
* Use residual_sgptr to determine
|
|
|
|
* where we are.
|
|
|
|
*/
|
|
|
|
|
|
|
|
hscb = scb->hscb;
|
2001-01-05 19:15:37 +00:00
|
|
|
sgptr = ahc_le32toh(hscb->sgptr);
|
|
|
|
if ((sgptr & SG_RESID_VALID) == 0)
|
2000-09-16 20:02:28 +00:00
|
|
|
/* Case 1 */
|
|
|
|
return;
|
2001-01-05 19:15:37 +00:00
|
|
|
sgptr &= ~SG_RESID_VALID;
|
2000-09-16 20:02:28 +00:00
|
|
|
|
2001-01-05 19:15:37 +00:00
|
|
|
if ((sgptr & SG_LIST_NULL) != 0)
|
2000-09-16 20:02:28 +00:00
|
|
|
/* Case 2 */
|
|
|
|
return;
|
|
|
|
|
|
|
|
spkt = &hscb->shared_data.status;
|
2001-01-05 19:15:37 +00:00
|
|
|
resid_sgptr = ahc_le32toh(spkt->residual_sg_ptr);
|
|
|
|
if ((sgptr & SG_FULL_RESID) != 0) {
|
2000-09-16 20:02:28 +00:00
|
|
|
/* Case 3 */
|
|
|
|
resid = ahc_get_transfer_length(scb);
|
2001-01-05 19:15:37 +00:00
|
|
|
} else if ((resid_sgptr & SG_LIST_NULL) != 0) {
|
2000-09-16 20:02:28 +00:00
|
|
|
/* Case 4 */
|
|
|
|
return;
|
2001-01-05 19:15:37 +00:00
|
|
|
} else if ((resid_sgptr & ~SG_PTR_MASK) != 0) {
|
|
|
|
panic("Bogus resid sgptr value 0x%x\n", resid_sgptr);
|
2000-09-16 20:02:28 +00:00
|
|
|
} else {
|
|
|
|
struct ahc_dma_seg *sg;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Remainder of the SG where the transfer
|
|
|
|
* stopped.
|
|
|
|
*/
|
2001-01-05 19:15:37 +00:00
|
|
|
resid = ahc_le32toh(spkt->residual_datacnt) & AHC_SG_LEN_MASK;
|
|
|
|
sg = ahc_sg_bus_to_virt(scb, resid_sgptr & SG_PTR_MASK);
|
2000-09-16 20:02:28 +00:00
|
|
|
|
|
|
|
/* The residual sg_ptr always points to the next sg */
|
|
|
|
sg--;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Add up the contents of all residual
|
|
|
|
* SG segments that are after the SG where
|
|
|
|
* the transfer stopped.
|
|
|
|
*/
|
2001-01-05 19:15:37 +00:00
|
|
|
while ((ahc_le32toh(sg->len) & AHC_DMA_LAST_SEG) == 0) {
|
2000-09-16 20:02:28 +00:00
|
|
|
sg++;
|
2001-01-05 19:15:37 +00:00
|
|
|
resid += ahc_le32toh(sg->len) & AHC_SG_LEN_MASK;
|
2000-09-16 20:02:28 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
if ((scb->flags & SCB_SENSE) == 0)
|
|
|
|
ahc_set_residual(scb, resid);
|
|
|
|
else
|
|
|
|
ahc_set_sense_residual(scb, resid);
|
|
|
|
|
|
|
|
#ifdef AHC_DEBUG
|
2002-08-31 06:41:37 +00:00
|
|
|
if ((ahc_debug & AHC_SHOW_MISC) != 0) {
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_print_path(ahc, scb);
|
aic7xxx.reg:
Add a constant for the controller's stack size and the
maximum scsi offset.
aic7xxx.seq:
Style nit. The source is implied to be the destination
unless overridden in an "and" instruction.
Update target mode code for changes in identify seen
sequencer flags.
aic7xxx_pci.c:
Ensure that the PCIERRGENDIS bit is set in the
PCIERRGEN config space register. Perhaps this
is a reason for the spurios parity errors reported
on U160 controllers.
Honor the AHC_NO_BIOS_INIT flag.
Allow PCI interrupt reporting to be disabled,
by clearing the PERRRESEN bit in the command
register. This option is now enabled via a new
softc flag: AHC_DISABLE_PCI_PERR.
Disable SERR and pause the controller prior to performing
our mmapped I/O test. This should handle the case of
controllers that do not "auto-access pause". For legacy
controllers, use SCB ram instead of scratch ram since
the latter may contain settings left over from the BIOS
that we will use if an seeprom is not found.
Make use of new ahc_inl/outl() inlines.
aic7xxx.h:
Reformat a few comments to follow driver style.
Add a controller flags that indicate that a controller
has not been initialized by the BIOS and whether to
disable PCI parity errors..
Remove stack probing softc members.
Add a few more syncrate constants that are useful in speed
fallback calculations.
Add the SHOW_MASKED_ERRORS debug flag.
aic7xxx.h:
aic7xxx.c:
Implement the SCB_SILENT flag. This is useful for
hushing up the driver during DV or other operations
that we expect to cause transmission errors. The
messages will still print if the SHOW_MASKED_ERRORS
debug option is enabled.
aic7xxx_inline.h:
Implement ahc_[in|out][w|l|q]. This removes the need
for manual 'or and shift" type operations throughout
the driver.
aic7xxx.c:
Move SELTO dignostic so that the SCB is still valid
when we use it for printing path information.
If we are narrow, limit syncrate to Ultra2.
Don't clobber ppr_options when forcing a renegotiation.
The current ppr_options may be referenced while queuing
new commands. Don't set our width to unknown when forcing
negotiation on narrow controllers. This will confuse the
negotiation code into negotiating with a wide message on
narrow controllers.
Add an "asserting atn" diagnostic with controller/target
information.
Remove the probe_stack code. The stack is always
4 deep on legacy controllers, so probing is pointless.
This also avoids an issue where probing the stack would
upset the aic7770.
In ahc_reset(), record whether or not we found the
controller in a reset state. If the controller was
already reset, assume that no BIOS has initialized
the controller and ignore left over scratch ram
settings.
Fix an ifdef bug that caused sequencer debugging to
be enabled always.
Clear the ultraenb flag in our tstate during startup.
The ultraenbled'ness of a device is recorded in the user
transfer settings. tstate->ultraenb bitmask indicates
which devices we have negotiated an ultra speed with.
Just after initialization, we are async. Setting the
ultraenb flag while async seems to be harmless, but it
was confusing to see the ULTRAENB flag set in the SCB.
Enhance residual diagnostic to indicate if the residual
if for sense information or normal data transfers.
Indicate the features, bugs, and flags set in the softc
that are used to control firmware patch download when
booting verbose.
In ahc_dump_card_state() fix a logic reversal. The
SCSIPHASE register only exists on U160 controllers.
The SCSISIGI register exists on all controllers. Not
the other way around. Also print out the ERROR register.
Allow ahc_dump_card_state() to be called when the sequencer
is not paused. Add dump card state markers as in the U320
driver.
2003-01-20 20:44:55 +00:00
|
|
|
printf("Handled %sResidual of %d bytes\n",
|
|
|
|
(scb->flags & SCB_SENSE) ? "Sense " : "", resid);
|
1998-09-15 07:24:17 +00:00
|
|
|
}
|
2000-09-16 20:02:28 +00:00
|
|
|
#endif
|
1998-09-15 07:24:17 +00:00
|
|
|
}
|
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/******************************* Target Mode **********************************/
|
|
|
|
#ifdef AHC_TARGET_MODE
|
|
|
|
/*
|
|
|
|
* Add a target mode event to this lun's queue
|
|
|
|
*/
|
|
|
|
static void
|
2001-03-29 00:36:35 +00:00
|
|
|
ahc_queue_lstate_event(struct ahc_softc *ahc, struct ahc_tmode_lstate *lstate,
|
2000-09-16 20:02:28 +00:00
|
|
|
u_int initiator_id, u_int event_type, u_int event_arg)
|
1998-09-20 05:06:10 +00:00
|
|
|
{
|
2000-09-16 20:02:28 +00:00
|
|
|
struct ahc_tmode_event *event;
|
|
|
|
int pending;
|
1998-09-20 05:06:10 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
xpt_freeze_devq(lstate->path, /*count*/1);
|
|
|
|
if (lstate->event_w_idx >= lstate->event_r_idx)
|
|
|
|
pending = lstate->event_w_idx - lstate->event_r_idx;
|
|
|
|
else
|
|
|
|
pending = AHC_TMODE_EVENT_BUFFER_SIZE + 1
|
|
|
|
- (lstate->event_r_idx - lstate->event_w_idx);
|
1998-09-20 05:06:10 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
if (event_type == EVENT_TYPE_BUS_RESET
|
|
|
|
|| event_type == MSG_BUS_DEV_RESET) {
|
|
|
|
/*
|
|
|
|
* Any earlier events are irrelevant, so reset our buffer.
|
|
|
|
* This has the effect of allowing us to deal with reset
|
|
|
|
* floods (an external device holding down the reset line)
|
|
|
|
* without losing the event that is really interesting.
|
|
|
|
*/
|
|
|
|
lstate->event_r_idx = 0;
|
|
|
|
lstate->event_w_idx = 0;
|
|
|
|
xpt_release_devq(lstate->path, pending, /*runqueue*/FALSE);
|
|
|
|
}
|
1998-09-20 05:06:10 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
if (pending == AHC_TMODE_EVENT_BUFFER_SIZE) {
|
|
|
|
xpt_print_path(lstate->path);
|
|
|
|
printf("immediate event %x:%x lost\n",
|
|
|
|
lstate->event_buffer[lstate->event_r_idx].event_type,
|
|
|
|
lstate->event_buffer[lstate->event_r_idx].event_arg);
|
|
|
|
lstate->event_r_idx++;
|
|
|
|
if (lstate->event_r_idx == AHC_TMODE_EVENT_BUFFER_SIZE)
|
|
|
|
lstate->event_r_idx = 0;
|
|
|
|
xpt_release_devq(lstate->path, /*count*/1, /*runqueue*/FALSE);
|
|
|
|
}
|
1998-09-20 05:06:10 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
event = &lstate->event_buffer[lstate->event_w_idx];
|
|
|
|
event->initiator_id = initiator_id;
|
|
|
|
event->event_type = event_type;
|
|
|
|
event->event_arg = event_arg;
|
|
|
|
lstate->event_w_idx++;
|
|
|
|
if (lstate->event_w_idx == AHC_TMODE_EVENT_BUFFER_SIZE)
|
|
|
|
lstate->event_w_idx = 0;
|
|
|
|
}
|
2000-07-18 20:12:14 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/*
|
|
|
|
* Send any target mode events queued up waiting
|
|
|
|
* for immediate notify resources.
|
|
|
|
*/
|
|
|
|
void
|
2001-03-29 00:36:35 +00:00
|
|
|
ahc_send_lstate_events(struct ahc_softc *ahc, struct ahc_tmode_lstate *lstate)
|
2000-09-16 20:02:28 +00:00
|
|
|
{
|
|
|
|
struct ccb_hdr *ccbh;
|
|
|
|
struct ccb_immed_notify *inot;
|
|
|
|
|
|
|
|
while (lstate->event_r_idx != lstate->event_w_idx
|
|
|
|
&& (ccbh = SLIST_FIRST(&lstate->immed_notifies)) != NULL) {
|
|
|
|
struct ahc_tmode_event *event;
|
|
|
|
|
|
|
|
event = &lstate->event_buffer[lstate->event_r_idx];
|
|
|
|
SLIST_REMOVE_HEAD(&lstate->immed_notifies, sim_links.sle);
|
|
|
|
inot = (struct ccb_immed_notify *)ccbh;
|
|
|
|
switch (event->event_type) {
|
|
|
|
case EVENT_TYPE_BUS_RESET:
|
|
|
|
ccbh->status = CAM_SCSI_BUS_RESET|CAM_DEV_QFRZN;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
ccbh->status = CAM_MESSAGE_RECV|CAM_DEV_QFRZN;
|
|
|
|
inot->message_args[0] = event->event_type;
|
|
|
|
inot->message_args[1] = event->event_arg;
|
|
|
|
break;
|
1998-09-20 05:06:10 +00:00
|
|
|
}
|
2000-09-16 20:02:28 +00:00
|
|
|
inot->initiator_id = event->initiator_id;
|
|
|
|
inot->sense_len = 0;
|
|
|
|
xpt_done((union ccb *)inot);
|
|
|
|
lstate->event_r_idx++;
|
|
|
|
if (lstate->event_r_idx == AHC_TMODE_EVENT_BUFFER_SIZE)
|
|
|
|
lstate->event_r_idx = 0;
|
1998-09-20 05:06:10 +00:00
|
|
|
}
|
|
|
|
}
|
2000-09-16 20:02:28 +00:00
|
|
|
#endif
|
1998-09-20 05:06:10 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/******************** Sequencer Program Patching/Download *********************/
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
#ifdef AHC_DUMP_SEQ
|
|
|
|
void
|
|
|
|
ahc_dumpseq(struct ahc_softc* ahc)
|
|
|
|
{
|
|
|
|
int i;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_outb(ahc, SEQCTL, PERRORDIS|FAILDIS|FASTMODE|LOADRAM);
|
|
|
|
ahc_outb(ahc, SEQADDR0, 0);
|
|
|
|
ahc_outb(ahc, SEQADDR1, 0);
|
2003-05-03 23:55:38 +00:00
|
|
|
for (i = 0; i < ahc->instruction_ram_size; i++) {
|
2000-09-16 20:02:28 +00:00
|
|
|
uint8_t ins_bytes[4];
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_insb(ahc, SEQRAM, ins_bytes, 4);
|
|
|
|
printf("0x%08x\n", ins_bytes[0] << 24
|
|
|
|
| ins_bytes[1] << 16
|
|
|
|
| ins_bytes[2] << 8
|
|
|
|
| ins_bytes[3]);
|
|
|
|
}
|
1998-09-15 07:24:17 +00:00
|
|
|
}
|
2000-09-16 20:02:28 +00:00
|
|
|
#endif
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2003-05-03 23:55:38 +00:00
|
|
|
static int
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_loadseq(struct ahc_softc *ahc)
|
1998-09-15 07:24:17 +00:00
|
|
|
{
|
2000-10-05 04:24:14 +00:00
|
|
|
struct cs cs_table[num_critical_sections];
|
Clean up error recovery code:
aic7xxx.c:
In target mode, reset the TQINPOS on every restart of the sequencer.
In the past we did this only during a bus reset, but there are other
reasons the sequencer might be reset.
In ahc_clear_critical_section(), disable pausing chip interrupts while
we step the sequencer out of a critical section. This avoids the
possibility of getting a pausing interrupt (unexpected bus free,
bus reset, etc.) that would prevent the sequencer from stepping.
Send the correct async notifications in the case of a BDR or bus reset.
In ahc_loadseq(), correct the calculation of our critical sections.
In some cases, the sections would be larger than needed.
aic7xxx.h:
Remove an unused SCB flag.
aic7xxx.seq:
MK_MESSAGE is cleared by the kernel, there is no need to waste
a sequencer instruction clearing it.
aic7xxx_freebsd.c:
Go through the host message loop instead of issuing a single
byte message directly in the ahc_timeout() case where we
are currently on the bus to the device. The effect is the same,
but this way we get a nice printf saying that an expected BDR
was delivered instead of an unexpected bus free.
If we are requeuing an SCB for an error recovery action, be sure
to set the DISCONNECTED flag in the in-core version of the SCB.
This ensures that, in the SCB-paging case, the sequencer will
still recognize the reselection as valid even if the version
of the SCB with this flag set was never previously paged out
to system memory. In the non-paging case, set the MK_MESSAGE
flag in SCB_CONTROL directly.
aic7xxx_pci.c:
Enable the Memeory Write and Invalidate bug workaround for
all aic7880 chips with revs < 1. This bug is rarely triggered
in FreeBSD as most transfers end on cache-aligned boundaries,
but a recheck of my references indicates that these chips
are affected.
2000-10-09 01:46:01 +00:00
|
|
|
u_int begin_set[num_critical_sections];
|
|
|
|
u_int end_set[num_critical_sections];
|
2000-10-05 04:24:14 +00:00
|
|
|
struct patch *cur_patch;
|
Clean up error recovery code:
aic7xxx.c:
In target mode, reset the TQINPOS on every restart of the sequencer.
In the past we did this only during a bus reset, but there are other
reasons the sequencer might be reset.
In ahc_clear_critical_section(), disable pausing chip interrupts while
we step the sequencer out of a critical section. This avoids the
possibility of getting a pausing interrupt (unexpected bus free,
bus reset, etc.) that would prevent the sequencer from stepping.
Send the correct async notifications in the case of a BDR or bus reset.
In ahc_loadseq(), correct the calculation of our critical sections.
In some cases, the sections would be larger than needed.
aic7xxx.h:
Remove an unused SCB flag.
aic7xxx.seq:
MK_MESSAGE is cleared by the kernel, there is no need to waste
a sequencer instruction clearing it.
aic7xxx_freebsd.c:
Go through the host message loop instead of issuing a single
byte message directly in the ahc_timeout() case where we
are currently on the bus to the device. The effect is the same,
but this way we get a nice printf saying that an expected BDR
was delivered instead of an unexpected bus free.
If we are requeuing an SCB for an error recovery action, be sure
to set the DISCONNECTED flag in the in-core version of the SCB.
This ensures that, in the SCB-paging case, the sequencer will
still recognize the reselection as valid even if the version
of the SCB with this flag set was never previously paged out
to system memory. In the non-paging case, set the MK_MESSAGE
flag in SCB_CONTROL directly.
aic7xxx_pci.c:
Enable the Memeory Write and Invalidate bug workaround for
all aic7880 chips with revs < 1. This bug is rarely triggered
in FreeBSD as most transfers end on cache-aligned boundaries,
but a recheck of my references indicates that these chips
are affected.
2000-10-09 01:46:01 +00:00
|
|
|
u_int cs_count;
|
2000-10-05 04:24:14 +00:00
|
|
|
u_int cur_cs;
|
|
|
|
u_int i;
|
|
|
|
u_int skip_addr;
|
|
|
|
u_int sg_prefetch_cnt;
|
2003-05-03 23:55:38 +00:00
|
|
|
int downloaded;
|
2000-10-05 04:24:14 +00:00
|
|
|
uint8_t download_consts[7];
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Start out with 0 critical sections
|
|
|
|
* that apply to this firmware load.
|
|
|
|
*/
|
Clean up error recovery code:
aic7xxx.c:
In target mode, reset the TQINPOS on every restart of the sequencer.
In the past we did this only during a bus reset, but there are other
reasons the sequencer might be reset.
In ahc_clear_critical_section(), disable pausing chip interrupts while
we step the sequencer out of a critical section. This avoids the
possibility of getting a pausing interrupt (unexpected bus free,
bus reset, etc.) that would prevent the sequencer from stepping.
Send the correct async notifications in the case of a BDR or bus reset.
In ahc_loadseq(), correct the calculation of our critical sections.
In some cases, the sections would be larger than needed.
aic7xxx.h:
Remove an unused SCB flag.
aic7xxx.seq:
MK_MESSAGE is cleared by the kernel, there is no need to waste
a sequencer instruction clearing it.
aic7xxx_freebsd.c:
Go through the host message loop instead of issuing a single
byte message directly in the ahc_timeout() case where we
are currently on the bus to the device. The effect is the same,
but this way we get a nice printf saying that an expected BDR
was delivered instead of an unexpected bus free.
If we are requeuing an SCB for an error recovery action, be sure
to set the DISCONNECTED flag in the in-core version of the SCB.
This ensures that, in the SCB-paging case, the sequencer will
still recognize the reselection as valid even if the version
of the SCB with this flag set was never previously paged out
to system memory. In the non-paging case, set the MK_MESSAGE
flag in SCB_CONTROL directly.
aic7xxx_pci.c:
Enable the Memeory Write and Invalidate bug workaround for
all aic7880 chips with revs < 1. This bug is rarely triggered
in FreeBSD as most transfers end on cache-aligned boundaries,
but a recheck of my references indicates that these chips
are affected.
2000-10-09 01:46:01 +00:00
|
|
|
cs_count = 0;
|
2000-10-05 04:24:14 +00:00
|
|
|
cur_cs = 0;
|
Clean up error recovery code:
aic7xxx.c:
In target mode, reset the TQINPOS on every restart of the sequencer.
In the past we did this only during a bus reset, but there are other
reasons the sequencer might be reset.
In ahc_clear_critical_section(), disable pausing chip interrupts while
we step the sequencer out of a critical section. This avoids the
possibility of getting a pausing interrupt (unexpected bus free,
bus reset, etc.) that would prevent the sequencer from stepping.
Send the correct async notifications in the case of a BDR or bus reset.
In ahc_loadseq(), correct the calculation of our critical sections.
In some cases, the sections would be larger than needed.
aic7xxx.h:
Remove an unused SCB flag.
aic7xxx.seq:
MK_MESSAGE is cleared by the kernel, there is no need to waste
a sequencer instruction clearing it.
aic7xxx_freebsd.c:
Go through the host message loop instead of issuing a single
byte message directly in the ahc_timeout() case where we
are currently on the bus to the device. The effect is the same,
but this way we get a nice printf saying that an expected BDR
was delivered instead of an unexpected bus free.
If we are requeuing an SCB for an error recovery action, be sure
to set the DISCONNECTED flag in the in-core version of the SCB.
This ensures that, in the SCB-paging case, the sequencer will
still recognize the reselection as valid even if the version
of the SCB with this flag set was never previously paged out
to system memory. In the non-paging case, set the MK_MESSAGE
flag in SCB_CONTROL directly.
aic7xxx_pci.c:
Enable the Memeory Write and Invalidate bug workaround for
all aic7880 chips with revs < 1. This bug is rarely triggered
in FreeBSD as most transfers end on cache-aligned boundaries,
but a recheck of my references indicates that these chips
are affected.
2000-10-09 01:46:01 +00:00
|
|
|
memset(begin_set, 0, sizeof(begin_set));
|
|
|
|
memset(end_set, 0, sizeof(end_set));
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/* Setup downloadable constant table */
|
|
|
|
download_consts[QOUTFIFO_OFFSET] = 0;
|
|
|
|
if (ahc->targetcmds != NULL)
|
|
|
|
download_consts[QOUTFIFO_OFFSET] += 32;
|
|
|
|
download_consts[QINFIFO_OFFSET] = download_consts[QOUTFIFO_OFFSET] + 1;
|
|
|
|
download_consts[CACHESIZE_MASK] = ahc->pci_cachesize - 1;
|
|
|
|
download_consts[INVERTED_CACHESIZE_MASK] = ~(ahc->pci_cachesize - 1);
|
2000-10-05 04:24:14 +00:00
|
|
|
sg_prefetch_cnt = ahc->pci_cachesize;
|
|
|
|
if (sg_prefetch_cnt < (2 * sizeof(struct ahc_dma_seg)))
|
|
|
|
sg_prefetch_cnt = 2 * sizeof(struct ahc_dma_seg);
|
|
|
|
download_consts[SG_PREFETCH_CNT] = sg_prefetch_cnt;
|
|
|
|
download_consts[SG_PREFETCH_ALIGN_MASK] = ~(sg_prefetch_cnt - 1);
|
|
|
|
download_consts[SG_PREFETCH_ADDR_MASK] = (sg_prefetch_cnt - 1);
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
cur_patch = patches;
|
|
|
|
downloaded = 0;
|
|
|
|
skip_addr = 0;
|
|
|
|
ahc_outb(ahc, SEQCTL, PERRORDIS|FAILDIS|FASTMODE|LOADRAM);
|
|
|
|
ahc_outb(ahc, SEQADDR0, 0);
|
|
|
|
ahc_outb(ahc, SEQADDR1, 0);
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
for (i = 0; i < sizeof(seqprog)/4; i++) {
|
|
|
|
if (ahc_check_patch(ahc, &cur_patch, i, &skip_addr) == 0) {
|
|
|
|
/*
|
|
|
|
* Don't download this instruction as it
|
|
|
|
* is in a patch that was removed.
|
|
|
|
*/
|
|
|
|
continue;
|
|
|
|
}
|
2003-05-03 23:55:38 +00:00
|
|
|
|
|
|
|
if (downloaded == ahc->instruction_ram_size) {
|
|
|
|
/*
|
|
|
|
* We're about to exceed the instruction
|
|
|
|
* storage capacity for this chip. Fail
|
|
|
|
* the load.
|
|
|
|
*/
|
|
|
|
printf("\n%s: Program too large for instruction memory "
|
|
|
|
"size of %d!\n", ahc_name(ahc),
|
|
|
|
ahc->instruction_ram_size);
|
|
|
|
return (ENOMEM);
|
|
|
|
}
|
|
|
|
|
2000-10-05 04:24:14 +00:00
|
|
|
/*
|
|
|
|
* Move through the CS table until we find a CS
|
|
|
|
* that might apply to this instruction.
|
|
|
|
*/
|
|
|
|
for (; cur_cs < num_critical_sections; cur_cs++) {
|
Clean up error recovery code:
aic7xxx.c:
In target mode, reset the TQINPOS on every restart of the sequencer.
In the past we did this only during a bus reset, but there are other
reasons the sequencer might be reset.
In ahc_clear_critical_section(), disable pausing chip interrupts while
we step the sequencer out of a critical section. This avoids the
possibility of getting a pausing interrupt (unexpected bus free,
bus reset, etc.) that would prevent the sequencer from stepping.
Send the correct async notifications in the case of a BDR or bus reset.
In ahc_loadseq(), correct the calculation of our critical sections.
In some cases, the sections would be larger than needed.
aic7xxx.h:
Remove an unused SCB flag.
aic7xxx.seq:
MK_MESSAGE is cleared by the kernel, there is no need to waste
a sequencer instruction clearing it.
aic7xxx_freebsd.c:
Go through the host message loop instead of issuing a single
byte message directly in the ahc_timeout() case where we
are currently on the bus to the device. The effect is the same,
but this way we get a nice printf saying that an expected BDR
was delivered instead of an unexpected bus free.
If we are requeuing an SCB for an error recovery action, be sure
to set the DISCONNECTED flag in the in-core version of the SCB.
This ensures that, in the SCB-paging case, the sequencer will
still recognize the reselection as valid even if the version
of the SCB with this flag set was never previously paged out
to system memory. In the non-paging case, set the MK_MESSAGE
flag in SCB_CONTROL directly.
aic7xxx_pci.c:
Enable the Memeory Write and Invalidate bug workaround for
all aic7880 chips with revs < 1. This bug is rarely triggered
in FreeBSD as most transfers end on cache-aligned boundaries,
but a recheck of my references indicates that these chips
are affected.
2000-10-09 01:46:01 +00:00
|
|
|
if (critical_sections[cur_cs].end <= i) {
|
|
|
|
if (begin_set[cs_count] == TRUE
|
|
|
|
&& end_set[cs_count] == FALSE) {
|
|
|
|
cs_table[cs_count].end = downloaded;
|
|
|
|
end_set[cs_count] = TRUE;
|
|
|
|
cs_count++;
|
2000-10-05 04:24:14 +00:00
|
|
|
}
|
Clean up error recovery code:
aic7xxx.c:
In target mode, reset the TQINPOS on every restart of the sequencer.
In the past we did this only during a bus reset, but there are other
reasons the sequencer might be reset.
In ahc_clear_critical_section(), disable pausing chip interrupts while
we step the sequencer out of a critical section. This avoids the
possibility of getting a pausing interrupt (unexpected bus free,
bus reset, etc.) that would prevent the sequencer from stepping.
Send the correct async notifications in the case of a BDR or bus reset.
In ahc_loadseq(), correct the calculation of our critical sections.
In some cases, the sections would be larger than needed.
aic7xxx.h:
Remove an unused SCB flag.
aic7xxx.seq:
MK_MESSAGE is cleared by the kernel, there is no need to waste
a sequencer instruction clearing it.
aic7xxx_freebsd.c:
Go through the host message loop instead of issuing a single
byte message directly in the ahc_timeout() case where we
are currently on the bus to the device. The effect is the same,
but this way we get a nice printf saying that an expected BDR
was delivered instead of an unexpected bus free.
If we are requeuing an SCB for an error recovery action, be sure
to set the DISCONNECTED flag in the in-core version of the SCB.
This ensures that, in the SCB-paging case, the sequencer will
still recognize the reselection as valid even if the version
of the SCB with this flag set was never previously paged out
to system memory. In the non-paging case, set the MK_MESSAGE
flag in SCB_CONTROL directly.
aic7xxx_pci.c:
Enable the Memeory Write and Invalidate bug workaround for
all aic7880 chips with revs < 1. This bug is rarely triggered
in FreeBSD as most transfers end on cache-aligned boundaries,
but a recheck of my references indicates that these chips
are affected.
2000-10-09 01:46:01 +00:00
|
|
|
continue;
|
2000-10-05 04:24:14 +00:00
|
|
|
}
|
Clean up error recovery code:
aic7xxx.c:
In target mode, reset the TQINPOS on every restart of the sequencer.
In the past we did this only during a bus reset, but there are other
reasons the sequencer might be reset.
In ahc_clear_critical_section(), disable pausing chip interrupts while
we step the sequencer out of a critical section. This avoids the
possibility of getting a pausing interrupt (unexpected bus free,
bus reset, etc.) that would prevent the sequencer from stepping.
Send the correct async notifications in the case of a BDR or bus reset.
In ahc_loadseq(), correct the calculation of our critical sections.
In some cases, the sections would be larger than needed.
aic7xxx.h:
Remove an unused SCB flag.
aic7xxx.seq:
MK_MESSAGE is cleared by the kernel, there is no need to waste
a sequencer instruction clearing it.
aic7xxx_freebsd.c:
Go through the host message loop instead of issuing a single
byte message directly in the ahc_timeout() case where we
are currently on the bus to the device. The effect is the same,
but this way we get a nice printf saying that an expected BDR
was delivered instead of an unexpected bus free.
If we are requeuing an SCB for an error recovery action, be sure
to set the DISCONNECTED flag in the in-core version of the SCB.
This ensures that, in the SCB-paging case, the sequencer will
still recognize the reselection as valid even if the version
of the SCB with this flag set was never previously paged out
to system memory. In the non-paging case, set the MK_MESSAGE
flag in SCB_CONTROL directly.
aic7xxx_pci.c:
Enable the Memeory Write and Invalidate bug workaround for
all aic7880 chips with revs < 1. This bug is rarely triggered
in FreeBSD as most transfers end on cache-aligned boundaries,
but a recheck of my references indicates that these chips
are affected.
2000-10-09 01:46:01 +00:00
|
|
|
if (critical_sections[cur_cs].begin <= i
|
|
|
|
&& begin_set[cs_count] == FALSE) {
|
|
|
|
cs_table[cs_count].begin = downloaded;
|
|
|
|
begin_set[cs_count] = TRUE;
|
|
|
|
}
|
|
|
|
break;
|
2000-10-05 04:24:14 +00:00
|
|
|
}
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_download_instr(ahc, i, download_consts);
|
|
|
|
downloaded++;
|
|
|
|
}
|
2000-10-05 04:24:14 +00:00
|
|
|
|
Clean up error recovery code:
aic7xxx.c:
In target mode, reset the TQINPOS on every restart of the sequencer.
In the past we did this only during a bus reset, but there are other
reasons the sequencer might be reset.
In ahc_clear_critical_section(), disable pausing chip interrupts while
we step the sequencer out of a critical section. This avoids the
possibility of getting a pausing interrupt (unexpected bus free,
bus reset, etc.) that would prevent the sequencer from stepping.
Send the correct async notifications in the case of a BDR or bus reset.
In ahc_loadseq(), correct the calculation of our critical sections.
In some cases, the sections would be larger than needed.
aic7xxx.h:
Remove an unused SCB flag.
aic7xxx.seq:
MK_MESSAGE is cleared by the kernel, there is no need to waste
a sequencer instruction clearing it.
aic7xxx_freebsd.c:
Go through the host message loop instead of issuing a single
byte message directly in the ahc_timeout() case where we
are currently on the bus to the device. The effect is the same,
but this way we get a nice printf saying that an expected BDR
was delivered instead of an unexpected bus free.
If we are requeuing an SCB for an error recovery action, be sure
to set the DISCONNECTED flag in the in-core version of the SCB.
This ensures that, in the SCB-paging case, the sequencer will
still recognize the reselection as valid even if the version
of the SCB with this flag set was never previously paged out
to system memory. In the non-paging case, set the MK_MESSAGE
flag in SCB_CONTROL directly.
aic7xxx_pci.c:
Enable the Memeory Write and Invalidate bug workaround for
all aic7880 chips with revs < 1. This bug is rarely triggered
in FreeBSD as most transfers end on cache-aligned boundaries,
but a recheck of my references indicates that these chips
are affected.
2000-10-09 01:46:01 +00:00
|
|
|
ahc->num_critical_sections = cs_count;
|
|
|
|
if (cs_count != 0) {
|
2000-10-05 04:24:14 +00:00
|
|
|
|
Clean up error recovery code:
aic7xxx.c:
In target mode, reset the TQINPOS on every restart of the sequencer.
In the past we did this only during a bus reset, but there are other
reasons the sequencer might be reset.
In ahc_clear_critical_section(), disable pausing chip interrupts while
we step the sequencer out of a critical section. This avoids the
possibility of getting a pausing interrupt (unexpected bus free,
bus reset, etc.) that would prevent the sequencer from stepping.
Send the correct async notifications in the case of a BDR or bus reset.
In ahc_loadseq(), correct the calculation of our critical sections.
In some cases, the sections would be larger than needed.
aic7xxx.h:
Remove an unused SCB flag.
aic7xxx.seq:
MK_MESSAGE is cleared by the kernel, there is no need to waste
a sequencer instruction clearing it.
aic7xxx_freebsd.c:
Go through the host message loop instead of issuing a single
byte message directly in the ahc_timeout() case where we
are currently on the bus to the device. The effect is the same,
but this way we get a nice printf saying that an expected BDR
was delivered instead of an unexpected bus free.
If we are requeuing an SCB for an error recovery action, be sure
to set the DISCONNECTED flag in the in-core version of the SCB.
This ensures that, in the SCB-paging case, the sequencer will
still recognize the reselection as valid even if the version
of the SCB with this flag set was never previously paged out
to system memory. In the non-paging case, set the MK_MESSAGE
flag in SCB_CONTROL directly.
aic7xxx_pci.c:
Enable the Memeory Write and Invalidate bug workaround for
all aic7880 chips with revs < 1. This bug is rarely triggered
in FreeBSD as most transfers end on cache-aligned boundaries,
but a recheck of my references indicates that these chips
are affected.
2000-10-09 01:46:01 +00:00
|
|
|
cs_count *= sizeof(struct cs);
|
|
|
|
ahc->critical_sections = malloc(cs_count, M_DEVBUF, M_NOWAIT);
|
2000-10-05 04:24:14 +00:00
|
|
|
if (ahc->critical_sections == NULL)
|
|
|
|
panic("ahc_loadseq: Could not malloc");
|
Clean up error recovery code:
aic7xxx.c:
In target mode, reset the TQINPOS on every restart of the sequencer.
In the past we did this only during a bus reset, but there are other
reasons the sequencer might be reset.
In ahc_clear_critical_section(), disable pausing chip interrupts while
we step the sequencer out of a critical section. This avoids the
possibility of getting a pausing interrupt (unexpected bus free,
bus reset, etc.) that would prevent the sequencer from stepping.
Send the correct async notifications in the case of a BDR or bus reset.
In ahc_loadseq(), correct the calculation of our critical sections.
In some cases, the sections would be larger than needed.
aic7xxx.h:
Remove an unused SCB flag.
aic7xxx.seq:
MK_MESSAGE is cleared by the kernel, there is no need to waste
a sequencer instruction clearing it.
aic7xxx_freebsd.c:
Go through the host message loop instead of issuing a single
byte message directly in the ahc_timeout() case where we
are currently on the bus to the device. The effect is the same,
but this way we get a nice printf saying that an expected BDR
was delivered instead of an unexpected bus free.
If we are requeuing an SCB for an error recovery action, be sure
to set the DISCONNECTED flag in the in-core version of the SCB.
This ensures that, in the SCB-paging case, the sequencer will
still recognize the reselection as valid even if the version
of the SCB with this flag set was never previously paged out
to system memory. In the non-paging case, set the MK_MESSAGE
flag in SCB_CONTROL directly.
aic7xxx_pci.c:
Enable the Memeory Write and Invalidate bug workaround for
all aic7880 chips with revs < 1. This bug is rarely triggered
in FreeBSD as most transfers end on cache-aligned boundaries,
but a recheck of my references indicates that these chips
are affected.
2000-10-09 01:46:01 +00:00
|
|
|
memcpy(ahc->critical_sections, cs_table, cs_count);
|
2000-10-05 04:24:14 +00:00
|
|
|
}
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_outb(ahc, SEQCTL, PERRORDIS|FAILDIS|FASTMODE);
|
This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
|
|
|
ahc_restart(ahc);
|
1998-09-15 07:24:17 +00:00
|
|
|
|
aic7xxx.reg:
Add a constant for the controller's stack size and the
maximum scsi offset.
aic7xxx.seq:
Style nit. The source is implied to be the destination
unless overridden in an "and" instruction.
Update target mode code for changes in identify seen
sequencer flags.
aic7xxx_pci.c:
Ensure that the PCIERRGENDIS bit is set in the
PCIERRGEN config space register. Perhaps this
is a reason for the spurios parity errors reported
on U160 controllers.
Honor the AHC_NO_BIOS_INIT flag.
Allow PCI interrupt reporting to be disabled,
by clearing the PERRRESEN bit in the command
register. This option is now enabled via a new
softc flag: AHC_DISABLE_PCI_PERR.
Disable SERR and pause the controller prior to performing
our mmapped I/O test. This should handle the case of
controllers that do not "auto-access pause". For legacy
controllers, use SCB ram instead of scratch ram since
the latter may contain settings left over from the BIOS
that we will use if an seeprom is not found.
Make use of new ahc_inl/outl() inlines.
aic7xxx.h:
Reformat a few comments to follow driver style.
Add a controller flags that indicate that a controller
has not been initialized by the BIOS and whether to
disable PCI parity errors..
Remove stack probing softc members.
Add a few more syncrate constants that are useful in speed
fallback calculations.
Add the SHOW_MASKED_ERRORS debug flag.
aic7xxx.h:
aic7xxx.c:
Implement the SCB_SILENT flag. This is useful for
hushing up the driver during DV or other operations
that we expect to cause transmission errors. The
messages will still print if the SHOW_MASKED_ERRORS
debug option is enabled.
aic7xxx_inline.h:
Implement ahc_[in|out][w|l|q]. This removes the need
for manual 'or and shift" type operations throughout
the driver.
aic7xxx.c:
Move SELTO dignostic so that the SCB is still valid
when we use it for printing path information.
If we are narrow, limit syncrate to Ultra2.
Don't clobber ppr_options when forcing a renegotiation.
The current ppr_options may be referenced while queuing
new commands. Don't set our width to unknown when forcing
negotiation on narrow controllers. This will confuse the
negotiation code into negotiating with a wide message on
narrow controllers.
Add an "asserting atn" diagnostic with controller/target
information.
Remove the probe_stack code. The stack is always
4 deep on legacy controllers, so probing is pointless.
This also avoids an issue where probing the stack would
upset the aic7770.
In ahc_reset(), record whether or not we found the
controller in a reset state. If the controller was
already reset, assume that no BIOS has initialized
the controller and ignore left over scratch ram
settings.
Fix an ifdef bug that caused sequencer debugging to
be enabled always.
Clear the ultraenb flag in our tstate during startup.
The ultraenbled'ness of a device is recorded in the user
transfer settings. tstate->ultraenb bitmask indicates
which devices we have negotiated an ultra speed with.
Just after initialization, we are async. Setting the
ultraenb flag while async seems to be harmless, but it
was confusing to see the ULTRAENB flag set in the SCB.
Enhance residual diagnostic to indicate if the residual
if for sense information or normal data transfers.
Indicate the features, bugs, and flags set in the softc
that are used to control firmware patch download when
booting verbose.
In ahc_dump_card_state() fix a logic reversal. The
SCSIPHASE register only exists on U160 controllers.
The SCSISIGI register exists on all controllers. Not
the other way around. Also print out the ERROR register.
Allow ahc_dump_card_state() to be called when the sequencer
is not paused. Add dump card state markers as in the U320
driver.
2003-01-20 20:44:55 +00:00
|
|
|
if (bootverbose) {
|
2000-09-16 20:02:28 +00:00
|
|
|
printf(" %d instructions downloaded\n", downloaded);
|
aic7xxx.reg:
Add a constant for the controller's stack size and the
maximum scsi offset.
aic7xxx.seq:
Style nit. The source is implied to be the destination
unless overridden in an "and" instruction.
Update target mode code for changes in identify seen
sequencer flags.
aic7xxx_pci.c:
Ensure that the PCIERRGENDIS bit is set in the
PCIERRGEN config space register. Perhaps this
is a reason for the spurios parity errors reported
on U160 controllers.
Honor the AHC_NO_BIOS_INIT flag.
Allow PCI interrupt reporting to be disabled,
by clearing the PERRRESEN bit in the command
register. This option is now enabled via a new
softc flag: AHC_DISABLE_PCI_PERR.
Disable SERR and pause the controller prior to performing
our mmapped I/O test. This should handle the case of
controllers that do not "auto-access pause". For legacy
controllers, use SCB ram instead of scratch ram since
the latter may contain settings left over from the BIOS
that we will use if an seeprom is not found.
Make use of new ahc_inl/outl() inlines.
aic7xxx.h:
Reformat a few comments to follow driver style.
Add a controller flags that indicate that a controller
has not been initialized by the BIOS and whether to
disable PCI parity errors..
Remove stack probing softc members.
Add a few more syncrate constants that are useful in speed
fallback calculations.
Add the SHOW_MASKED_ERRORS debug flag.
aic7xxx.h:
aic7xxx.c:
Implement the SCB_SILENT flag. This is useful for
hushing up the driver during DV or other operations
that we expect to cause transmission errors. The
messages will still print if the SHOW_MASKED_ERRORS
debug option is enabled.
aic7xxx_inline.h:
Implement ahc_[in|out][w|l|q]. This removes the need
for manual 'or and shift" type operations throughout
the driver.
aic7xxx.c:
Move SELTO dignostic so that the SCB is still valid
when we use it for printing path information.
If we are narrow, limit syncrate to Ultra2.
Don't clobber ppr_options when forcing a renegotiation.
The current ppr_options may be referenced while queuing
new commands. Don't set our width to unknown when forcing
negotiation on narrow controllers. This will confuse the
negotiation code into negotiating with a wide message on
narrow controllers.
Add an "asserting atn" diagnostic with controller/target
information.
Remove the probe_stack code. The stack is always
4 deep on legacy controllers, so probing is pointless.
This also avoids an issue where probing the stack would
upset the aic7770.
In ahc_reset(), record whether or not we found the
controller in a reset state. If the controller was
already reset, assume that no BIOS has initialized
the controller and ignore left over scratch ram
settings.
Fix an ifdef bug that caused sequencer debugging to
be enabled always.
Clear the ultraenb flag in our tstate during startup.
The ultraenbled'ness of a device is recorded in the user
transfer settings. tstate->ultraenb bitmask indicates
which devices we have negotiated an ultra speed with.
Just after initialization, we are async. Setting the
ultraenb flag while async seems to be harmless, but it
was confusing to see the ULTRAENB flag set in the SCB.
Enhance residual diagnostic to indicate if the residual
if for sense information or normal data transfers.
Indicate the features, bugs, and flags set in the softc
that are used to control firmware patch download when
booting verbose.
In ahc_dump_card_state() fix a logic reversal. The
SCSIPHASE register only exists on U160 controllers.
The SCSISIGI register exists on all controllers. Not
the other way around. Also print out the ERROR register.
Allow ahc_dump_card_state() to be called when the sequencer
is not paused. Add dump card state markers as in the U320
driver.
2003-01-20 20:44:55 +00:00
|
|
|
printf("%s: Features 0x%x, Bugs 0x%x, Flags 0x%x\n",
|
|
|
|
ahc_name(ahc), ahc->features, ahc->bugs, ahc->flags);
|
|
|
|
}
|
2003-05-03 23:55:38 +00:00
|
|
|
return (0);
|
2000-09-16 20:02:28 +00:00
|
|
|
}
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
static int
|
|
|
|
ahc_check_patch(struct ahc_softc *ahc, struct patch **start_patch,
|
|
|
|
u_int start_instr, u_int *skip_addr)
|
|
|
|
{
|
|
|
|
struct patch *cur_patch;
|
|
|
|
struct patch *last_patch;
|
|
|
|
u_int num_patches;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
num_patches = sizeof(patches)/sizeof(struct patch);
|
|
|
|
last_patch = &patches[num_patches];
|
|
|
|
cur_patch = *start_patch;
|
|
|
|
|
|
|
|
while (cur_patch < last_patch && start_instr == cur_patch->begin) {
|
|
|
|
|
|
|
|
if (cur_patch->patch_func(ahc) == 0) {
|
|
|
|
|
|
|
|
/* Start rejecting code */
|
|
|
|
*skip_addr = start_instr + cur_patch->skip_instr;
|
|
|
|
cur_patch += cur_patch->skip_patch;
|
|
|
|
} else {
|
|
|
|
/* Accepted this patch. Advance to the next
|
|
|
|
* one and wait for our intruction pointer to
|
|
|
|
* hit this point.
|
|
|
|
*/
|
|
|
|
cur_patch++;
|
|
|
|
}
|
1998-09-15 07:24:17 +00:00
|
|
|
}
|
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
*start_patch = cur_patch;
|
|
|
|
if (start_instr < *skip_addr)
|
|
|
|
/* Still skipping */
|
|
|
|
return (0);
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
return (1);
|
1998-09-15 07:24:17 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_download_instr(struct ahc_softc *ahc, u_int instrptr, uint8_t *dconsts)
|
1998-09-15 07:24:17 +00:00
|
|
|
{
|
2000-09-16 20:02:28 +00:00
|
|
|
union ins_formats instr;
|
|
|
|
struct ins_format1 *fmt1_ins;
|
|
|
|
struct ins_format3 *fmt3_ins;
|
|
|
|
u_int opcode;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2001-01-05 19:15:37 +00:00
|
|
|
/*
|
|
|
|
* The firmware is always compiled into a little endian format.
|
|
|
|
*/
|
|
|
|
instr.integer = ahc_le32toh(*(uint32_t*)&seqprog[instrptr * 4]);
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
fmt1_ins = &instr.format1;
|
|
|
|
fmt3_ins = NULL;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/* Pull the opcode */
|
|
|
|
opcode = instr.format1.opcode;
|
|
|
|
switch (opcode) {
|
|
|
|
case AIC_OP_JMP:
|
|
|
|
case AIC_OP_JC:
|
|
|
|
case AIC_OP_JNC:
|
|
|
|
case AIC_OP_CALL:
|
|
|
|
case AIC_OP_JNE:
|
|
|
|
case AIC_OP_JNZ:
|
|
|
|
case AIC_OP_JE:
|
|
|
|
case AIC_OP_JZ:
|
|
|
|
{
|
|
|
|
struct patch *cur_patch;
|
|
|
|
int address_offset;
|
|
|
|
u_int address;
|
|
|
|
u_int skip_addr;
|
|
|
|
u_int i;
|
1999-03-05 23:35:48 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
fmt3_ins = &instr.format3;
|
|
|
|
address_offset = 0;
|
|
|
|
address = fmt3_ins->address;
|
|
|
|
cur_patch = patches;
|
|
|
|
skip_addr = 0;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
for (i = 0; i < address;) {
|
1999-08-16 22:49:29 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_check_patch(ahc, &cur_patch, i, &skip_addr);
|
1999-08-16 22:49:29 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
if (skip_addr > i) {
|
|
|
|
int end_addr;
|
1999-08-16 22:49:29 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
end_addr = MIN(address, skip_addr);
|
|
|
|
address_offset += end_addr - i;
|
|
|
|
i = skip_addr;
|
|
|
|
} else {
|
|
|
|
i++;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
address -= address_offset;
|
|
|
|
fmt3_ins->address = address;
|
|
|
|
/* FALLTHROUGH */
|
|
|
|
}
|
|
|
|
case AIC_OP_OR:
|
|
|
|
case AIC_OP_AND:
|
|
|
|
case AIC_OP_XOR:
|
|
|
|
case AIC_OP_ADD:
|
|
|
|
case AIC_OP_ADC:
|
|
|
|
case AIC_OP_BMOV:
|
|
|
|
if (fmt1_ins->parity != 0) {
|
|
|
|
fmt1_ins->immediate = dconsts[fmt1_ins->immediate];
|
|
|
|
}
|
|
|
|
fmt1_ins->parity = 0;
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
if ((ahc->features & AHC_CMD_CHAN) == 0
|
|
|
|
&& opcode == AIC_OP_BMOV) {
|
|
|
|
/*
|
|
|
|
* Block move was added at the same time
|
|
|
|
* as the command channel. Verify that
|
|
|
|
* this is only a move of a single element
|
|
|
|
* and convert the BMOV to a MOV
|
|
|
|
* (AND with an immediate of FF).
|
|
|
|
*/
|
|
|
|
if (fmt1_ins->immediate != 1)
|
|
|
|
panic("%s: BMOV not supported\n",
|
|
|
|
ahc_name(ahc));
|
|
|
|
fmt1_ins->opcode = AIC_OP_AND;
|
|
|
|
fmt1_ins->immediate = 0xff;
|
|
|
|
}
|
2000-09-16 20:02:28 +00:00
|
|
|
/* FALLTHROUGH */
|
|
|
|
case AIC_OP_ROL:
|
|
|
|
if ((ahc->features & AHC_ULTRA2) != 0) {
|
|
|
|
int i, count;
|
2000-03-18 22:28:20 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/* Calculate odd parity for the instruction */
|
|
|
|
for (i = 0, count = 0; i < 31; i++) {
|
|
|
|
uint32_t mask;
|
|
|
|
|
|
|
|
mask = 0x01 << i;
|
|
|
|
if ((instr.integer & mask) != 0)
|
|
|
|
count++;
|
|
|
|
}
|
|
|
|
if ((count & 0x01) == 0)
|
|
|
|
instr.format1.parity = 1;
|
|
|
|
} else {
|
|
|
|
/* Compress the instruction for older sequencers */
|
|
|
|
if (fmt3_ins != NULL) {
|
|
|
|
instr.integer =
|
|
|
|
fmt3_ins->immediate
|
|
|
|
| (fmt3_ins->source << 8)
|
|
|
|
| (fmt3_ins->address << 16)
|
|
|
|
| (fmt3_ins->opcode << 25);
|
|
|
|
} else {
|
|
|
|
instr.integer =
|
|
|
|
fmt1_ins->immediate
|
|
|
|
| (fmt1_ins->source << 8)
|
|
|
|
| (fmt1_ins->destination << 16)
|
|
|
|
| (fmt1_ins->ret << 24)
|
|
|
|
| (fmt1_ins->opcode << 25);
|
2000-03-18 22:28:20 +00:00
|
|
|
}
|
1999-08-16 22:49:29 +00:00
|
|
|
}
|
2001-01-05 19:15:37 +00:00
|
|
|
/* The sequencer is a little endian cpu */
|
|
|
|
instr.integer = ahc_htole32(instr.integer);
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_outsb(ahc, SEQRAM, instr.bytes, 4);
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
panic("Unknown opcode encountered in seq program");
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2002-08-31 06:41:37 +00:00
|
|
|
int
|
|
|
|
ahc_print_register(ahc_reg_parse_entry_t *table, u_int num_entries,
|
|
|
|
const char *name, u_int address, u_int value,
|
|
|
|
u_int *cur_column, u_int wrap_point)
|
|
|
|
{
|
|
|
|
int printed;
|
|
|
|
u_int printed_mask;
|
|
|
|
|
2002-11-30 19:30:09 +00:00
|
|
|
if (cur_column != NULL && *cur_column >= wrap_point) {
|
2002-08-31 06:41:37 +00:00
|
|
|
printf("\n");
|
|
|
|
*cur_column = 0;
|
|
|
|
}
|
|
|
|
printed = printf("%s[0x%x]", name, value);
|
|
|
|
if (table == NULL) {
|
|
|
|
printed += printf(" ");
|
|
|
|
*cur_column += printed;
|
|
|
|
return (printed);
|
|
|
|
}
|
|
|
|
printed_mask = 0;
|
|
|
|
while (printed_mask != 0xFF) {
|
|
|
|
int entry;
|
|
|
|
|
|
|
|
for (entry = 0; entry < num_entries; entry++) {
|
|
|
|
if (((value & table[entry].mask)
|
|
|
|
!= table[entry].value)
|
|
|
|
|| ((printed_mask & table[entry].mask)
|
|
|
|
== table[entry].mask))
|
|
|
|
continue;
|
|
|
|
|
|
|
|
printed += printf("%s%s",
|
|
|
|
printed_mask == 0 ? ":(" : "|",
|
|
|
|
table[entry].name);
|
|
|
|
printed_mask |= table[entry].mask;
|
|
|
|
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
if (entry >= num_entries)
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
if (printed_mask != 0)
|
|
|
|
printed += printf(") ");
|
|
|
|
else
|
|
|
|
printed += printf(" ");
|
2002-11-30 19:30:09 +00:00
|
|
|
if (cur_column != NULL)
|
|
|
|
*cur_column += printed;
|
2002-08-31 06:41:37 +00:00
|
|
|
return (printed);
|
|
|
|
}
|
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
void
|
|
|
|
ahc_dump_card_state(struct ahc_softc *ahc)
|
|
|
|
{
|
2002-11-30 19:30:09 +00:00
|
|
|
struct scb *scb;
|
|
|
|
struct scb_tailq *untagged_q;
|
|
|
|
u_int cur_col;
|
aic7xxx.reg:
Add a constant for the controller's stack size and the
maximum scsi offset.
aic7xxx.seq:
Style nit. The source is implied to be the destination
unless overridden in an "and" instruction.
Update target mode code for changes in identify seen
sequencer flags.
aic7xxx_pci.c:
Ensure that the PCIERRGENDIS bit is set in the
PCIERRGEN config space register. Perhaps this
is a reason for the spurios parity errors reported
on U160 controllers.
Honor the AHC_NO_BIOS_INIT flag.
Allow PCI interrupt reporting to be disabled,
by clearing the PERRRESEN bit in the command
register. This option is now enabled via a new
softc flag: AHC_DISABLE_PCI_PERR.
Disable SERR and pause the controller prior to performing
our mmapped I/O test. This should handle the case of
controllers that do not "auto-access pause". For legacy
controllers, use SCB ram instead of scratch ram since
the latter may contain settings left over from the BIOS
that we will use if an seeprom is not found.
Make use of new ahc_inl/outl() inlines.
aic7xxx.h:
Reformat a few comments to follow driver style.
Add a controller flags that indicate that a controller
has not been initialized by the BIOS and whether to
disable PCI parity errors..
Remove stack probing softc members.
Add a few more syncrate constants that are useful in speed
fallback calculations.
Add the SHOW_MASKED_ERRORS debug flag.
aic7xxx.h:
aic7xxx.c:
Implement the SCB_SILENT flag. This is useful for
hushing up the driver during DV or other operations
that we expect to cause transmission errors. The
messages will still print if the SHOW_MASKED_ERRORS
debug option is enabled.
aic7xxx_inline.h:
Implement ahc_[in|out][w|l|q]. This removes the need
for manual 'or and shift" type operations throughout
the driver.
aic7xxx.c:
Move SELTO dignostic so that the SCB is still valid
when we use it for printing path information.
If we are narrow, limit syncrate to Ultra2.
Don't clobber ppr_options when forcing a renegotiation.
The current ppr_options may be referenced while queuing
new commands. Don't set our width to unknown when forcing
negotiation on narrow controllers. This will confuse the
negotiation code into negotiating with a wide message on
narrow controllers.
Add an "asserting atn" diagnostic with controller/target
information.
Remove the probe_stack code. The stack is always
4 deep on legacy controllers, so probing is pointless.
This also avoids an issue where probing the stack would
upset the aic7770.
In ahc_reset(), record whether or not we found the
controller in a reset state. If the controller was
already reset, assume that no BIOS has initialized
the controller and ignore left over scratch ram
settings.
Fix an ifdef bug that caused sequencer debugging to
be enabled always.
Clear the ultraenb flag in our tstate during startup.
The ultraenbled'ness of a device is recorded in the user
transfer settings. tstate->ultraenb bitmask indicates
which devices we have negotiated an ultra speed with.
Just after initialization, we are async. Setting the
ultraenb flag while async seems to be harmless, but it
was confusing to see the ULTRAENB flag set in the SCB.
Enhance residual diagnostic to indicate if the residual
if for sense information or normal data transfers.
Indicate the features, bugs, and flags set in the softc
that are used to control firmware patch download when
booting verbose.
In ahc_dump_card_state() fix a logic reversal. The
SCSIPHASE register only exists on U160 controllers.
The SCSISIGI register exists on all controllers. Not
the other way around. Also print out the ERROR register.
Allow ahc_dump_card_state() to be called when the sequencer
is not paused. Add dump card state markers as in the U320
driver.
2003-01-20 20:44:55 +00:00
|
|
|
int paused;
|
2002-11-30 19:30:09 +00:00
|
|
|
int target;
|
|
|
|
int maxtarget;
|
|
|
|
int i;
|
2001-03-29 00:36:35 +00:00
|
|
|
uint8_t last_phase;
|
2000-09-16 20:02:28 +00:00
|
|
|
uint8_t qinpos;
|
|
|
|
uint8_t qintail;
|
|
|
|
uint8_t qoutpos;
|
|
|
|
uint8_t scb_index;
|
|
|
|
uint8_t saved_scbptr;
|
|
|
|
|
aic7xxx.reg:
Add a constant for the controller's stack size and the
maximum scsi offset.
aic7xxx.seq:
Style nit. The source is implied to be the destination
unless overridden in an "and" instruction.
Update target mode code for changes in identify seen
sequencer flags.
aic7xxx_pci.c:
Ensure that the PCIERRGENDIS bit is set in the
PCIERRGEN config space register. Perhaps this
is a reason for the spurios parity errors reported
on U160 controllers.
Honor the AHC_NO_BIOS_INIT flag.
Allow PCI interrupt reporting to be disabled,
by clearing the PERRRESEN bit in the command
register. This option is now enabled via a new
softc flag: AHC_DISABLE_PCI_PERR.
Disable SERR and pause the controller prior to performing
our mmapped I/O test. This should handle the case of
controllers that do not "auto-access pause". For legacy
controllers, use SCB ram instead of scratch ram since
the latter may contain settings left over from the BIOS
that we will use if an seeprom is not found.
Make use of new ahc_inl/outl() inlines.
aic7xxx.h:
Reformat a few comments to follow driver style.
Add a controller flags that indicate that a controller
has not been initialized by the BIOS and whether to
disable PCI parity errors..
Remove stack probing softc members.
Add a few more syncrate constants that are useful in speed
fallback calculations.
Add the SHOW_MASKED_ERRORS debug flag.
aic7xxx.h:
aic7xxx.c:
Implement the SCB_SILENT flag. This is useful for
hushing up the driver during DV or other operations
that we expect to cause transmission errors. The
messages will still print if the SHOW_MASKED_ERRORS
debug option is enabled.
aic7xxx_inline.h:
Implement ahc_[in|out][w|l|q]. This removes the need
for manual 'or and shift" type operations throughout
the driver.
aic7xxx.c:
Move SELTO dignostic so that the SCB is still valid
when we use it for printing path information.
If we are narrow, limit syncrate to Ultra2.
Don't clobber ppr_options when forcing a renegotiation.
The current ppr_options may be referenced while queuing
new commands. Don't set our width to unknown when forcing
negotiation on narrow controllers. This will confuse the
negotiation code into negotiating with a wide message on
narrow controllers.
Add an "asserting atn" diagnostic with controller/target
information.
Remove the probe_stack code. The stack is always
4 deep on legacy controllers, so probing is pointless.
This also avoids an issue where probing the stack would
upset the aic7770.
In ahc_reset(), record whether or not we found the
controller in a reset state. If the controller was
already reset, assume that no BIOS has initialized
the controller and ignore left over scratch ram
settings.
Fix an ifdef bug that caused sequencer debugging to
be enabled always.
Clear the ultraenb flag in our tstate during startup.
The ultraenbled'ness of a device is recorded in the user
transfer settings. tstate->ultraenb bitmask indicates
which devices we have negotiated an ultra speed with.
Just after initialization, we are async. Setting the
ultraenb flag while async seems to be harmless, but it
was confusing to see the ULTRAENB flag set in the SCB.
Enhance residual diagnostic to indicate if the residual
if for sense information or normal data transfers.
Indicate the features, bugs, and flags set in the softc
that are used to control firmware patch download when
booting verbose.
In ahc_dump_card_state() fix a logic reversal. The
SCSIPHASE register only exists on U160 controllers.
The SCSISIGI register exists on all controllers. Not
the other way around. Also print out the ERROR register.
Allow ahc_dump_card_state() to be called when the sequencer
is not paused. Add dump card state markers as in the U320
driver.
2003-01-20 20:44:55 +00:00
|
|
|
if (ahc_is_paused(ahc)) {
|
|
|
|
paused = 1;
|
|
|
|
} else {
|
|
|
|
paused = 0;
|
|
|
|
ahc_pause(ahc);
|
|
|
|
}
|
2000-09-16 20:02:28 +00:00
|
|
|
|
aic7xxx.reg:
Add a constant for the controller's stack size and the
maximum scsi offset.
aic7xxx.seq:
Style nit. The source is implied to be the destination
unless overridden in an "and" instruction.
Update target mode code for changes in identify seen
sequencer flags.
aic7xxx_pci.c:
Ensure that the PCIERRGENDIS bit is set in the
PCIERRGEN config space register. Perhaps this
is a reason for the spurios parity errors reported
on U160 controllers.
Honor the AHC_NO_BIOS_INIT flag.
Allow PCI interrupt reporting to be disabled,
by clearing the PERRRESEN bit in the command
register. This option is now enabled via a new
softc flag: AHC_DISABLE_PCI_PERR.
Disable SERR and pause the controller prior to performing
our mmapped I/O test. This should handle the case of
controllers that do not "auto-access pause". For legacy
controllers, use SCB ram instead of scratch ram since
the latter may contain settings left over from the BIOS
that we will use if an seeprom is not found.
Make use of new ahc_inl/outl() inlines.
aic7xxx.h:
Reformat a few comments to follow driver style.
Add a controller flags that indicate that a controller
has not been initialized by the BIOS and whether to
disable PCI parity errors..
Remove stack probing softc members.
Add a few more syncrate constants that are useful in speed
fallback calculations.
Add the SHOW_MASKED_ERRORS debug flag.
aic7xxx.h:
aic7xxx.c:
Implement the SCB_SILENT flag. This is useful for
hushing up the driver during DV or other operations
that we expect to cause transmission errors. The
messages will still print if the SHOW_MASKED_ERRORS
debug option is enabled.
aic7xxx_inline.h:
Implement ahc_[in|out][w|l|q]. This removes the need
for manual 'or and shift" type operations throughout
the driver.
aic7xxx.c:
Move SELTO dignostic so that the SCB is still valid
when we use it for printing path information.
If we are narrow, limit syncrate to Ultra2.
Don't clobber ppr_options when forcing a renegotiation.
The current ppr_options may be referenced while queuing
new commands. Don't set our width to unknown when forcing
negotiation on narrow controllers. This will confuse the
negotiation code into negotiating with a wide message on
narrow controllers.
Add an "asserting atn" diagnostic with controller/target
information.
Remove the probe_stack code. The stack is always
4 deep on legacy controllers, so probing is pointless.
This also avoids an issue where probing the stack would
upset the aic7770.
In ahc_reset(), record whether or not we found the
controller in a reset state. If the controller was
already reset, assume that no BIOS has initialized
the controller and ignore left over scratch ram
settings.
Fix an ifdef bug that caused sequencer debugging to
be enabled always.
Clear the ultraenb flag in our tstate during startup.
The ultraenbled'ness of a device is recorded in the user
transfer settings. tstate->ultraenb bitmask indicates
which devices we have negotiated an ultra speed with.
Just after initialization, we are async. Setting the
ultraenb flag while async seems to be harmless, but it
was confusing to see the ULTRAENB flag set in the SCB.
Enhance residual diagnostic to indicate if the residual
if for sense information or normal data transfers.
Indicate the features, bugs, and flags set in the softc
that are used to control firmware patch download when
booting verbose.
In ahc_dump_card_state() fix a logic reversal. The
SCSIPHASE register only exists on U160 controllers.
The SCSISIGI register exists on all controllers. Not
the other way around. Also print out the ERROR register.
Allow ahc_dump_card_state() to be called when the sequencer
is not paused. Add dump card state markers as in the U320
driver.
2003-01-20 20:44:55 +00:00
|
|
|
saved_scbptr = ahc_inb(ahc, SCBPTR);
|
2001-03-29 00:36:35 +00:00
|
|
|
last_phase = ahc_inb(ahc, LASTPHASE);
|
aic7xxx.reg:
Add a constant for the controller's stack size and the
maximum scsi offset.
aic7xxx.seq:
Style nit. The source is implied to be the destination
unless overridden in an "and" instruction.
Update target mode code for changes in identify seen
sequencer flags.
aic7xxx_pci.c:
Ensure that the PCIERRGENDIS bit is set in the
PCIERRGEN config space register. Perhaps this
is a reason for the spurios parity errors reported
on U160 controllers.
Honor the AHC_NO_BIOS_INIT flag.
Allow PCI interrupt reporting to be disabled,
by clearing the PERRRESEN bit in the command
register. This option is now enabled via a new
softc flag: AHC_DISABLE_PCI_PERR.
Disable SERR and pause the controller prior to performing
our mmapped I/O test. This should handle the case of
controllers that do not "auto-access pause". For legacy
controllers, use SCB ram instead of scratch ram since
the latter may contain settings left over from the BIOS
that we will use if an seeprom is not found.
Make use of new ahc_inl/outl() inlines.
aic7xxx.h:
Reformat a few comments to follow driver style.
Add a controller flags that indicate that a controller
has not been initialized by the BIOS and whether to
disable PCI parity errors..
Remove stack probing softc members.
Add a few more syncrate constants that are useful in speed
fallback calculations.
Add the SHOW_MASKED_ERRORS debug flag.
aic7xxx.h:
aic7xxx.c:
Implement the SCB_SILENT flag. This is useful for
hushing up the driver during DV or other operations
that we expect to cause transmission errors. The
messages will still print if the SHOW_MASKED_ERRORS
debug option is enabled.
aic7xxx_inline.h:
Implement ahc_[in|out][w|l|q]. This removes the need
for manual 'or and shift" type operations throughout
the driver.
aic7xxx.c:
Move SELTO dignostic so that the SCB is still valid
when we use it for printing path information.
If we are narrow, limit syncrate to Ultra2.
Don't clobber ppr_options when forcing a renegotiation.
The current ppr_options may be referenced while queuing
new commands. Don't set our width to unknown when forcing
negotiation on narrow controllers. This will confuse the
negotiation code into negotiating with a wide message on
narrow controllers.
Add an "asserting atn" diagnostic with controller/target
information.
Remove the probe_stack code. The stack is always
4 deep on legacy controllers, so probing is pointless.
This also avoids an issue where probing the stack would
upset the aic7770.
In ahc_reset(), record whether or not we found the
controller in a reset state. If the controller was
already reset, assume that no BIOS has initialized
the controller and ignore left over scratch ram
settings.
Fix an ifdef bug that caused sequencer debugging to
be enabled always.
Clear the ultraenb flag in our tstate during startup.
The ultraenbled'ness of a device is recorded in the user
transfer settings. tstate->ultraenb bitmask indicates
which devices we have negotiated an ultra speed with.
Just after initialization, we are async. Setting the
ultraenb flag while async seems to be harmless, but it
was confusing to see the ULTRAENB flag set in the SCB.
Enhance residual diagnostic to indicate if the residual
if for sense information or normal data transfers.
Indicate the features, bugs, and flags set in the softc
that are used to control firmware patch download when
booting verbose.
In ahc_dump_card_state() fix a logic reversal. The
SCSIPHASE register only exists on U160 controllers.
The SCSISIGI register exists on all controllers. Not
the other way around. Also print out the ERROR register.
Allow ahc_dump_card_state() to be called when the sequencer
is not paused. Add dump card state markers as in the U320
driver.
2003-01-20 20:44:55 +00:00
|
|
|
printf(">>>>>>>>>>>>>>>>>> Dump Card State Begins <<<<<<<<<<<<<<<<<\n"
|
|
|
|
"%s: Dumping Card State %s, at SEQADDR 0x%x\n",
|
2001-03-29 00:36:35 +00:00
|
|
|
ahc_name(ahc), ahc_lookup_phase_entry(last_phase)->phasemsg,
|
Sync Perforce IDs, add tranceiver state change support, and correct
numerous error recovery buglets.
Many thanks to Tor Egge for his assistance in diagnosing problems with
the error recovery code.
aic7xxx.c:
Report missed bus free events using their own sequencer interrupt
code to avoid confusion with other "bad phase" interrupts.
Remove a delay used in debugging. This delay could only be hit
in certain, very extreme, error recovery scenarios.
Handle transceiver state changes correctly. You can now
plug an SE device into a hot-plug LVD bus without hanging
the controller.
When stepping through a critical section, panic if we step
more than a reasonable number of times.
After a bus reset, disable bus reset interupts until we either
our first attempt to (re)select another device, or another device
attemps to select us. This removes the need to busy wait in
kernel for the scsi reset line to fall yet still ensures we
see any reset events that impact the state of either our initiator
or target roles. Before this change, we had the potential of
servicing a "storm" of reset interrupts if the reset line was
held for a significant amount of time.
Indicate the current sequencer address whenever we dump the
card's state.
aic7xxx.reg:
Transceiver state change register definitions.
Add the missed bussfree sequencer interrupt code.
Re-enable the scsi reset interrupt if it has been
disabled before every attempt to (re)select a device
and when we have been selected as a target.
When being (re)selected, check to see if the selection
dissappeared just after we enabled our bus free interrupt.
If the bus has gone free again, go back to the idle loop
and wait for another selection.
Note two locations where we should change our behavior
if ATN is still raised. If ATN is raised during the
presentation of a command complete or disconnect message,
we should ignore the message and expect the target to put
us in msgout phase. We don't currently do this as it
requires some code re-arrangement so that critical sections
can be properly placed around our handling of these two
events. Otherwise, we cannot guarantee that the check of
ATN is atomic relative to our acking of the message in
byte (the kernel could assert ATN).
Only set the IDENTIFY_SEEN flag after we have settled
on the SCB for this transaction. The kernel looks at
this flag before assuming that SCB_TAG is valid. This
avoids confusion during certain types of error recovery.
Add a critical section around findSCB. We cannot allow
the kernel to remove an entry from the disconnected
list while we are traversing it. Ditto for get_free_or_disc_scb.
aic7xxx_freebsd.c:
Only assume that SCB_TAG is accurate if IDENTIFY_SEEN is
set in SEQ_FLAGS.
Fix a typo that caused us to execute some code for the
non-SCB paging case when paging SCBs. This only occurred
during error recovery.
2000-11-10 20:13:41 +00:00
|
|
|
ahc_inb(ahc, SEQADDR0) | (ahc_inb(ahc, SEQADDR1) << 8));
|
aic7xxx.reg:
Add a constant for the controller's stack size and the
maximum scsi offset.
aic7xxx.seq:
Style nit. The source is implied to be the destination
unless overridden in an "and" instruction.
Update target mode code for changes in identify seen
sequencer flags.
aic7xxx_pci.c:
Ensure that the PCIERRGENDIS bit is set in the
PCIERRGEN config space register. Perhaps this
is a reason for the spurios parity errors reported
on U160 controllers.
Honor the AHC_NO_BIOS_INIT flag.
Allow PCI interrupt reporting to be disabled,
by clearing the PERRRESEN bit in the command
register. This option is now enabled via a new
softc flag: AHC_DISABLE_PCI_PERR.
Disable SERR and pause the controller prior to performing
our mmapped I/O test. This should handle the case of
controllers that do not "auto-access pause". For legacy
controllers, use SCB ram instead of scratch ram since
the latter may contain settings left over from the BIOS
that we will use if an seeprom is not found.
Make use of new ahc_inl/outl() inlines.
aic7xxx.h:
Reformat a few comments to follow driver style.
Add a controller flags that indicate that a controller
has not been initialized by the BIOS and whether to
disable PCI parity errors..
Remove stack probing softc members.
Add a few more syncrate constants that are useful in speed
fallback calculations.
Add the SHOW_MASKED_ERRORS debug flag.
aic7xxx.h:
aic7xxx.c:
Implement the SCB_SILENT flag. This is useful for
hushing up the driver during DV or other operations
that we expect to cause transmission errors. The
messages will still print if the SHOW_MASKED_ERRORS
debug option is enabled.
aic7xxx_inline.h:
Implement ahc_[in|out][w|l|q]. This removes the need
for manual 'or and shift" type operations throughout
the driver.
aic7xxx.c:
Move SELTO dignostic so that the SCB is still valid
when we use it for printing path information.
If we are narrow, limit syncrate to Ultra2.
Don't clobber ppr_options when forcing a renegotiation.
The current ppr_options may be referenced while queuing
new commands. Don't set our width to unknown when forcing
negotiation on narrow controllers. This will confuse the
negotiation code into negotiating with a wide message on
narrow controllers.
Add an "asserting atn" diagnostic with controller/target
information.
Remove the probe_stack code. The stack is always
4 deep on legacy controllers, so probing is pointless.
This also avoids an issue where probing the stack would
upset the aic7770.
In ahc_reset(), record whether or not we found the
controller in a reset state. If the controller was
already reset, assume that no BIOS has initialized
the controller and ignore left over scratch ram
settings.
Fix an ifdef bug that caused sequencer debugging to
be enabled always.
Clear the ultraenb flag in our tstate during startup.
The ultraenbled'ness of a device is recorded in the user
transfer settings. tstate->ultraenb bitmask indicates
which devices we have negotiated an ultra speed with.
Just after initialization, we are async. Setting the
ultraenb flag while async seems to be harmless, but it
was confusing to see the ULTRAENB flag set in the SCB.
Enhance residual diagnostic to indicate if the residual
if for sense information or normal data transfers.
Indicate the features, bugs, and flags set in the softc
that are used to control firmware patch download when
booting verbose.
In ahc_dump_card_state() fix a logic reversal. The
SCSIPHASE register only exists on U160 controllers.
The SCSISIGI register exists on all controllers. Not
the other way around. Also print out the ERROR register.
Allow ahc_dump_card_state() to be called when the sequencer
is not paused. Add dump card state markers as in the U320
driver.
2003-01-20 20:44:55 +00:00
|
|
|
if (paused)
|
|
|
|
printf("Card was paused\n");
|
2001-08-05 22:20:12 +00:00
|
|
|
printf("ACCUM = 0x%x, SINDEX = 0x%x, DINDEX = 0x%x, ARG_2 = 0x%x\n",
|
|
|
|
ahc_inb(ahc, ACCUM), ahc_inb(ahc, SINDEX), ahc_inb(ahc, DINDEX),
|
|
|
|
ahc_inb(ahc, ARG_2));
|
2002-04-24 16:58:51 +00:00
|
|
|
printf("HCNT = 0x%x SCBPTR = 0x%x\n", ahc_inb(ahc, HCNT),
|
|
|
|
ahc_inb(ahc, SCBPTR));
|
2002-11-30 19:30:09 +00:00
|
|
|
cur_col = 0;
|
2001-03-29 00:36:35 +00:00
|
|
|
if ((ahc->features & AHC_DT) != 0)
|
aic7xxx.reg:
Add a constant for the controller's stack size and the
maximum scsi offset.
aic7xxx.seq:
Style nit. The source is implied to be the destination
unless overridden in an "and" instruction.
Update target mode code for changes in identify seen
sequencer flags.
aic7xxx_pci.c:
Ensure that the PCIERRGENDIS bit is set in the
PCIERRGEN config space register. Perhaps this
is a reason for the spurios parity errors reported
on U160 controllers.
Honor the AHC_NO_BIOS_INIT flag.
Allow PCI interrupt reporting to be disabled,
by clearing the PERRRESEN bit in the command
register. This option is now enabled via a new
softc flag: AHC_DISABLE_PCI_PERR.
Disable SERR and pause the controller prior to performing
our mmapped I/O test. This should handle the case of
controllers that do not "auto-access pause". For legacy
controllers, use SCB ram instead of scratch ram since
the latter may contain settings left over from the BIOS
that we will use if an seeprom is not found.
Make use of new ahc_inl/outl() inlines.
aic7xxx.h:
Reformat a few comments to follow driver style.
Add a controller flags that indicate that a controller
has not been initialized by the BIOS and whether to
disable PCI parity errors..
Remove stack probing softc members.
Add a few more syncrate constants that are useful in speed
fallback calculations.
Add the SHOW_MASKED_ERRORS debug flag.
aic7xxx.h:
aic7xxx.c:
Implement the SCB_SILENT flag. This is useful for
hushing up the driver during DV or other operations
that we expect to cause transmission errors. The
messages will still print if the SHOW_MASKED_ERRORS
debug option is enabled.
aic7xxx_inline.h:
Implement ahc_[in|out][w|l|q]. This removes the need
for manual 'or and shift" type operations throughout
the driver.
aic7xxx.c:
Move SELTO dignostic so that the SCB is still valid
when we use it for printing path information.
If we are narrow, limit syncrate to Ultra2.
Don't clobber ppr_options when forcing a renegotiation.
The current ppr_options may be referenced while queuing
new commands. Don't set our width to unknown when forcing
negotiation on narrow controllers. This will confuse the
negotiation code into negotiating with a wide message on
narrow controllers.
Add an "asserting atn" diagnostic with controller/target
information.
Remove the probe_stack code. The stack is always
4 deep on legacy controllers, so probing is pointless.
This also avoids an issue where probing the stack would
upset the aic7770.
In ahc_reset(), record whether or not we found the
controller in a reset state. If the controller was
already reset, assume that no BIOS has initialized
the controller and ignore left over scratch ram
settings.
Fix an ifdef bug that caused sequencer debugging to
be enabled always.
Clear the ultraenb flag in our tstate during startup.
The ultraenbled'ness of a device is recorded in the user
transfer settings. tstate->ultraenb bitmask indicates
which devices we have negotiated an ultra speed with.
Just after initialization, we are async. Setting the
ultraenb flag while async seems to be harmless, but it
was confusing to see the ULTRAENB flag set in the SCB.
Enhance residual diagnostic to indicate if the residual
if for sense information or normal data transfers.
Indicate the features, bugs, and flags set in the softc
that are used to control firmware patch download when
booting verbose.
In ahc_dump_card_state() fix a logic reversal. The
SCSIPHASE register only exists on U160 controllers.
The SCSISIGI register exists on all controllers. Not
the other way around. Also print out the ERROR register.
Allow ahc_dump_card_state() to be called when the sequencer
is not paused. Add dump card state markers as in the U320
driver.
2003-01-20 20:44:55 +00:00
|
|
|
ahc_scsiphase_print(ahc_inb(ahc, SCSIPHASE), &cur_col, 50);
|
|
|
|
ahc_scsisigi_print(ahc_inb(ahc, SCSISIGI), &cur_col, 50);
|
|
|
|
ahc_error_print(ahc_inb(ahc, ERROR), &cur_col, 50);
|
2002-11-30 19:30:09 +00:00
|
|
|
ahc_scsibusl_print(ahc_inb(ahc, SCSIBUSL), &cur_col, 50);
|
|
|
|
ahc_lastphase_print(ahc_inb(ahc, LASTPHASE), &cur_col, 50);
|
|
|
|
ahc_scsiseq_print(ahc_inb(ahc, SCSISEQ), &cur_col, 50);
|
|
|
|
ahc_sblkctl_print(ahc_inb(ahc, SBLKCTL), &cur_col, 50);
|
aic7xxx.reg:
Add a constant for the controller's stack size and the
maximum scsi offset.
aic7xxx.seq:
Style nit. The source is implied to be the destination
unless overridden in an "and" instruction.
Update target mode code for changes in identify seen
sequencer flags.
aic7xxx_pci.c:
Ensure that the PCIERRGENDIS bit is set in the
PCIERRGEN config space register. Perhaps this
is a reason for the spurios parity errors reported
on U160 controllers.
Honor the AHC_NO_BIOS_INIT flag.
Allow PCI interrupt reporting to be disabled,
by clearing the PERRRESEN bit in the command
register. This option is now enabled via a new
softc flag: AHC_DISABLE_PCI_PERR.
Disable SERR and pause the controller prior to performing
our mmapped I/O test. This should handle the case of
controllers that do not "auto-access pause". For legacy
controllers, use SCB ram instead of scratch ram since
the latter may contain settings left over from the BIOS
that we will use if an seeprom is not found.
Make use of new ahc_inl/outl() inlines.
aic7xxx.h:
Reformat a few comments to follow driver style.
Add a controller flags that indicate that a controller
has not been initialized by the BIOS and whether to
disable PCI parity errors..
Remove stack probing softc members.
Add a few more syncrate constants that are useful in speed
fallback calculations.
Add the SHOW_MASKED_ERRORS debug flag.
aic7xxx.h:
aic7xxx.c:
Implement the SCB_SILENT flag. This is useful for
hushing up the driver during DV or other operations
that we expect to cause transmission errors. The
messages will still print if the SHOW_MASKED_ERRORS
debug option is enabled.
aic7xxx_inline.h:
Implement ahc_[in|out][w|l|q]. This removes the need
for manual 'or and shift" type operations throughout
the driver.
aic7xxx.c:
Move SELTO dignostic so that the SCB is still valid
when we use it for printing path information.
If we are narrow, limit syncrate to Ultra2.
Don't clobber ppr_options when forcing a renegotiation.
The current ppr_options may be referenced while queuing
new commands. Don't set our width to unknown when forcing
negotiation on narrow controllers. This will confuse the
negotiation code into negotiating with a wide message on
narrow controllers.
Add an "asserting atn" diagnostic with controller/target
information.
Remove the probe_stack code. The stack is always
4 deep on legacy controllers, so probing is pointless.
This also avoids an issue where probing the stack would
upset the aic7770.
In ahc_reset(), record whether or not we found the
controller in a reset state. If the controller was
already reset, assume that no BIOS has initialized
the controller and ignore left over scratch ram
settings.
Fix an ifdef bug that caused sequencer debugging to
be enabled always.
Clear the ultraenb flag in our tstate during startup.
The ultraenbled'ness of a device is recorded in the user
transfer settings. tstate->ultraenb bitmask indicates
which devices we have negotiated an ultra speed with.
Just after initialization, we are async. Setting the
ultraenb flag while async seems to be harmless, but it
was confusing to see the ULTRAENB flag set in the SCB.
Enhance residual diagnostic to indicate if the residual
if for sense information or normal data transfers.
Indicate the features, bugs, and flags set in the softc
that are used to control firmware patch download when
booting verbose.
In ahc_dump_card_state() fix a logic reversal. The
SCSIPHASE register only exists on U160 controllers.
The SCSISIGI register exists on all controllers. Not
the other way around. Also print out the ERROR register.
Allow ahc_dump_card_state() to be called when the sequencer
is not paused. Add dump card state markers as in the U320
driver.
2003-01-20 20:44:55 +00:00
|
|
|
ahc_scsirate_print(ahc_inb(ahc, SCSIRATE), &cur_col, 50);
|
2002-11-30 19:30:09 +00:00
|
|
|
ahc_seqctl_print(ahc_inb(ahc, SEQCTL), &cur_col, 50);
|
|
|
|
ahc_seq_flags_print(ahc_inb(ahc, SEQ_FLAGS), &cur_col, 50);
|
|
|
|
ahc_sstat0_print(ahc_inb(ahc, SSTAT0), &cur_col, 50);
|
|
|
|
ahc_sstat1_print(ahc_inb(ahc, SSTAT1), &cur_col, 50);
|
|
|
|
ahc_sstat2_print(ahc_inb(ahc, SSTAT2), &cur_col, 50);
|
|
|
|
ahc_sstat3_print(ahc_inb(ahc, SSTAT3), &cur_col, 50);
|
|
|
|
ahc_simode0_print(ahc_inb(ahc, SIMODE0), &cur_col, 50);
|
|
|
|
ahc_simode1_print(ahc_inb(ahc, SIMODE1), &cur_col, 50);
|
|
|
|
ahc_sxfrctl0_print(ahc_inb(ahc, SXFRCTL0), &cur_col, 50);
|
|
|
|
ahc_dfcntrl_print(ahc_inb(ahc, DFCNTRL), &cur_col, 50);
|
|
|
|
ahc_dfstatus_print(ahc_inb(ahc, DFSTATUS), &cur_col, 50);
|
|
|
|
if (cur_col != 0)
|
|
|
|
printf("\n");
|
|
|
|
printf("STACK:");
|
aic7xxx.reg:
Add a constant for the controller's stack size and the
maximum scsi offset.
aic7xxx.seq:
Style nit. The source is implied to be the destination
unless overridden in an "and" instruction.
Update target mode code for changes in identify seen
sequencer flags.
aic7xxx_pci.c:
Ensure that the PCIERRGENDIS bit is set in the
PCIERRGEN config space register. Perhaps this
is a reason for the spurios parity errors reported
on U160 controllers.
Honor the AHC_NO_BIOS_INIT flag.
Allow PCI interrupt reporting to be disabled,
by clearing the PERRRESEN bit in the command
register. This option is now enabled via a new
softc flag: AHC_DISABLE_PCI_PERR.
Disable SERR and pause the controller prior to performing
our mmapped I/O test. This should handle the case of
controllers that do not "auto-access pause". For legacy
controllers, use SCB ram instead of scratch ram since
the latter may contain settings left over from the BIOS
that we will use if an seeprom is not found.
Make use of new ahc_inl/outl() inlines.
aic7xxx.h:
Reformat a few comments to follow driver style.
Add a controller flags that indicate that a controller
has not been initialized by the BIOS and whether to
disable PCI parity errors..
Remove stack probing softc members.
Add a few more syncrate constants that are useful in speed
fallback calculations.
Add the SHOW_MASKED_ERRORS debug flag.
aic7xxx.h:
aic7xxx.c:
Implement the SCB_SILENT flag. This is useful for
hushing up the driver during DV or other operations
that we expect to cause transmission errors. The
messages will still print if the SHOW_MASKED_ERRORS
debug option is enabled.
aic7xxx_inline.h:
Implement ahc_[in|out][w|l|q]. This removes the need
for manual 'or and shift" type operations throughout
the driver.
aic7xxx.c:
Move SELTO dignostic so that the SCB is still valid
when we use it for printing path information.
If we are narrow, limit syncrate to Ultra2.
Don't clobber ppr_options when forcing a renegotiation.
The current ppr_options may be referenced while queuing
new commands. Don't set our width to unknown when forcing
negotiation on narrow controllers. This will confuse the
negotiation code into negotiating with a wide message on
narrow controllers.
Add an "asserting atn" diagnostic with controller/target
information.
Remove the probe_stack code. The stack is always
4 deep on legacy controllers, so probing is pointless.
This also avoids an issue where probing the stack would
upset the aic7770.
In ahc_reset(), record whether or not we found the
controller in a reset state. If the controller was
already reset, assume that no BIOS has initialized
the controller and ignore left over scratch ram
settings.
Fix an ifdef bug that caused sequencer debugging to
be enabled always.
Clear the ultraenb flag in our tstate during startup.
The ultraenbled'ness of a device is recorded in the user
transfer settings. tstate->ultraenb bitmask indicates
which devices we have negotiated an ultra speed with.
Just after initialization, we are async. Setting the
ultraenb flag while async seems to be harmless, but it
was confusing to see the ULTRAENB flag set in the SCB.
Enhance residual diagnostic to indicate if the residual
if for sense information or normal data transfers.
Indicate the features, bugs, and flags set in the softc
that are used to control firmware patch download when
booting verbose.
In ahc_dump_card_state() fix a logic reversal. The
SCSIPHASE register only exists on U160 controllers.
The SCSISIGI register exists on all controllers. Not
the other way around. Also print out the ERROR register.
Allow ahc_dump_card_state() to be called when the sequencer
is not paused. Add dump card state markers as in the U320
driver.
2003-01-20 20:44:55 +00:00
|
|
|
for (i = 0; i < STACK_SIZE; i++)
|
|
|
|
printf(" 0x%x", ahc_inb(ahc, STACK)|(ahc_inb(ahc, STACK) << 8));
|
2002-11-30 19:30:09 +00:00
|
|
|
printf("\nSCB count = %d\n", ahc->scb_data->numscbs);
|
2001-01-22 21:03:48 +00:00
|
|
|
printf("Kernel NEXTQSCB = %d\n", ahc->next_queued_scb->hscb->tag);
|
|
|
|
printf("Card NEXTQSCB = %d\n", ahc_inb(ahc, NEXT_QUEUED_SCB));
|
2000-09-16 20:02:28 +00:00
|
|
|
/* QINFIFO */
|
|
|
|
printf("QINFIFO entries: ");
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
if ((ahc->features & AHC_QUEUE_REGS) != 0) {
|
|
|
|
qinpos = ahc_inb(ahc, SNSCB_QOFF);
|
|
|
|
ahc_outb(ahc, SNSCB_QOFF, qinpos);
|
|
|
|
} else
|
|
|
|
qinpos = ahc_inb(ahc, QINPOS);
|
2000-09-16 20:02:28 +00:00
|
|
|
qintail = ahc->qinfifonext;
|
|
|
|
while (qinpos != qintail) {
|
|
|
|
printf("%d ", ahc->qinfifo[qinpos]);
|
|
|
|
qinpos++;
|
1999-08-16 22:49:29 +00:00
|
|
|
}
|
2000-09-16 20:02:28 +00:00
|
|
|
printf("\n");
|
1999-08-16 22:49:29 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
printf("Waiting Queue entries: ");
|
|
|
|
scb_index = ahc_inb(ahc, WAITING_SCBH);
|
|
|
|
i = 0;
|
|
|
|
while (scb_index != SCB_LIST_NULL && i++ < 256) {
|
|
|
|
ahc_outb(ahc, SCBPTR, scb_index);
|
|
|
|
printf("%d:%d ", scb_index, ahc_inb(ahc, SCB_TAG));
|
|
|
|
scb_index = ahc_inb(ahc, SCB_NEXT);
|
|
|
|
}
|
|
|
|
printf("\n");
|
|
|
|
|
|
|
|
printf("Disconnected Queue entries: ");
|
|
|
|
scb_index = ahc_inb(ahc, DISCONNECTED_SCBH);
|
|
|
|
i = 0;
|
|
|
|
while (scb_index != SCB_LIST_NULL && i++ < 256) {
|
|
|
|
ahc_outb(ahc, SCBPTR, scb_index);
|
|
|
|
printf("%d:%d ", scb_index, ahc_inb(ahc, SCB_TAG));
|
|
|
|
scb_index = ahc_inb(ahc, SCB_NEXT);
|
|
|
|
}
|
|
|
|
printf("\n");
|
|
|
|
|
2001-07-18 21:39:48 +00:00
|
|
|
ahc_sync_qoutfifo(ahc, BUS_DMASYNC_POSTREAD);
|
2000-09-16 20:02:28 +00:00
|
|
|
printf("QOUTFIFO entries: ");
|
|
|
|
qoutpos = ahc->qoutfifonext;
|
|
|
|
i = 0;
|
|
|
|
while (ahc->qoutfifo[qoutpos] != SCB_LIST_NULL && i++ < 256) {
|
|
|
|
printf("%d ", ahc->qoutfifo[qoutpos]);
|
|
|
|
qoutpos++;
|
1999-03-05 23:35:48 +00:00
|
|
|
}
|
2000-09-16 20:02:28 +00:00
|
|
|
printf("\n");
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
printf("Sequencer Free SCB List: ");
|
|
|
|
scb_index = ahc_inb(ahc, FREE_SCBH);
|
|
|
|
i = 0;
|
|
|
|
while (scb_index != SCB_LIST_NULL && i++ < 256) {
|
|
|
|
ahc_outb(ahc, SCBPTR, scb_index);
|
|
|
|
printf("%d ", scb_index);
|
|
|
|
scb_index = ahc_inb(ahc, SCB_NEXT);
|
|
|
|
}
|
|
|
|
printf("\n");
|
1999-08-16 22:49:29 +00:00
|
|
|
|
2002-04-24 16:58:51 +00:00
|
|
|
printf("Sequencer SCB Info: ");
|
|
|
|
for (i = 0; i < ahc->scb_data->maxhscbs; i++) {
|
|
|
|
ahc_outb(ahc, SCBPTR, i);
|
2002-11-30 19:30:09 +00:00
|
|
|
cur_col = printf("\n%3d ", i);
|
|
|
|
|
|
|
|
ahc_scb_control_print(ahc_inb(ahc, SCB_CONTROL), &cur_col, 60);
|
|
|
|
ahc_scb_scsiid_print(ahc_inb(ahc, SCB_SCSIID), &cur_col, 60);
|
|
|
|
ahc_scb_lun_print(ahc_inb(ahc, SCB_LUN), &cur_col, 60);
|
|
|
|
ahc_scb_tag_print(ahc_inb(ahc, SCB_TAG), &cur_col, 60);
|
2002-04-24 16:58:51 +00:00
|
|
|
}
|
|
|
|
printf("\n");
|
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
printf("Pending list: ");
|
|
|
|
i = 0;
|
|
|
|
LIST_FOREACH(scb, &ahc->pending_scbs, pending_links) {
|
|
|
|
if (i++ > 256)
|
|
|
|
break;
|
2002-11-30 19:30:09 +00:00
|
|
|
cur_col = printf("\n%3d ", scb->hscb->tag);
|
|
|
|
ahc_scb_control_print(scb->hscb->control, &cur_col, 60);
|
|
|
|
ahc_scb_scsiid_print(scb->hscb->scsiid, &cur_col, 60);
|
|
|
|
ahc_scb_lun_print(scb->hscb->lun, &cur_col, 60);
|
2001-08-05 22:20:12 +00:00
|
|
|
if ((ahc->flags & AHC_PAGESCBS) == 0) {
|
|
|
|
ahc_outb(ahc, SCBPTR, scb->hscb->tag);
|
2002-11-30 19:30:09 +00:00
|
|
|
printf("(");
|
|
|
|
ahc_scb_control_print(ahc_inb(ahc, SCB_CONTROL),
|
|
|
|
&cur_col, 60);
|
|
|
|
ahc_scb_tag_print(ahc_inb(ahc, SCB_TAG), &cur_col, 60);
|
|
|
|
printf(")");
|
2001-08-05 22:20:12 +00:00
|
|
|
}
|
2000-09-16 20:02:28 +00:00
|
|
|
}
|
|
|
|
printf("\n");
|
1999-08-16 22:49:29 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
printf("Kernel Free SCB list: ");
|
|
|
|
i = 0;
|
|
|
|
SLIST_FOREACH(scb, &ahc->scb_data->free_scbs, links.sle) {
|
|
|
|
if (i++ > 256)
|
|
|
|
break;
|
|
|
|
printf("%d ", scb->hscb->tag);
|
|
|
|
}
|
|
|
|
printf("\n");
|
1999-08-16 22:49:29 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
maxtarget = (ahc->features & (AHC_WIDE|AHC_TWIN)) ? 15 : 7;
|
|
|
|
for (target = 0; target <= maxtarget; target++) {
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
untagged_q = &ahc->untagged_queues[target];
|
2000-09-16 20:02:28 +00:00
|
|
|
if (TAILQ_FIRST(untagged_q) == NULL)
|
|
|
|
continue;
|
|
|
|
printf("Untagged Q(%d): ", target);
|
|
|
|
i = 0;
|
|
|
|
TAILQ_FOREACH(scb, untagged_q, links.tqe) {
|
|
|
|
if (i++ > 256)
|
|
|
|
break;
|
|
|
|
printf("%d ", scb->hscb->tag);
|
1999-08-16 22:49:29 +00:00
|
|
|
}
|
2000-09-16 20:02:28 +00:00
|
|
|
printf("\n");
|
1999-08-16 22:49:29 +00:00
|
|
|
}
|
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_platform_dump_card_state(ahc);
|
aic7xxx.reg:
Add a constant for the controller's stack size and the
maximum scsi offset.
aic7xxx.seq:
Style nit. The source is implied to be the destination
unless overridden in an "and" instruction.
Update target mode code for changes in identify seen
sequencer flags.
aic7xxx_pci.c:
Ensure that the PCIERRGENDIS bit is set in the
PCIERRGEN config space register. Perhaps this
is a reason for the spurios parity errors reported
on U160 controllers.
Honor the AHC_NO_BIOS_INIT flag.
Allow PCI interrupt reporting to be disabled,
by clearing the PERRRESEN bit in the command
register. This option is now enabled via a new
softc flag: AHC_DISABLE_PCI_PERR.
Disable SERR and pause the controller prior to performing
our mmapped I/O test. This should handle the case of
controllers that do not "auto-access pause". For legacy
controllers, use SCB ram instead of scratch ram since
the latter may contain settings left over from the BIOS
that we will use if an seeprom is not found.
Make use of new ahc_inl/outl() inlines.
aic7xxx.h:
Reformat a few comments to follow driver style.
Add a controller flags that indicate that a controller
has not been initialized by the BIOS and whether to
disable PCI parity errors..
Remove stack probing softc members.
Add a few more syncrate constants that are useful in speed
fallback calculations.
Add the SHOW_MASKED_ERRORS debug flag.
aic7xxx.h:
aic7xxx.c:
Implement the SCB_SILENT flag. This is useful for
hushing up the driver during DV or other operations
that we expect to cause transmission errors. The
messages will still print if the SHOW_MASKED_ERRORS
debug option is enabled.
aic7xxx_inline.h:
Implement ahc_[in|out][w|l|q]. This removes the need
for manual 'or and shift" type operations throughout
the driver.
aic7xxx.c:
Move SELTO dignostic so that the SCB is still valid
when we use it for printing path information.
If we are narrow, limit syncrate to Ultra2.
Don't clobber ppr_options when forcing a renegotiation.
The current ppr_options may be referenced while queuing
new commands. Don't set our width to unknown when forcing
negotiation on narrow controllers. This will confuse the
negotiation code into negotiating with a wide message on
narrow controllers.
Add an "asserting atn" diagnostic with controller/target
information.
Remove the probe_stack code. The stack is always
4 deep on legacy controllers, so probing is pointless.
This also avoids an issue where probing the stack would
upset the aic7770.
In ahc_reset(), record whether or not we found the
controller in a reset state. If the controller was
already reset, assume that no BIOS has initialized
the controller and ignore left over scratch ram
settings.
Fix an ifdef bug that caused sequencer debugging to
be enabled always.
Clear the ultraenb flag in our tstate during startup.
The ultraenbled'ness of a device is recorded in the user
transfer settings. tstate->ultraenb bitmask indicates
which devices we have negotiated an ultra speed with.
Just after initialization, we are async. Setting the
ultraenb flag while async seems to be harmless, but it
was confusing to see the ULTRAENB flag set in the SCB.
Enhance residual diagnostic to indicate if the residual
if for sense information or normal data transfers.
Indicate the features, bugs, and flags set in the softc
that are used to control firmware patch download when
booting verbose.
In ahc_dump_card_state() fix a logic reversal. The
SCSIPHASE register only exists on U160 controllers.
The SCSISIGI register exists on all controllers. Not
the other way around. Also print out the ERROR register.
Allow ahc_dump_card_state() to be called when the sequencer
is not paused. Add dump card state markers as in the U320
driver.
2003-01-20 20:44:55 +00:00
|
|
|
printf("\n<<<<<<<<<<<<<<<<< Dump Card State Ends >>>>>>>>>>>>>>>>>>\n");
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_outb(ahc, SCBPTR, saved_scbptr);
|
aic7xxx.reg:
Add a constant for the controller's stack size and the
maximum scsi offset.
aic7xxx.seq:
Style nit. The source is implied to be the destination
unless overridden in an "and" instruction.
Update target mode code for changes in identify seen
sequencer flags.
aic7xxx_pci.c:
Ensure that the PCIERRGENDIS bit is set in the
PCIERRGEN config space register. Perhaps this
is a reason for the spurios parity errors reported
on U160 controllers.
Honor the AHC_NO_BIOS_INIT flag.
Allow PCI interrupt reporting to be disabled,
by clearing the PERRRESEN bit in the command
register. This option is now enabled via a new
softc flag: AHC_DISABLE_PCI_PERR.
Disable SERR and pause the controller prior to performing
our mmapped I/O test. This should handle the case of
controllers that do not "auto-access pause". For legacy
controllers, use SCB ram instead of scratch ram since
the latter may contain settings left over from the BIOS
that we will use if an seeprom is not found.
Make use of new ahc_inl/outl() inlines.
aic7xxx.h:
Reformat a few comments to follow driver style.
Add a controller flags that indicate that a controller
has not been initialized by the BIOS and whether to
disable PCI parity errors..
Remove stack probing softc members.
Add a few more syncrate constants that are useful in speed
fallback calculations.
Add the SHOW_MASKED_ERRORS debug flag.
aic7xxx.h:
aic7xxx.c:
Implement the SCB_SILENT flag. This is useful for
hushing up the driver during DV or other operations
that we expect to cause transmission errors. The
messages will still print if the SHOW_MASKED_ERRORS
debug option is enabled.
aic7xxx_inline.h:
Implement ahc_[in|out][w|l|q]. This removes the need
for manual 'or and shift" type operations throughout
the driver.
aic7xxx.c:
Move SELTO dignostic so that the SCB is still valid
when we use it for printing path information.
If we are narrow, limit syncrate to Ultra2.
Don't clobber ppr_options when forcing a renegotiation.
The current ppr_options may be referenced while queuing
new commands. Don't set our width to unknown when forcing
negotiation on narrow controllers. This will confuse the
negotiation code into negotiating with a wide message on
narrow controllers.
Add an "asserting atn" diagnostic with controller/target
information.
Remove the probe_stack code. The stack is always
4 deep on legacy controllers, so probing is pointless.
This also avoids an issue where probing the stack would
upset the aic7770.
In ahc_reset(), record whether or not we found the
controller in a reset state. If the controller was
already reset, assume that no BIOS has initialized
the controller and ignore left over scratch ram
settings.
Fix an ifdef bug that caused sequencer debugging to
be enabled always.
Clear the ultraenb flag in our tstate during startup.
The ultraenbled'ness of a device is recorded in the user
transfer settings. tstate->ultraenb bitmask indicates
which devices we have negotiated an ultra speed with.
Just after initialization, we are async. Setting the
ultraenb flag while async seems to be harmless, but it
was confusing to see the ULTRAENB flag set in the SCB.
Enhance residual diagnostic to indicate if the residual
if for sense information or normal data transfers.
Indicate the features, bugs, and flags set in the softc
that are used to control firmware patch download when
booting verbose.
In ahc_dump_card_state() fix a logic reversal. The
SCSIPHASE register only exists on U160 controllers.
The SCSISIGI register exists on all controllers. Not
the other way around. Also print out the ERROR register.
Allow ahc_dump_card_state() to be called when the sequencer
is not paused. Add dump card state markers as in the U320
driver.
2003-01-20 20:44:55 +00:00
|
|
|
if (paused == 0)
|
|
|
|
ahc_unpause(ahc);
|
2000-09-16 20:02:28 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/************************* Target Mode ****************************************/
|
|
|
|
#ifdef AHC_TARGET_MODE
|
|
|
|
cam_status
|
|
|
|
ahc_find_tmode_devs(struct ahc_softc *ahc, struct cam_sim *sim, union ccb *ccb,
|
2001-03-29 00:36:35 +00:00
|
|
|
struct ahc_tmode_tstate **tstate,
|
|
|
|
struct ahc_tmode_lstate **lstate,
|
2000-09-16 20:02:28 +00:00
|
|
|
int notfound_failure)
|
|
|
|
{
|
1998-09-15 07:24:17 +00:00
|
|
|
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
if ((ahc->features & AHC_TARGETMODE) == 0)
|
2000-09-16 20:02:28 +00:00
|
|
|
return (CAM_REQ_INVALID);
|
1999-03-05 23:35:48 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/*
|
|
|
|
* Handle the 'black hole' device that sucks up
|
|
|
|
* requests to unattached luns on enabled targets.
|
|
|
|
*/
|
|
|
|
if (ccb->ccb_h.target_id == CAM_TARGET_WILDCARD
|
|
|
|
&& ccb->ccb_h.target_lun == CAM_LUN_WILDCARD) {
|
|
|
|
*tstate = NULL;
|
|
|
|
*lstate = ahc->black_hole;
|
|
|
|
} else {
|
|
|
|
u_int max_id;
|
|
|
|
|
|
|
|
max_id = (ahc->features & AHC_WIDE) ? 15 : 7;
|
|
|
|
if (ccb->ccb_h.target_id > max_id)
|
|
|
|
return (CAM_TID_INVALID);
|
|
|
|
|
ahc_eisa.c:
ahc_pci.c:
Add detach support.
Make use of soft allocated on our behalf by newbus.
For PCI devices, disable the mapping type we aren't
using for extra protection from rogue code.
aic7xxx_93cx6.c:
aic7xxx_93cx6.h:
Sync perforce IDs.
aic7xxx_freebsd.c:
Capture the eventhandle returned by EVENTHANDER_REGISTER
so we can kill the handler off during detach.
Use AHC_* constants instead of hard coded numbers in a
few more places.
Test PPR option state when deciding to "really" negotiate
when the CAM_NEGOTIATE flag is passed in a CCB.
Make use of core "ahc_pause_and_flushwork" routine in our
timeout handler rather than re-inventing this code.
Cleanup all of our resources (really!) in ahc_platform_free().
We should be all set to become a module now.
Implement the core ahc_detach() routine shared by all of
the FreeBSD front-ends.
aic7xxx_freebsd.h:
Softc storage for our event handler.
Null implementation for the ahc_platform_flushwork() OSM
callback. FreeBSD doesn't need this as XPT callbacks are
safe from all contexts and are done directly in ahc_done().
aic7xxx_inline.h:
Implement new lazy interrupt scheme. To avoid an extra
PCI bus read, we first check our completion queues to
see if any work has completed. If work is available, we
assume that this is the source of the interrupt and skip
reading INTSTAT. Any remaining interrupt status will be
cleared by a second call to the interrupt handler should
the interrupt line still be asserted. This drops the
interrupt handler down to a single PCI bus read in the
common case of I/O completion. This is the same overhead
as in the not so distant past, but the extra sanity of
perforning a PCI read after clearing the command complete
interrupt and before running the completion queue to avoid
missing command complete interrupts added a cycle.
aic7xxx.c:
During initialization, be sure to initialize all scratch
ram locations before they are read to avoid parity errors.
In this case, we use a new function, ahc_unbusy_tcl() to
initialize the scratch ram busy target table.
Replace instances of ahc_index_busy_tcl() used to unbusy
a tcl without looking at the old value with ahc_unbusy_tcl().
Modify ahc_sent_msg so that it can find single byte messages.
ahc_sent_msg is now used to determine if a transfer negotiation
attempt resulted in a bus free.
Be more careful in filtering out only the SCSI interrupts
of interest in ahc_handle_scsiint.
Rearrange interrupt clearing code to ensure that at least
one PCI transaction occurrs after hitting CLRSINT1 and
writting to CLRINT. CLRSINT1 writes take a bit to
take effect, and the re-arrangement provides sufficient
delay to ensure the write to CLRINT is effective. The
old code might report a spurious interrupt on some "fast"
chipsets.
export ahc-update_target_msg_request for use by OSM code.
If a target does not respond to our ATN request, clear
it once we move to a non-message phase. This avoids
sending a MSG_NOOP in some later message out phase.
Use max lun and max target constants instead of
hard-coded values.
Use softc storage built into our device_t under FreeBSD.
Fix a bug in ahc_free() that caused us to delete
resources that were not allocated.
Clean up any tstate/lstate info in ahc_free().
Clear the powerdown state in ahc_reset() so that
registers can be accessed.
Add a preliminary function for pausing the chip and
processing any posted work.
Add a preliminary suspend and resume functions.
aic7xxx.h:
Limit the number of supported luns to 64. We don't
support information unit transfers, so this is the
maximum that makes sense for these chips.
Add a new flag AHC_ALL_INTERRUPTS that forces the
processing of all interrupt state in a single invokation
of ahc_intr(). When the flag is not set, we use the
lazy interrupt handling scheme.
Add data structures to store controller state while
we are suspended.
Use constants instead of hard coded values where appropriate.
Correct some harmless "unsigned/signed" conflicts.
aic7xxx.seq:
Only perform the SCSIBUSL fix on ULTRA2 or newer controllers.
Older controllers seem to be confused by this.
In target mode, ignore PHASEMIS during data phases.
This bit seems to be flakey on U160 controllers acting
in target mode.
aic7xxx_pci.c:
Add support for the 29160C CPCI adapter.
Add definitions for subvendor ID information
available for devices with the "9005" vendor id.
We currently use this information to determine
if a multi-function device doesn't have the second
channel hooked up on a board.
Add rudimentary power mode code so we can put the
controller into the D0 state. In the future this
will be an OSM callback so that in FreeBSD we don't
duplicate functionality provided by the PCI code.
The powerstate code was added after I'd completed
my regression tests on this code.
Only capture "left over BIOS state" if the POWRDN
setting is not set in HCNTRL.
In target mode, don't bother sending incremental
CRC data.
2000-12-20 01:11:37 +00:00
|
|
|
if (ccb->ccb_h.target_lun >= AHC_NUM_LUNS)
|
2000-09-16 20:02:28 +00:00
|
|
|
return (CAM_LUN_INVALID);
|
|
|
|
|
|
|
|
*tstate = ahc->enabled_targets[ccb->ccb_h.target_id];
|
|
|
|
*lstate = NULL;
|
|
|
|
if (*tstate != NULL)
|
|
|
|
*lstate =
|
|
|
|
(*tstate)->enabled_luns[ccb->ccb_h.target_lun];
|
1998-09-15 07:24:17 +00:00
|
|
|
}
|
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
if (notfound_failure != 0 && *lstate == NULL)
|
|
|
|
return (CAM_PATH_INVALID);
|
|
|
|
|
|
|
|
return (CAM_REQ_CMP);
|
1998-09-15 07:24:17 +00:00
|
|
|
}
|
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
void
|
|
|
|
ahc_handle_en_lun(struct ahc_softc *ahc, struct cam_sim *sim, union ccb *ccb)
|
1998-09-15 07:24:17 +00:00
|
|
|
{
|
2001-03-29 00:36:35 +00:00
|
|
|
struct ahc_tmode_tstate *tstate;
|
|
|
|
struct ahc_tmode_lstate *lstate;
|
2000-09-16 20:02:28 +00:00
|
|
|
struct ccb_en_lun *cel;
|
|
|
|
cam_status status;
|
2003-05-03 23:55:38 +00:00
|
|
|
u_long s;
|
2000-09-16 20:02:28 +00:00
|
|
|
u_int target;
|
|
|
|
u_int lun;
|
|
|
|
u_int target_mask;
|
2002-08-31 06:41:37 +00:00
|
|
|
u_int our_id;
|
2003-05-03 23:55:38 +00:00
|
|
|
int error;
|
2000-09-16 20:02:28 +00:00
|
|
|
char channel;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
status = ahc_find_tmode_devs(ahc, sim, ccb, &tstate, &lstate,
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
/*notfound_failure*/FALSE);
|
1999-08-16 22:49:29 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
if (status != CAM_REQ_CMP) {
|
|
|
|
ccb->ccb_h.status = status;
|
|
|
|
return;
|
1999-08-16 22:49:29 +00:00
|
|
|
}
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
|
2002-08-31 06:41:37 +00:00
|
|
|
if (cam_sim_bus(sim) == 0)
|
|
|
|
our_id = ahc->our_id;
|
|
|
|
else
|
|
|
|
our_id = ahc->our_id_b;
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
|
2002-08-31 06:41:37 +00:00
|
|
|
if (ccb->ccb_h.target_id != our_id) {
|
|
|
|
/*
|
|
|
|
* our_id represents our initiator ID, or
|
|
|
|
* the ID of the first target to have an
|
|
|
|
* enabled lun in target mode. There are
|
|
|
|
* two cases that may preclude enabling a
|
|
|
|
* target id other than our_id.
|
|
|
|
*
|
|
|
|
* o our_id is for an active initiator role.
|
|
|
|
* Since the hardware does not support
|
|
|
|
* reselections to the initiator role at
|
|
|
|
* anything other than our_id, and our_id
|
|
|
|
* is used by the hardware to indicate the
|
|
|
|
* ID to use for both select-out and
|
|
|
|
* reselect-out operations, the only target
|
|
|
|
* ID we can support in this mode is our_id.
|
|
|
|
*
|
|
|
|
* o The MULTARGID feature is not available and
|
|
|
|
* a previous target mode ID has been enabled.
|
|
|
|
*/
|
|
|
|
if ((ahc->features & AHC_MULTIROLE) != 0) {
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
|
|
|
|
if ((ahc->features & AHC_MULTI_TID) != 0
|
|
|
|
&& (ahc->flags & AHC_INITIATORROLE) != 0) {
|
|
|
|
/*
|
|
|
|
* Only allow additional targets if
|
|
|
|
* the initiator role is disabled.
|
|
|
|
* The hardware cannot handle a re-select-in
|
|
|
|
* on the initiator id during a re-select-out
|
|
|
|
* on a different target id.
|
|
|
|
*/
|
|
|
|
status = CAM_TID_INVALID;
|
|
|
|
} else if ((ahc->flags & AHC_INITIATORROLE) != 0
|
|
|
|
|| ahc->enabled_luns > 0) {
|
|
|
|
/*
|
|
|
|
* Only allow our target id to change
|
|
|
|
* if the initiator role is not configured
|
|
|
|
* and there are no enabled luns which
|
|
|
|
* are attached to the currently registered
|
|
|
|
* scsi id.
|
|
|
|
*/
|
|
|
|
status = CAM_TID_INVALID;
|
|
|
|
}
|
2002-08-31 06:41:37 +00:00
|
|
|
} else if ((ahc->features & AHC_MULTI_TID) == 0
|
|
|
|
&& ahc->enabled_luns > 0) {
|
|
|
|
|
|
|
|
status = CAM_TID_INVALID;
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (status != CAM_REQ_CMP) {
|
|
|
|
ccb->ccb_h.status = status;
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* We now have an id that is valid.
|
|
|
|
* If we aren't in target mode, switch modes.
|
|
|
|
*/
|
|
|
|
if ((ahc->flags & AHC_TARGETROLE) == 0
|
|
|
|
&& ccb->ccb_h.target_id != CAM_TARGET_WILDCARD) {
|
2003-05-03 23:55:38 +00:00
|
|
|
u_long s;
|
|
|
|
ahc_flag saved_flags;
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
|
|
|
|
printf("Configuring Target Mode\n");
|
|
|
|
ahc_lock(ahc, &s);
|
|
|
|
if (LIST_FIRST(&ahc->pending_scbs) != NULL) {
|
|
|
|
ccb->ccb_h.status = CAM_BUSY;
|
|
|
|
ahc_unlock(ahc, &s);
|
|
|
|
return;
|
|
|
|
}
|
2003-05-03 23:55:38 +00:00
|
|
|
saved_flags = ahc->flags;
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
ahc->flags |= AHC_TARGETROLE;
|
|
|
|
if ((ahc->features & AHC_MULTIROLE) == 0)
|
|
|
|
ahc->flags &= ~AHC_INITIATORROLE;
|
This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
|
|
|
ahc_pause(ahc);
|
2003-05-03 23:55:38 +00:00
|
|
|
error = ahc_loadseq(ahc);
|
|
|
|
if (error != 0) {
|
|
|
|
/*
|
|
|
|
* Restore original configuration and notify
|
|
|
|
* the caller that we cannot support target mode.
|
|
|
|
* Since the adapter started out in this
|
|
|
|
* configuration, the firmware load will succeed,
|
|
|
|
* so there is no point in checking ahc_loadseq's
|
|
|
|
* return value.
|
|
|
|
*/
|
|
|
|
ahc->flags = saved_flags;
|
|
|
|
(void)ahc_loadseq(ahc);
|
|
|
|
ahc_unpause(ahc);
|
|
|
|
ahc_unlock(ahc, &s);
|
|
|
|
ccb->ccb_h.status = CAM_FUNC_NOTAVAIL;
|
|
|
|
return;
|
|
|
|
}
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
ahc_unlock(ahc, &s);
|
|
|
|
}
|
2000-09-16 20:02:28 +00:00
|
|
|
cel = &ccb->cel;
|
|
|
|
target = ccb->ccb_h.target_id;
|
|
|
|
lun = ccb->ccb_h.target_lun;
|
|
|
|
channel = SIM_CHANNEL(ahc, sim);
|
|
|
|
target_mask = 0x01 << target;
|
|
|
|
if (channel == 'B')
|
|
|
|
target_mask <<= 8;
|
2000-02-09 21:25:00 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
if (cel->enable != 0) {
|
|
|
|
u_int scsiseq;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/* Are we already enabled?? */
|
|
|
|
if (lstate != NULL) {
|
|
|
|
xpt_print_path(ccb->ccb_h.path);
|
|
|
|
printf("Lun already enabled\n");
|
|
|
|
ccb->ccb_h.status = CAM_LUN_ALRDY_ENA;
|
|
|
|
return;
|
|
|
|
}
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
if (cel->grp6_len != 0
|
|
|
|
|| cel->grp7_len != 0) {
|
|
|
|
/*
|
|
|
|
* Don't (yet?) support vendor
|
|
|
|
* specific commands.
|
|
|
|
*/
|
|
|
|
ccb->ccb_h.status = CAM_REQ_INVALID;
|
|
|
|
printf("Non-zero Group Codes\n");
|
|
|
|
return;
|
|
|
|
}
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/*
|
|
|
|
* Seems to be okay.
|
|
|
|
* Setup our data structures.
|
|
|
|
*/
|
|
|
|
if (target != CAM_TARGET_WILDCARD && tstate == NULL) {
|
|
|
|
tstate = ahc_alloc_tstate(ahc, target, channel);
|
|
|
|
if (tstate == NULL) {
|
|
|
|
xpt_print_path(ccb->ccb_h.path);
|
|
|
|
printf("Couldn't allocate tstate\n");
|
|
|
|
ccb->ccb_h.status = CAM_RESRC_UNAVAIL;
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
lstate = malloc(sizeof(*lstate), M_DEVBUF, M_NOWAIT);
|
|
|
|
if (lstate == NULL) {
|
|
|
|
xpt_print_path(ccb->ccb_h.path);
|
|
|
|
printf("Couldn't allocate lstate\n");
|
|
|
|
ccb->ccb_h.status = CAM_RESRC_UNAVAIL;
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
memset(lstate, 0, sizeof(*lstate));
|
|
|
|
status = xpt_create_path(&lstate->path, /*periph*/NULL,
|
|
|
|
xpt_path_path_id(ccb->ccb_h.path),
|
|
|
|
xpt_path_target_id(ccb->ccb_h.path),
|
|
|
|
xpt_path_lun_id(ccb->ccb_h.path));
|
|
|
|
if (status != CAM_REQ_CMP) {
|
|
|
|
free(lstate, M_DEVBUF);
|
|
|
|
xpt_print_path(ccb->ccb_h.path);
|
|
|
|
printf("Couldn't allocate path\n");
|
|
|
|
ccb->ccb_h.status = CAM_RESRC_UNAVAIL;
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
SLIST_INIT(&lstate->accept_tios);
|
|
|
|
SLIST_INIT(&lstate->immed_notifies);
|
|
|
|
ahc_lock(ahc, &s);
|
This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
|
|
|
ahc_pause(ahc);
|
2000-09-16 20:02:28 +00:00
|
|
|
if (target != CAM_TARGET_WILDCARD) {
|
|
|
|
tstate->enabled_luns[lun] = lstate;
|
|
|
|
ahc->enabled_luns++;
|
|
|
|
|
|
|
|
if ((ahc->features & AHC_MULTI_TID) != 0) {
|
|
|
|
u_int targid_mask;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
targid_mask = ahc_inb(ahc, TARGID)
|
|
|
|
| (ahc_inb(ahc, TARGID + 1) << 8);
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
targid_mask |= target_mask;
|
|
|
|
ahc_outb(ahc, TARGID, targid_mask);
|
|
|
|
ahc_outb(ahc, TARGID+1, (targid_mask >> 8));
|
|
|
|
|
|
|
|
ahc_update_scsiid(ahc, targid_mask);
|
|
|
|
} else {
|
|
|
|
u_int our_id;
|
|
|
|
char channel;
|
2000-07-18 20:12:14 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
channel = SIM_CHANNEL(ahc, sim);
|
|
|
|
our_id = SIM_SCSI_ID(ahc, sim);
|
2000-07-18 20:12:14 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/*
|
|
|
|
* This can only happen if selections
|
|
|
|
* are not enabled
|
|
|
|
*/
|
|
|
|
if (target != our_id) {
|
|
|
|
u_int sblkctl;
|
|
|
|
char cur_channel;
|
|
|
|
int swap;
|
2000-07-18 20:12:14 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
sblkctl = ahc_inb(ahc, SBLKCTL);
|
|
|
|
cur_channel = (sblkctl & SELBUSB)
|
|
|
|
? 'B' : 'A';
|
|
|
|
if ((ahc->features & AHC_TWIN) == 0)
|
|
|
|
cur_channel = 'A';
|
|
|
|
swap = cur_channel != channel;
|
|
|
|
if (channel == 'A')
|
|
|
|
ahc->our_id = target;
|
|
|
|
else
|
|
|
|
ahc->our_id_b = target;
|
2000-07-18 20:12:14 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
if (swap)
|
|
|
|
ahc_outb(ahc, SBLKCTL,
|
|
|
|
sblkctl ^ SELBUSB);
|
2000-07-18 20:12:14 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_outb(ahc, SCSIID, target);
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
if (swap)
|
|
|
|
ahc_outb(ahc, SBLKCTL, sblkctl);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
} else
|
|
|
|
ahc->black_hole = lstate;
|
|
|
|
/* Allow select-in operations */
|
|
|
|
if (ahc->black_hole != NULL && ahc->enabled_luns > 0) {
|
|
|
|
scsiseq = ahc_inb(ahc, SCSISEQ_TEMPLATE);
|
|
|
|
scsiseq |= ENSELI;
|
|
|
|
ahc_outb(ahc, SCSISEQ_TEMPLATE, scsiseq);
|
|
|
|
scsiseq = ahc_inb(ahc, SCSISEQ);
|
|
|
|
scsiseq |= ENSELI;
|
|
|
|
ahc_outb(ahc, SCSISEQ, scsiseq);
|
1998-09-15 07:24:17 +00:00
|
|
|
}
|
This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
|
|
|
ahc_unpause(ahc);
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_unlock(ahc, &s);
|
|
|
|
ccb->ccb_h.status = CAM_REQ_CMP;
|
|
|
|
xpt_print_path(ccb->ccb_h.path);
|
|
|
|
printf("Lun now enabled for target mode\n");
|
2000-07-18 20:12:14 +00:00
|
|
|
} else {
|
2000-09-16 20:02:28 +00:00
|
|
|
struct scb *scb;
|
|
|
|
int i, empty;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
if (lstate == NULL) {
|
|
|
|
ccb->ccb_h.status = CAM_LUN_INVALID;
|
|
|
|
return;
|
|
|
|
}
|
2000-03-18 22:28:20 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_lock(ahc, &s);
|
|
|
|
|
|
|
|
ccb->ccb_h.status = CAM_REQ_CMP;
|
|
|
|
LIST_FOREACH(scb, &ahc->pending_scbs, pending_links) {
|
|
|
|
struct ccb_hdr *ccbh;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
ccbh = &scb->io_ctx->ccb_h;
|
|
|
|
if (ccbh->func_code == XPT_CONT_TARGET_IO
|
|
|
|
&& !xpt_path_comp(ccbh->path, ccb->ccb_h.path)){
|
|
|
|
printf("CTIO pending\n");
|
|
|
|
ccb->ccb_h.status = CAM_REQ_INVALID;
|
|
|
|
ahc_unlock(ahc, &s);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
}
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
if (SLIST_FIRST(&lstate->accept_tios) != NULL) {
|
|
|
|
printf("ATIOs pending\n");
|
|
|
|
ccb->ccb_h.status = CAM_REQ_INVALID;
|
1999-03-05 23:35:48 +00:00
|
|
|
}
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
if (SLIST_FIRST(&lstate->immed_notifies) != NULL) {
|
|
|
|
printf("INOTs pending\n");
|
|
|
|
ccb->ccb_h.status = CAM_REQ_INVALID;
|
|
|
|
}
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
if (ccb->ccb_h.status != CAM_REQ_CMP) {
|
|
|
|
ahc_unlock(ahc, &s);
|
|
|
|
return;
|
|
|
|
}
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
xpt_print_path(ccb->ccb_h.path);
|
|
|
|
printf("Target mode disabled\n");
|
|
|
|
xpt_free_path(lstate->path);
|
|
|
|
free(lstate, M_DEVBUF);
|
1998-09-15 07:24:17 +00:00
|
|
|
|
This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
|
|
|
ahc_pause(ahc);
|
2000-09-16 20:02:28 +00:00
|
|
|
/* Can we clean up the target too? */
|
|
|
|
if (target != CAM_TARGET_WILDCARD) {
|
|
|
|
tstate->enabled_luns[lun] = NULL;
|
|
|
|
ahc->enabled_luns--;
|
|
|
|
for (empty = 1, i = 0; i < 8; i++)
|
|
|
|
if (tstate->enabled_luns[i] != NULL) {
|
|
|
|
empty = 0;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (empty) {
|
|
|
|
ahc_free_tstate(ahc, target, channel,
|
|
|
|
/*force*/FALSE);
|
|
|
|
if (ahc->features & AHC_MULTI_TID) {
|
|
|
|
u_int targid_mask;
|
|
|
|
|
|
|
|
targid_mask = ahc_inb(ahc, TARGID)
|
|
|
|
| (ahc_inb(ahc, TARGID + 1)
|
|
|
|
<< 8);
|
|
|
|
|
|
|
|
targid_mask &= ~target_mask;
|
|
|
|
ahc_outb(ahc, TARGID, targid_mask);
|
|
|
|
ahc_outb(ahc, TARGID+1,
|
|
|
|
(targid_mask >> 8));
|
|
|
|
ahc_update_scsiid(ahc, targid_mask);
|
|
|
|
}
|
1999-03-05 23:35:48 +00:00
|
|
|
}
|
2000-09-16 20:02:28 +00:00
|
|
|
} else {
|
|
|
|
|
|
|
|
ahc->black_hole = NULL;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* We can't allow selections without
|
|
|
|
* our black hole device.
|
|
|
|
*/
|
|
|
|
empty = TRUE;
|
|
|
|
}
|
|
|
|
if (ahc->enabled_luns == 0) {
|
|
|
|
/* Disallow select-in */
|
|
|
|
u_int scsiseq;
|
|
|
|
|
|
|
|
scsiseq = ahc_inb(ahc, SCSISEQ_TEMPLATE);
|
|
|
|
scsiseq &= ~ENSELI;
|
|
|
|
ahc_outb(ahc, SCSISEQ_TEMPLATE, scsiseq);
|
|
|
|
scsiseq = ahc_inb(ahc, SCSISEQ);
|
|
|
|
scsiseq &= ~ENSELI;
|
|
|
|
ahc_outb(ahc, SCSISEQ, scsiseq);
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
|
|
|
|
if ((ahc->features & AHC_MULTIROLE) == 0) {
|
|
|
|
printf("Configuring Initiator Mode\n");
|
|
|
|
ahc->flags &= ~AHC_TARGETROLE;
|
|
|
|
ahc->flags |= AHC_INITIATORROLE;
|
This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
|
|
|
ahc_pause(ahc);
|
2003-05-03 23:55:38 +00:00
|
|
|
/*
|
|
|
|
* Returning to a configuration that
|
|
|
|
* fit previously will always succeed.
|
|
|
|
*/
|
|
|
|
(void)ahc_loadseq(ahc);
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
}
|
1998-09-15 07:24:17 +00:00
|
|
|
}
|
This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
|
|
|
ahc_unpause(ahc);
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_unlock(ahc, &s);
|
1998-09-15 07:24:17 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_update_scsiid(struct ahc_softc *ahc, u_int targid_mask)
|
1998-09-15 07:24:17 +00:00
|
|
|
{
|
2000-09-16 20:02:28 +00:00
|
|
|
u_int scsiid_mask;
|
|
|
|
u_int scsiid;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
if ((ahc->features & AHC_MULTI_TID) == 0)
|
|
|
|
panic("ahc_update_scsiid called on non-multitid unit\n");
|
|
|
|
|
|
|
|
/*
|
2002-08-31 06:41:37 +00:00
|
|
|
* Since we will rely on the TARGID mask
|
2000-09-16 20:02:28 +00:00
|
|
|
* for selection enables, ensure that OID
|
|
|
|
* in SCSIID is not set to some other ID
|
|
|
|
* that we don't want to allow selections on.
|
|
|
|
*/
|
|
|
|
if ((ahc->features & AHC_ULTRA2) != 0)
|
|
|
|
scsiid = ahc_inb(ahc, SCSIID_ULTRA2);
|
|
|
|
else
|
|
|
|
scsiid = ahc_inb(ahc, SCSIID);
|
|
|
|
scsiid_mask = 0x1 << (scsiid & OID);
|
|
|
|
if ((targid_mask & scsiid_mask) == 0) {
|
|
|
|
u_int our_id;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/* ffs counts from 1 */
|
|
|
|
our_id = ffs(targid_mask);
|
|
|
|
if (our_id == 0)
|
|
|
|
our_id = ahc->our_id;
|
|
|
|
else
|
|
|
|
our_id--;
|
|
|
|
scsiid &= TID;
|
|
|
|
scsiid |= our_id;
|
1998-09-15 07:24:17 +00:00
|
|
|
}
|
2000-09-16 20:02:28 +00:00
|
|
|
if ((ahc->features & AHC_ULTRA2) != 0)
|
|
|
|
ahc_outb(ahc, SCSIID_ULTRA2, scsiid);
|
|
|
|
else
|
|
|
|
ahc_outb(ahc, SCSIID, scsiid);
|
1998-09-15 07:24:17 +00:00
|
|
|
}
|
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
void
|
|
|
|
ahc_run_tqinfifo(struct ahc_softc *ahc, int paused)
|
1998-09-15 07:24:17 +00:00
|
|
|
{
|
2000-09-16 20:02:28 +00:00
|
|
|
struct target_cmd *cmd;
|
1999-04-19 21:28:15 +00:00
|
|
|
|
|
|
|
/*
|
2000-09-16 20:02:28 +00:00
|
|
|
* If the card supports auto-access pause,
|
|
|
|
* we can access the card directly regardless
|
|
|
|
* of whether it is paused or not.
|
1999-04-19 21:28:15 +00:00
|
|
|
*/
|
2000-09-16 20:02:28 +00:00
|
|
|
if ((ahc->features & AHC_AUTOPAUSE) != 0)
|
|
|
|
paused = TRUE;
|
1999-04-19 21:28:15 +00:00
|
|
|
|
2001-07-18 21:39:48 +00:00
|
|
|
ahc_sync_tqinfifo(ahc, BUS_DMASYNC_POSTREAD);
|
2000-09-16 20:02:28 +00:00
|
|
|
while ((cmd = &ahc->targetcmds[ahc->tqinfifonext])->cmd_valid != 0) {
|
1999-04-19 21:28:15 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/*
|
|
|
|
* Only advance through the queue if we
|
|
|
|
* have the resources to process the command.
|
|
|
|
*/
|
|
|
|
if (ahc_handle_target_cmd(ahc, cmd) != 0)
|
|
|
|
break;
|
1999-04-19 21:28:15 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
cmd->cmd_valid = 0;
|
2001-07-18 21:39:48 +00:00
|
|
|
ahc_dmamap_sync(ahc, ahc->shared_data_dmat,
|
|
|
|
ahc->shared_data_dmamap,
|
|
|
|
ahc_targetcmd_offset(ahc, ahc->tqinfifonext),
|
|
|
|
sizeof(struct target_cmd),
|
|
|
|
BUS_DMASYNC_PREREAD);
|
|
|
|
ahc->tqinfifonext++;
|
1999-04-19 21:28:15 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/*
|
2001-05-15 19:41:12 +00:00
|
|
|
* Lazily update our position in the target mode incoming
|
2000-09-16 20:02:28 +00:00
|
|
|
* command queue as seen by the sequencer.
|
|
|
|
*/
|
|
|
|
if ((ahc->tqinfifonext & (HOST_TQINPOS - 1)) == 1) {
|
|
|
|
if ((ahc->features & AHC_HS_MAILBOX) != 0) {
|
|
|
|
u_int hs_mailbox;
|
1999-04-19 21:28:15 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
hs_mailbox = ahc_inb(ahc, HS_MAILBOX);
|
|
|
|
hs_mailbox &= ~HOST_TQINPOS;
|
|
|
|
hs_mailbox |= ahc->tqinfifonext & HOST_TQINPOS;
|
|
|
|
ahc_outb(ahc, HS_MAILBOX, hs_mailbox);
|
|
|
|
} else {
|
|
|
|
if (!paused)
|
This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
|
|
|
ahc_pause(ahc);
|
2000-09-16 20:02:28 +00:00
|
|
|
ahc_outb(ahc, KERNEL_TQINPOS,
|
|
|
|
ahc->tqinfifonext & HOST_TQINPOS);
|
|
|
|
if (!paused)
|
This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
|
|
|
ahc_unpause(ahc);
|
2000-09-16 20:02:28 +00:00
|
|
|
}
|
|
|
|
}
|
1999-04-19 21:28:15 +00:00
|
|
|
}
|
1998-09-15 07:24:17 +00:00
|
|
|
}
|
1999-08-16 22:49:29 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
static int
|
|
|
|
ahc_handle_target_cmd(struct ahc_softc *ahc, struct target_cmd *cmd)
|
1999-08-16 22:49:29 +00:00
|
|
|
{
|
2001-03-29 00:36:35 +00:00
|
|
|
struct ahc_tmode_tstate *tstate;
|
|
|
|
struct ahc_tmode_lstate *lstate;
|
2000-09-16 20:02:28 +00:00
|
|
|
struct ccb_accept_tio *atio;
|
|
|
|
uint8_t *byte;
|
|
|
|
int initiator;
|
|
|
|
int target;
|
|
|
|
int lun;
|
1999-08-16 22:49:29 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
initiator = SCSIID_TARGET(ahc, cmd->scsiid);
|
|
|
|
target = SCSIID_OUR_ID(cmd->scsiid);
|
|
|
|
lun = (cmd->identify & MSG_IDENTIFY_LUNMASK);
|
1999-08-16 22:49:29 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
byte = cmd->bytes;
|
|
|
|
tstate = ahc->enabled_targets[target];
|
|
|
|
lstate = NULL;
|
|
|
|
if (tstate != NULL)
|
|
|
|
lstate = tstate->enabled_luns[lun];
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Commands for disabled luns go to the black hole driver.
|
|
|
|
*/
|
|
|
|
if (lstate == NULL)
|
|
|
|
lstate = ahc->black_hole;
|
|
|
|
|
|
|
|
atio = (struct ccb_accept_tio*)SLIST_FIRST(&lstate->accept_tios);
|
|
|
|
if (atio == NULL) {
|
|
|
|
ahc->flags |= AHC_TQINFIFO_BLOCKED;
|
1999-08-16 22:49:29 +00:00
|
|
|
/*
|
2000-09-16 20:02:28 +00:00
|
|
|
* Wait for more ATIOs from the peripheral driver for this lun.
|
1999-08-16 22:49:29 +00:00
|
|
|
*/
|
2002-04-24 16:58:51 +00:00
|
|
|
if (bootverbose)
|
|
|
|
printf("%s: ATIOs exhausted\n", ahc_name(ahc));
|
2000-09-16 20:02:28 +00:00
|
|
|
return (1);
|
|
|
|
} else
|
|
|
|
ahc->flags &= ~AHC_TQINFIFO_BLOCKED;
|
|
|
|
#if 0
|
|
|
|
printf("Incoming command from %d for %d:%d%s\n",
|
|
|
|
initiator, target, lun,
|
|
|
|
lstate == ahc->black_hole ? "(Black Holed)" : "");
|
|
|
|
#endif
|
|
|
|
SLIST_REMOVE_HEAD(&lstate->accept_tios, sim_links.sle);
|
1999-08-16 22:49:29 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
if (lstate == ahc->black_hole) {
|
|
|
|
/* Fill in the wildcards */
|
|
|
|
atio->ccb_h.target_id = target;
|
|
|
|
atio->ccb_h.target_lun = lun;
|
1999-08-16 22:49:29 +00:00
|
|
|
}
|
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/*
|
|
|
|
* Package it up and send it off to
|
|
|
|
* whomever has this lun enabled.
|
|
|
|
*/
|
|
|
|
atio->sense_len = 0;
|
|
|
|
atio->init_id = initiator;
|
|
|
|
if (byte[0] != 0xFF) {
|
|
|
|
/* Tag was included */
|
|
|
|
atio->tag_action = *byte++;
|
|
|
|
atio->tag_id = *byte++;
|
|
|
|
atio->ccb_h.flags = CAM_TAG_ACTION_VALID;
|
|
|
|
} else {
|
|
|
|
atio->ccb_h.flags = 0;
|
|
|
|
}
|
|
|
|
byte++;
|
1999-08-16 22:49:29 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
/* Okay. Now determine the cdb size based on the command code */
|
|
|
|
switch (*byte >> CMD_GROUP_CODE_SHIFT) {
|
|
|
|
case 0:
|
|
|
|
atio->cdb_len = 6;
|
|
|
|
break;
|
|
|
|
case 1:
|
|
|
|
case 2:
|
|
|
|
atio->cdb_len = 10;
|
|
|
|
break;
|
|
|
|
case 4:
|
|
|
|
atio->cdb_len = 16;
|
|
|
|
break;
|
|
|
|
case 5:
|
|
|
|
atio->cdb_len = 12;
|
|
|
|
break;
|
|
|
|
case 3:
|
|
|
|
default:
|
|
|
|
/* Only copy the opcode. */
|
|
|
|
atio->cdb_len = 1;
|
|
|
|
printf("Reserved or VU command code type encountered\n");
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
memcpy(atio->cdb_io.cdb_bytes, byte, atio->cdb_len);
|
1999-08-16 22:49:29 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
atio->ccb_h.status |= CAM_CDB_RECVD;
|
1999-08-16 22:49:29 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
if ((cmd->identify & MSG_IDENTIFY_DISCFLAG) == 0) {
|
|
|
|
/*
|
|
|
|
* We weren't allowed to disconnect.
|
|
|
|
* We're hanging on the bus until a
|
|
|
|
* continue target I/O comes in response
|
|
|
|
* to this accept tio.
|
|
|
|
*/
|
|
|
|
#if 0
|
|
|
|
printf("Received Immediate Command %d:%d:%d - %p\n",
|
|
|
|
initiator, target, lun, ahc->pending_device);
|
|
|
|
#endif
|
|
|
|
ahc->pending_device = lstate;
|
|
|
|
ahc_freeze_ccb((union ccb *)atio);
|
|
|
|
atio->ccb_h.flags |= CAM_DIS_DISCONNECT;
|
1999-08-16 22:49:29 +00:00
|
|
|
}
|
2000-09-16 20:02:28 +00:00
|
|
|
xpt_done((union ccb*)atio);
|
|
|
|
return (0);
|
1999-08-16 22:49:29 +00:00
|
|
|
}
|
2000-09-16 20:02:28 +00:00
|
|
|
|
|
|
|
#endif
|