freebsd-dev/lib/libc/sparc64/fpu/Makefile.inc

# $FreeBSD$

.PATH: ${LIBC_SRCTOP}/sparc64/fpu

CFLAGS+= -I${LIBC_SRCTOP}/sparc64/sys

SRCS+=	fpu.c fpu_add.c fpu_compare.c fpu_div.c fpu_explode.c fpu_implode.c \
	fpu_mul.c fpu_qp.c fpu_reg.S fpu_sqrt.c fpu_subr.c
Add userland floating point emulator code for sparc64. This is a port of the (never committed) in-kernel version (with some optimizations and cleanups), which in turn was ported from NetBSD. 2002-02-23 21:37:18 +00:00			`# $FreeBSD$`

Replace use of ${.CURDIR} by ${LIBC_SRCTOP} and define ${LIBC_SRCTOP} if not already defined. This allows building libc from outside of lib/libc using a reach-over makefile. A typical use-case is to build a standard ILP32 version and a COMPAT32 version in a single iteration by building the COMPAT32 version using a reach-over makefile. Obtained from: Juniper Networks, Inc. 2014-03-04 02:19:39 +00:00			`.PATH: ${LIBC_SRCTOP}/sparc64/fpu`
Add userland floating point emulator code for sparc64. This is a port of the (never committed) in-kernel version (with some optimizations and cleanups), which in turn was ported from NetBSD. 2002-02-23 21:37:18 +00:00
Replace use of ${.CURDIR} by ${LIBC_SRCTOP} and define ${LIBC_SRCTOP} if not already defined. This allows building libc from outside of lib/libc using a reach-over makefile. A typical use-case is to build a standard ILP32 version and a COMPAT32 version in a single iteration by building the COMPAT32 version using a reach-over makefile. Obtained from: Juniper Networks, Inc. 2014-03-04 02:19:39 +00:00			`CFLAGS+= -I${LIBC_SRCTOP}/sparc64/sys`
Emulate ldq and stq (load/store long double) instructions. GCC has started using these to load long doubles, but they aren't implemented in hardware on (at least) UltraSPARC I and II machines. Emulate popc in the user trap handler as well. Re-arrange slightly to make support functions more accessible. Reviewed by: tmm 2002-04-27 21:56:28 +00:00
Add userland floating point emulator code for sparc64. This is a port of the (never committed) in-kernel version (with some optimizations and cleanups), which in turn was ported from NetBSD. 2002-02-23 21:37:18 +00:00			`SRCS+= fpu.c fpu_add.c fpu_compare.c fpu_div.c fpu_explode.c fpu_implode.c \`
Add code to emulate arithmetic, comparison and conversion operations on long double, which are not implemented in hardware on any UltraSPARC chip that I know of. This just calls into the existing floating point emulator, which is still needed to emulate other floating point operations in certain conditions. Without this gcc has to generate the quad floating point instructions directly, which sometimes causes internal compiler errors. Reviewed by: tmm 2002-04-28 02:36:36 +00:00			`fpu_mul.c fpu_qp.c fpu_reg.S fpu_sqrt.c fpu_subr.c`