1999-09-01 04:08:39 +00:00
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/*
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1999-11-19 07:29:10 +00:00
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* Support the ENSONIQ AudioPCI board and Creative Labs SoundBlaster PCI
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* boards based on the ES1370, ES1371 and ES1373 chips.
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1999-09-01 04:08:39 +00:00
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*
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1999-11-19 07:29:10 +00:00
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* Copyright (c) 1999 Russell Cattelan <cattelan@thebarn.com>
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1999-09-01 04:08:39 +00:00
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* Copyright (c) 1999 Cameron Grant <gandalf@vilnya.demon.co.uk>
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* Copyright (c) 1998 by Joachim Kuebart. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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*
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* 3. All advertising materials mentioning features or use of this
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* software must display the following acknowledgement:
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* This product includes software developed by Joachim Kuebart.
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*
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* 4. The name of the author may not be used to endorse or promote
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* products derived from this software without specific prior
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* written permission.
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*
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* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
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* OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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1999-09-01 06:58:27 +00:00
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* $FreeBSD$
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1999-09-01 04:08:39 +00:00
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*/
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1999-11-19 07:29:10 +00:00
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/*
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* Part of this code was heavily inspired by the linux driver from
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* Thomas Sailer (sailer@ife.ee.ethz.ch)
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1999-12-19 17:51:32 +00:00
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* Just about everything has been touched and reworked in some way but
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* the all the underlying sequences/timing/register values are from
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1999-11-19 07:29:10 +00:00
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* Thomas' code.
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*
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*/
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1999-11-20 16:50:33 +00:00
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#include <dev/sound/pcm/sound.h>
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#include <dev/sound/pcm/ac97.h>
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#include <dev/sound/pci/es137x.h>
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1999-09-01 04:08:39 +00:00
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#include <pci/pcireg.h>
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#include <pci/pcivar.h>
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1999-11-19 07:29:10 +00:00
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#include <sys/sysctl.h>
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static int debug = 0;
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SYSCTL_INT(_debug, OID_AUTO, es_debug, CTLFLAG_RW, &debug, 0, "");
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1999-09-01 04:08:39 +00:00
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#define MEM_MAP_REG 0x14
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/* PCI IDs of supported chips */
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#define ES1370_PCI_ID 0x50001274
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1999-11-19 07:29:10 +00:00
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#define ES1371_PCI_ID 0x13711274
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2000-01-17 07:54:00 +00:00
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#define ES1371_PCI_ID2 0x13713274
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1999-09-01 04:08:39 +00:00
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2000-04-05 00:38:00 +00:00
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#define ES_BUFFSIZE 4096
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1999-09-01 04:08:39 +00:00
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/* device private data */
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struct es_info;
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1999-12-29 05:44:17 +00:00
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struct es_chinfo {
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1999-09-01 04:08:39 +00:00
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struct es_info *parent;
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pcm_channel *channel;
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snd_dbuf *buffer;
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1999-12-19 17:51:32 +00:00
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int dir, num;
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1999-09-01 04:08:39 +00:00
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u_int32_t fmt;
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1999-12-29 05:44:17 +00:00
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};
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1999-09-01 04:08:39 +00:00
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1999-12-29 05:44:17 +00:00
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struct es_info {
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1999-09-01 04:08:39 +00:00
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bus_space_tag_t st;
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bus_space_handle_t sh;
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bus_dma_tag_t parent_dmat;
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2000-04-05 00:38:00 +00:00
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device_t dev;
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1999-12-19 17:51:32 +00:00
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int num;
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1999-09-01 04:08:39 +00:00
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/* Contents of board's registers */
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u_long ctrl;
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u_long sctrl;
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struct es_chinfo pch, rch;
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1999-12-29 05:44:17 +00:00
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};
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1999-09-01 04:08:39 +00:00
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/* -------------------------------------------------------------------- */
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1999-12-19 17:51:32 +00:00
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1999-09-01 04:08:39 +00:00
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/* prototypes */
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1999-12-19 17:51:32 +00:00
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static void es_intr(void *);
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1999-11-19 07:29:10 +00:00
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1999-12-19 17:51:32 +00:00
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static void es1371_wrcodec(void *, int, u_int32_t);
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static u_int32_t es1371_rdcodec(void *, int);
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1999-12-29 05:44:17 +00:00
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static u_int es1371_wait_src_ready(struct es_info *);
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static void es1371_src_write(struct es_info *, u_short, unsigned short);
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static u_int es1371_adc_rate(struct es_info *, u_int, int);
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static u_int es1371_dac_rate(struct es_info *, u_int, int);
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static int es1371_init(struct es_info *es, int);
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1999-12-19 17:51:32 +00:00
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static int es1370_init(struct es_info *);
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static int es1370_wrcodec(struct es_info *, u_char, u_char);
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1999-09-01 04:08:39 +00:00
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/* channel interface */
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static void *eschan_init(void *devinfo, snd_dbuf *b, pcm_channel *c, int dir);
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1999-12-19 17:51:32 +00:00
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static int eschan_setdir(void *data, int dir);
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static int eschan_setformat(void *data, u_int32_t format);
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static int eschan1370_setspeed(void *data, u_int32_t speed);
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1999-12-29 05:44:17 +00:00
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static int eschan1371_setspeed(void *data, u_int32_t speed);
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1999-12-19 17:51:32 +00:00
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static int eschan_setblocksize(void *data, u_int32_t blocksize);
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static int eschan_trigger(void *data, int go);
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static int eschan_getptr(void *data);
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1999-09-01 04:08:39 +00:00
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static pcmchan_caps *eschan_getcaps(void *data);
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static pcmchan_caps es_playcaps = {
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4000, 48000,
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AFMT_STEREO | AFMT_U8 | AFMT_S16_LE,
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AFMT_STEREO | AFMT_S16_LE
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};
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static pcmchan_caps es_reccaps = {
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4000, 48000,
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AFMT_STEREO | AFMT_U8 | AFMT_S16_LE,
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AFMT_STEREO | AFMT_S16_LE
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};
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1999-12-19 17:51:32 +00:00
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static pcm_channel es1370_chantemplate = {
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eschan_init,
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eschan_setdir,
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eschan_setformat,
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eschan1370_setspeed,
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eschan_setblocksize,
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eschan_trigger,
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eschan_getptr,
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eschan_getcaps,
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};
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static pcm_channel es1371_chantemplate = {
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1999-09-01 04:08:39 +00:00
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eschan_init,
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eschan_setdir,
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eschan_setformat,
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1999-12-19 17:51:32 +00:00
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eschan1371_setspeed,
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1999-09-01 04:08:39 +00:00
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eschan_setblocksize,
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eschan_trigger,
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eschan_getptr,
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eschan_getcaps,
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};
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/* -------------------------------------------------------------------- */
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1999-12-19 17:51:32 +00:00
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/* The es1370 mixer interface */
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1999-09-01 04:08:39 +00:00
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1999-12-19 17:51:32 +00:00
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static int es1370_mixinit(snd_mixer *m);
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static int es1370_mixset(snd_mixer *m, unsigned dev, unsigned left, unsigned right);
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static int es1370_mixsetrecsrc(snd_mixer *m, u_int32_t src);
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1999-09-01 04:08:39 +00:00
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1999-12-19 17:51:32 +00:00
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static snd_mixer es1370_mixer = {
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"AudioPCI 1370 mixer",
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es1370_mixinit,
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es1370_mixset,
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es1370_mixsetrecsrc,
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1999-09-01 04:08:39 +00:00
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};
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static const struct {
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unsigned volidx:4;
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unsigned left:4;
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unsigned right:4;
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unsigned stereo:1;
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unsigned recmask:13;
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unsigned avail:1;
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} mixtable[SOUND_MIXER_NRDEVICES] = {
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[SOUND_MIXER_VOLUME] = { 0, 0x0, 0x1, 1, 0x0000, 1 },
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[SOUND_MIXER_PCM] = { 1, 0x2, 0x3, 1, 0x0400, 1 },
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[SOUND_MIXER_SYNTH] = { 2, 0x4, 0x5, 1, 0x0060, 1 },
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[SOUND_MIXER_CD] = { 3, 0x6, 0x7, 1, 0x0006, 1 },
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[SOUND_MIXER_LINE] = { 4, 0x8, 0x9, 1, 0x0018, 1 },
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[SOUND_MIXER_LINE1] = { 5, 0xa, 0xb, 1, 0x1800, 1 },
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[SOUND_MIXER_LINE2] = { 6, 0xc, 0x0, 0, 0x0100, 1 },
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[SOUND_MIXER_LINE3] = { 7, 0xd, 0x0, 0, 0x0200, 1 },
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[SOUND_MIXER_MIC] = { 8, 0xe, 0x0, 0, 0x0001, 1 },
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1999-12-19 17:51:32 +00:00
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[SOUND_MIXER_OGAIN] = { 9, 0xf, 0x0, 0, 0x0000, 1 }
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};
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1999-09-01 04:08:39 +00:00
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static int
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1999-12-19 17:51:32 +00:00
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es1370_mixinit(snd_mixer *m)
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1999-09-01 04:08:39 +00:00
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{
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int i;
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u_int32_t v;
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v = 0;
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for (i = 0; i < SOUND_MIXER_NRDEVICES; i++)
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if (mixtable[i].avail) v |= (1 << i);
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mix_setdevs(m, v);
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v = 0;
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for (i = 0; i < SOUND_MIXER_NRDEVICES; i++)
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if (mixtable[i].recmask) v |= (1 << i);
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mix_setrecdevs(m, v);
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return 0;
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}
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static int
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1999-12-19 17:51:32 +00:00
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es1370_mixset(snd_mixer *m, unsigned dev, unsigned left, unsigned right)
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1999-09-01 04:08:39 +00:00
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{
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int l, r, rl, rr;
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if (!mixtable[dev].avail) return -1;
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l = left;
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r = mixtable[dev].stereo? right : l;
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if (mixtable[dev].left == 0xf) {
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rl = (l < 2)? 0x80 : 7 - (l - 2) / 14;
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} else {
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rl = (l < 10)? 0x80 : 15 - (l - 10) / 6;
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}
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if (mixtable[dev].stereo) {
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rr = (r < 10)? 0x80 : 15 - (r - 10) / 6;
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1999-12-19 17:51:32 +00:00
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es1370_wrcodec(mix_getdevinfo(m), mixtable[dev].right, rr);
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1999-09-01 04:08:39 +00:00
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}
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1999-12-19 17:51:32 +00:00
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es1370_wrcodec(mix_getdevinfo(m), mixtable[dev].left, rl);
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1999-09-01 04:08:39 +00:00
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return l | (r << 8);
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}
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static int
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1999-12-19 17:51:32 +00:00
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es1370_mixsetrecsrc(snd_mixer *m, u_int32_t src)
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1999-09-01 04:08:39 +00:00
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{
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int i, j = 0;
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if (src == 0) src = 1 << SOUND_MIXER_MIC;
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src &= mix_getrecdevs(m);
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for (i = 0; i < SOUND_MIXER_NRDEVICES; i++)
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if ((src & (1 << i)) != 0) j |= mixtable[i].recmask;
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1999-12-19 17:51:32 +00:00
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es1370_wrcodec(mix_getdevinfo(m), CODEC_LIMIX1, j & 0x55);
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es1370_wrcodec(mix_getdevinfo(m), CODEC_RIMIX1, j & 0xaa);
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es1370_wrcodec(mix_getdevinfo(m), CODEC_LIMIX2, (j >> 8) & 0x17);
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es1370_wrcodec(mix_getdevinfo(m), CODEC_RIMIX2, (j >> 8) & 0x0f);
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es1370_wrcodec(mix_getdevinfo(m), CODEC_OMIX1, 0x7f);
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es1370_wrcodec(mix_getdevinfo(m), CODEC_OMIX2, 0x3f);
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1999-09-01 04:08:39 +00:00
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return src;
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}
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static int
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1999-12-19 17:51:32 +00:00
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es1370_wrcodec(struct es_info *es, u_char i, u_char data)
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1999-09-01 04:08:39 +00:00
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{
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int wait = 100; /* 100 msec timeout */
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do {
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if ((bus_space_read_4(es->st, es->sh, ES1370_REG_STATUS) &
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STAT_CSTAT) == 0) {
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bus_space_write_2(es->st, es->sh, ES1370_REG_CODEC,
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((u_short)i << CODEC_INDEX_SHIFT) | data);
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return 0;
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}
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DELAY(1000);
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} while (--wait);
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1999-12-19 17:51:32 +00:00
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printf("pcm: es1370_wrcodec timed out\n");
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1999-09-01 04:08:39 +00:00
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return -1;
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}
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/* -------------------------------------------------------------------- */
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/* channel interface */
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static void *
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eschan_init(void *devinfo, snd_dbuf *b, pcm_channel *c, int dir)
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{
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struct es_info *es = devinfo;
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struct es_chinfo *ch = (dir == PCMDIR_PLAY)? &es->pch : &es->rch;
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ch->parent = es;
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ch->channel = c;
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ch->buffer = b;
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ch->buffer->bufsize = ES_BUFFSIZE;
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1999-12-19 17:51:32 +00:00
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ch->num = ch->parent->num++;
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1999-09-01 04:08:39 +00:00
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if (chn_allocbuf(ch->buffer, es->parent_dmat) == -1) return NULL;
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return ch;
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}
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static int
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eschan_setdir(void *data, int dir)
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{
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struct es_chinfo *ch = data;
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struct es_info *es = ch->parent;
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if (dir == PCMDIR_PLAY) {
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bus_space_write_1(es->st, es->sh, ES1370_REG_MEMPAGE,
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ES1370_REG_DAC2_FRAMEADR >> 8);
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bus_space_write_4(es->st, es->sh, ES1370_REG_DAC2_FRAMEADR & 0xff,
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vtophys(ch->buffer->buf));
|
|
|
|
bus_space_write_4(es->st, es->sh, ES1370_REG_DAC2_FRAMECNT & 0xff,
|
|
|
|
(ch->buffer->bufsize >> 2) - 1);
|
|
|
|
} else {
|
|
|
|
bus_space_write_1(es->st, es->sh, ES1370_REG_MEMPAGE,
|
|
|
|
ES1370_REG_ADC_FRAMEADR >> 8);
|
|
|
|
bus_space_write_4(es->st, es->sh, ES1370_REG_ADC_FRAMEADR & 0xff,
|
|
|
|
vtophys(ch->buffer->buf));
|
|
|
|
bus_space_write_4(es->st, es->sh, ES1370_REG_ADC_FRAMECNT & 0xff,
|
|
|
|
(ch->buffer->bufsize >> 2) - 1);
|
|
|
|
}
|
|
|
|
ch->dir = dir;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
eschan_setformat(void *data, u_int32_t format)
|
|
|
|
{
|
|
|
|
struct es_chinfo *ch = data;
|
|
|
|
struct es_info *es = ch->parent;
|
|
|
|
|
|
|
|
if (ch->dir == PCMDIR_PLAY) {
|
|
|
|
es->sctrl &= ~SCTRL_P2FMT;
|
|
|
|
if (format & AFMT_S16_LE) es->sctrl |= SCTRL_P2SEB;
|
|
|
|
if (format & AFMT_STEREO) es->sctrl |= SCTRL_P2SMB;
|
|
|
|
} else {
|
|
|
|
es->sctrl &= ~SCTRL_R1FMT;
|
|
|
|
if (format & AFMT_S16_LE) es->sctrl |= SCTRL_R1SEB;
|
|
|
|
if (format & AFMT_STEREO) es->sctrl |= SCTRL_R1SMB;
|
|
|
|
}
|
|
|
|
bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl);
|
|
|
|
ch->fmt = format;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
1999-12-19 17:51:32 +00:00
|
|
|
eschan1370_setspeed(void *data, u_int32_t speed)
|
1999-09-01 04:08:39 +00:00
|
|
|
{
|
|
|
|
struct es_chinfo *ch = data;
|
|
|
|
struct es_info *es = ch->parent;
|
|
|
|
|
|
|
|
es->ctrl &= ~CTRL_PCLKDIV;
|
|
|
|
es->ctrl |= DAC2_SRTODIV(speed) << CTRL_SH_PCLKDIV;
|
|
|
|
bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl);
|
|
|
|
/* rec/play speeds locked together - should indicate in flags */
|
|
|
|
return speed; /* XXX calc real speed */
|
|
|
|
}
|
|
|
|
|
1999-12-19 17:51:32 +00:00
|
|
|
int
|
|
|
|
eschan1371_setspeed(void *data, u_int32_t speed)
|
|
|
|
{
|
|
|
|
struct es_chinfo *ch = data;
|
|
|
|
struct es_info *es = ch->parent;
|
|
|
|
|
|
|
|
if (ch->dir == PCMDIR_PLAY) {
|
|
|
|
return es1371_dac_rate(es, speed, 3 - ch->num); /* play */
|
|
|
|
} else {
|
|
|
|
return es1371_adc_rate(es, speed, 1); /* record */
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
1999-09-01 04:08:39 +00:00
|
|
|
static int
|
|
|
|
eschan_setblocksize(void *data, u_int32_t blocksize)
|
|
|
|
{
|
|
|
|
return blocksize;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
eschan_trigger(void *data, int go)
|
|
|
|
{
|
|
|
|
struct es_chinfo *ch = data;
|
|
|
|
struct es_info *es = ch->parent;
|
2000-05-26 21:15:47 +00:00
|
|
|
unsigned ss, cnt;
|
|
|
|
|
|
|
|
if (go == PCMTRIG_EMLDMAWR || go == PCMTRIG_EMLDMARD)
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
ss = 1;
|
|
|
|
ss <<= (ch->fmt & AFMT_STEREO)? 1 : 0;
|
|
|
|
ss <<= (ch->fmt & AFMT_16BIT)? 1 : 0;
|
|
|
|
cnt = ch->buffer->dl / ss - 1;
|
1999-09-01 04:08:39 +00:00
|
|
|
|
|
|
|
if (ch->dir == PCMDIR_PLAY) {
|
|
|
|
if (go == PCMTRIG_START) {
|
|
|
|
int b = (ch->fmt & AFMT_S16_LE)? 2 : 1;
|
|
|
|
es->ctrl |= CTRL_DAC2_EN;
|
|
|
|
es->sctrl &= ~(SCTRL_P2ENDINC | SCTRL_P2STINC |
|
|
|
|
SCTRL_P2LOOPSEL | SCTRL_P2PAUSE |
|
|
|
|
SCTRL_P2DACSEN);
|
|
|
|
es->sctrl |= SCTRL_P2INTEN | (b << SCTRL_SH_P2ENDINC);
|
|
|
|
bus_space_write_4(es->st, es->sh,
|
|
|
|
ES1370_REG_DAC2_SCOUNT, cnt);
|
2000-04-17 16:57:12 +00:00
|
|
|
/* start at beginning of buffer */
|
|
|
|
bus_space_write_4(es->st, es->sh, ES1370_REG_MEMPAGE,
|
|
|
|
ES1370_REG_DAC2_FRAMECNT >> 8);
|
|
|
|
bus_space_write_4(es->st, es->sh,
|
|
|
|
ES1370_REG_DAC2_FRAMECNT & 0xff,
|
|
|
|
(ch->buffer->bufsize >> 2) - 1);
|
1999-09-01 04:08:39 +00:00
|
|
|
} else es->ctrl &= ~CTRL_DAC2_EN;
|
|
|
|
} else {
|
|
|
|
if (go == PCMTRIG_START) {
|
|
|
|
es->ctrl |= CTRL_ADC_EN;
|
|
|
|
es->sctrl &= ~SCTRL_R1LOOPSEL;
|
|
|
|
es->sctrl |= SCTRL_R1INTEN;
|
|
|
|
bus_space_write_4(es->st, es->sh,
|
|
|
|
ES1370_REG_ADC_SCOUNT, cnt);
|
2000-04-17 16:57:12 +00:00
|
|
|
/* start at beginning of buffer */
|
|
|
|
bus_space_write_4(es->st, es->sh, ES1370_REG_MEMPAGE,
|
|
|
|
ES1370_REG_ADC_FRAMECNT >> 8);
|
|
|
|
bus_space_write_4(es->st, es->sh,
|
|
|
|
ES1370_REG_ADC_FRAMECNT & 0xff,
|
|
|
|
(ch->buffer->bufsize >> 2) - 1);
|
1999-09-01 04:08:39 +00:00
|
|
|
} else es->ctrl &= ~CTRL_ADC_EN;
|
|
|
|
}
|
|
|
|
bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl);
|
|
|
|
bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
eschan_getptr(void *data)
|
|
|
|
{
|
|
|
|
struct es_chinfo *ch = data;
|
|
|
|
struct es_info *es = ch->parent;
|
2000-04-17 16:57:12 +00:00
|
|
|
u_int32_t reg, cnt;
|
|
|
|
|
|
|
|
if (ch->dir == PCMDIR_PLAY)
|
|
|
|
reg = ES1370_REG_DAC2_FRAMECNT;
|
|
|
|
else
|
|
|
|
reg = ES1370_REG_ADC_FRAMECNT;
|
|
|
|
|
|
|
|
bus_space_write_4(es->st, es->sh, ES1370_REG_MEMPAGE, reg >> 8);
|
|
|
|
cnt = bus_space_read_4(es->st, es->sh, reg & 0x000000ff) >> 16;
|
|
|
|
/* cnt is longwords */
|
|
|
|
return cnt << 2;
|
1999-09-01 04:08:39 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static pcmchan_caps *
|
|
|
|
eschan_getcaps(void *data)
|
|
|
|
{
|
|
|
|
struct es_chinfo *ch = data;
|
|
|
|
return (ch->dir == PCMDIR_PLAY)? &es_playcaps : &es_reccaps;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* The interrupt handler */
|
|
|
|
static void
|
1999-12-19 17:51:32 +00:00
|
|
|
es_intr(void *p)
|
1999-09-01 04:08:39 +00:00
|
|
|
{
|
|
|
|
struct es_info *es = p;
|
|
|
|
unsigned intsrc, sctrl;
|
|
|
|
|
|
|
|
intsrc = bus_space_read_4(es->st, es->sh, ES1370_REG_STATUS);
|
|
|
|
if ((intsrc & STAT_INTR) == 0) return;
|
|
|
|
|
|
|
|
sctrl = es->sctrl;
|
|
|
|
if (intsrc & STAT_ADC) sctrl &= ~SCTRL_R1INTEN;
|
|
|
|
if (intsrc & STAT_DAC1) sctrl &= ~SCTRL_P1INTEN;
|
|
|
|
if (intsrc & STAT_DAC2) sctrl &= ~SCTRL_P2INTEN;
|
|
|
|
|
|
|
|
bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, sctrl);
|
|
|
|
bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl);
|
|
|
|
|
|
|
|
if (intsrc & STAT_ADC) chn_intr(es->rch.channel);
|
1999-12-19 17:51:32 +00:00
|
|
|
if (intsrc & STAT_DAC1);
|
|
|
|
if (intsrc & STAT_DAC2) chn_intr(es->pch.channel);
|
1999-09-01 04:08:39 +00:00
|
|
|
}
|
|
|
|
|
1999-12-19 17:51:32 +00:00
|
|
|
/* ES1370 specific */
|
|
|
|
static int
|
|
|
|
es1370_init(struct es_info *es)
|
|
|
|
{
|
|
|
|
es->ctrl = CTRL_CDC_EN | CTRL_SERR_DIS |
|
|
|
|
(DAC2_SRTODIV(DSP_DEFAULT_SPEED) << CTRL_SH_PCLKDIV);
|
|
|
|
bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl);
|
1999-11-19 07:29:10 +00:00
|
|
|
|
1999-12-19 17:51:32 +00:00
|
|
|
es->sctrl = 0;
|
|
|
|
bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl);
|
1999-11-19 07:29:10 +00:00
|
|
|
|
1999-12-19 17:51:32 +00:00
|
|
|
es1370_wrcodec(es, CODEC_RES_PD, 3);/* No RST, PD */
|
|
|
|
es1370_wrcodec(es, CODEC_CSEL, 0); /* CODEC ADC and CODEC DAC use
|
|
|
|
* {LR,B}CLK2 and run off the LRCLK2
|
|
|
|
* PLL; program DAC_SYNC=0! */
|
|
|
|
es1370_wrcodec(es, CODEC_ADSEL, 0);/* Recording source is mixer */
|
|
|
|
es1370_wrcodec(es, CODEC_MGAIN, 0);/* MIC amp is 0db */
|
1999-11-19 07:29:10 +00:00
|
|
|
|
1999-12-19 17:51:32 +00:00
|
|
|
return 0;
|
|
|
|
}
|
1999-11-19 07:29:10 +00:00
|
|
|
|
1999-12-19 17:51:32 +00:00
|
|
|
/* ES1371 specific */
|
1999-11-19 07:29:10 +00:00
|
|
|
int
|
1999-12-29 05:44:17 +00:00
|
|
|
es1371_init(struct es_info *es, int rev)
|
1999-11-19 07:29:10 +00:00
|
|
|
{
|
|
|
|
int idx;
|
|
|
|
|
1999-12-19 17:51:32 +00:00
|
|
|
if (debug > 0) printf("es_init\n");
|
|
|
|
|
|
|
|
es->num = 0;
|
1999-11-19 07:29:10 +00:00
|
|
|
es->ctrl = 0;
|
|
|
|
es->sctrl = 0;
|
|
|
|
/* initialize the chips */
|
1999-12-29 05:44:17 +00:00
|
|
|
if (rev == 7 || rev >= 9) {
|
|
|
|
#define ES1371_BINTSUMM_OFF 0x07
|
|
|
|
bus_space_write_4(es->st, es->sh, ES1371_BINTSUMM_OFF, 0x20);
|
|
|
|
if (debug > 0) printf("es_init rev == 7 || rev >= 9\n");
|
|
|
|
} else { /* pre ac97 2.1 card */
|
|
|
|
bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl);
|
|
|
|
if (debug > 0) printf("es_init pre ac97 2.1\n");
|
|
|
|
}
|
1999-11-19 07:29:10 +00:00
|
|
|
bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl);
|
|
|
|
bus_space_write_4(es->st, es->sh, ES1371_REG_LEGACY, 0);
|
|
|
|
/* AC'97 warm reset to start the bitclk */
|
|
|
|
bus_space_write_4(es->st, es->sh, ES1371_REG_LEGACY, es->ctrl | ES1371_SYNC_RES);
|
|
|
|
DELAY(2000);
|
1999-12-29 03:46:54 +00:00
|
|
|
bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->ctrl);
|
1999-11-19 07:29:10 +00:00
|
|
|
/* Init the sample rate converter */
|
|
|
|
bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, ES1371_DIS_SRC);
|
|
|
|
for (idx = 0; idx < 0x80; idx++)
|
1999-12-19 17:51:32 +00:00
|
|
|
es1371_src_write(es, idx, 0);
|
1999-11-19 07:29:10 +00:00
|
|
|
es1371_src_write(es, ES_SMPREG_DAC1 + ES_SMPREG_TRUNC_N, 16 << 4);
|
|
|
|
es1371_src_write(es, ES_SMPREG_DAC1 + ES_SMPREG_INT_REGS, 16 << 10);
|
|
|
|
es1371_src_write(es, ES_SMPREG_DAC2 + ES_SMPREG_TRUNC_N, 16 << 4);
|
|
|
|
es1371_src_write(es, ES_SMPREG_DAC2 + ES_SMPREG_INT_REGS, 16 << 10);
|
|
|
|
es1371_src_write(es, ES_SMPREG_VOL_ADC, 1 << 12);
|
|
|
|
es1371_src_write(es, ES_SMPREG_VOL_ADC + 1, 1 << 12);
|
|
|
|
es1371_src_write(es, ES_SMPREG_VOL_DAC1, 1 << 12);
|
|
|
|
es1371_src_write(es, ES_SMPREG_VOL_DAC1 + 1, 1 << 12);
|
|
|
|
es1371_src_write(es, ES_SMPREG_VOL_DAC2, 1 << 12);
|
|
|
|
es1371_src_write(es, ES_SMPREG_VOL_DAC2 + 1, 1 << 12);
|
|
|
|
es1371_adc_rate (es, 22050, 1);
|
1999-12-19 17:51:32 +00:00
|
|
|
es1371_dac_rate (es, 22050, 1);
|
|
|
|
es1371_dac_rate (es, 22050, 2);
|
1999-11-19 07:29:10 +00:00
|
|
|
/* WARNING:
|
|
|
|
* enabling the sample rate converter without properly programming
|
|
|
|
* its parameters causes the chip to lock up (the SRC busy bit will
|
|
|
|
* be stuck high, and I've found no way to rectify this other than
|
|
|
|
* power cycle)
|
|
|
|
*/
|
|
|
|
bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, 0);
|
|
|
|
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
1999-12-19 17:51:32 +00:00
|
|
|
static void
|
1999-11-19 07:29:10 +00:00
|
|
|
es1371_wrcodec(void *s, int addr, u_int32_t data)
|
|
|
|
{
|
1999-12-19 17:51:32 +00:00
|
|
|
int sl;
|
|
|
|
unsigned t, x;
|
1999-11-19 07:29:10 +00:00
|
|
|
struct es_info *es = (struct es_info*)s;
|
|
|
|
|
1999-12-19 17:51:32 +00:00
|
|
|
if (debug > 0) printf("wrcodec addr 0x%x data 0x%x\n", addr, data);
|
1999-11-19 07:29:10 +00:00
|
|
|
|
|
|
|
for (t = 0; t < 0x1000; t++)
|
1999-12-19 17:51:32 +00:00
|
|
|
if (!(bus_space_read_4(es->st, es->sh,(ES1371_REG_CODEC & CODEC_WIP))))
|
1999-11-19 07:29:10 +00:00
|
|
|
break;
|
|
|
|
sl = spltty();
|
|
|
|
/* save the current state for later */
|
1999-12-19 17:51:32 +00:00
|
|
|
x = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE);
|
1999-11-19 07:29:10 +00:00
|
|
|
/* enable SRC state data in SRC mux */
|
|
|
|
bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE,
|
1999-12-19 17:51:32 +00:00
|
|
|
(es1371_wait_src_ready(s) &
|
|
|
|
(ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1)));
|
1999-11-19 07:29:10 +00:00
|
|
|
/* wait for a SAFE time to write addr/data and then do it, dammit */
|
|
|
|
for (t = 0; t < 0x1000; t++)
|
1999-12-19 17:51:32 +00:00
|
|
|
if ((bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE) & 0x00070000) == 0x00010000)
|
|
|
|
break;
|
|
|
|
|
|
|
|
if (debug > 2) printf("one b_s_w: 0x%x 0x%x 0x%x\n", es->sh, ES1371_REG_CODEC,
|
1999-11-19 07:29:10 +00:00
|
|
|
((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) |
|
|
|
|
((data << CODEC_PODAT_SHIFT) & CODEC_PODAT_MASK));
|
1999-12-19 17:51:32 +00:00
|
|
|
|
1999-11-19 07:29:10 +00:00
|
|
|
bus_space_write_4(es->st, es->sh,ES1371_REG_CODEC,
|
|
|
|
((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) |
|
|
|
|
((data << CODEC_PODAT_SHIFT) & CODEC_PODAT_MASK));
|
|
|
|
/* restore SRC reg */
|
|
|
|
es1371_wait_src_ready(s);
|
1999-12-19 17:51:32 +00:00
|
|
|
if (debug > 2) printf("two b_s_w: 0x%x 0x%x 0x%x\n", es->sh, ES1371_REG_SMPRATE, x);
|
|
|
|
bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, x);
|
1999-11-19 07:29:10 +00:00
|
|
|
splx(sl);
|
|
|
|
}
|
|
|
|
|
1999-12-19 17:51:32 +00:00
|
|
|
static u_int32_t
|
|
|
|
es1371_rdcodec(void *s, int addr)
|
1999-11-19 07:29:10 +00:00
|
|
|
{
|
1999-12-19 17:51:32 +00:00
|
|
|
int sl;
|
|
|
|
unsigned t, x;
|
|
|
|
struct es_info *es = (struct es_info *)s;
|
|
|
|
|
|
|
|
if (debug > 0) printf("rdcodec addr 0x%x ... ", addr);
|
|
|
|
|
|
|
|
for (t = 0; t < 0x1000; t++)
|
|
|
|
if (!(x = bus_space_read_4(es->st, es->sh, ES1371_REG_CODEC) & CODEC_WIP))
|
|
|
|
break;
|
|
|
|
if (debug > 0) printf("loop 1 t 0x%x x 0x%x ", t, x);
|
|
|
|
|
|
|
|
sl = spltty();
|
|
|
|
|
|
|
|
/* save the current state for later */
|
|
|
|
x = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE);
|
|
|
|
/* enable SRC state data in SRC mux */
|
|
|
|
bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE,
|
|
|
|
(es1371_wait_src_ready(s) &
|
|
|
|
(ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1)));
|
|
|
|
/* wait for a SAFE time to write addr/data and then do it, dammit */
|
|
|
|
for (t = 0; t < 0x5000; t++)
|
|
|
|
if ((x = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE) & 0x00070000) == 0x00010000)
|
|
|
|
break;
|
|
|
|
if (debug > 0) printf("loop 2 t 0x%x x 0x%x ", t, x);
|
|
|
|
bus_space_write_4(es->st, es->sh, ES1371_REG_CODEC,
|
|
|
|
((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) | CODEC_PORD);
|
|
|
|
|
|
|
|
/* restore SRC reg */
|
|
|
|
es1371_wait_src_ready(s);
|
|
|
|
bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, x);
|
|
|
|
|
|
|
|
splx(sl);
|
|
|
|
|
|
|
|
/* now wait for the stinkin' data (RDY) */
|
|
|
|
for (t = 0; t < 0x1000; t++)
|
|
|
|
if ((x = bus_space_read_4(es->st, es->sh, ES1371_REG_CODEC)) & CODEC_RDY)
|
|
|
|
break;
|
|
|
|
if (debug > 0) printf("loop 3 t 0x%x 0x%x ret 0x%x\n", t, x, ((x & CODEC_PIDAT_MASK) >> CODEC_PIDAT_SHIFT));
|
|
|
|
return ((x & CODEC_PIDAT_MASK) >> CODEC_PIDAT_SHIFT);
|
1999-11-19 07:29:10 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static u_int
|
1999-12-29 05:44:17 +00:00
|
|
|
es1371_src_read(struct es_info *es, u_short reg)
|
1999-12-19 17:51:32 +00:00
|
|
|
{
|
|
|
|
unsigned int r;
|
|
|
|
|
|
|
|
r = es1371_wait_src_ready(es) &
|
|
|
|
(ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1);
|
|
|
|
r |= ES1371_SRC_RAM_ADDRO(reg);
|
|
|
|
bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE,r);
|
|
|
|
return ES1371_SRC_RAM_DATAI(es1371_wait_src_ready(es));
|
1999-11-19 07:29:10 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
1999-12-29 05:44:17 +00:00
|
|
|
es1371_src_write(struct es_info *es, u_short reg, u_short data){
|
1999-11-19 07:29:10 +00:00
|
|
|
u_int r;
|
|
|
|
|
|
|
|
r = es1371_wait_src_ready(es) &
|
1999-12-19 17:51:32 +00:00
|
|
|
(ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1);
|
1999-11-19 07:29:10 +00:00
|
|
|
r |= ES1371_SRC_RAM_ADDRO(reg) | ES1371_SRC_RAM_DATAO(data);
|
|
|
|
/* printf("es1371_src_write 0x%x 0x%x\n",ES1371_REG_SMPRATE,r | ES1371_SRC_RAM_WE); */
|
1999-12-19 17:51:32 +00:00
|
|
|
bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, r | ES1371_SRC_RAM_WE);
|
1999-11-19 07:29:10 +00:00
|
|
|
}
|
|
|
|
|
1999-12-19 17:51:32 +00:00
|
|
|
static u_int
|
1999-12-29 05:44:17 +00:00
|
|
|
es1371_adc_rate(struct es_info *es, u_int rate, int set)
|
1999-12-19 17:51:32 +00:00
|
|
|
{
|
|
|
|
u_int n, truncm, freq, result;
|
|
|
|
|
|
|
|
if (rate > 48000) rate = 48000;
|
|
|
|
if (rate < 4000) rate = 4000;
|
|
|
|
n = rate / 3000;
|
|
|
|
if ((1 << n) & ((1 << 15) | (1 << 13) | (1 << 11) | (1 << 9)))
|
|
|
|
n--;
|
|
|
|
truncm = (21 * n - 1) | 1;
|
|
|
|
freq = ((48000UL << 15) / rate) * n;
|
|
|
|
result = (48000UL << 15) / (freq / n);
|
|
|
|
if (set) {
|
|
|
|
if (rate >= 24000) {
|
|
|
|
if (truncm > 239) truncm = 239;
|
|
|
|
es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_TRUNC_N,
|
|
|
|
(((239 - truncm) >> 1) << 9) | (n << 4));
|
|
|
|
} else {
|
|
|
|
if (truncm > 119) truncm = 119;
|
|
|
|
es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_TRUNC_N,
|
|
|
|
0x8000 | (((119 - truncm) >> 1) << 9) | (n << 4));
|
|
|
|
}
|
|
|
|
es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_INT_REGS,
|
|
|
|
(es1371_src_read(es, ES_SMPREG_ADC + ES_SMPREG_INT_REGS) &
|
|
|
|
0x00ff) | ((freq >> 5) & 0xfc00));
|
|
|
|
es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_VFREQ_FRAC, freq & 0x7fff);
|
|
|
|
es1371_src_write(es, ES_SMPREG_VOL_ADC, n << 8);
|
|
|
|
es1371_src_write(es, ES_SMPREG_VOL_ADC + 1, n << 8);
|
1999-11-19 07:29:10 +00:00
|
|
|
}
|
|
|
|
return result;
|
|
|
|
}
|
|
|
|
|
|
|
|
static u_int
|
1999-12-29 05:44:17 +00:00
|
|
|
es1371_dac_rate(struct es_info *es, u_int rate, int set)
|
1999-12-19 17:51:32 +00:00
|
|
|
{
|
|
|
|
u_int freq, r, result, dac, dis;
|
|
|
|
|
|
|
|
if (rate > 48000) rate = 48000;
|
|
|
|
if (rate < 4000) rate = 4000;
|
|
|
|
freq = (rate << 15) / 3000;
|
|
|
|
result = (freq * 3000) >> 15;
|
|
|
|
if (set) {
|
|
|
|
dac = (set == 1)? ES_SMPREG_DAC1 : ES_SMPREG_DAC2;
|
|
|
|
dis = (set == 1)? ES1371_DIS_P2 : ES1371_DIS_P1;
|
|
|
|
|
|
|
|
r = (es1371_wait_src_ready(es) & (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1));
|
|
|
|
bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, r);
|
|
|
|
es1371_src_write(es, dac + ES_SMPREG_INT_REGS,
|
|
|
|
(es1371_src_read(es, dac + ES_SMPREG_INT_REGS) & 0x00ff) | ((freq >> 5) & 0xfc00));
|
|
|
|
es1371_src_write(es, dac + ES_SMPREG_VFREQ_FRAC, freq & 0x7fff);
|
|
|
|
r = (es1371_wait_src_ready(es) & (ES1371_DIS_SRC | dis | ES1371_DIS_R1));
|
|
|
|
bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, r);
|
|
|
|
}
|
|
|
|
return result;
|
1999-11-19 07:29:10 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static u_int
|
1999-12-29 05:44:17 +00:00
|
|
|
es1371_wait_src_ready(struct es_info *es)
|
1999-11-19 07:29:10 +00:00
|
|
|
{
|
1999-12-19 17:51:32 +00:00
|
|
|
u_int t, r;
|
1999-11-19 07:29:10 +00:00
|
|
|
|
1999-12-19 17:51:32 +00:00
|
|
|
for (t = 0; t < 500; t++) {
|
|
|
|
if (!((r = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE)) & ES1371_SRC_RAM_BUSY))
|
|
|
|
return r;
|
|
|
|
DELAY(1000);
|
|
|
|
}
|
|
|
|
printf("es1371: wait src ready timeout 0x%x [0x%x]\n", ES1371_REG_SMPRATE, r);
|
|
|
|
return 0;
|
|
|
|
}
|
1999-11-19 07:29:10 +00:00
|
|
|
|
1999-09-01 04:08:39 +00:00
|
|
|
/* -------------------------------------------------------------------- */
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Probe and attach the card
|
|
|
|
*/
|
|
|
|
|
|
|
|
static int
|
|
|
|
es_pci_probe(device_t dev)
|
|
|
|
{
|
|
|
|
if (pci_get_devid(dev) == ES1370_PCI_ID) {
|
|
|
|
device_set_desc(dev, "AudioPCI ES1370");
|
|
|
|
return 0;
|
2000-01-17 07:54:00 +00:00
|
|
|
} else if (pci_get_devid(dev) == ES1371_PCI_ID ||
|
|
|
|
pci_get_devid(dev) == ES1371_PCI_ID2) {
|
1999-11-19 07:29:10 +00:00
|
|
|
device_set_desc(dev, "AudioPCI ES1371");
|
|
|
|
return 0;
|
1999-09-01 04:08:39 +00:00
|
|
|
}
|
|
|
|
return ENXIO;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
es_pci_attach(device_t dev)
|
|
|
|
{
|
|
|
|
snddev_info *d;
|
|
|
|
u_int32_t data;
|
|
|
|
struct es_info *es = 0;
|
|
|
|
int type = 0;
|
|
|
|
int regid;
|
|
|
|
struct resource *reg = 0;
|
|
|
|
int mapped;
|
|
|
|
int irqid;
|
|
|
|
struct resource *irq = 0;
|
|
|
|
void *ih = 0;
|
|
|
|
char status[SND_STATUSLEN];
|
1999-11-19 07:29:10 +00:00
|
|
|
struct ac97_info *codec;
|
1999-12-19 17:51:32 +00:00
|
|
|
pcm_channel *ct = NULL;
|
1999-09-01 04:08:39 +00:00
|
|
|
|
|
|
|
d = device_get_softc(dev);
|
|
|
|
if ((es = malloc(sizeof *es, M_DEVBUF, M_NOWAIT)) == NULL) {
|
|
|
|
device_printf(dev, "cannot allocate softc\n");
|
|
|
|
return ENXIO;
|
|
|
|
}
|
|
|
|
bzero(es, sizeof *es);
|
|
|
|
|
2000-04-05 00:38:00 +00:00
|
|
|
es->dev = dev;
|
1999-09-01 04:08:39 +00:00
|
|
|
mapped = 0;
|
|
|
|
data = pci_read_config(dev, PCIR_COMMAND, 2);
|
2000-01-05 02:03:55 +00:00
|
|
|
data |= (PCIM_CMD_PORTEN|PCIM_CMD_MEMEN|PCIM_CMD_BUSMASTEREN);
|
|
|
|
pci_write_config(dev, PCIR_COMMAND, data, 2);
|
|
|
|
data = pci_read_config(dev, PCIR_COMMAND, 2);
|
1999-09-01 04:08:39 +00:00
|
|
|
if (mapped == 0 && (data & PCIM_CMD_MEMEN)) {
|
|
|
|
regid = MEM_MAP_REG;
|
|
|
|
type = SYS_RES_MEMORY;
|
|
|
|
reg = bus_alloc_resource(dev, type, ®id,
|
|
|
|
0, ~0, 1, RF_ACTIVE);
|
|
|
|
if (reg) {
|
|
|
|
es->st = rman_get_bustag(reg);
|
|
|
|
es->sh = rman_get_bushandle(reg);
|
|
|
|
mapped++;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
if (mapped == 0 && (data & PCIM_CMD_PORTEN)) {
|
|
|
|
regid = PCI_MAP_REG_START;
|
|
|
|
type = SYS_RES_IOPORT;
|
|
|
|
reg = bus_alloc_resource(dev, type, ®id,
|
|
|
|
0, ~0, 1, RF_ACTIVE);
|
|
|
|
if (reg) {
|
|
|
|
es->st = rman_get_bustag(reg);
|
|
|
|
es->sh = rman_get_bushandle(reg);
|
|
|
|
mapped++;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
if (mapped == 0) {
|
|
|
|
device_printf(dev, "unable to map register space\n");
|
|
|
|
goto bad;
|
|
|
|
}
|
1999-12-19 17:51:32 +00:00
|
|
|
|
2000-01-17 07:54:00 +00:00
|
|
|
if (pci_get_devid(dev) == ES1371_PCI_ID ||
|
|
|
|
pci_get_devid(dev) == ES1371_PCI_ID2) {
|
1999-12-29 05:44:17 +00:00
|
|
|
if(-1 == es1371_init(es, pci_get_revid(dev))) {
|
1999-12-19 17:51:32 +00:00
|
|
|
device_printf(dev, "unable to initialize the card\n");
|
|
|
|
goto bad;
|
|
|
|
}
|
2000-03-20 15:30:50 +00:00
|
|
|
codec = ac97_create(dev, es, NULL, es1371_rdcodec, es1371_wrcodec);
|
1999-12-19 17:51:32 +00:00
|
|
|
if (codec == NULL) goto bad;
|
|
|
|
/* our init routine does everything for us */
|
|
|
|
/* set to NULL; flag mixer_init not to run the ac97_init */
|
|
|
|
/* ac97_mixer.init = NULL; */
|
2000-04-01 22:24:03 +00:00
|
|
|
if (mixer_init(d, &ac97_mixer, codec) == -1) goto bad;
|
1999-12-19 17:51:32 +00:00
|
|
|
ct = &es1371_chantemplate;
|
|
|
|
} else if (pci_get_devid(dev) == ES1370_PCI_ID) {
|
|
|
|
if (-1 == es1370_init(es)) {
|
|
|
|
device_printf(dev, "unable to initialize the card\n");
|
|
|
|
goto bad;
|
|
|
|
}
|
|
|
|
mixer_init(d, &es1370_mixer, es);
|
|
|
|
ct = &es1370_chantemplate;
|
|
|
|
} else goto bad;
|
1999-09-01 04:08:39 +00:00
|
|
|
|
|
|
|
irqid = 0;
|
|
|
|
irq = bus_alloc_resource(dev, SYS_RES_IRQ, &irqid,
|
1999-10-09 03:50:27 +00:00
|
|
|
0, ~0, 1, RF_ACTIVE | RF_SHAREABLE);
|
1999-09-01 04:08:39 +00:00
|
|
|
if (!irq
|
|
|
|
|| bus_setup_intr(dev, irq, INTR_TYPE_TTY, es_intr, es, &ih)) {
|
|
|
|
device_printf(dev, "unable to map interrupt\n");
|
|
|
|
goto bad;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (bus_dma_tag_create(/*parent*/NULL, /*alignment*/2, /*boundary*/0,
|
|
|
|
/*lowaddr*/BUS_SPACE_MAXADDR_32BIT,
|
|
|
|
/*highaddr*/BUS_SPACE_MAXADDR,
|
|
|
|
/*filter*/NULL, /*filterarg*/NULL,
|
|
|
|
/*maxsize*/ES_BUFFSIZE, /*nsegments*/1, /*maxsegz*/0x3ffff,
|
|
|
|
/*flags*/0, &es->parent_dmat) != 0) {
|
|
|
|
device_printf(dev, "unable to create dma tag\n");
|
|
|
|
goto bad;
|
|
|
|
}
|
|
|
|
|
|
|
|
snprintf(status, SND_STATUSLEN, "at %s 0x%lx irq %ld",
|
|
|
|
(type == SYS_RES_IOPORT)? "io" : "memory",
|
|
|
|
rman_get_start(reg), rman_get_start(irq));
|
|
|
|
|
|
|
|
if (pcm_register(dev, es, 1, 1)) goto bad;
|
1999-12-19 17:51:32 +00:00
|
|
|
pcm_addchan(dev, PCMDIR_REC, ct, es);
|
|
|
|
pcm_addchan(dev, PCMDIR_PLAY, ct, es);
|
1999-09-01 04:08:39 +00:00
|
|
|
pcm_setstatus(dev, status);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
bad:
|
|
|
|
if (es) free(es, M_DEVBUF);
|
|
|
|
if (reg) bus_release_resource(dev, type, regid, reg);
|
|
|
|
if (ih) bus_teardown_intr(dev, irq, ih);
|
|
|
|
if (irq) bus_release_resource(dev, SYS_RES_IRQ, irqid, irq);
|
|
|
|
return ENXIO;
|
|
|
|
}
|
|
|
|
|
|
|
|
static device_method_t es_methods[] = {
|
|
|
|
/* Device interface */
|
|
|
|
DEVMETHOD(device_probe, es_pci_probe),
|
|
|
|
DEVMETHOD(device_attach, es_pci_attach),
|
|
|
|
|
|
|
|
{ 0, 0 }
|
|
|
|
};
|
|
|
|
|
|
|
|
static driver_t es_driver = {
|
|
|
|
"pcm",
|
|
|
|
es_methods,
|
|
|
|
sizeof(snddev_info),
|
|
|
|
};
|
|
|
|
|
|
|
|
static devclass_t pcm_devclass;
|
|
|
|
|
|
|
|
DRIVER_MODULE(es, pci, es_driver, pcm_devclass, 0, 0);
|