1998-12-27 21:47:14 +00:00
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/*
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2001-01-24 08:41:52 +00:00
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* Copyright (c) 1997, 2001 Hellmuth Michaelis. All rights reserved.
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1998-12-27 21:47:14 +00:00
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*---------------------------------------------------------------------------
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*
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* i4b_usr_sti.c - USRobotics Sportster ISDN TA intern (Tina-pp)
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* -------------------------------------------------------------
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*
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2000-10-09 13:29:00 +00:00
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* $FreeBSD$
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*
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2001-01-24 08:41:52 +00:00
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* last edit-date: [Wed Jan 24 09:28:12 2001]
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1998-12-27 21:47:14 +00:00
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*
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*---------------------------------------------------------------------------*/
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#include "isic.h"
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#include "opt_i4b.h"
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2000-10-09 13:29:00 +00:00
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#if (NISIC > 0) && defined(USR_STI)
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1998-12-27 21:47:14 +00:00
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#include <sys/param.h>
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#include <sys/systm.h>
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2000-02-21 02:10:10 +00:00
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#include <sys/bus.h>
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1998-12-27 21:47:14 +00:00
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#include <machine/bus.h>
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2001-01-24 08:41:52 +00:00
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#include <sys/rman.h>
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1998-12-27 21:47:14 +00:00
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#include <sys/socket.h>
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#include <net/if.h>
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#include <machine/i4b_ioctl.h>
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2001-01-24 08:41:52 +00:00
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#include <machine/i4b_trace.h>
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1998-12-27 21:47:14 +00:00
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2001-01-24 08:41:52 +00:00
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#include <i4b/layer1/i4b_l1.h>
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2000-10-09 13:29:00 +00:00
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#include <i4b/layer1/isic/i4b_isic.h>
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#include <i4b/layer1/isic/i4b_hscx.h>
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1998-12-27 21:47:14 +00:00
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/*---------------------------------------------------------------------------*
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* USR Sportster TA intern special registers
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*---------------------------------------------------------------------------*/
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#define USR_HSCXA_OFF 0x0000
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#define USR_HSCXB_OFF 0x4000
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#define USR_INTL_OFF 0x8000
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#define USR_ISAC_OFF 0xc000
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#define USR_RES_BIT 0x80 /* 0 = normal, 1 = reset ISAC/HSCX */
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#define USR_INTE_BIT 0x40 /* 0 = IRQ disabled, 1 = IRQ's enabled */
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#define USR_IL_MASK 0x07 /* IRQ level config */
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static u_char intr_no[] = { 0, 0, 0, 0, 0, 1, 0, 2, 0, 0, 3, 4, 5, 0, 6, 7 };
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#define ADDR(reg) \
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(((reg/4) * 1024) + ((reg%4) * 2))
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2000-02-21 02:10:10 +00:00
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#ifdef USRTA_DEBUG_PORTACCESS
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int debugcntr;
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#define USRTA_DEBUG(fmt) \
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if (++debugcntr < 1000) printf fmt;
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#else
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#define USRTA_DEBUG(fmt)
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#endif
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1998-12-27 21:47:14 +00:00
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/*---------------------------------------------------------------------------*
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* USRobotics read fifo routine
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*---------------------------------------------------------------------------*/
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static void
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2000-02-21 02:10:10 +00:00
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usrtai_read_fifo(struct l1_softc *sc, int what, void *buf, size_t size)
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1998-12-27 21:47:14 +00:00
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{
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register int offset = 0;
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2000-02-21 02:10:10 +00:00
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register unsigned int base = 0;
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USRTA_DEBUG(("usrtai_read_fifo: what %d size %d\n", what, size))
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switch (what)
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{
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case ISIC_WHAT_ISAC:
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base = (unsigned int)ISAC_BASE;
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break;
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case ISIC_WHAT_HSCXA:
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base = (unsigned int)HSCX_A_BASE;
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break;
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case ISIC_WHAT_HSCXB:
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base = (unsigned int)HSCX_B_BASE;
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break;
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default:
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printf("usrtai_read_fifo: invalid what %d\n", what);
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return;
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}
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1998-12-27 21:47:14 +00:00
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2000-02-21 02:10:10 +00:00
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for(;size > 0; size--, offset++)
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{
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*((u_char *)buf + offset) = inb(base + ADDR(offset));
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}
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1998-12-27 21:47:14 +00:00
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}
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/*---------------------------------------------------------------------------*
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* USRobotics write fifo routine
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*---------------------------------------------------------------------------*/
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static void
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2000-02-21 02:10:10 +00:00
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usrtai_write_fifo(struct l1_softc *sc, int what, void *data, size_t size)
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1998-12-27 21:47:14 +00:00
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{
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register int offset = 0;
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2000-02-21 02:10:10 +00:00
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register unsigned int base = 0;
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USRTA_DEBUG(("usrtai_write_fifo: what %d size %d\n", what, size))
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switch (what)
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{
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case ISIC_WHAT_ISAC:
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base = (unsigned int)ISAC_BASE;
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break;
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case ISIC_WHAT_HSCXA:
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base = (unsigned int)HSCX_A_BASE;
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break;
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case ISIC_WHAT_HSCXB:
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base = (unsigned int)HSCX_B_BASE;
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break;
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default:
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printf("usrtai_write_fifo: invalid what %d\n", what);
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return;
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}
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1998-12-27 21:47:14 +00:00
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2000-02-21 02:10:10 +00:00
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for(;size > 0; size--, offset++)
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{
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outb(base + ADDR(offset), *((u_char *)data + offset));
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}
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1998-12-27 21:47:14 +00:00
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}
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/*---------------------------------------------------------------------------*
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* USRobotics write register routine
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*---------------------------------------------------------------------------*/
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static void
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2000-02-21 02:10:10 +00:00
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usrtai_write_reg(struct l1_softc *sc, int what, bus_size_t offs, u_int8_t data)
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1998-12-27 21:47:14 +00:00
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{
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2000-02-21 02:10:10 +00:00
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register unsigned int base = 0;
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USRTA_DEBUG(("usrtai_write_reg: what %d ADDR(%d) %d data %#x\n", what, offs, ADDR(offs), data))
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switch (what)
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{
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case ISIC_WHAT_ISAC:
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base = (unsigned int)ISAC_BASE;
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break;
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case ISIC_WHAT_HSCXA:
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base = (unsigned int)HSCX_A_BASE;
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break;
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case ISIC_WHAT_HSCXB:
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base = (unsigned int)HSCX_B_BASE;
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break;
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default:
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printf("usrtai_write_reg invalid what %d\n", what);
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return;
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}
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outb(base + ADDR(offs), (u_char)data);
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1998-12-27 21:47:14 +00:00
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}
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/*---------------------------------------------------------------------------*
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* USRobotics read register routine
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*---------------------------------------------------------------------------*/
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2000-02-21 02:10:10 +00:00
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static u_int8_t
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usrtai_read_reg(struct l1_softc *sc, int what, bus_size_t offs)
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1998-12-27 21:47:14 +00:00
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{
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2000-02-21 02:10:10 +00:00
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register unsigned int base = 0;
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u_int8_t byte;
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USRTA_DEBUG(("usrtai_read_reg: what %d ADDR(%d) %d..", what, offs, ADDR(offs)))
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switch (what)
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{
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case ISIC_WHAT_ISAC:
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base = (unsigned int)ISAC_BASE;
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break;
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case ISIC_WHAT_HSCXA:
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base = (unsigned int)HSCX_A_BASE;
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break;
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case ISIC_WHAT_HSCXB:
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base = (unsigned int)HSCX_B_BASE;
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break;
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default:
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printf("usrtai_read_reg: invalid what %d\n", what);
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return(0);
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}
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byte = inb(base + ADDR(offs));
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USRTA_DEBUG(("usrtai_read_reg: got %#x\n", byte))
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return(byte);
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}
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/*---------------------------------------------------------------------------*
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* allocate an io port - based on code in isa_isic.c
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*---------------------------------------------------------------------------*/
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static int
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usrtai_alloc_port(device_t dev)
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{
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size_t unit = device_get_unit(dev);
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struct l1_softc *sc = &l1_sc[unit];
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int i, num = 0;
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bus_size_t base;
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/* 49 io mappings: 1 config and 48x8 registers */
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/* config at offset 0x8000 */
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base = sc->sc_port + 0x8000;
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if (base < 0 || base > 0x0ffff)
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return 1;
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sc->sc_resources.io_rid[num] = num;
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bus_set_resource(dev, SYS_RES_IOPORT, num, base, 1);
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if(!(sc->sc_resources.io_base[num] =
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bus_alloc_resource(dev, SYS_RES_IOPORT,
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&sc->sc_resources.io_rid[num],
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0ul, ~0ul, 1, RF_ACTIVE)))
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{
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printf("isic%d: Error, failed to reserve io #%dport %#x!\n", unit, num, base);
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isic_detach_common(dev);
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return(ENXIO);
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}
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num++;
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/* HSCX A at offset 0 */
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base = sc->sc_port;
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for (i = 0; i < 16; i++) {
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if (base+i*1024 < 0 || base+i*1024+8 > 0x0ffff)
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return 1;
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sc->sc_resources.io_rid[num] = num;
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bus_set_resource(dev, SYS_RES_IOPORT, num, base+i*1024, 8);
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if(!(sc->sc_resources.io_base[num] =
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bus_alloc_resource(dev, SYS_RES_IOPORT,
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&sc->sc_resources.io_rid[num],
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0ul, ~0ul, 1, RF_ACTIVE)))
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{
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printf("isic%d: Error, failed to reserve io #%d port %#x!\n", unit, num, base+i*1024);
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isic_detach_common(dev);
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return(ENXIO);
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}
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++num;
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}
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/* HSCX B at offset 0x4000 */
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base = sc->sc_port + 0x4000;
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for (i = 0; i < 16; i++) {
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if (base+i*1024 < 0 || base+i*1024+8 > 0x0ffff)
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return 1;
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sc->sc_resources.io_rid[num] = num;
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bus_set_resource(dev, SYS_RES_IOPORT, num, base+i*1024, 8);
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if(!(sc->sc_resources.io_base[num] =
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bus_alloc_resource(dev, SYS_RES_IOPORT,
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&sc->sc_resources.io_rid[num],
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0ul, ~0ul, 1, RF_ACTIVE)))
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{
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printf("isic%d: Error, failed to reserve io #%d port %#x!\n", unit, num, base+i*1024);
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isic_detach_common(dev);
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return(ENXIO);
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}
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++num;
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}
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/* ISAC at offset 0xc000 */
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base = sc->sc_port + 0xc000;
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for (i = 0; i < 16; i++) {
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if (base+i*1024 < 0 || base+i*1024+8 > 0x0ffff)
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return 1;
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sc->sc_resources.io_rid[num] = num;
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bus_set_resource(dev, SYS_RES_IOPORT, num, base+i*1024, 8);
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if(!(sc->sc_resources.io_base[num] =
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bus_alloc_resource(dev, SYS_RES_IOPORT,
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&sc->sc_resources.io_rid[num],
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0ul, ~0ul, 1, RF_ACTIVE)))
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{
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printf("isic%d: Error, failed to reserve io #%d port %#x!\n", unit, num, base+i*1024);
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isic_detach_common(dev);
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return(ENXIO);
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}
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++num;
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}
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return(0);
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1998-12-27 21:47:14 +00:00
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}
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/*---------------------------------------------------------------------------*
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* isic_probe_usrtai - probe for USR
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*---------------------------------------------------------------------------*/
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int
|
2000-02-21 02:10:10 +00:00
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isic_probe_usrtai(device_t dev)
|
1998-12-27 21:47:14 +00:00
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{
|
2000-02-21 02:10:10 +00:00
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size_t unit = device_get_unit(dev); /* get unit */
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struct l1_softc *sc = 0; /* pointer to softc */
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void *ih = 0; /* dummy */
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1998-12-27 21:47:14 +00:00
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2000-02-21 02:10:10 +00:00
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/* check max unit range */
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1998-12-27 21:47:14 +00:00
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2000-02-21 02:10:10 +00:00
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if(unit >= ISIC_MAXUNIT)
|
1998-12-27 21:47:14 +00:00
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{
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2000-02-21 02:10:10 +00:00
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printf("isic%d: Error, unit %d >= ISIC_MAXUNIT for USR Sportster TA!\n",
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unit, unit);
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return(ENXIO);
|
1998-12-27 21:47:14 +00:00
|
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}
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2000-02-21 02:10:10 +00:00
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sc = &l1_sc[unit]; /* get pointer to softc */
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sc->sc_unit = unit; /* set unit */
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1998-12-27 21:47:14 +00:00
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2000-02-21 02:10:10 +00:00
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/* see if an io base was supplied */
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if(!(sc->sc_resources.io_base[0] =
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|
|
|
bus_alloc_resource(dev, SYS_RES_IOPORT,
|
|
|
|
&sc->sc_resources.io_rid[0],
|
|
|
|
0ul, ~0ul, 1, RF_ACTIVE)))
|
1998-12-27 21:47:14 +00:00
|
|
|
{
|
2000-02-21 02:10:10 +00:00
|
|
|
printf("isic%d: Could not get iobase for USR Sportster TA!\n",
|
|
|
|
unit);
|
|
|
|
return(ENXIO);
|
1998-12-27 21:47:14 +00:00
|
|
|
}
|
2000-02-21 02:10:10 +00:00
|
|
|
|
|
|
|
/* set io base */
|
|
|
|
|
|
|
|
sc->sc_port = rman_get_start(sc->sc_resources.io_base[0]);
|
|
|
|
|
|
|
|
/* release io base */
|
1998-12-27 21:47:14 +00:00
|
|
|
|
2000-02-21 02:10:10 +00:00
|
|
|
bus_release_resource(dev, SYS_RES_IOPORT, sc->sc_resources.io_rid[0],
|
|
|
|
sc->sc_resources.io_base[0]);
|
|
|
|
|
|
|
|
|
1998-12-27 21:47:14 +00:00
|
|
|
/* check if we got an iobase */
|
|
|
|
|
2000-02-21 02:10:10 +00:00
|
|
|
switch(sc->sc_port)
|
1998-12-27 21:47:14 +00:00
|
|
|
{
|
|
|
|
case 0x200:
|
|
|
|
case 0x208:
|
|
|
|
case 0x210:
|
|
|
|
case 0x218:
|
|
|
|
case 0x220:
|
|
|
|
case 0x228:
|
|
|
|
case 0x230:
|
|
|
|
case 0x238:
|
|
|
|
case 0x240:
|
|
|
|
case 0x248:
|
|
|
|
case 0x250:
|
|
|
|
case 0x258:
|
|
|
|
case 0x260:
|
|
|
|
case 0x268:
|
|
|
|
case 0x270:
|
|
|
|
case 0x278:
|
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
|
|
|
printf("isic%d: Error, invalid iobase 0x%x specified for USR Sportster TA!\n",
|
2000-02-21 02:10:10 +00:00
|
|
|
unit, sc->sc_port);
|
1998-12-27 21:47:14 +00:00
|
|
|
return(0);
|
|
|
|
break;
|
|
|
|
}
|
2000-02-21 02:10:10 +00:00
|
|
|
|
|
|
|
/* allocate all the ports needed */
|
|
|
|
|
|
|
|
if(usrtai_alloc_port(dev))
|
|
|
|
{
|
|
|
|
printf("isic%d: Could not get the ports for USR Sportster TA!\n", unit);
|
|
|
|
isic_detach_common(dev);
|
|
|
|
return(ENXIO);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* get our irq */
|
|
|
|
|
|
|
|
if(!(sc->sc_resources.irq =
|
|
|
|
bus_alloc_resource(dev, SYS_RES_IRQ,
|
|
|
|
&sc->sc_resources.irq_rid,
|
|
|
|
0ul, ~0ul, 1, RF_ACTIVE)))
|
|
|
|
{
|
|
|
|
printf("isic%d: Could not get an irq for USR Sportster TA!\n",unit);
|
|
|
|
isic_detach_common(dev);
|
|
|
|
return ENXIO;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* get the irq number */
|
|
|
|
sc->sc_irq = rman_get_start(sc->sc_resources.irq);
|
|
|
|
|
|
|
|
/* register interrupt routine */
|
|
|
|
bus_setup_intr(dev, sc->sc_resources.irq, INTR_TYPE_NET,
|
|
|
|
(void(*)(void *))(isicintr),
|
|
|
|
sc, &ih);
|
|
|
|
|
|
|
|
/* check IRQ validity */
|
|
|
|
|
|
|
|
if(intr_no[sc->sc_irq] == 0)
|
|
|
|
{
|
|
|
|
printf("isic%d: Error, invalid IRQ [%d] specified for USR Sportster TA!\n",
|
|
|
|
unit, sc->sc_irq);
|
|
|
|
return(1);
|
|
|
|
}
|
|
|
|
|
1998-12-27 21:47:14 +00:00
|
|
|
/* setup ISAC access routines */
|
|
|
|
|
|
|
|
sc->clearirq = NULL;
|
|
|
|
sc->readreg = usrtai_read_reg;
|
|
|
|
sc->writereg = usrtai_write_reg;
|
|
|
|
|
|
|
|
sc->readfifo = usrtai_read_fifo;
|
|
|
|
sc->writefifo = usrtai_write_fifo;
|
|
|
|
|
|
|
|
/* setup card type */
|
|
|
|
|
|
|
|
sc->sc_cardtyp = CARD_TYPEP_USRTA;
|
|
|
|
|
|
|
|
/* setup IOM bus type */
|
|
|
|
|
|
|
|
sc->sc_bustyp = BUS_TYPE_IOM2;
|
|
|
|
|
|
|
|
sc->sc_ipac = 0;
|
|
|
|
sc->sc_bfifolen = HSCX_FIFO_LEN;
|
|
|
|
|
|
|
|
/* setup ISAC and HSCX base addr */
|
|
|
|
|
2000-02-21 02:10:10 +00:00
|
|
|
ISAC_BASE = (caddr_t)sc->sc_port + USR_ISAC_OFF;
|
|
|
|
HSCX_A_BASE = (caddr_t)sc->sc_port + USR_HSCXA_OFF;
|
|
|
|
HSCX_B_BASE = (caddr_t)sc->sc_port + USR_HSCXB_OFF;
|
1998-12-27 21:47:14 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Read HSCX A/B VSTR. Expected value for USR Sportster TA based
|
|
|
|
* boards is 0x05 in the least significant bits.
|
|
|
|
*/
|
|
|
|
|
|
|
|
if( ((HSCX_READ(0, H_VSTR) & 0xf) != 0x5) ||
|
|
|
|
((HSCX_READ(1, H_VSTR) & 0xf) != 0x5) )
|
|
|
|
{
|
|
|
|
printf("isic%d: HSCX VSTR test failed for USR Sportster TA\n",
|
2000-02-21 02:10:10 +00:00
|
|
|
unit);
|
1998-12-27 21:47:14 +00:00
|
|
|
printf("isic%d: HSC0: VSTR: %#x\n",
|
2000-02-21 02:10:10 +00:00
|
|
|
unit, HSCX_READ(0, H_VSTR));
|
1998-12-27 21:47:14 +00:00
|
|
|
printf("isic%d: HSC1: VSTR: %#x\n",
|
2000-02-21 02:10:10 +00:00
|
|
|
unit, HSCX_READ(1, H_VSTR));
|
|
|
|
return (1);
|
1998-12-27 21:47:14 +00:00
|
|
|
}
|
|
|
|
|
2000-02-21 02:10:10 +00:00
|
|
|
return (0);
|
1998-12-27 21:47:14 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/*---------------------------------------------------------------------------*
|
|
|
|
* isic_attach_usrtai - attach USR
|
|
|
|
*---------------------------------------------------------------------------*/
|
|
|
|
int
|
2000-02-21 02:10:10 +00:00
|
|
|
isic_attach_usrtai(device_t dev)
|
1998-12-27 21:47:14 +00:00
|
|
|
{
|
|
|
|
u_char irq = 0;
|
2000-02-21 02:10:10 +00:00
|
|
|
size_t unit = device_get_unit(dev); /* get unit */
|
|
|
|
struct l1_softc *sc = 0; /* pointer to softc */
|
1998-12-27 21:47:14 +00:00
|
|
|
|
2000-02-21 02:10:10 +00:00
|
|
|
sc = &l1_sc[unit]; /* get pointer to softc */
|
|
|
|
|
1998-12-27 21:47:14 +00:00
|
|
|
/* reset the HSCX and ISAC chips */
|
|
|
|
|
2000-02-21 02:10:10 +00:00
|
|
|
outb(sc->sc_port + USR_INTL_OFF, USR_RES_BIT);
|
1998-12-27 21:47:14 +00:00
|
|
|
DELAY(SEC_DELAY / 10);
|
|
|
|
|
2000-02-21 02:10:10 +00:00
|
|
|
outb(sc->sc_port + USR_INTL_OFF, 0x00);
|
1998-12-27 21:47:14 +00:00
|
|
|
DELAY(SEC_DELAY / 10);
|
|
|
|
|
|
|
|
/* setup IRQ */
|
|
|
|
|
2000-02-21 02:10:10 +00:00
|
|
|
if((irq = intr_no[sc->sc_irq]) == 0)
|
1998-12-27 21:47:14 +00:00
|
|
|
{
|
|
|
|
printf("isic%d: Attach error, invalid IRQ [%d] specified for USR Sportster TA!\n",
|
2000-02-21 02:10:10 +00:00
|
|
|
unit, sc->sc_irq);
|
|
|
|
return(1);
|
1998-12-27 21:47:14 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/* configure and enable irq */
|
|
|
|
|
2000-02-21 02:10:10 +00:00
|
|
|
outb(sc->sc_port + USR_INTL_OFF, irq | USR_INTE_BIT);
|
1998-12-27 21:47:14 +00:00
|
|
|
DELAY(SEC_DELAY / 10);
|
|
|
|
|
2000-02-21 02:10:10 +00:00
|
|
|
return (0);
|
1998-12-27 21:47:14 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
#endif /* ISIC > 0 */
|