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freebsd-dev/sys/sparc64/include/tte.h

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Flesh out the sparc64 port considerably. This contains: - mostly complete kernel pmap support, and tested but currently turned off userland pmap support - low level assembly language trap, context switching and support code - fully implemented atomic.h and supporting cpufunc.h - some support for kernel debugging with ddb - various header tweaks and filling out of machine dependent structures
2001-07-31 06:05:05 +00:00
/*-
* Copyright (c) 1997 Berkeley Software Design, Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Berkeley Software Design Inc's name may not be used to endorse or
* promote products derived from this software without specific prior
* written permission.
*
* THIS SOFTWARE IS PROVIDED BY BERKELEY SOFTWARE DESIGN INC ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL BERKELEY SOFTWARE DESIGN INC BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* from: BSDI: pmap.v9.h,v 1.10.2.6 1999/08/23 22:18:44 cp Exp
* $FreeBSD$
*/
#ifndef _MACHINE_TTE_H_
#define _MACHINE_TTE_H_
Make tte bit constants explicitly unsigned and long. Add a wierd soft bit. Remove struct stte.
2001-12-29 08:24:02 +00:00
#define TTE_SHIFT (4)
Flesh out the sparc64 port considerably. This contains: - mostly complete kernel pmap support, and tested but currently turned off userland pmap support - low level assembly language trap, context switching and support code - fully implemented atomic.h and supporting cpufunc.h - some support for kernel debugging with ddb - various header tweaks and filling out of machine dependent structures
2001-07-31 06:05:05 +00:00
#define TD_SIZE_SHIFT (61)
#define TD_SOFT2_SHIFT (50)
#define TD_DIAG_SHIFT (41)
#define TD_PA_SHIFT (13)
#define TD_SOFT_SHIFT (7)
#define TD_SIZE_SIZE (2)
#define TD_SOFT2_SIZE (9)
#define TD_DIAG_SIZE (9)
#define TD_PA_SIZE (28)
#define TD_SOFT_SIZE (6)
Make tte bit constants explicitly unsigned and long. Add a wierd soft bit. Remove struct stte.
2001-12-29 08:24:02 +00:00
#define TD_SIZE_MASK (((1UL << TD_SIZE_SIZE) - 1) << TD_SIZE_SHIFT)
#define TD_SOFT2_MASK (((1UL << TD_SOFT2_SIZE) - 1) << TD_SOFT2_SHIFT)
#define TD_DIAG_MASK (((1UL << TD_DIAG_SIZE) - 1) << TD_DIAG_SHIFT)
#define TD_PA_MASK (((1UL << TD_PA_SIZE) - 1) << TD_PA_SHIFT)
#define TD_SOFT_MASK (((1UL << TD_SOFT_SIZE) - 1) << TD_SOFT_SHIFT)
Flesh out the sparc64 port considerably. This contains: - mostly complete kernel pmap support, and tested but currently turned off userland pmap support - low level assembly language trap, context switching and support code - fully implemented atomic.h and supporting cpufunc.h - some support for kernel debugging with ddb - various header tweaks and filling out of machine dependent structures
2001-07-31 06:05:05 +00:00
Make tte bit constants explicitly unsigned and long. Add a wierd soft bit. Remove struct stte.
2001-12-29 08:24:02 +00:00
#define TS_EXEC (1UL << 4)
#define TS_REF (1UL << 3)
#define TS_PV (1UL << 2)
#define TS_W (1UL << 1)
#define TS_WIRED (1UL << 0)
#define TD_V (1UL << 63)
#define TD_8K (0UL << TD_SIZE_SHIFT)
#define TD_64K (1UL << TD_SIZE_SHIFT)
#define TD_512K (2UL << TD_SIZE_SHIFT)
#define TD_4M (3UL << TD_SIZE_SHIFT)
#define TD_NFO (1UL << 60)
#define TD_IE (1UL << 59)
Flesh out the sparc64 port considerably. This contains: - mostly complete kernel pmap support, and tested but currently turned off userland pmap support - low level assembly language trap, context switching and support code - fully implemented atomic.h and supporting cpufunc.h - some support for kernel debugging with ddb - various header tweaks and filling out of machine dependent structures
2001-07-31 06:05:05 +00:00
#define TD_PA(pa) ((pa) & TD_PA_MASK)
#define TD_EXEC (TS_EXEC << TD_SOFT_SHIFT)
#define TD_REF (TS_REF << TD_SOFT_SHIFT)
Make tte bit constants explicitly unsigned and long. Add a wierd soft bit. Remove struct stte.
2001-12-29 08:24:02 +00:00
#define TD_PV (TS_PV << TD_SOFT_SHIFT)
Implement pv_bit_count which is used by pmap_ts_referenced. Remove the modified tte bit and add a softwrite bit. Mappings are only writeable if they have been written to, thus in general modify just duplicates the write bit. The softwrite bit makes it easier to distinguish mappings which should be writeable but are not yet modified. Move the exec bit down one, it was being sign extended when used as an immediate operand. Use the lock bit to mean tsb page and remove the tsb bit. These are the only form of locked (tsb) entries we support and we need to conserve bits where possible. Implement pmap_copy_page and pmap_is_modified and friends. Detect mappings that are being being upgraded from read-only to read-write due to copy-on-write and update the write bit appropriately. Make trap_mmu_fault do the right thing for protection faults, which is necessary to implement copy on write correctly. Also handle a bunch more userland trap types and add ktr traces.
2001-09-03 22:55:12 +00:00
#define TD_SW (TS_W << TD_SOFT_SHIFT)
Make tte bit constants explicitly unsigned and long. Add a wierd soft bit. Remove struct stte.
2001-12-29 08:24:02 +00:00
#define TD_WIRED (TS_WIRED << TD_SOFT_SHIFT)
#define TD_L (1UL << 6)
#define TD_CP (1UL << 5)
#define TD_CV (1UL << 4)
#define TD_E (1UL << 3)
#define TD_P (1UL << 2)
#define TD_W (1UL << 1)
#define TD_G (1UL << 0)
Flesh out the sparc64 port considerably. This contains: - mostly complete kernel pmap support, and tested but currently turned off userland pmap support - low level assembly language trap, context switching and support code - fully implemented atomic.h and supporting cpufunc.h - some support for kernel debugging with ddb - various header tweaks and filling out of machine dependent structures
2001-07-31 06:05:05 +00:00
Modify the tte format to not include the tlb context number and to store the virtual page number in a much more convenient way; all in one piece. This greatly simplifies the comparison for a matching tte, and allows the fault handlers to be much simpler due to not having to load wierd masks. Rewrite the tlb fault handlers to account for the new format. These are also written to allow faults on the user tsb inside of the fault handlers; the kernel fault handler must be aware of this and not clobber the other's registers. The faults do not yet occur due to other support that is needed (and still under my desk). Bug fixes from: tmm
2002-02-25 04:56:50 +00:00
#define TV_VPN(va) ((va) >> PAGE_SHIFT)
Make tte bit constants explicitly unsigned and long. Add a wierd soft bit. Remove struct stte.
2001-12-29 08:24:02 +00:00
#define TD_GET_SIZE(d) (((d) >> TD_SIZE_SHIFT) & 3)
#define TD_GET_PA(d) ((d) & TD_PA_MASK)
Add a macro for getting the tlbs (itlb and/or dtlb) which the given tte may be mapped by.
2002-01-08 05:07:58 +00:00
#define TD_GET_TLB(d) (((d) & TD_EXEC) ? (TLB_DTLB | TLB_ITLB) : TLB_DTLB)
Modify the tte format to not include the tlb context number and to store the virtual page number in a much more convenient way; all in one piece. This greatly simplifies the comparison for a matching tte, and allows the fault handlers to be much simpler due to not having to load wierd masks. Rewrite the tlb fault handlers to account for the new format. These are also written to allow faults on the user tsb inside of the fault handlers; the kernel fault handler must be aware of this and not clobber the other's registers. The faults do not yet occur due to other support that is needed (and still under my desk). Bug fixes from: tmm
2002-02-25 04:56:50 +00:00
#define TV_GET_VA(vpn) ((vpn) << PAGE_SHIFT)
Add a macro to get the context from a tte tag, not necesarily a whole tte. Remove the old inline.
2001-09-30 18:55:05 +00:00
style(9) the structure definitions.
2001-09-05 05:18:35 +00:00
struct tte {
Modify the tte format to not include the tlb context number and to store the virtual page number in a much more convenient way; all in one piece. This greatly simplifies the comparison for a matching tte, and allows the fault handlers to be much simpler due to not having to load wierd masks. Rewrite the tlb fault handlers to account for the new format. These are also written to allow faults on the user tsb inside of the fault handlers; the kernel fault handler must be aware of this and not clobber the other's registers. The faults do not yet occur due to other support that is needed (and still under my desk). Bug fixes from: tmm
2002-02-25 04:56:50 +00:00
u_long tte_vpn;
Flesh out the sparc64 port considerably. This contains: - mostly complete kernel pmap support, and tested but currently turned off userland pmap support - low level assembly language trap, context switching and support code - fully implemented atomic.h and supporting cpufunc.h - some support for kernel debugging with ddb - various header tweaks and filling out of machine dependent structures
2001-07-31 06:05:05 +00:00
u_long tte_data;
};
Modify the tte format to not include the tlb context number and to store the virtual page number in a much more convenient way; all in one piece. This greatly simplifies the comparison for a matching tte, and allows the fault handlers to be much simpler due to not having to load wierd masks. Rewrite the tlb fault handlers to account for the new format. These are also written to allow faults on the user tsb inside of the fault handlers; the kernel fault handler must be aware of this and not clobber the other's registers. The faults do not yet occur due to other support that is needed (and still under my desk). Bug fixes from: tmm
2002-02-25 04:56:50 +00:00
static __inline int
tte_match_vpn(struct tte tte, vm_offset_t vpn)
Flesh out the sparc64 port considerably. This contains: - mostly complete kernel pmap support, and tested but currently turned off userland pmap support - low level assembly language trap, context switching and support code - fully implemented atomic.h and supporting cpufunc.h - some support for kernel debugging with ddb - various header tweaks and filling out of machine dependent structures
2001-07-31 06:05:05 +00:00
{
Modify the tte format to not include the tlb context number and to store the virtual page number in a much more convenient way; all in one piece. This greatly simplifies the comparison for a matching tte, and allows the fault handlers to be much simpler due to not having to load wierd masks. Rewrite the tlb fault handlers to account for the new format. These are also written to allow faults on the user tsb inside of the fault handlers; the kernel fault handler must be aware of this and not clobber the other's registers. The faults do not yet occur due to other support that is needed (and still under my desk). Bug fixes from: tmm
2002-02-25 04:56:50 +00:00
return ((tte.tte_data & TD_V) != 0 && tte.tte_vpn == vpn);
Flesh out the sparc64 port considerably. This contains: - mostly complete kernel pmap support, and tested but currently turned off userland pmap support - low level assembly language trap, context switching and support code - fully implemented atomic.h and supporting cpufunc.h - some support for kernel debugging with ddb - various header tweaks and filling out of machine dependent structures
2001-07-31 06:05:05 +00:00
}
static __inline int
tte_match(struct tte tte, vm_offset_t va)
{
Modify the tte format to not include the tlb context number and to store the virtual page number in a much more convenient way; all in one piece. This greatly simplifies the comparison for a matching tte, and allows the fault handlers to be much simpler due to not having to load wierd masks. Rewrite the tlb fault handlers to account for the new format. These are also written to allow faults on the user tsb inside of the fault handlers; the kernel fault handler must be aware of this and not clobber the other's registers. The faults do not yet occur due to other support that is needed (and still under my desk). Bug fixes from: tmm
2002-02-25 04:56:50 +00:00
return (tte_match_vpn(tte, va >> PAGE_SHIFT));
Flesh out the sparc64 port considerably. This contains: - mostly complete kernel pmap support, and tested but currently turned off userland pmap support - low level assembly language trap, context switching and support code - fully implemented atomic.h and supporting cpufunc.h - some support for kernel debugging with ddb - various header tweaks and filling out of machine dependent structures
2001-07-31 06:05:05 +00:00
}
#endif /* !_MACHINE_TTE_H_ */
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