2005-01-06 01:43:34 +00:00
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/*-
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2002-08-17 16:23:44 +00:00
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* Copyright (c) 2002 Orion Hodson <orion@freebsd.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHERIN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THEPOSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _SYS_SOUND_PCI_VIA8233_H_
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#define _SYS_SOUND_PCI_VIA8233_H_
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/*
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* VIA Technologies VT8233 Southbridge Audio Driver
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*
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* Documentation sources:
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*
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2003-02-22 23:28:15 +00:00
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* o V8233C specs. from VIA, gratefully received under NDA.
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* o AC97 R2.2 specs.
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* o ALSA driver (very useful comments)
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2002-08-17 16:23:44 +00:00
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*/
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2003-02-22 23:28:15 +00:00
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#define VIA_PCI_SPDIF 0x49
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#define VIA_SPDIF_EN 0x08
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#define VIA_DXS0_BASE 0x00
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#define VIA_DXS1_BASE 0x10
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#define VIA_DXS2_BASE 0x20
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#define VIA_DXS3_BASE 0x30
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#define VIA_DXS_BASE(n) (0x10 * (n))
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#define BASE_IS_VIA_DXS_REG(x) ((x) <= VIA_DXS3_BASE)
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#define VIA8233_RP_DXS_LVOL 0x02
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#define VIA8233_RP_DXS_RVOL 0x03
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#define VIA8233_DXS_MUTE 0x3f
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#define VIA8233_RP_DXS_RATEFMT 0x08
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#define VIA8233_DXS_STOP_INDEX 0xff000000
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#define VIA8233_DXS_RATEFMT_48K 0x000fffff
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#define VIA8233_DXS_RATEFMT_STEREO 0x00100000
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#define VIA8233_DXS_RATEFMT_16BIT 0x00200000
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2002-08-17 16:23:44 +00:00
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#define VIA_PCI_ACLINK_STAT 0x40
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# define VIA_PCI_ACLINK_C11_READY 0x20
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# define VIA_PCI_ACLINK_C10_READY 0x10
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# define VIA_PCI_ACLINK_C01_READY 0x04
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# define VIA_PCI_ACLINK_LOW_POWER 0x02
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# define VIA_PCI_ACLINK_C00_READY 0x01
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#define VIA_PCI_ACLINK_CTRL 0x41
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# define VIA_PCI_ACLINK_EN 0x80
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# define VIA_PCI_ACLINK_NRST 0x40
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# define VIA_PCI_ACLINK_SYNC 0x20
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# define VIA_PCI_ACLINK_SERIAL 0x10
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# define VIA_PCI_ACLINK_VRATE 0x08
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# define VIA_PCI_ACLINK_SGD 0x04
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2003-04-17 15:04:11 +00:00
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# define VIA_PCI_ACLINK_DESIRED (VIA_PCI_ACLINK_EN | \
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VIA_PCI_ACLINK_NRST | \
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VIA_PCI_ACLINK_VRATE | \
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VIA_PCI_ACLINK_SGD)
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2002-08-17 16:23:44 +00:00
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#define VIA_MC_SGD_STATUS 0x40
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#define VIA_WR0_SGD_STATUS 0x60
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#define VIA_WR1_SGD_STATUS 0x70
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# define SGD_STATUS_ACTIVE 0x80
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# define SGD_STATUS_AT_STOP 0x40
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# define SGD_STATUS_TRIGGER_Q 0x08
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# define SGD_STATUS_STOP_I_S 0x04
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# define SGD_STATUS_EOL 0x02
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# define SGD_STATUS_FLAG 0x01
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# define SGD_STATUS_INTR (SGD_STATUS_EOL | SGD_STATUS_FLAG)
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2003-02-22 23:28:15 +00:00
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#define VIA_WR_BASE(n) (0x60 + (n) * 0x10)
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2002-08-17 16:23:44 +00:00
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#define VIA_MC_SGD_CONTROL 0x41
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#define VIA_WR0_SGD_CONTROL 0x61
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#define VIA_WR1_SGD_CONTROL 0x71
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# define SGD_CONTROL_START 0x80
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# define SGD_CONTROL_STOP 0x40
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# define SGD_CONTROL_AUTOSTART 0x20
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# define SGD_CONTROL_PAUSE 0x08
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# define SGD_CONTROL_I_STOP 0x04
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# define SGD_CONTROL_I_EOL 0x02
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# define SGD_CONTROL_I_FLAG 0x01
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#define VIA_MC_SGD_FORMAT 0x42
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# define MC_SGD_16BIT 0x80
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# define MC_SGD_8BIT 0x00
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# define MC_SGD_CHANNELS(x) (((x)& 0x07) << 4)
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#define VIA_WR0_SGD_FORMAT 0x62
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#define VIA_WR1_SGD_FORMAT 0x72
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2003-02-22 23:28:15 +00:00
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#define VIA_WR_RP_SGD_FORMAT 0x02
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2002-08-17 16:23:44 +00:00
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# define WR_FIFO_ENABLE 0x40
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#define VIA_WR0_SGD_INPUT 0x63
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#define VIA_WR1_SGD_INPUT 0x73
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# define WR_LINE_IN 0x00
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# define WR_MIC_IN 0x04
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# define WR_PRIMARY_CODEC 0x00
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# define WR_SECONDARY_CODEC1 0x01
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# define WR_SECONDARY_CODEC2 0x02
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# define WR_SECONDARY_CODEC3 0x03
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#define VIA_MC_TABLE_PTR_BASE 0x44
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#define VIA_WR0_TABLE_PTR_BASE 0x64
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#define VIA_WR1_TABLE_PTR_BASE 0x74
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#define VIA_MC_SLOT_SELECT 0x48
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# define SLOT3(x) (x)
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# define SLOT4(x) ((x) << 4)
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# define SLOT7(x) ((x) << 8)
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# define SLOT8(x) ((x) << 12)
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# define SLOT6(x) ((x) << 16)
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# define SLOT9(x) ((x) << 20)
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#define VIA_MC_CURRENT_COUNT 0x4c
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#define VIA_WR0_FORMAT 0x68
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#define VIA_WR1_FORMAT 0x78
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# define WR_FORMAT_STOP_INDEX 0xff000000
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# define WR_FORMAT_STEREO 0x00100000
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# define WR_FORMAT_16BIT 0x00200000
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/* Relative offsets */
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#define VIA_RP_STATUS 0x00
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#define VIA_RP_CONTROL 0x01
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#define VIA_RP_TABLE_PTR 0x04
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#define VIA_RP_CURRENT_COUNT 0x0c
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#define VIA_AC97_CONTROL 0x80
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# define VIA_AC97_CODECID11 0xc0000000
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# define VIA_AC97_CODECID10 0x80000000
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# define VIA_AC97_CODECID01 0x40000000
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# define VIA_AC97_CODEC11_VALID 0x20000000
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# define VIA_AC97_CODEC10_VALID 0x10000000
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# define VIA_AC97_CODEC01_VALID 0x08000000
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# define VIA_AC97_CODEC00_VALID 0x02000000
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# define VIA_AC97_BUSY 0x01000000
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# define VIA_AC97_READ 0x00800000
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# define VIA_AC97_INDEX(x) ((x) << 16)
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# define VIA_AC97_DATA(x) ((x) & 0xffff)
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#define VIA_CODEC_BUSY 0x01000000
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#define VIA_CODEC_PRIVALID 0x02000000
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#define VIA_CODEC_INDEX(x) ((x)<<16)
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#endif /* SYS_SOUND_PCI_VIA8233_H_ */
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