freebsd-dev/sys/arm/broadcom/bcm2835/bcm2835_bscreg.h

/*-
 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
 *
 * Copyright (c) 2012 Oleksandr Tymoshenko <gonzo@freebsd.org>
 * Copyright (c) 2013 Luiz Otavio O Souza <loos@freebsd.org>
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 * $FreeBSD$
 */

#ifndef	_BCM2835_BSCREG_H_
#define	_BCM2835_BSCREG_H_

#define	BCM_BSC_CORE_CLK	150000000U
#define	BCM_BSC_CTRL		0x00
#define	BCM_BSC_CTRL_I2CEN		(1 << 15)
#define	BCM_BSC_CTRL_INTR		(1 << 10)
#define	BCM_BSC_CTRL_INTT		(1 << 9)
#define	BCM_BSC_CTRL_INTD		(1 << 8)
#define	BCM_BSC_CTRL_ST			(1 << 7)
#define	BCM_BSC_CTRL_CLEAR1		(1 << 5)
#define	BCM_BSC_CTRL_CLEAR0		(1 << 4)
#define	BCM_BSC_CTRL_READ		(1 << 0)
#define	BCM_BSC_CTRL_INT_ALL \
    (BCM_BSC_CTRL_INTR | BCM_BSC_CTRL_INTT | BCM_BSC_CTRL_INTD)

#define	BCM_BSC_STATUS		0x04
#define	BCM_BSC_STATUS_CLKT		(1 << 9)
#define	BCM_BSC_STATUS_ERR		(1 << 8)
#define	BCM_BSC_STATUS_RXF		(1 << 7)
#define	BCM_BSC_STATUS_TXE		(1 << 6)
#define	BCM_BSC_STATUS_RXD		(1 << 5)
#define	BCM_BSC_STATUS_TXD		(1 << 4)
#define	BCM_BSC_STATUS_RXR		(1 << 3)
#define	BCM_BSC_STATUS_TXW		(1 << 2)
#define	BCM_BSC_STATUS_DONE		(1 << 1)
#define	BCM_BSC_STATUS_TA		(1 << 0)
#define	BCM_BSC_STATUS_ERRBITS \
    (BCM_BSC_STATUS_CLKT | BCM_BSC_STATUS_ERR)

#define	BCM_BSC_DLEN		0x08
#define	BCM_BSC_SLAVE		0x0c
#define	BCM_BSC_DATA		0x10
#define	BCM_BSC_CLOCK		0x14
#define	BCM_BSC_DELAY		0x18
#define	BCM_BSC_CLKT		0x1c

#endif	/* _BCM2835_BSCREG_H_ */
Add the Raspberry Pi BSC (I2C compliant) controller driver. Reviewed by: rpaulo Approved by: adrian (mentor) 2013-10-23 12:29:39 +00:00			`/*-`
sys/arm: further adoption of SPDX licensing ID tags. Mainly focus on files that use BSD 2-Clause license, however the tool I was using misidentified many licenses so this was mostly a manual - error prone - task. The Software Package Data Exchange (SPDX) group provides a specification to make it easier for automated tools to detect and summarize well known opensource licenses. We are gradually adopting the specification, noting that the tags are considered only advisory and do not, in any way, superceed or replace the license texts. 2017-11-27 15:04:10 +00:00			`* SPDX-License-Identifier: BSD-2-Clause-FreeBSD`
			`*`
Add the Raspberry Pi BSC (I2C compliant) controller driver. Reviewed by: rpaulo Approved by: adrian (mentor) 2013-10-23 12:29:39 +00:00			`* Copyright (c) 2012 Oleksandr Tymoshenko <gonzo@freebsd.org>`
			`* Copyright (c) 2013 Luiz Otavio O Souza <loos@freebsd.org>`
			`* All rights reserved.`
			`*`
			`* Redistribution and use in source and binary forms, with or without`
			`* modification, are permitted provided that the following conditions`
			`* are met:`
			`* 1. Redistributions of source code must retain the above copyright`
			`* notice, this list of conditions and the following disclaimer.`
			`* 2. Redistributions in binary form must reproduce the above copyright`
			`* notice, this list of conditions and the following disclaimer in the`
			`* documentation and/or other materials provided with the distribution.`
			`*`
			* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
			`* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE`
			`* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE`
			`* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE`
			`* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL`
			`* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS`
			`* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)`
			`* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT`
			`* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY`
			`* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF`
			`* SUCH DAMAGE.`
			`*`
			`* $FreeBSD$`
			`*/`

			`#ifndef _BCM2835_BSCREG_H_`
			`#define _BCM2835_BSCREG_H_`

			`#define BCM_BSC_CORE_CLK 150000000U`
			`#define BCM_BSC_CTRL 0x00`
			`#define BCM_BSC_CTRL_I2CEN (1 << 15)`
			`#define BCM_BSC_CTRL_INTR (1 << 10)`
			`#define BCM_BSC_CTRL_INTT (1 << 9)`
			`#define BCM_BSC_CTRL_INTD (1 << 8)`
			`#define BCM_BSC_CTRL_ST (1 << 7)`
			`#define BCM_BSC_CTRL_CLEAR1 (1 << 5)`
			`#define BCM_BSC_CTRL_CLEAR0 (1 << 4)`
			`#define BCM_BSC_CTRL_READ (1 << 0)`
Work around bcm283x silicon bugs to make i2c repeat-start work for the most common case where it's needed -- a write followed by a read to the same slave. The i2c controller in this chip only performs complete transfers, it does not provide control over start/repeat-start/stop operations on the bus. Thus, we have gotten a full stop/start sequence rather than a repeat-start when doing a typical i2c slave access of "write address, read data". Some i2c slave devices require a repeat-start to work correctly. These changes cause the controller to do a repeat-start by pre-staging the read parameters in the controller registers immediate after the controller has latched the values for the initial write operation, but before any bytes are actually written. With the values pre-staged, when the write portion of the transfer completes, the state machine in the silicon sees a new start operation already staged and that causes it to perform a repeat-start. The key to tricking the buggy hardware into doing this is to avoid prefilling any output data in the transmit FIFO so that it is possible to catch the silicon in the state where transmit values are latched but the transmit isn't completed yet. 2017-10-01 16:48:36 +00:00			`#define BCM_BSC_CTRL_INT_ALL \`
			`(BCM_BSC_CTRL_INTR \| BCM_BSC_CTRL_INTT \| BCM_BSC_CTRL_INTD)`

Add the Raspberry Pi BSC (I2C compliant) controller driver. Reviewed by: rpaulo Approved by: adrian (mentor) 2013-10-23 12:29:39 +00:00			`#define BCM_BSC_STATUS 0x04`
			`#define BCM_BSC_STATUS_CLKT (1 << 9)`
			`#define BCM_BSC_STATUS_ERR (1 << 8)`
			`#define BCM_BSC_STATUS_RXF (1 << 7)`
			`#define BCM_BSC_STATUS_TXE (1 << 6)`
			`#define BCM_BSC_STATUS_RXD (1 << 5)`
			`#define BCM_BSC_STATUS_TXD (1 << 4)`
			`#define BCM_BSC_STATUS_RXR (1 << 3)`
			`#define BCM_BSC_STATUS_TXW (1 << 2)`
			`#define BCM_BSC_STATUS_DONE (1 << 1)`
			`#define BCM_BSC_STATUS_TA (1 << 0)`
Work around bcm283x silicon bugs to make i2c repeat-start work for the most common case where it's needed -- a write followed by a read to the same slave. The i2c controller in this chip only performs complete transfers, it does not provide control over start/repeat-start/stop operations on the bus. Thus, we have gotten a full stop/start sequence rather than a repeat-start when doing a typical i2c slave access of "write address, read data". Some i2c slave devices require a repeat-start to work correctly. These changes cause the controller to do a repeat-start by pre-staging the read parameters in the controller registers immediate after the controller has latched the values for the initial write operation, but before any bytes are actually written. With the values pre-staged, when the write portion of the transfer completes, the state machine in the silicon sees a new start operation already staged and that causes it to perform a repeat-start. The key to tricking the buggy hardware into doing this is to avoid prefilling any output data in the transmit FIFO so that it is possible to catch the silicon in the state where transmit values are latched but the transmit isn't completed yet. 2017-10-01 16:48:36 +00:00			`#define BCM_BSC_STATUS_ERRBITS \`
			`(BCM_BSC_STATUS_CLKT \| BCM_BSC_STATUS_ERR)`

Add the Raspberry Pi BSC (I2C compliant) controller driver. Reviewed by: rpaulo Approved by: adrian (mentor) 2013-10-23 12:29:39 +00:00			`#define BCM_BSC_DLEN 0x08`
			`#define BCM_BSC_SLAVE 0x0c`
			`#define BCM_BSC_DATA 0x10`
			`#define BCM_BSC_CLOCK 0x14`
			`#define BCM_BSC_DELAY 0x18`
			`#define BCM_BSC_CLKT 0x1c`

			`#endif /* _BCM2835_BSCREG_H_ */`