309 lines
8.4 KiB
C
309 lines
8.4 KiB
C
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/*-
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* Copyright 2013-2015 John Wehle <john@feith.com>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*/
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/*
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* Amlogic aml8726 watchdog driver.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/malloc.h>
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#include <sys/rman.h>
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#include <sys/watchdog.h>
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#include <machine/bus.h>
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#include <machine/cpufunc.h>
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#include <dev/fdt/fdt_common.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <arm/amlogic/aml8726/aml8726_soc.h>
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struct aml8726_wdt_softc {
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device_t dev;
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struct resource * res[2];
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struct mtx mtx;
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void * ih_cookie;
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};
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static struct resource_spec aml8726_wdt_spec[] = {
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{ SYS_RES_MEMORY, 0, RF_ACTIVE },
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{ SYS_RES_IRQ, 0, RF_ACTIVE },
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{ -1, 0 }
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};
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static struct {
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uint32_t ctrl_cpu_mask;
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uint32_t ctrl_en;
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uint32_t term_cnt_mask;
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uint32_t reset_cnt_mask;
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} aml8726_wdt_soc_params;
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/*
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* devclass_get_device / device_get_softc could be used
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* to dynamically locate this, however the wdt is a
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* required device which can't be unloaded so there's
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* no need for the overhead.
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*/
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static struct aml8726_wdt_softc *aml8726_wdt_sc = NULL;
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#define AML_WDT_LOCK(sc) mtx_lock_spin(&(sc)->mtx)
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#define AML_WDT_UNLOCK(sc) mtx_unlock_spin(&(sc)->mtx)
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#define AML_WDT_LOCK_INIT(sc) \
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mtx_init(&(sc)->mtx, device_get_nameunit((sc)->dev), \
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"wdt", MTX_SPIN)
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#define AML_WDT_LOCK_DESTROY(sc) mtx_destroy(&(sc)->mtx);
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#define AML_WDT_CTRL_REG 0
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#define AML_WDT_CTRL_CPU_WDRESET_MASK aml8726_wdt_soc_params.ctrl_cpu_mask
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#define AML_WDT_CTRL_CPU_WDRESET_SHIFT 24
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#define AML_WDT_CTRL_IRQ_EN (1 << 23)
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#define AML_WDT_CTRL_EN aml8726_wdt_soc_params.ctrl_en
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#define AML_WDT_CTRL_TERMINAL_CNT_MASK aml8726_wdt_soc_params.term_cnt_mask
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#define AML_WDT_CTRL_TERMINAL_CNT_SHIFT 0
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#define AML_WDT_RESET_REG 4
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#define AML_WDT_RESET_CNT_MASK aml8726_wdt_soc_params.reset_cnt_mask
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#define AML_WDT_RESET_CNT_SHIFT 0
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#define CSR_WRITE_4(sc, reg, val) bus_write_4((sc)->res[0], reg, (val))
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#define CSR_READ_4(sc, reg) bus_read_4((sc)->res[0], reg)
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#define CSR_BARRIER(sc, reg) bus_barrier((sc)->res[0], reg, 4, \
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(BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE))
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static void
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aml8726_wdt_watchdog(void *private, u_int cmd, int *error)
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{
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struct aml8726_wdt_softc *sc = (struct aml8726_wdt_softc *)private;
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uint32_t wcr;
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uint64_t tens_of_usec;
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AML_WDT_LOCK(sc);
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tens_of_usec = (((uint64_t)1 << (cmd & WD_INTERVAL)) + 9999) / 10000;
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if (cmd != 0 && tens_of_usec <= (AML_WDT_CTRL_TERMINAL_CNT_MASK >>
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AML_WDT_CTRL_TERMINAL_CNT_SHIFT)) {
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wcr = AML_WDT_CTRL_CPU_WDRESET_MASK |
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AML_WDT_CTRL_EN | ((uint32_t)tens_of_usec <<
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AML_WDT_CTRL_TERMINAL_CNT_SHIFT);
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CSR_WRITE_4(sc, AML_WDT_RESET_REG, 0);
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CSR_WRITE_4(sc, AML_WDT_CTRL_REG, wcr);
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*error = 0;
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} else
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CSR_WRITE_4(sc, AML_WDT_CTRL_REG,
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(CSR_READ_4(sc, AML_WDT_CTRL_REG) &
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~(AML_WDT_CTRL_IRQ_EN | AML_WDT_CTRL_EN)));
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AML_WDT_UNLOCK(sc);
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}
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static int
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aml8726_wdt_intr(void *arg)
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{
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struct aml8726_wdt_softc *sc = (struct aml8726_wdt_softc *)arg;
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/*
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* Normally a timeout causes a hardware reset, however
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* the watchdog timer can be configured to cause an
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* interrupt instead by setting AML_WDT_CTRL_IRQ_EN
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* and clearing AML_WDT_CTRL_CPU_WDRESET_MASK.
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*/
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AML_WDT_LOCK(sc);
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CSR_WRITE_4(sc, AML_WDT_CTRL_REG,
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(CSR_READ_4(sc, AML_WDT_CTRL_REG) & ~(AML_WDT_CTRL_IRQ_EN |
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AML_WDT_CTRL_EN)));
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CSR_BARRIER(sc, AML_WDT_CTRL_REG);
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AML_WDT_UNLOCK(sc);
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device_printf(sc->dev, "timeout expired\n");
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return (FILTER_HANDLED);
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}
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static int
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aml8726_wdt_probe(device_t dev)
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{
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if (!ofw_bus_status_okay(dev))
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return (ENXIO);
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if (!ofw_bus_is_compatible(dev, "amlogic,aml8726-wdt"))
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return (ENXIO);
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device_set_desc(dev, "Amlogic aml8726 WDT");
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return (BUS_PROBE_DEFAULT);
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}
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static int
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aml8726_wdt_attach(device_t dev)
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{
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struct aml8726_wdt_softc *sc = device_get_softc(dev);
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/* There should be exactly one instance. */
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if (aml8726_wdt_sc != NULL)
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return (ENXIO);
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sc->dev = dev;
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if (bus_alloc_resources(dev, aml8726_wdt_spec, sc->res)) {
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device_printf(dev, "can not allocate resources for device\n");
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return (ENXIO);
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}
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/*
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* Certain bitfields are dependent on the hardware revision.
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*/
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switch (aml8726_soc_hw_rev) {
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case AML_SOC_HW_REV_M8:
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aml8726_wdt_soc_params.ctrl_cpu_mask = 0xf <<
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AML_WDT_CTRL_CPU_WDRESET_SHIFT;
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switch (aml8726_soc_metal_rev) {
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case AML_SOC_M8_METAL_REV_M2_A:
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aml8726_wdt_soc_params.ctrl_en = 1 << 19;
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aml8726_wdt_soc_params.term_cnt_mask = 0x07ffff <<
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AML_WDT_CTRL_TERMINAL_CNT_SHIFT;
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aml8726_wdt_soc_params.reset_cnt_mask = 0x07ffff <<
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AML_WDT_RESET_CNT_SHIFT;
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break;
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default:
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aml8726_wdt_soc_params.ctrl_en = 1 << 22;
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aml8726_wdt_soc_params.term_cnt_mask = 0x3fffff <<
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AML_WDT_CTRL_TERMINAL_CNT_SHIFT;
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aml8726_wdt_soc_params.reset_cnt_mask = 0x3fffff <<
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AML_WDT_RESET_CNT_SHIFT;
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break;
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}
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break;
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case AML_SOC_HW_REV_M8B:
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aml8726_wdt_soc_params.ctrl_cpu_mask = 0xf <<
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AML_WDT_CTRL_CPU_WDRESET_SHIFT;
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aml8726_wdt_soc_params.ctrl_en = 1 << 19;
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aml8726_wdt_soc_params.term_cnt_mask = 0x07ffff <<
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AML_WDT_CTRL_TERMINAL_CNT_SHIFT;
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aml8726_wdt_soc_params.reset_cnt_mask = 0x07ffff <<
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AML_WDT_RESET_CNT_SHIFT;
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break;
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default:
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aml8726_wdt_soc_params.ctrl_cpu_mask = 3 <<
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AML_WDT_CTRL_CPU_WDRESET_SHIFT;
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aml8726_wdt_soc_params.ctrl_en = 1 << 22;
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aml8726_wdt_soc_params.term_cnt_mask = 0x3fffff <<
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AML_WDT_CTRL_TERMINAL_CNT_SHIFT;
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aml8726_wdt_soc_params.reset_cnt_mask = 0x3fffff <<
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AML_WDT_RESET_CNT_SHIFT;
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break;
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}
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/*
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* Disable the watchdog.
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*/
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CSR_WRITE_4(sc, AML_WDT_CTRL_REG,
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(CSR_READ_4(sc, AML_WDT_CTRL_REG) & ~(AML_WDT_CTRL_IRQ_EN |
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AML_WDT_CTRL_EN)));
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/*
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* Initialize the mutex prior to installing the interrupt handler
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* in case of a spurious interrupt.
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*/
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AML_WDT_LOCK_INIT(sc);
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if (bus_setup_intr(dev, sc->res[1], INTR_TYPE_MISC | INTR_MPSAFE,
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aml8726_wdt_intr, NULL, sc, &sc->ih_cookie)) {
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device_printf(dev, "could not setup interrupt handler\n");
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bus_release_resources(dev, aml8726_wdt_spec, sc->res);
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AML_WDT_LOCK_DESTROY(sc);
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return (ENXIO);
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}
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aml8726_wdt_sc = sc;
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EVENTHANDLER_REGISTER(watchdog_list, aml8726_wdt_watchdog, sc, 0);
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return (0);
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}
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static int
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aml8726_wdt_detach(device_t dev)
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{
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return (EBUSY);
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}
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static device_method_t aml8726_wdt_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, aml8726_wdt_probe),
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DEVMETHOD(device_attach, aml8726_wdt_attach),
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DEVMETHOD(device_detach, aml8726_wdt_detach),
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DEVMETHOD_END
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};
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static driver_t aml8726_wdt_driver = {
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"wdt",
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aml8726_wdt_methods,
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sizeof(struct aml8726_wdt_softc),
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};
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static devclass_t aml8726_wdt_devclass;
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EARLY_DRIVER_MODULE(wdt, simplebus, aml8726_wdt_driver, aml8726_wdt_devclass,
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0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LATE);
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void
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cpu_reset()
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{
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/* Watchdog has not yet been initialized */
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if (aml8726_wdt_sc == NULL)
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printf("Reset hardware has not yet been initialized.\n");
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else {
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CSR_WRITE_4(aml8726_wdt_sc, AML_WDT_RESET_REG, 0);
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CSR_WRITE_4(aml8726_wdt_sc, AML_WDT_CTRL_REG,
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(AML_WDT_CTRL_CPU_WDRESET_MASK | AML_WDT_CTRL_EN |
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(10 << AML_WDT_CTRL_TERMINAL_CNT_SHIFT)));
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}
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while (1);
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}
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