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freebsd-dev/sys/dev/aic7xxx/aic7xxx_osm.h

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Move aicasm to its own subdirectory. Separate our platform independent hooks from core driver functionality shared between platforms (FreeBSD and Linux at this time). Add sequencer workarounds for several chip->chipset interactions. Correct external SCB corruption problem on aic7895 based cards (3940AUW). Lots of cleanups resulting from the port to another OS.
2000-09-16 20:02:28 +00:00
/*
* FreeBSD platform specific driver option settings, data structures,
* function declarations and includes.
*
Update Copyright notices for new year. (should have been in last commit).
2001-01-27 20:54:24 +00:00
* Copyright (c) 1994-2001 Justin T. Gibbs.
Move aicasm to its own subdirectory. Separate our platform independent hooks from core driver functionality shared between platforms (FreeBSD and Linux at this time). Add sequencer workarounds for several chip->chipset interactions. Correct external SCB corruption problem on aic7895 based cards (3940AUW). Lots of cleanups resulting from the port to another OS.
2000-09-16 20:02:28 +00:00
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions, and the following disclaimer,
* without modification.
* 2. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* Alternatively, this software may be distributed under the terms of the
* GNU Public License ("GPL").
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $Id$
*
* $FreeBSD$
*/
#ifndef _AIC7XXX_FREEBSD_H_
#define _AIC7XXX_FREEBSD_H_
#include <opt_aic7xxx.h> /* for config options */
ahc_eisa.c: ahc_pci.c: Prepare for making ahc a module by adding module dependency and version info. aic7770.c: Remove linux header ifdefs. The headers are handled differently in Linux where local includes (those using "'s instead of <>'s) are allowed. Don't map our interrupt until after we are fully setup to handle interrupts. Our interrupt line may be shared so an interrupt could occur at any time. aic7xxx.c: Remove linux header ifdefs. current->curr to avoid Linux's use of current as a #define for the current task on some architectures. Add a helper function, ahc_assert_atn(), for use in message phases we handle manually. This hides the fact that U160 chips with the expected phase matching disabled need to have SCSISIGO updated differently. if (ahc_check_residual(scb) != 0) ahc_calc_residual(scb); else ahc_set_residual(scb, 0); becomes: ahc_update_residual(scb); Modify scsi parity error (or CRC error) handling to reflect expected phase being disabled on U160 chips. Move SELTO handling above BUSFREE handling so we can use the new busfree interrupt behavior on U160 chips. In ahc_build_transfer_msg() filter the period and ppr_options prior to deciding whether a PPR message is required. ppr_options may be forced to zero which will effect our decision. Correct a long standing but latent bug in ahc_find_syncrate(). We could choose a DT only rate even though DT transfers were disabled. In the CAM environment this was unlikely as CAM filters our rate to a non-DT value if the device does not support such rates. When displaing controller characteristics, include the speed of the chip. This way we can modify the transfer speed based on optional features that are enabled/disabled in a particular application. Add support for switching from fully blown tagged queing to just using simple queue tags should the device reject an ordered tag. Remove per-target "current" disconnect and tag queuing enable flags. These should be per-device and are not referenced internally be the driver, so we let the OSM track this state if it needs to. Use SCSI-3 message terminology. aic7xxx.h: The real 7850 does not support Ultra modes, but there are several cards that use the generic 7850 PCI ID even though they are using an Ultra capable chip (7859/7860). We start out with the AHC_ULTRA feature set and then check the DEVSTATUS register to determine if the capability is really present. current -> curr ahc_calc_residual() is no longer static allowing it to be called from ahc_update_residual() in aic7xxx_inline.h. Update some serial eeprom definitions for the latest BIOS versions. aic7xxx.reg: Add a combined DATA_PHASE mask to the SCSIPHASE register definition to simplify some sequencer code. aic7xxx.seq: Take advantage of some performance features available only on the U160 chips. The auto-ack feature allows us to ack data-in phases up to the data-fifo size while the sequencer is still setting up the DMA engine. This greatly reduces read transfer latency and simplifies testing for transfer complete (check SCSIEN only). We also disable the expected phase feature, and enable the new bus free interrupt behavior, to avoid a few instructions. Re-arrange the Ultra2+ data phase handling to allow us to do more work in parallel with the data fifo flushing on a read. On an SDTR, ack the message immediately so the target can prepare the next phase or message byte in parallel with our work to honor the message. aic7xxx_93cx6.c: Remove linux header ifdefs. aic7xxx_freebsd.c: current -> curr Add a module event handler. Handle tag downgrades in our ahc_send_async() handler. We won't be able to downgrade to "basic queuing" until CAM is made aware of this queuing type. aic7xxx_freebsd.h: Include cleanups. Define offsetof if required. Correct a few comments. Update prototype of ahc_send_async(). aic7xxx_inline.h: Implement ahc_update_residual(). aic7xxx_pci.c: Remove linux header ifdefs. Correct a few product strings. Enable several U160 performance enhancing features. Modify Ultra capability determination so we will enable Ultra speeds on devices with a 7850 PCI id that happen to really be a 7859 or 7860. Don't map our interrupt until after we are fully setup to handle interrupts. Our interrupt line may be shared so an interrupt could occur at any time.
2001-05-15 19:41:12 +00:00
#ifndef NPCI
#include <pci.h>
#endif
Move aicasm to its own subdirectory. Separate our platform independent hooks from core driver functionality shared between platforms (FreeBSD and Linux at this time). Add sequencer workarounds for several chip->chipset interactions. Correct external SCB corruption problem on aic7895 based cards (3940AUW). Lots of cleanups resulting from the port to another OS.
2000-09-16 20:02:28 +00:00
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/bus.h> /* For device_t */
Move the new byte order function prototypes from <sys/param.h> to <sys/endian.h>. This puts us in line with NetBSD and OpenBSD.
2002-04-26 22:48:23 +00:00
#include <sys/endian.h>
ahc_eisa.c: ahc_pci.c: Add detach support. Make use of soft allocated on our behalf by newbus. For PCI devices, disable the mapping type we aren't using for extra protection from rogue code. aic7xxx_93cx6.c: aic7xxx_93cx6.h: Sync perforce IDs. aic7xxx_freebsd.c: Capture the eventhandle returned by EVENTHANDER_REGISTER so we can kill the handler off during detach. Use AHC_* constants instead of hard coded numbers in a few more places. Test PPR option state when deciding to "really" negotiate when the CAM_NEGOTIATE flag is passed in a CCB. Make use of core "ahc_pause_and_flushwork" routine in our timeout handler rather than re-inventing this code. Cleanup all of our resources (really!) in ahc_platform_free(). We should be all set to become a module now. Implement the core ahc_detach() routine shared by all of the FreeBSD front-ends. aic7xxx_freebsd.h: Softc storage for our event handler. Null implementation for the ahc_platform_flushwork() OSM callback. FreeBSD doesn't need this as XPT callbacks are safe from all contexts and are done directly in ahc_done(). aic7xxx_inline.h: Implement new lazy interrupt scheme. To avoid an extra PCI bus read, we first check our completion queues to see if any work has completed. If work is available, we assume that this is the source of the interrupt and skip reading INTSTAT. Any remaining interrupt status will be cleared by a second call to the interrupt handler should the interrupt line still be asserted. This drops the interrupt handler down to a single PCI bus read in the common case of I/O completion. This is the same overhead as in the not so distant past, but the extra sanity of perforning a PCI read after clearing the command complete interrupt and before running the completion queue to avoid missing command complete interrupts added a cycle. aic7xxx.c: During initialization, be sure to initialize all scratch ram locations before they are read to avoid parity errors. In this case, we use a new function, ahc_unbusy_tcl() to initialize the scratch ram busy target table. Replace instances of ahc_index_busy_tcl() used to unbusy a tcl without looking at the old value with ahc_unbusy_tcl(). Modify ahc_sent_msg so that it can find single byte messages. ahc_sent_msg is now used to determine if a transfer negotiation attempt resulted in a bus free. Be more careful in filtering out only the SCSI interrupts of interest in ahc_handle_scsiint. Rearrange interrupt clearing code to ensure that at least one PCI transaction occurrs after hitting CLRSINT1 and writting to CLRINT. CLRSINT1 writes take a bit to take effect, and the re-arrangement provides sufficient delay to ensure the write to CLRINT is effective. The old code might report a spurious interrupt on some "fast" chipsets. export ahc-update_target_msg_request for use by OSM code. If a target does not respond to our ATN request, clear it once we move to a non-message phase. This avoids sending a MSG_NOOP in some later message out phase. Use max lun and max target constants instead of hard-coded values. Use softc storage built into our device_t under FreeBSD. Fix a bug in ahc_free() that caused us to delete resources that were not allocated. Clean up any tstate/lstate info in ahc_free(). Clear the powerdown state in ahc_reset() so that registers can be accessed. Add a preliminary function for pausing the chip and processing any posted work. Add a preliminary suspend and resume functions. aic7xxx.h: Limit the number of supported luns to 64. We don't support information unit transfers, so this is the maximum that makes sense for these chips. Add a new flag AHC_ALL_INTERRUPTS that forces the processing of all interrupt state in a single invokation of ahc_intr(). When the flag is not set, we use the lazy interrupt handling scheme. Add data structures to store controller state while we are suspended. Use constants instead of hard coded values where appropriate. Correct some harmless "unsigned/signed" conflicts. aic7xxx.seq: Only perform the SCSIBUSL fix on ULTRA2 or newer controllers. Older controllers seem to be confused by this. In target mode, ignore PHASEMIS during data phases. This bit seems to be flakey on U160 controllers acting in target mode. aic7xxx_pci.c: Add support for the 29160C CPCI adapter. Add definitions for subvendor ID information available for devices with the "9005" vendor id. We currently use this information to determine if a multi-function device doesn't have the second channel hooked up on a board. Add rudimentary power mode code so we can put the controller into the D0 state. In the future this will be an OSM callback so that in FreeBSD we don't duplicate functionality provided by the PCI code. The powerstate code was added after I'd completed my regression tests on this code. Only capture "left over BIOS state" if the POWRDN setting is not set in HCNTRL. In target mode, don't bother sending incremental CRC data.
2000-12-20 01:11:37 +00:00
#include <sys/eventhandler.h>
Move aicasm to its own subdirectory. Separate our platform independent hooks from core driver functionality shared between platforms (FreeBSD and Linux at this time). Add sequencer workarounds for several chip->chipset interactions. Correct external SCB corruption problem on aic7895 based cards (3940AUW). Lots of cleanups resulting from the port to another OS.
2000-09-16 20:02:28 +00:00
#include <sys/kernel.h>
#include <sys/malloc.h>
#include <sys/queue.h>
#if NPCI > 0
This is an MFC candidate. ahc_eisa.c: Change aic7770_map_int to take an additional irq parameter. Although we can get the irq from the eisa dev under FreeBSD, we can't do this under linux, so the OSM interface must supply this. ahc_pci.c: Move ahc_power_state_change() to the OSM. This allows us to use a platform supplied function that does the same thing. -current will move to the FreeBSD native API in the near future. aic7770.c: Sync up with core changes to support Linux EISA. We now store a 2 bit primary channel number rather than a bit flag that only allows b to be the primary channel. Adjust for this change. aic7xxx.c: Namespace and staticization cleanup. All exported symbols use an "ahc_" prefix to avoid collisions with other modules. Correct a logic bug that prevented us from dropping ATN during some exceptional conditions during message processing. Take advantage of a new flag managed by the sequencer that indicates if an SCB fetch is in progress. If so, the currently selected SCB needs to be returned to the free list to prevent an SCB leak. This leak is a rarity and would only occur if a bus reset or timeout resulting in a bus reset occurred in the middle of an SCB fetch. Don't attempt to perform ULTRA transfers on ultra capable adapters missing the external precision resistor required for ultra speeds. I've never encountered an adapter configured this way, but better safe than sorry. Handle the case of 5MHz user sync rate set as "0" instead of 0x1c in scratch ram. If we lookup a period of 0 in our table (async), clear the scsi offset. aic7xxx.h: Adjust for the primary channel being represented as a 2 bit integer in the flags member of the ahc softc. Cleanup the flags definitions so that comment blocks are not cramped. Update seeprom definitions to correctly reflect the fact that the primary channel is represented as a 2 bit integer. Add AHC_ULTRA_DIASABLED softc flag to denote controllers missing the external precision resistor. aic7xxx.reg: Add DFCACHETH to the definition of DFSTATUS for completness sake. Add SEQ_FLAGS2 which currently only contains the SCB_DMA (SCB DMA in progress) flag. aic7xxx.seq: Correct a problem when one lun has a disconnected untagged transaction and another lun has disconnected tagged transactions. Just because an entry is found in the untagged table doesn't mean that it will match. If the match on the lun fails, cleanup the SCB (return it to the disconnected list or free it), and snoop for a tag message. Before this change, we reported an unsolicited reselection. This bug was introduced about a month ago during an overly aggressive optimization pass on the reselection code. When cleaning up an SCB, we can't just blindly free the SCB. In the paging case, if the SCB came off of the disconnected list, its state may never have been updated in host memory. So, check the disconnected bit in SCB_CONTROL and return the SCB to the disconnected list if appropriate. Manage the SCB_DMA flag of SEQ_FLAGS2. More carefully shutdown the S/G dma engine in all cases by using a subroutine. Supposedly not doing this can cause an arbiter hang on some ULTRA2 chips. Formatting cleanup. On some chips, at least the aic7856, the transition from MREQPEND to HDONE can take a full 4 clock cycles. Test HDONE one more time to avoid this race. We only want our FIFO hung recovery code to execute when the engine is really hung. aic7xxx_93cx6.c: Sync perforce ids. aic7xxx_freebsd.c: Adjust for the primary channel being a 2 bit integer rather than a flag for 'B' channel being the primary. Namespace cleanup. Unpause the sequencer in one error recovery path that neglected to do so. This could have caused us to perform a bus reset when a recovery message might have otherwise been successful. aic7xxx_freebsd.h: Use AHC_PCI_CONFIG for controlling compilation of PCI support consistently throughout the driver. Move ahc_power_state_change() to OSM. aic7xxx_inline.h Namespace cleanup. Adjust our interrupt handler so it will work in the edge interrupt case. We must process all interrupt sources when the interrupt fires or risk not ever getting an interrupt again. This involves marking the fact that we are relying on an edge interrupt in ahc->flags and checking for this condition in addition to the AHC_ALL_INTERRUPTS flag. This fixes hangs on the 284X and any other aic7770 installation where level interrupts are not available. aic7xxx_pci.c: Move the powerstate manipulation code into the OSM. Several OSes now provide this functionality natively. Take another shot at using the data stored in scratch ram if the SCB2 signature is correct and no SEEPROM data is available. In the past this failed if external SCB ram was configured because the memory port was locked. We now release the memory port prior to testing the values in SCB2 and re-acquire it prior to doing termination control. Adjust for new 2 bit primary channel setting. Trust the STPWLEVEL setting on v 3.X BIOSes too. Configure any 785X ID in the same fashion and assume that any device with a rev id of 1 or higher has the PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
#define AHC_PCI_CONFIG 1
Add Perforce RCSIDs for easy revision correlation to my local tree. ahc_pci.c: Bring back the AHC_ALLOW_MEMIO option at least until the memory mapped I/O problem on the SuperMicro 370DR3 is better understood. aic7xxx.c: If we see a spurious SCSI interrupt, attempt to clear it and continue by unpausing the sequencer. Change the interface to ahc_send_async(). Some async messages need to be broadcast to all the luns of a target or all the targets of a bus. This is easier to achieve by passing explicit channel, target, and lun parameters instead of attempting to construct a device info struct to match. Filter the sync parameters for the PPR message in exactly the same way we do for an old fashioned SDTR message. Correct some typos and correct a panic message. Handle rejected PPR messages. In ahc_handle_msg_reject(), let ahc_build_transfer_msg() build any additional transfer messages instead of doing this inline. aic7xxx.h: Increase the size of both msgout_buf and msgin_buf to better accomodate PPR messages. aic7xxx_freebsd.c: Update for change in ahc_send_async() parameters. aic7xxx_freebsd.h Update for change in ahc_send_async() parameters. Honor AHC_ALLOW_MEMIO. aic7xxx_pci.c: Check the error register before going into full blown PCI interrupt handling. This avoids a few costly PCI configuration space reads when we run our PCI interrupt handler because another device sharing our interrupt line is more active than we are. Also unpause the sequencer after processing a PCI interrupt.
2000-09-22 22:18:05 +00:00
#ifdef AHC_ALLOW_MEMIO
Move aicasm to its own subdirectory. Separate our platform independent hooks from core driver functionality shared between platforms (FreeBSD and Linux at this time). Add sequencer workarounds for several chip->chipset interactions. Correct external SCB corruption problem on aic7895 based cards (3940AUW). Lots of cleanups resulting from the port to another OS.
2000-09-16 20:02:28 +00:00
#include <machine/bus_memio.h>
#endif
Add Perforce RCSIDs for easy revision correlation to my local tree. ahc_pci.c: Bring back the AHC_ALLOW_MEMIO option at least until the memory mapped I/O problem on the SuperMicro 370DR3 is better understood. aic7xxx.c: If we see a spurious SCSI interrupt, attempt to clear it and continue by unpausing the sequencer. Change the interface to ahc_send_async(). Some async messages need to be broadcast to all the luns of a target or all the targets of a bus. This is easier to achieve by passing explicit channel, target, and lun parameters instead of attempting to construct a device info struct to match. Filter the sync parameters for the PPR message in exactly the same way we do for an old fashioned SDTR message. Correct some typos and correct a panic message. Handle rejected PPR messages. In ahc_handle_msg_reject(), let ahc_build_transfer_msg() build any additional transfer messages instead of doing this inline. aic7xxx.h: Increase the size of both msgout_buf and msgin_buf to better accomodate PPR messages. aic7xxx_freebsd.c: Update for change in ahc_send_async() parameters. aic7xxx_freebsd.h Update for change in ahc_send_async() parameters. Honor AHC_ALLOW_MEMIO. aic7xxx_pci.c: Check the error register before going into full blown PCI interrupt handling. This avoids a few costly PCI configuration space reads when we run our PCI interrupt handler because another device sharing our interrupt line is more active than we are. Also unpause the sequencer after processing a PCI interrupt.
2000-09-22 22:18:05 +00:00
#endif
Move aicasm to its own subdirectory. Separate our platform independent hooks from core driver functionality shared between platforms (FreeBSD and Linux at this time). Add sequencer workarounds for several chip->chipset interactions. Correct external SCB corruption problem on aic7895 based cards (3940AUW). Lots of cleanups resulting from the port to another OS.
2000-09-16 20:02:28 +00:00
#include <machine/bus_pio.h>
#include <machine/bus.h>
Major update to the aic7xxx driver: ahc_eisa.c: ahc_pci.c: Conform to new aic7xxx IRQ API. Adapt to aic7xxx_freebsd -> aic7xxx_osm changes. aic7770.c: Disable card generated interrupt early in our probe for "extra safety" Commonize some seeprom code with the PCI side of the driver. aic7xxx.c: Correctly initialize a few scratch ram locations during a sequencer restart. This avoids spurious sequencer ram parity errors in some configurations. Include the softc in ahc_update_residual calls. We need it for some diagnostics in this code path. Flag a data overrun on an auto-request sense failure as a CAM_AUTOSENSE_FAIL rather than a CAM_DATA_RUN_ERR. Force a renegotiation after noticing a parity error. This covers targets that lose our negotiation settings but don't bother to give us a unit attention condition. This can happen if a target fails during a reselection of us during a cable pull. Convert some code to using constants. Fix some typos. Correct target mode message loop handling. ahc_clear_msg_state was not clearing the "need to go to message out phase" bit once our loop was over. Simplify some abort handling code. Include tag information in target mode immediate notify events. When shutting down EISA controllers, don't EISA BIOS settings in the high portions of scratch ram. This fixes warm boot issues on some systems. Save a bit of space by only allocating the SCBs that we can use. Avoid some code paths in ahc_abort_scbs() if we are currently acting as a target. Correctly cleanup stranded SCBs in the card's SCB array. These are SCBs who's mapping has already been torn down by code that aborted the SCB by seeing it in another list first. Add a comment about some potential bus reset issues for target mode on Twin (EISA only) controllers. aic7xxx.h: Cleanup the hardware scb definitions a bit. Allocate a ful 256 byte scb mapping index. This simplifies the lookup code since the table covers all possible (and potentially bogus) values. Make AHC_DEBUG work again. aic7xxx.reg: Updates to hardware SCB definition. New definitions for target mode fixes. aic7xxx.seq: In target mode, initialize SAVED_LUN just after we receive the identify message. It may be required in the error recovery path when a normal cdb packet (includes lun) is not sent up to the host for processing. Respond to irregular messages during a selection in target mode. Defer looking for space for a cdb packet until we are about to enter command phase. We want to be able to handle irregular messages even if we would otherwise return QUEUE_FULL or BUSY. Add support for sending Ignore Wide Residue messages as a target. In the disable disconnect case in target mode, set our transfer rate correctly once data are availble. aic7xxx_93cx6.c: aic7xxx_93cx6.h: Add the ability to write and erase the seeprom. aic7xxx_inline.h: Correct Big Endian handling of large cdb sizes (> 12 bytes). Adaptec to changes in the calc_residual API. Correct a target mode bug where we always attempted to service the input queue even if no progress could be made due to lack of ATIOs. aic7xxx_osm.c: Adaptec to new IRQ mapping API. The new API allows the core to only enable our IRQ mapping once it is safe (sufficient initialization) to do so. Slap bootverbose protection around some diagnostics. Only attempt DT phases if we are wide. aic7xxx_osm.h: Enable big endian support. Adjust for IRQ API change. aic7xxx_pci.c: Be more careful about relying on subvendor 9005 information. We now only trust it for HBAs. This should allow the driver to attach to some MBs where the subvendor/device information does not follow the Adaptec spec. Only enable interrupts on the card once we are fully setup. Disable external SCB ram usage on the aic7895. I have not been able to make it 100% reliable. Adjust to seeprom routines being properly prefixed with "ahc". Fix a few bugs in the external SCB ram probing routine. We need to clear any parity errors we've triggered during the probe to avoid future, fatal, interrupts. If we detect an invalid cable combination, pretent there are no cable at all. This will enable all of the terminators which is probably the safest configuration we can "guess". MFC after: 4 days
2002-04-24 16:58:51 +00:00
#include <machine/endian.h>
Move aicasm to its own subdirectory. Separate our platform independent hooks from core driver functionality shared between platforms (FreeBSD and Linux at this time). Add sequencer workarounds for several chip->chipset interactions. Correct external SCB corruption problem on aic7895 based cards (3940AUW). Lots of cleanups resulting from the port to another OS.
2000-09-16 20:02:28 +00:00
#include <machine/clock.h>
#include <machine/resource.h>
#include <sys/rman.h>
#if NPCI > 0
#include <pci/pcireg.h>
#include <pci/pcivar.h>
#endif
#include <cam/cam.h>
#include <cam/cam_ccb.h>
#include <cam/cam_debug.h>
#include <cam/cam_sim.h>
#include <cam/cam_xpt_sim.h>
#include <cam/scsi/scsi_all.h>
#include <cam/scsi/scsi_message.h>
Move check against CAM_NEW_TRAN_CODE ahead of the file that might include the option file that would define it.
2001-06-22 01:02:41 +00:00
#ifdef CAM_NEW_TRAN_CODE
#define AHC_NEW_TRAN_SETTINGS
#endif /* CAM_NEW_TRAN_CODE */
Move aicasm to its own subdirectory. Separate our platform independent hooks from core driver functionality shared between platforms (FreeBSD and Linux at this time). Add sequencer workarounds for several chip->chipset interactions. Correct external SCB corruption problem on aic7895 based cards (3940AUW). Lots of cleanups resulting from the port to another OS.
2000-09-16 20:02:28 +00:00
/****************************** Platform Macros *******************************/
#define SIM_IS_SCSIBUS_B(ahc, sim) \
((sim) == ahc->platform_data->sim_b)
#define SIM_CHANNEL(ahc, sim) \
(((sim) == ahc->platform_data->sim_b) ? 'B' : 'A')
#define SIM_SCSI_ID(ahc, sim) \
(((sim) == ahc->platform_data->sim_b) ? ahc->our_id_b : ahc->our_id)
#define SIM_PATH(ahc, sim) \
(((sim) == ahc->platform_data->sim_b) ? ahc->platform_data->path_b \
: ahc->platform_data->path)
#define BUILD_SCSIID(ahc, sim, target_id, our_id) \
((((target_id) << TID_SHIFT) & TID) | (our_id) \
| (SIM_IS_SCSIBUS_B(ahc, sim) ? TWIN_CHNLB : 0))
#define SCB_GET_SIM(ahc, scb) \
(SCB_GET_CHANNEL(ahc, scb) == 'A' ? (ahc)->platform_data->sim \
: (ahc)->platform_data->sim_b)
ahc_eisa.c: ahc_pci.c: Prepare for making ahc a module by adding module dependency and version info. aic7770.c: Remove linux header ifdefs. The headers are handled differently in Linux where local includes (those using "'s instead of <>'s) are allowed. Don't map our interrupt until after we are fully setup to handle interrupts. Our interrupt line may be shared so an interrupt could occur at any time. aic7xxx.c: Remove linux header ifdefs. current->curr to avoid Linux's use of current as a #define for the current task on some architectures. Add a helper function, ahc_assert_atn(), for use in message phases we handle manually. This hides the fact that U160 chips with the expected phase matching disabled need to have SCSISIGO updated differently. if (ahc_check_residual(scb) != 0) ahc_calc_residual(scb); else ahc_set_residual(scb, 0); becomes: ahc_update_residual(scb); Modify scsi parity error (or CRC error) handling to reflect expected phase being disabled on U160 chips. Move SELTO handling above BUSFREE handling so we can use the new busfree interrupt behavior on U160 chips. In ahc_build_transfer_msg() filter the period and ppr_options prior to deciding whether a PPR message is required. ppr_options may be forced to zero which will effect our decision. Correct a long standing but latent bug in ahc_find_syncrate(). We could choose a DT only rate even though DT transfers were disabled. In the CAM environment this was unlikely as CAM filters our rate to a non-DT value if the device does not support such rates. When displaing controller characteristics, include the speed of the chip. This way we can modify the transfer speed based on optional features that are enabled/disabled in a particular application. Add support for switching from fully blown tagged queing to just using simple queue tags should the device reject an ordered tag. Remove per-target "current" disconnect and tag queuing enable flags. These should be per-device and are not referenced internally be the driver, so we let the OSM track this state if it needs to. Use SCSI-3 message terminology. aic7xxx.h: The real 7850 does not support Ultra modes, but there are several cards that use the generic 7850 PCI ID even though they are using an Ultra capable chip (7859/7860). We start out with the AHC_ULTRA feature set and then check the DEVSTATUS register to determine if the capability is really present. current -> curr ahc_calc_residual() is no longer static allowing it to be called from ahc_update_residual() in aic7xxx_inline.h. Update some serial eeprom definitions for the latest BIOS versions. aic7xxx.reg: Add a combined DATA_PHASE mask to the SCSIPHASE register definition to simplify some sequencer code. aic7xxx.seq: Take advantage of some performance features available only on the U160 chips. The auto-ack feature allows us to ack data-in phases up to the data-fifo size while the sequencer is still setting up the DMA engine. This greatly reduces read transfer latency and simplifies testing for transfer complete (check SCSIEN only). We also disable the expected phase feature, and enable the new bus free interrupt behavior, to avoid a few instructions. Re-arrange the Ultra2+ data phase handling to allow us to do more work in parallel with the data fifo flushing on a read. On an SDTR, ack the message immediately so the target can prepare the next phase or message byte in parallel with our work to honor the message. aic7xxx_93cx6.c: Remove linux header ifdefs. aic7xxx_freebsd.c: current -> curr Add a module event handler. Handle tag downgrades in our ahc_send_async() handler. We won't be able to downgrade to "basic queuing" until CAM is made aware of this queuing type. aic7xxx_freebsd.h: Include cleanups. Define offsetof if required. Correct a few comments. Update prototype of ahc_send_async(). aic7xxx_inline.h: Implement ahc_update_residual(). aic7xxx_pci.c: Remove linux header ifdefs. Correct a few product strings. Enable several U160 performance enhancing features. Modify Ultra capability determination so we will enable Ultra speeds on devices with a 7850 PCI id that happen to really be a 7859 or 7860. Don't map our interrupt until after we are fully setup to handle interrupts. Our interrupt line may be shared so an interrupt could occur at any time.
2001-05-15 19:41:12 +00:00
#ifndef offsetof
#define offsetof(type, member) ((size_t)(&((type *)0)->member))
#endif
Move aicasm to its own subdirectory. Separate our platform independent hooks from core driver functionality shared between platforms (FreeBSD and Linux at this time). Add sequencer workarounds for several chip->chipset interactions. Correct external SCB corruption problem on aic7895 based cards (3940AUW). Lots of cleanups resulting from the port to another OS.
2000-09-16 20:02:28 +00:00
/************************* Forward Declarations *******************************/
typedef device_t ahc_dev_softc_t;
typedef union ccb *ahc_io_ctx_t;
/***************************** Bus Space/DMA **********************************/
#define ahc_dma_tag_create(ahc, parent_tag, alignment, boundary, \
lowaddr, highaddr, filter, filterarg, \
maxsize, nsegments, maxsegsz, flags, \
dma_tagp) \
bus_dma_tag_create(parent_tag, alignment, boundary, \
lowaddr, highaddr, filter, filterarg, \
maxsize, nsegments, maxsegsz, flags, \
dma_tagp)
#define ahc_dma_tag_destroy(ahc, tag) \
bus_dma_tag_destroy(tag)
#define ahc_dmamem_alloc(ahc, dmat, vaddr, flags, mapp) \
bus_dmamem_alloc(dmat, vaddr, flags, mapp)
#define ahc_dmamem_free(ahc, dmat, vaddr, map) \
bus_dmamem_free(dmat, vaddr, map)
#define ahc_dmamap_create(ahc, tag, flags, mapp) \
bus_dmamap_create(tag, flags, mapp)
#define ahc_dmamap_destroy(ahc, tag, map) \
bus_dmamap_destroy(tag, map)
#define ahc_dmamap_load(ahc, dmat, map, addr, buflen, callback, \
callback_arg, flags) \
bus_dmamap_load(dmat, map, addr, buflen, callback, callback_arg, flags)
#define ahc_dmamap_unload(ahc, tag, map) \
bus_dmamap_unload(tag, map)
ahc_pci.c: If bus_dma will give us addresses > 32 bits, setup our dma tag to accept up to 39bit addresses. aic7770.c: Update the softc directly rather than use an intermediate "probe_config" structure. aic7xxx.c: Complete core work to support 39bit addresses for bulk data dma operations. Controller data structures still must reside under the 4GB boundary to reduce code/data size in the sequencer and related data structures. This has been tested under Linux IA64 and will be tested on IA64 for FreeBSD as soon as our port can run there. Add bus dmamap synchronization calls around manipulation of all controller/kernel shared host data structures. Implement data pointer reinitialation for a second data phase in a single connection in the kernel rather than bloat the sequencer. This is an extremely rare operation (does it ever happen?) and the sequencer implementation was flawed for some of the newest chips. Don't ever allow our target role to initiate a PPR. This is forbidden by the SCSI spec. Add a few missing endian conversions in the ignore wide pointers code. The core has been tested on the PPC under Linux and should work for FreeBSD PPC. As soon as I can test the OSM layer for FreeBSD PPC, I will. Move some of ahc_softc_init() into ahc_alloc() now that the probe_config structure is gone. Add a 4GB boundary condition on all of our dma tags. 32bit DAC under PCI only works on a single 4GB "page". Although we can cross 4GB on a true 64bit bus, the card won't always be installed in one and we can save code space and cost in implementing high address support by assuming the high DWORD address will never change. Add diagnostics to ahc_search_qinfifo(). Correct a target mode issue with bus resets. To avoid an interrupt storm from a malicious third party holding the reset line, the sequencer would defer re-enabling the reset interrupt until either a select-out or select-in. Unfortunately, the select-in enable bit is cleared by a bus reset, so a second reset will render the card deaf to an initiator's attempts to contact it. We now re-enable bus reset interrupts immediately if the target role is enabled. aic7xxx.h: Remove struct ahc_probe_config. SCB's now contain a pointer to the sg_map_node so we can perfrom bus dma sync operations on the SG list prior to queuing a command. aic7xxx.reg: Register the Perforce ID for this file with the VERSION keyword so it is printed in generated files. Add the DSCOMMAND1 register which is used to access the high DWORD of address bits. Add the data pointer reinitialize sequencer interrupt code. aic7xxx.seq: Register the Perforce ID for this file with the VERSION keyword so it is printed in generated files. Remove code to re-enable the bus reset interrupt after a select-in. In target mode we cannot defer this operation as ENSELI is cleared by a bus reset. Complete 39bit support. Generate a sequencer inteerrupt rather than handle the data pointers re-initialitation in the sequencer. Inline the "seen identify" assertion to save a few cycles. Short circuit the update of our residual data if we have fully completed a transfer. The residual is correct from our last S/G load operation. Short circuit full SDPTR processing if the residual is 0. Just mark the transfer as complete. aic7xxx_93cx6.c: Synchronize perforce IDs. aic7xxx_freebsd.c: Complete untested 39bit support. Add missing endia conversions. Clear our residuals prior to starting a command. The update residual code in the core only sets the residual if there is one. aic7xxx_freebsd.h: Modeify ahc_dmamap_sync() macros to take an offset and a length. This is how sync operations are performed in NetBSD, and we should update our bus dma implementation to match. aic7xxx_inline.h: Add data structure synchronization helper functions. Fix a bug in ahc_intr() where we would not clear our unsolicited interrupt counter after running our PCI interrupt handler. This may have been the cause of the spurious PCI interrupt messages. aic7xxx_pci.c: Adjust for loss of probe_config structure. Guard against bogus 9005 subdevice information as seen on some IBM MB configurations. Add 39bit address support. MFC after: 10 days
2001-07-18 21:39:48 +00:00
/* XXX Need to update Bus DMA for partial map syncs */
#define ahc_dmamap_sync(ahc, dma_tag, dmamap, offset, len, op) \
bus_dmamap_sync(dma_tag, dmamap, op)
Move aicasm to its own subdirectory. Separate our platform independent hooks from core driver functionality shared between platforms (FreeBSD and Linux at this time). Add sequencer workarounds for several chip->chipset interactions. Correct external SCB corruption problem on aic7895 based cards (3940AUW). Lots of cleanups resulting from the port to another OS.
2000-09-16 20:02:28 +00:00
/************************ Tunable Driver Parameters **************************/
/*
* The number of dma segments supported. The sequencer can handle any number
* of physically contiguous S/G entrys. To reduce the driver's memory
* consumption, we limit the number supported to be sufficient to handle
* the largest mapping supported by the kernel, MAXPHYS. Assuming the
* transfer is as fragmented as possible and unaligned, this turns out to
* be the number of paged sized transfers in MAXPHYS plus an extra element
* to handle any unaligned residual. The sequencer fetches SG elements
ahc_eisa.c: ahc_pci.c: Prepare for making ahc a module by adding module dependency and version info. aic7770.c: Remove linux header ifdefs. The headers are handled differently in Linux where local includes (those using "'s instead of <>'s) are allowed. Don't map our interrupt until after we are fully setup to handle interrupts. Our interrupt line may be shared so an interrupt could occur at any time. aic7xxx.c: Remove linux header ifdefs. current->curr to avoid Linux's use of current as a #define for the current task on some architectures. Add a helper function, ahc_assert_atn(), for use in message phases we handle manually. This hides the fact that U160 chips with the expected phase matching disabled need to have SCSISIGO updated differently. if (ahc_check_residual(scb) != 0) ahc_calc_residual(scb); else ahc_set_residual(scb, 0); becomes: ahc_update_residual(scb); Modify scsi parity error (or CRC error) handling to reflect expected phase being disabled on U160 chips. Move SELTO handling above BUSFREE handling so we can use the new busfree interrupt behavior on U160 chips. In ahc_build_transfer_msg() filter the period and ppr_options prior to deciding whether a PPR message is required. ppr_options may be forced to zero which will effect our decision. Correct a long standing but latent bug in ahc_find_syncrate(). We could choose a DT only rate even though DT transfers were disabled. In the CAM environment this was unlikely as CAM filters our rate to a non-DT value if the device does not support such rates. When displaing controller characteristics, include the speed of the chip. This way we can modify the transfer speed based on optional features that are enabled/disabled in a particular application. Add support for switching from fully blown tagged queing to just using simple queue tags should the device reject an ordered tag. Remove per-target "current" disconnect and tag queuing enable flags. These should be per-device and are not referenced internally be the driver, so we let the OSM track this state if it needs to. Use SCSI-3 message terminology. aic7xxx.h: The real 7850 does not support Ultra modes, but there are several cards that use the generic 7850 PCI ID even though they are using an Ultra capable chip (7859/7860). We start out with the AHC_ULTRA feature set and then check the DEVSTATUS register to determine if the capability is really present. current -> curr ahc_calc_residual() is no longer static allowing it to be called from ahc_update_residual() in aic7xxx_inline.h. Update some serial eeprom definitions for the latest BIOS versions. aic7xxx.reg: Add a combined DATA_PHASE mask to the SCSIPHASE register definition to simplify some sequencer code. aic7xxx.seq: Take advantage of some performance features available only on the U160 chips. The auto-ack feature allows us to ack data-in phases up to the data-fifo size while the sequencer is still setting up the DMA engine. This greatly reduces read transfer latency and simplifies testing for transfer complete (check SCSIEN only). We also disable the expected phase feature, and enable the new bus free interrupt behavior, to avoid a few instructions. Re-arrange the Ultra2+ data phase handling to allow us to do more work in parallel with the data fifo flushing on a read. On an SDTR, ack the message immediately so the target can prepare the next phase or message byte in parallel with our work to honor the message. aic7xxx_93cx6.c: Remove linux header ifdefs. aic7xxx_freebsd.c: current -> curr Add a module event handler. Handle tag downgrades in our ahc_send_async() handler. We won't be able to downgrade to "basic queuing" until CAM is made aware of this queuing type. aic7xxx_freebsd.h: Include cleanups. Define offsetof if required. Correct a few comments. Update prototype of ahc_send_async(). aic7xxx_inline.h: Implement ahc_update_residual(). aic7xxx_pci.c: Remove linux header ifdefs. Correct a few product strings. Enable several U160 performance enhancing features. Modify Ultra capability determination so we will enable Ultra speeds on devices with a 7850 PCI id that happen to really be a 7859 or 7860. Don't map our interrupt until after we are fully setup to handle interrupts. Our interrupt line may be shared so an interrupt could occur at any time.
2001-05-15 19:41:12 +00:00
* in cacheline sized chucks, so make the number per-transaction an even
* multiple of 16 which should align us on even the largest of cacheline
* boundaries.
Move aicasm to its own subdirectory. Separate our platform independent hooks from core driver functionality shared between platforms (FreeBSD and Linux at this time). Add sequencer workarounds for several chip->chipset interactions. Correct external SCB corruption problem on aic7895 based cards (3940AUW). Lots of cleanups resulting from the port to another OS.
2000-09-16 20:02:28 +00:00
*/
#define AHC_NSEG (roundup(btoc(MAXPHYS) + 1, 16))
/* This driver supports target mode */
#define AHC_TARGET_MODE 1
/************************** Softc/SCB Platform Data ***************************/
struct ahc_platform_data {
/*
* Hooks into the XPT.
*/
struct cam_sim *sim;
struct cam_sim *sim_b;
struct cam_path *path;
struct cam_path *path_b;
int regs_res_type;
int regs_res_id;
int irq_res_type;
struct resource *regs;
struct resource *irq;
void *ih;
ahc_eisa.c: ahc_pci.c: Add detach support. Make use of soft allocated on our behalf by newbus. For PCI devices, disable the mapping type we aren't using for extra protection from rogue code. aic7xxx_93cx6.c: aic7xxx_93cx6.h: Sync perforce IDs. aic7xxx_freebsd.c: Capture the eventhandle returned by EVENTHANDER_REGISTER so we can kill the handler off during detach. Use AHC_* constants instead of hard coded numbers in a few more places. Test PPR option state when deciding to "really" negotiate when the CAM_NEGOTIATE flag is passed in a CCB. Make use of core "ahc_pause_and_flushwork" routine in our timeout handler rather than re-inventing this code. Cleanup all of our resources (really!) in ahc_platform_free(). We should be all set to become a module now. Implement the core ahc_detach() routine shared by all of the FreeBSD front-ends. aic7xxx_freebsd.h: Softc storage for our event handler. Null implementation for the ahc_platform_flushwork() OSM callback. FreeBSD doesn't need this as XPT callbacks are safe from all contexts and are done directly in ahc_done(). aic7xxx_inline.h: Implement new lazy interrupt scheme. To avoid an extra PCI bus read, we first check our completion queues to see if any work has completed. If work is available, we assume that this is the source of the interrupt and skip reading INTSTAT. Any remaining interrupt status will be cleared by a second call to the interrupt handler should the interrupt line still be asserted. This drops the interrupt handler down to a single PCI bus read in the common case of I/O completion. This is the same overhead as in the not so distant past, but the extra sanity of perforning a PCI read after clearing the command complete interrupt and before running the completion queue to avoid missing command complete interrupts added a cycle. aic7xxx.c: During initialization, be sure to initialize all scratch ram locations before they are read to avoid parity errors. In this case, we use a new function, ahc_unbusy_tcl() to initialize the scratch ram busy target table. Replace instances of ahc_index_busy_tcl() used to unbusy a tcl without looking at the old value with ahc_unbusy_tcl(). Modify ahc_sent_msg so that it can find single byte messages. ahc_sent_msg is now used to determine if a transfer negotiation attempt resulted in a bus free. Be more careful in filtering out only the SCSI interrupts of interest in ahc_handle_scsiint. Rearrange interrupt clearing code to ensure that at least one PCI transaction occurrs after hitting CLRSINT1 and writting to CLRINT. CLRSINT1 writes take a bit to take effect, and the re-arrangement provides sufficient delay to ensure the write to CLRINT is effective. The old code might report a spurious interrupt on some "fast" chipsets. export ahc-update_target_msg_request for use by OSM code. If a target does not respond to our ATN request, clear it once we move to a non-message phase. This avoids sending a MSG_NOOP in some later message out phase. Use max lun and max target constants instead of hard-coded values. Use softc storage built into our device_t under FreeBSD. Fix a bug in ahc_free() that caused us to delete resources that were not allocated. Clean up any tstate/lstate info in ahc_free(). Clear the powerdown state in ahc_reset() so that registers can be accessed. Add a preliminary function for pausing the chip and processing any posted work. Add a preliminary suspend and resume functions. aic7xxx.h: Limit the number of supported luns to 64. We don't support information unit transfers, so this is the maximum that makes sense for these chips. Add a new flag AHC_ALL_INTERRUPTS that forces the processing of all interrupt state in a single invokation of ahc_intr(). When the flag is not set, we use the lazy interrupt handling scheme. Add data structures to store controller state while we are suspended. Use constants instead of hard coded values where appropriate. Correct some harmless "unsigned/signed" conflicts. aic7xxx.seq: Only perform the SCSIBUSL fix on ULTRA2 or newer controllers. Older controllers seem to be confused by this. In target mode, ignore PHASEMIS during data phases. This bit seems to be flakey on U160 controllers acting in target mode. aic7xxx_pci.c: Add support for the 29160C CPCI adapter. Add definitions for subvendor ID information available for devices with the "9005" vendor id. We currently use this information to determine if a multi-function device doesn't have the second channel hooked up on a board. Add rudimentary power mode code so we can put the controller into the D0 state. In the future this will be an OSM callback so that in FreeBSD we don't duplicate functionality provided by the PCI code. The powerstate code was added after I'd completed my regression tests on this code. Only capture "left over BIOS state" if the POWRDN setting is not set in HCNTRL. In target mode, don't bother sending incremental CRC data.
2000-12-20 01:11:37 +00:00
eventhandler_tag eh;
Move aicasm to its own subdirectory. Separate our platform independent hooks from core driver functionality shared between platforms (FreeBSD and Linux at this time). Add sequencer workarounds for several chip->chipset interactions. Correct external SCB corruption problem on aic7895 based cards (3940AUW). Lots of cleanups resulting from the port to another OS.
2000-09-16 20:02:28 +00:00
};
struct scb_platform_data {
};
aic7xxx.c: aic7xxx.h: First pass at big-endian support in the Core. Capture state for second channel on TWIN channel adapters for suspend and resume. aic7xxx_freebsd.h: Stubs for endian conversion functions. These will get filled out once we get an official kernel api for this kind of thing that is something more elegant and efficient than a bunch of manual swaps #ifdefed by platform. aic7xxx_pci.c Allow the second channel of motherboard aic7896 chips to be attached. It turns out that the encoding of the subdevice id differs between PCI cards and MB based controllers and our check to see, via the subvendor id, if the second channel was "stuffed" always turned out negative.
2001-01-05 19:15:37 +00:00
/********************************* Byte Order *********************************/
Major update to the aic7xxx driver: ahc_eisa.c: ahc_pci.c: Conform to new aic7xxx IRQ API. Adapt to aic7xxx_freebsd -> aic7xxx_osm changes. aic7770.c: Disable card generated interrupt early in our probe for "extra safety" Commonize some seeprom code with the PCI side of the driver. aic7xxx.c: Correctly initialize a few scratch ram locations during a sequencer restart. This avoids spurious sequencer ram parity errors in some configurations. Include the softc in ahc_update_residual calls. We need it for some diagnostics in this code path. Flag a data overrun on an auto-request sense failure as a CAM_AUTOSENSE_FAIL rather than a CAM_DATA_RUN_ERR. Force a renegotiation after noticing a parity error. This covers targets that lose our negotiation settings but don't bother to give us a unit attention condition. This can happen if a target fails during a reselection of us during a cable pull. Convert some code to using constants. Fix some typos. Correct target mode message loop handling. ahc_clear_msg_state was not clearing the "need to go to message out phase" bit once our loop was over. Simplify some abort handling code. Include tag information in target mode immediate notify events. When shutting down EISA controllers, don't EISA BIOS settings in the high portions of scratch ram. This fixes warm boot issues on some systems. Save a bit of space by only allocating the SCBs that we can use. Avoid some code paths in ahc_abort_scbs() if we are currently acting as a target. Correctly cleanup stranded SCBs in the card's SCB array. These are SCBs who's mapping has already been torn down by code that aborted the SCB by seeing it in another list first. Add a comment about some potential bus reset issues for target mode on Twin (EISA only) controllers. aic7xxx.h: Cleanup the hardware scb definitions a bit. Allocate a ful 256 byte scb mapping index. This simplifies the lookup code since the table covers all possible (and potentially bogus) values. Make AHC_DEBUG work again. aic7xxx.reg: Updates to hardware SCB definition. New definitions for target mode fixes. aic7xxx.seq: In target mode, initialize SAVED_LUN just after we receive the identify message. It may be required in the error recovery path when a normal cdb packet (includes lun) is not sent up to the host for processing. Respond to irregular messages during a selection in target mode. Defer looking for space for a cdb packet until we are about to enter command phase. We want to be able to handle irregular messages even if we would otherwise return QUEUE_FULL or BUSY. Add support for sending Ignore Wide Residue messages as a target. In the disable disconnect case in target mode, set our transfer rate correctly once data are availble. aic7xxx_93cx6.c: aic7xxx_93cx6.h: Add the ability to write and erase the seeprom. aic7xxx_inline.h: Correct Big Endian handling of large cdb sizes (> 12 bytes). Adaptec to changes in the calc_residual API. Correct a target mode bug where we always attempted to service the input queue even if no progress could be made due to lack of ATIOs. aic7xxx_osm.c: Adaptec to new IRQ mapping API. The new API allows the core to only enable our IRQ mapping once it is safe (sufficient initialization) to do so. Slap bootverbose protection around some diagnostics. Only attempt DT phases if we are wide. aic7xxx_osm.h: Enable big endian support. Adjust for IRQ API change. aic7xxx_pci.c: Be more careful about relying on subvendor 9005 information. We now only trust it for HBAs. This should allow the driver to attach to some MBs where the subvendor/device information does not follow the Adaptec spec. Only enable interrupts on the card once we are fully setup. Disable external SCB ram usage on the aic7895. I have not been able to make it 100% reliable. Adjust to seeprom routines being properly prefixed with "ahc". Fix a few bugs in the external SCB ram probing routine. We need to clear any parity errors we've triggered during the probe to avoid future, fatal, interrupts. If we detect an invalid cable combination, pretent there are no cable at all. This will enable all of the terminators which is probably the safest configuration we can "guess". MFC after: 4 days
2002-04-24 16:58:51 +00:00
#define ahc_htobe16(x) htobe16(x)
#define ahc_htobe32(x) htobe32(x)
#define ahc_htobe64(x) htobe64(x)
#define ahc_htole16(x) htole16(x)
#define ahc_htole32(x) htole32(x)
#define ahc_htole64(x) htole64(x)
#define ahc_be16toh(x) be16toh(x)
#define ahc_be32toh(x) be32toh(x)
#define ahc_be64toh(x) be64toh(x)
#define ahc_le16toh(x) le16toh(x)
#define ahc_le32toh(x) le32toh(x)
#define ahc_le64toh(x) le64toh(x)
aic7xxx.c: aic7xxx.h: First pass at big-endian support in the Core. Capture state for second channel on TWIN channel adapters for suspend and resume. aic7xxx_freebsd.h: Stubs for endian conversion functions. These will get filled out once we get an official kernel api for this kind of thing that is something more elegant and efficient than a bunch of manual swaps #ifdefed by platform. aic7xxx_pci.c Allow the second channel of motherboard aic7896 chips to be attached. It turns out that the encoding of the subdevice id differs between PCI cards and MB based controllers and our check to see, via the subvendor id, if the second channel was "stuffed" always turned out negative.
2001-01-05 19:15:37 +00:00
Move aicasm to its own subdirectory. Separate our platform independent hooks from core driver functionality shared between platforms (FreeBSD and Linux at this time). Add sequencer workarounds for several chip->chipset interactions. Correct external SCB corruption problem on aic7895 based cards (3940AUW). Lots of cleanups resulting from the port to another OS.
2000-09-16 20:02:28 +00:00
/***************************** Core Includes **********************************/
#include <dev/aic7xxx/aic7xxx.h>
/*************************** Device Access ************************************/
#define ahc_inb(ahc, port) \
bus_space_read_1((ahc)->tag, (ahc)->bsh, port)
#define ahc_outb(ahc, port, value) \
bus_space_write_1((ahc)->tag, (ahc)->bsh, port, value)
#define ahc_outsb(ahc, port, valp, count) \
bus_space_write_multi_1((ahc)->tag, (ahc)->bsh, port, valp, count)
#define ahc_insb(ahc, port, valp, count) \
bus_space_read_multi_1((ahc)->tag, (ahc)->bsh, port, valp, count)
static __inline void ahc_flush_device_writes(struct ahc_softc *);
static __inline void
ahc_flush_device_writes(struct ahc_softc *ahc)
{
/* XXX Is this sufficient for all architectures??? */
ahc_inb(ahc, INTSTAT);
}
/**************************** Locking Primitives ******************************/
/* Lock protecting internal data structures */
static __inline void ahc_lockinit(struct ahc_softc *);
static __inline void ahc_lock(struct ahc_softc *, unsigned long *flags);
static __inline void ahc_unlock(struct ahc_softc *, unsigned long *flags);
/* Lock held during command compeletion to the upper layer */
static __inline void ahc_done_lockinit(struct ahc_softc *);
static __inline void ahc_done_lock(struct ahc_softc *, unsigned long *flags);
static __inline void ahc_done_unlock(struct ahc_softc *, unsigned long *flags);
static __inline void
ahc_lockinit(struct ahc_softc *ahc)
{
}
static __inline void
ahc_lock(struct ahc_softc *ahc, unsigned long *flags)
{
*flags = splcam();
}
static __inline void
ahc_unlock(struct ahc_softc *ahc, unsigned long *flags)
{
splx(*flags);
}
/* Lock held during command compeletion to the upper layer */
static __inline void
ahc_done_lockinit(struct ahc_softc *ahc)
{
}
static __inline void
ahc_done_lock(struct ahc_softc *ahc, unsigned long *flags)
{
}
static __inline void
ahc_done_unlock(struct ahc_softc *ahc, unsigned long *flags)
{
}
/****************************** OS Primitives *********************************/
#define ahc_delay DELAY
/************************** Transaction Operations ****************************/
static __inline void ahc_set_transaction_status(struct scb *, uint32_t);
static __inline void ahc_set_scsi_status(struct scb *, uint32_t);
static __inline uint32_t ahc_get_transaction_status(struct scb *);
static __inline uint32_t ahc_get_scsi_status(struct scb *);
static __inline void ahc_set_transaction_tag(struct scb *, int, u_int);
static __inline u_long ahc_get_transfer_length(struct scb *);
static __inline int ahc_get_transfer_dir(struct scb *);
static __inline void ahc_set_residual(struct scb *, u_long);
static __inline void ahc_set_sense_residual(struct scb *, u_long);
static __inline u_long ahc_get_residual(struct scb *);
static __inline int ahc_perform_autosense(struct scb *);
static __inline uint32_t ahc_get_sense_bufsize(struct ahc_softc*, struct scb*);
static __inline void ahc_freeze_ccb(union ccb *ccb);
static __inline void ahc_freeze_scb(struct scb *scb);
static __inline void ahc_platform_freeze_devq(struct ahc_softc *, struct scb *);
static __inline int ahc_platform_abort_scbs(struct ahc_softc *ahc, int target,
char channel, int lun, u_int tag,
role_t role, uint32_t status);
static __inline
void ahc_set_transaction_status(struct scb *scb, uint32_t status)
{
scb->io_ctx->ccb_h.status &= ~CAM_STATUS_MASK;
scb->io_ctx->ccb_h.status |= status;
}
static __inline
void ahc_set_scsi_status(struct scb *scb, uint32_t status)
{
scb->io_ctx->csio.scsi_status = status;
}
static __inline
uint32_t ahc_get_transaction_status(struct scb *scb)
{
return (scb->io_ctx->ccb_h.status & CAM_STATUS_MASK);
}
static __inline
uint32_t ahc_get_scsi_status(struct scb *scb)
{
return (scb->io_ctx->csio.scsi_status);
}
static __inline
void ahc_set_transaction_tag(struct scb *scb, int enabled, u_int type)
{
scb->io_ctx->csio.tag_action = type;
if (enabled)
scb->io_ctx->ccb_h.flags |= CAM_TAG_ACTION_VALID;
else
scb->io_ctx->ccb_h.flags &= ~CAM_TAG_ACTION_VALID;
}
static __inline
u_long ahc_get_transfer_length(struct scb *scb)
{
return (scb->io_ctx->csio.dxfer_len);
}
static __inline
int ahc_get_transfer_dir(struct scb *scb)
{
return (scb->io_ctx->ccb_h.flags & CAM_DIR_MASK);
}
static __inline
void ahc_set_residual(struct scb *scb, u_long resid)
{
scb->io_ctx->csio.resid = resid;
}
static __inline
void ahc_set_sense_residual(struct scb *scb, u_long resid)
{
scb->io_ctx->csio.sense_resid = resid;
}
static __inline
u_long ahc_get_residual(struct scb *scb)
{
return (scb->io_ctx->csio.resid);
}
static __inline
int ahc_perform_autosense(struct scb *scb)
{
return (!(scb->io_ctx->ccb_h.flags & CAM_DIS_AUTOSENSE));
}
static __inline uint32_t
ahc_get_sense_bufsize(struct ahc_softc *ahc, struct scb *scb)
{
return (sizeof(struct scsi_sense_data));
}
static __inline void
ahc_freeze_ccb(union ccb *ccb)
{
if ((ccb->ccb_h.status & CAM_DEV_QFRZN) == 0) {
ccb->ccb_h.status |= CAM_DEV_QFRZN;
xpt_freeze_devq(ccb->ccb_h.path, /*count*/1);
}
}
static __inline void
ahc_freeze_scb(struct scb *scb)
{
ahc_freeze_ccb(scb->io_ctx);
}
static __inline void
ahc_platform_freeze_devq(struct ahc_softc *ahc, struct scb *scb)
{
/* Nothing to do here for FreeBSD */
}
static __inline int
ahc_platform_abort_scbs(struct ahc_softc *ahc, int target,
char channel, int lun, u_int tag,
role_t role, uint32_t status)
{
/* Nothing to do here for FreeBSD */
return (0);
}
Convert the driver to use a single DMA for fetching new commands instead of two (one to access the circular input fifo, the other to get the SCB). This costs us a command slot so the driver can now only queue 254 simultaneous commands. Have the kernel driver honor critical sections in sequencer code. When prefetching S/G segments only pull a cacheline's worth but never less than two elements. This reduces the impact of the prefetch on the main data transfer when compared to the 128 byte fetches the driver used to do. Add "bootverbose" logging for transfer negotiations. Correct a bug in ahc_set_syncrate() that would prevent an update of the sync parameters if only the ppr_options had changed. Correct locking for calls to ahc_free_scb(). ahc_free_scb() is no longer protected internally to simplify ports to other platforms. Make sure we unfreeze our SIMQ if a resource shortage has occurred and an SCB is been freed. ahc_pci.c: Turn on cacheline streaming for all controllers that support it. Clarify diagnostic messages about PCI interrupts.
2000-10-05 04:24:14 +00:00
static __inline void
ahc_platform_scb_free(struct ahc_softc *ahc, struct scb *scb)
{
/* What do we do to generically handle driver resource shortages??? */
if ((ahc->flags & AHC_RESOURCE_SHORTAGE) != 0
&& scb->io_ctx != NULL
&& (scb->io_ctx->ccb_h.status & CAM_RELEASE_SIMQ) == 0) {
scb->io_ctx->ccb_h.status |= CAM_RELEASE_SIMQ;
ahc->flags &= ~AHC_RESOURCE_SHORTAGE;
}
scb->io_ctx = NULL;
}
Move aicasm to its own subdirectory. Separate our platform independent hooks from core driver functionality shared between platforms (FreeBSD and Linux at this time). Add sequencer workarounds for several chip->chipset interactions. Correct external SCB corruption problem on aic7895 based cards (3940AUW). Lots of cleanups resulting from the port to another OS.
2000-09-16 20:02:28 +00:00
/********************************** PCI ***************************************/
This is an MFC candidate. ahc_eisa.c: Change aic7770_map_int to take an additional irq parameter. Although we can get the irq from the eisa dev under FreeBSD, we can't do this under linux, so the OSM interface must supply this. ahc_pci.c: Move ahc_power_state_change() to the OSM. This allows us to use a platform supplied function that does the same thing. -current will move to the FreeBSD native API in the near future. aic7770.c: Sync up with core changes to support Linux EISA. We now store a 2 bit primary channel number rather than a bit flag that only allows b to be the primary channel. Adjust for this change. aic7xxx.c: Namespace and staticization cleanup. All exported symbols use an "ahc_" prefix to avoid collisions with other modules. Correct a logic bug that prevented us from dropping ATN during some exceptional conditions during message processing. Take advantage of a new flag managed by the sequencer that indicates if an SCB fetch is in progress. If so, the currently selected SCB needs to be returned to the free list to prevent an SCB leak. This leak is a rarity and would only occur if a bus reset or timeout resulting in a bus reset occurred in the middle of an SCB fetch. Don't attempt to perform ULTRA transfers on ultra capable adapters missing the external precision resistor required for ultra speeds. I've never encountered an adapter configured this way, but better safe than sorry. Handle the case of 5MHz user sync rate set as "0" instead of 0x1c in scratch ram. If we lookup a period of 0 in our table (async), clear the scsi offset. aic7xxx.h: Adjust for the primary channel being represented as a 2 bit integer in the flags member of the ahc softc. Cleanup the flags definitions so that comment blocks are not cramped. Update seeprom definitions to correctly reflect the fact that the primary channel is represented as a 2 bit integer. Add AHC_ULTRA_DIASABLED softc flag to denote controllers missing the external precision resistor. aic7xxx.reg: Add DFCACHETH to the definition of DFSTATUS for completness sake. Add SEQ_FLAGS2 which currently only contains the SCB_DMA (SCB DMA in progress) flag. aic7xxx.seq: Correct a problem when one lun has a disconnected untagged transaction and another lun has disconnected tagged transactions. Just because an entry is found in the untagged table doesn't mean that it will match. If the match on the lun fails, cleanup the SCB (return it to the disconnected list or free it), and snoop for a tag message. Before this change, we reported an unsolicited reselection. This bug was introduced about a month ago during an overly aggressive optimization pass on the reselection code. When cleaning up an SCB, we can't just blindly free the SCB. In the paging case, if the SCB came off of the disconnected list, its state may never have been updated in host memory. So, check the disconnected bit in SCB_CONTROL and return the SCB to the disconnected list if appropriate. Manage the SCB_DMA flag of SEQ_FLAGS2. More carefully shutdown the S/G dma engine in all cases by using a subroutine. Supposedly not doing this can cause an arbiter hang on some ULTRA2 chips. Formatting cleanup. On some chips, at least the aic7856, the transition from MREQPEND to HDONE can take a full 4 clock cycles. Test HDONE one more time to avoid this race. We only want our FIFO hung recovery code to execute when the engine is really hung. aic7xxx_93cx6.c: Sync perforce ids. aic7xxx_freebsd.c: Adjust for the primary channel being a 2 bit integer rather than a flag for 'B' channel being the primary. Namespace cleanup. Unpause the sequencer in one error recovery path that neglected to do so. This could have caused us to perform a bus reset when a recovery message might have otherwise been successful. aic7xxx_freebsd.h: Use AHC_PCI_CONFIG for controlling compilation of PCI support consistently throughout the driver. Move ahc_power_state_change() to OSM. aic7xxx_inline.h Namespace cleanup. Adjust our interrupt handler so it will work in the edge interrupt case. We must process all interrupt sources when the interrupt fires or risk not ever getting an interrupt again. This involves marking the fact that we are relying on an edge interrupt in ahc->flags and checking for this condition in addition to the AHC_ALL_INTERRUPTS flag. This fixes hangs on the 284X and any other aic7770 installation where level interrupts are not available. aic7xxx_pci.c: Move the powerstate manipulation code into the OSM. Several OSes now provide this functionality natively. Take another shot at using the data stored in scratch ram if the SCB2 signature is correct and no SEEPROM data is available. In the past this failed if external SCB ram was configured because the memory port was locked. We now release the memory port prior to testing the values in SCB2 and re-acquire it prior to doing termination control. Adjust for new 2 bit primary channel setting. Trust the STPWLEVEL setting on v 3.X BIOSes too. Configure any 785X ID in the same fashion and assume that any device with a rev id of 1 or higher has the PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
#ifdef AHC_PCI_CONFIG
Move aicasm to its own subdirectory. Separate our platform independent hooks from core driver functionality shared between platforms (FreeBSD and Linux at this time). Add sequencer workarounds for several chip->chipset interactions. Correct external SCB corruption problem on aic7895 based cards (3940AUW). Lots of cleanups resulting from the port to another OS.
2000-09-16 20:02:28 +00:00
static __inline uint32_t ahc_pci_read_config(ahc_dev_softc_t pci,
int reg, int width);
static __inline void ahc_pci_write_config(ahc_dev_softc_t pci,
int reg, uint32_t value,
int width);
static __inline int ahc_get_pci_function(ahc_dev_softc_t);
static __inline int ahc_get_pci_slot(ahc_dev_softc_t);
static __inline int ahc_get_pci_bus(ahc_dev_softc_t);
int ahc_pci_map_registers(struct ahc_softc *ahc);
int ahc_pci_map_int(struct ahc_softc *ahc);
static __inline uint32_t
ahc_pci_read_config(ahc_dev_softc_t pci, int reg, int width)
{
return (pci_read_config(pci, reg, width));
}
static __inline void
ahc_pci_write_config(ahc_dev_softc_t pci, int reg, uint32_t value, int width)
{
pci_write_config(pci, reg, value, width);
}
static __inline int
ahc_get_pci_function(ahc_dev_softc_t pci)
{
return (pci_get_function(pci));
}
static __inline int
ahc_get_pci_slot(ahc_dev_softc_t pci)
{
return (pci_get_slot(pci));
}
static __inline int
ahc_get_pci_bus(ahc_dev_softc_t pci)
{
return (pci_get_bus(pci));
}
This is an MFC candidate. ahc_eisa.c: Change aic7770_map_int to take an additional irq parameter. Although we can get the irq from the eisa dev under FreeBSD, we can't do this under linux, so the OSM interface must supply this. ahc_pci.c: Move ahc_power_state_change() to the OSM. This allows us to use a platform supplied function that does the same thing. -current will move to the FreeBSD native API in the near future. aic7770.c: Sync up with core changes to support Linux EISA. We now store a 2 bit primary channel number rather than a bit flag that only allows b to be the primary channel. Adjust for this change. aic7xxx.c: Namespace and staticization cleanup. All exported symbols use an "ahc_" prefix to avoid collisions with other modules. Correct a logic bug that prevented us from dropping ATN during some exceptional conditions during message processing. Take advantage of a new flag managed by the sequencer that indicates if an SCB fetch is in progress. If so, the currently selected SCB needs to be returned to the free list to prevent an SCB leak. This leak is a rarity and would only occur if a bus reset or timeout resulting in a bus reset occurred in the middle of an SCB fetch. Don't attempt to perform ULTRA transfers on ultra capable adapters missing the external precision resistor required for ultra speeds. I've never encountered an adapter configured this way, but better safe than sorry. Handle the case of 5MHz user sync rate set as "0" instead of 0x1c in scratch ram. If we lookup a period of 0 in our table (async), clear the scsi offset. aic7xxx.h: Adjust for the primary channel being represented as a 2 bit integer in the flags member of the ahc softc. Cleanup the flags definitions so that comment blocks are not cramped. Update seeprom definitions to correctly reflect the fact that the primary channel is represented as a 2 bit integer. Add AHC_ULTRA_DIASABLED softc flag to denote controllers missing the external precision resistor. aic7xxx.reg: Add DFCACHETH to the definition of DFSTATUS for completness sake. Add SEQ_FLAGS2 which currently only contains the SCB_DMA (SCB DMA in progress) flag. aic7xxx.seq: Correct a problem when one lun has a disconnected untagged transaction and another lun has disconnected tagged transactions. Just because an entry is found in the untagged table doesn't mean that it will match. If the match on the lun fails, cleanup the SCB (return it to the disconnected list or free it), and snoop for a tag message. Before this change, we reported an unsolicited reselection. This bug was introduced about a month ago during an overly aggressive optimization pass on the reselection code. When cleaning up an SCB, we can't just blindly free the SCB. In the paging case, if the SCB came off of the disconnected list, its state may never have been updated in host memory. So, check the disconnected bit in SCB_CONTROL and return the SCB to the disconnected list if appropriate. Manage the SCB_DMA flag of SEQ_FLAGS2. More carefully shutdown the S/G dma engine in all cases by using a subroutine. Supposedly not doing this can cause an arbiter hang on some ULTRA2 chips. Formatting cleanup. On some chips, at least the aic7856, the transition from MREQPEND to HDONE can take a full 4 clock cycles. Test HDONE one more time to avoid this race. We only want our FIFO hung recovery code to execute when the engine is really hung. aic7xxx_93cx6.c: Sync perforce ids. aic7xxx_freebsd.c: Adjust for the primary channel being a 2 bit integer rather than a flag for 'B' channel being the primary. Namespace cleanup. Unpause the sequencer in one error recovery path that neglected to do so. This could have caused us to perform a bus reset when a recovery message might have otherwise been successful. aic7xxx_freebsd.h: Use AHC_PCI_CONFIG for controlling compilation of PCI support consistently throughout the driver. Move ahc_power_state_change() to OSM. aic7xxx_inline.h Namespace cleanup. Adjust our interrupt handler so it will work in the edge interrupt case. We must process all interrupt sources when the interrupt fires or risk not ever getting an interrupt again. This involves marking the fact that we are relying on an edge interrupt in ahc->flags and checking for this condition in addition to the AHC_ALL_INTERRUPTS flag. This fixes hangs on the 284X and any other aic7770 installation where level interrupts are not available. aic7xxx_pci.c: Move the powerstate manipulation code into the OSM. Several OSes now provide this functionality natively. Take another shot at using the data stored in scratch ram if the SCB2 signature is correct and no SEEPROM data is available. In the past this failed if external SCB ram was configured because the memory port was locked. We now release the memory port prior to testing the values in SCB2 and re-acquire it prior to doing termination control. Adjust for new 2 bit primary channel setting. Trust the STPWLEVEL setting on v 3.X BIOSes too. Configure any 785X ID in the same fashion and assume that any device with a rev id of 1 or higher has the PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
typedef enum
{
AHC_POWER_STATE_D0,
AHC_POWER_STATE_D1,
AHC_POWER_STATE_D2,
AHC_POWER_STATE_D3
} ahc_power_state;
void ahc_power_state_change(struct ahc_softc *ahc,
ahc_power_state new_state);
Move aicasm to its own subdirectory. Separate our platform independent hooks from core driver functionality shared between platforms (FreeBSD and Linux at this time). Add sequencer workarounds for several chip->chipset interactions. Correct external SCB corruption problem on aic7895 based cards (3940AUW). Lots of cleanups resulting from the port to another OS.
2000-09-16 20:02:28 +00:00
#endif
/******************************** VL/EISA *************************************/
Major update to the aic7xxx driver: ahc_eisa.c: ahc_pci.c: Conform to new aic7xxx IRQ API. Adapt to aic7xxx_freebsd -> aic7xxx_osm changes. aic7770.c: Disable card generated interrupt early in our probe for "extra safety" Commonize some seeprom code with the PCI side of the driver. aic7xxx.c: Correctly initialize a few scratch ram locations during a sequencer restart. This avoids spurious sequencer ram parity errors in some configurations. Include the softc in ahc_update_residual calls. We need it for some diagnostics in this code path. Flag a data overrun on an auto-request sense failure as a CAM_AUTOSENSE_FAIL rather than a CAM_DATA_RUN_ERR. Force a renegotiation after noticing a parity error. This covers targets that lose our negotiation settings but don't bother to give us a unit attention condition. This can happen if a target fails during a reselection of us during a cable pull. Convert some code to using constants. Fix some typos. Correct target mode message loop handling. ahc_clear_msg_state was not clearing the "need to go to message out phase" bit once our loop was over. Simplify some abort handling code. Include tag information in target mode immediate notify events. When shutting down EISA controllers, don't EISA BIOS settings in the high portions of scratch ram. This fixes warm boot issues on some systems. Save a bit of space by only allocating the SCBs that we can use. Avoid some code paths in ahc_abort_scbs() if we are currently acting as a target. Correctly cleanup stranded SCBs in the card's SCB array. These are SCBs who's mapping has already been torn down by code that aborted the SCB by seeing it in another list first. Add a comment about some potential bus reset issues for target mode on Twin (EISA only) controllers. aic7xxx.h: Cleanup the hardware scb definitions a bit. Allocate a ful 256 byte scb mapping index. This simplifies the lookup code since the table covers all possible (and potentially bogus) values. Make AHC_DEBUG work again. aic7xxx.reg: Updates to hardware SCB definition. New definitions for target mode fixes. aic7xxx.seq: In target mode, initialize SAVED_LUN just after we receive the identify message. It may be required in the error recovery path when a normal cdb packet (includes lun) is not sent up to the host for processing. Respond to irregular messages during a selection in target mode. Defer looking for space for a cdb packet until we are about to enter command phase. We want to be able to handle irregular messages even if we would otherwise return QUEUE_FULL or BUSY. Add support for sending Ignore Wide Residue messages as a target. In the disable disconnect case in target mode, set our transfer rate correctly once data are availble. aic7xxx_93cx6.c: aic7xxx_93cx6.h: Add the ability to write and erase the seeprom. aic7xxx_inline.h: Correct Big Endian handling of large cdb sizes (> 12 bytes). Adaptec to changes in the calc_residual API. Correct a target mode bug where we always attempted to service the input queue even if no progress could be made due to lack of ATIOs. aic7xxx_osm.c: Adaptec to new IRQ mapping API. The new API allows the core to only enable our IRQ mapping once it is safe (sufficient initialization) to do so. Slap bootverbose protection around some diagnostics. Only attempt DT phases if we are wide. aic7xxx_osm.h: Enable big endian support. Adjust for IRQ API change. aic7xxx_pci.c: Be more careful about relying on subvendor 9005 information. We now only trust it for HBAs. This should allow the driver to attach to some MBs where the subvendor/device information does not follow the Adaptec spec. Only enable interrupts on the card once we are fully setup. Disable external SCB ram usage on the aic7895. I have not been able to make it 100% reliable. Adjust to seeprom routines being properly prefixed with "ahc". Fix a few bugs in the external SCB ram probing routine. We need to clear any parity errors we've triggered during the probe to avoid future, fatal, interrupts. If we detect an invalid cable combination, pretent there are no cable at all. This will enable all of the terminators which is probably the safest configuration we can "guess". MFC after: 4 days
2002-04-24 16:58:51 +00:00
int aic7770_map_registers(struct ahc_softc *ahc, u_int port);
This is an MFC candidate. ahc_eisa.c: Change aic7770_map_int to take an additional irq parameter. Although we can get the irq from the eisa dev under FreeBSD, we can't do this under linux, so the OSM interface must supply this. ahc_pci.c: Move ahc_power_state_change() to the OSM. This allows us to use a platform supplied function that does the same thing. -current will move to the FreeBSD native API in the near future. aic7770.c: Sync up with core changes to support Linux EISA. We now store a 2 bit primary channel number rather than a bit flag that only allows b to be the primary channel. Adjust for this change. aic7xxx.c: Namespace and staticization cleanup. All exported symbols use an "ahc_" prefix to avoid collisions with other modules. Correct a logic bug that prevented us from dropping ATN during some exceptional conditions during message processing. Take advantage of a new flag managed by the sequencer that indicates if an SCB fetch is in progress. If so, the currently selected SCB needs to be returned to the free list to prevent an SCB leak. This leak is a rarity and would only occur if a bus reset or timeout resulting in a bus reset occurred in the middle of an SCB fetch. Don't attempt to perform ULTRA transfers on ultra capable adapters missing the external precision resistor required for ultra speeds. I've never encountered an adapter configured this way, but better safe than sorry. Handle the case of 5MHz user sync rate set as "0" instead of 0x1c in scratch ram. If we lookup a period of 0 in our table (async), clear the scsi offset. aic7xxx.h: Adjust for the primary channel being represented as a 2 bit integer in the flags member of the ahc softc. Cleanup the flags definitions so that comment blocks are not cramped. Update seeprom definitions to correctly reflect the fact that the primary channel is represented as a 2 bit integer. Add AHC_ULTRA_DIASABLED softc flag to denote controllers missing the external precision resistor. aic7xxx.reg: Add DFCACHETH to the definition of DFSTATUS for completness sake. Add SEQ_FLAGS2 which currently only contains the SCB_DMA (SCB DMA in progress) flag. aic7xxx.seq: Correct a problem when one lun has a disconnected untagged transaction and another lun has disconnected tagged transactions. Just because an entry is found in the untagged table doesn't mean that it will match. If the match on the lun fails, cleanup the SCB (return it to the disconnected list or free it), and snoop for a tag message. Before this change, we reported an unsolicited reselection. This bug was introduced about a month ago during an overly aggressive optimization pass on the reselection code. When cleaning up an SCB, we can't just blindly free the SCB. In the paging case, if the SCB came off of the disconnected list, its state may never have been updated in host memory. So, check the disconnected bit in SCB_CONTROL and return the SCB to the disconnected list if appropriate. Manage the SCB_DMA flag of SEQ_FLAGS2. More carefully shutdown the S/G dma engine in all cases by using a subroutine. Supposedly not doing this can cause an arbiter hang on some ULTRA2 chips. Formatting cleanup. On some chips, at least the aic7856, the transition from MREQPEND to HDONE can take a full 4 clock cycles. Test HDONE one more time to avoid this race. We only want our FIFO hung recovery code to execute when the engine is really hung. aic7xxx_93cx6.c: Sync perforce ids. aic7xxx_freebsd.c: Adjust for the primary channel being a 2 bit integer rather than a flag for 'B' channel being the primary. Namespace cleanup. Unpause the sequencer in one error recovery path that neglected to do so. This could have caused us to perform a bus reset when a recovery message might have otherwise been successful. aic7xxx_freebsd.h: Use AHC_PCI_CONFIG for controlling compilation of PCI support consistently throughout the driver. Move ahc_power_state_change() to OSM. aic7xxx_inline.h Namespace cleanup. Adjust our interrupt handler so it will work in the edge interrupt case. We must process all interrupt sources when the interrupt fires or risk not ever getting an interrupt again. This involves marking the fact that we are relying on an edge interrupt in ahc->flags and checking for this condition in addition to the AHC_ALL_INTERRUPTS flag. This fixes hangs on the 284X and any other aic7770 installation where level interrupts are not available. aic7xxx_pci.c: Move the powerstate manipulation code into the OSM. Several OSes now provide this functionality natively. Take another shot at using the data stored in scratch ram if the SCB2 signature is correct and no SEEPROM data is available. In the past this failed if external SCB ram was configured because the memory port was locked. We now release the memory port prior to testing the values in SCB2 and re-acquire it prior to doing termination control. Adjust for new 2 bit primary channel setting. Trust the STPWLEVEL setting on v 3.X BIOSes too. Configure any 785X ID in the same fashion and assume that any device with a rev id of 1 or higher has the PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
int aic7770_map_int(struct ahc_softc *ahc, int irq);
Move aicasm to its own subdirectory. Separate our platform independent hooks from core driver functionality shared between platforms (FreeBSD and Linux at this time). Add sequencer workarounds for several chip->chipset interactions. Correct external SCB corruption problem on aic7895 based cards (3940AUW). Lots of cleanups resulting from the port to another OS.
2000-09-16 20:02:28 +00:00
/********************************* Debug **************************************/
static __inline void ahc_print_path(struct ahc_softc *, struct scb *);
static __inline void ahc_platform_dump_card_state(struct ahc_softc *ahc);
static __inline void
ahc_print_path(struct ahc_softc *ahc, struct scb *scb)
{
xpt_print_path(scb->io_ctx->ccb_h.path);
}
static __inline void
ahc_platform_dump_card_state(struct ahc_softc *ahc)
{
/* Nothing to do here for FreeBSD */
}
/**************************** Transfer Settings *******************************/
void ahc_notify_xfer_settings_change(struct ahc_softc *,
struct ahc_devinfo *);
void ahc_platform_set_tags(struct ahc_softc *, struct ahc_devinfo *,
int /*enable*/);
ahc_eisa.c: ahc_pci.c: Add detach support. Make use of soft allocated on our behalf by newbus. For PCI devices, disable the mapping type we aren't using for extra protection from rogue code. aic7xxx_93cx6.c: aic7xxx_93cx6.h: Sync perforce IDs. aic7xxx_freebsd.c: Capture the eventhandle returned by EVENTHANDER_REGISTER so we can kill the handler off during detach. Use AHC_* constants instead of hard coded numbers in a few more places. Test PPR option state when deciding to "really" negotiate when the CAM_NEGOTIATE flag is passed in a CCB. Make use of core "ahc_pause_and_flushwork" routine in our timeout handler rather than re-inventing this code. Cleanup all of our resources (really!) in ahc_platform_free(). We should be all set to become a module now. Implement the core ahc_detach() routine shared by all of the FreeBSD front-ends. aic7xxx_freebsd.h: Softc storage for our event handler. Null implementation for the ahc_platform_flushwork() OSM callback. FreeBSD doesn't need this as XPT callbacks are safe from all contexts and are done directly in ahc_done(). aic7xxx_inline.h: Implement new lazy interrupt scheme. To avoid an extra PCI bus read, we first check our completion queues to see if any work has completed. If work is available, we assume that this is the source of the interrupt and skip reading INTSTAT. Any remaining interrupt status will be cleared by a second call to the interrupt handler should the interrupt line still be asserted. This drops the interrupt handler down to a single PCI bus read in the common case of I/O completion. This is the same overhead as in the not so distant past, but the extra sanity of perforning a PCI read after clearing the command complete interrupt and before running the completion queue to avoid missing command complete interrupts added a cycle. aic7xxx.c: During initialization, be sure to initialize all scratch ram locations before they are read to avoid parity errors. In this case, we use a new function, ahc_unbusy_tcl() to initialize the scratch ram busy target table. Replace instances of ahc_index_busy_tcl() used to unbusy a tcl without looking at the old value with ahc_unbusy_tcl(). Modify ahc_sent_msg so that it can find single byte messages. ahc_sent_msg is now used to determine if a transfer negotiation attempt resulted in a bus free. Be more careful in filtering out only the SCSI interrupts of interest in ahc_handle_scsiint. Rearrange interrupt clearing code to ensure that at least one PCI transaction occurrs after hitting CLRSINT1 and writting to CLRINT. CLRSINT1 writes take a bit to take effect, and the re-arrangement provides sufficient delay to ensure the write to CLRINT is effective. The old code might report a spurious interrupt on some "fast" chipsets. export ahc-update_target_msg_request for use by OSM code. If a target does not respond to our ATN request, clear it once we move to a non-message phase. This avoids sending a MSG_NOOP in some later message out phase. Use max lun and max target constants instead of hard-coded values. Use softc storage built into our device_t under FreeBSD. Fix a bug in ahc_free() that caused us to delete resources that were not allocated. Clean up any tstate/lstate info in ahc_free(). Clear the powerdown state in ahc_reset() so that registers can be accessed. Add a preliminary function for pausing the chip and processing any posted work. Add a preliminary suspend and resume functions. aic7xxx.h: Limit the number of supported luns to 64. We don't support information unit transfers, so this is the maximum that makes sense for these chips. Add a new flag AHC_ALL_INTERRUPTS that forces the processing of all interrupt state in a single invokation of ahc_intr(). When the flag is not set, we use the lazy interrupt handling scheme. Add data structures to store controller state while we are suspended. Use constants instead of hard coded values where appropriate. Correct some harmless "unsigned/signed" conflicts. aic7xxx.seq: Only perform the SCSIBUSL fix on ULTRA2 or newer controllers. Older controllers seem to be confused by this. In target mode, ignore PHASEMIS during data phases. This bit seems to be flakey on U160 controllers acting in target mode. aic7xxx_pci.c: Add support for the 29160C CPCI adapter. Add definitions for subvendor ID information available for devices with the "9005" vendor id. We currently use this information to determine if a multi-function device doesn't have the second channel hooked up on a board. Add rudimentary power mode code so we can put the controller into the D0 state. In the future this will be an OSM callback so that in FreeBSD we don't duplicate functionality provided by the PCI code. The powerstate code was added after I'd completed my regression tests on this code. Only capture "left over BIOS state" if the POWRDN setting is not set in HCNTRL. In target mode, don't bother sending incremental CRC data.
2000-12-20 01:11:37 +00:00
/************************* Initialization/Teardown ****************************/
Move aicasm to its own subdirectory. Separate our platform independent hooks from core driver functionality shared between platforms (FreeBSD and Linux at this time). Add sequencer workarounds for several chip->chipset interactions. Correct external SCB corruption problem on aic7895 based cards (3940AUW). Lots of cleanups resulting from the port to another OS.
2000-09-16 20:02:28 +00:00
int ahc_platform_alloc(struct ahc_softc *ahc, void *platform_arg);
void ahc_platform_free(struct ahc_softc *ahc);
Major update to the aic7xxx driver: ahc_eisa.c: ahc_pci.c: Conform to new aic7xxx IRQ API. Adapt to aic7xxx_freebsd -> aic7xxx_osm changes. aic7770.c: Disable card generated interrupt early in our probe for "extra safety" Commonize some seeprom code with the PCI side of the driver. aic7xxx.c: Correctly initialize a few scratch ram locations during a sequencer restart. This avoids spurious sequencer ram parity errors in some configurations. Include the softc in ahc_update_residual calls. We need it for some diagnostics in this code path. Flag a data overrun on an auto-request sense failure as a CAM_AUTOSENSE_FAIL rather than a CAM_DATA_RUN_ERR. Force a renegotiation after noticing a parity error. This covers targets that lose our negotiation settings but don't bother to give us a unit attention condition. This can happen if a target fails during a reselection of us during a cable pull. Convert some code to using constants. Fix some typos. Correct target mode message loop handling. ahc_clear_msg_state was not clearing the "need to go to message out phase" bit once our loop was over. Simplify some abort handling code. Include tag information in target mode immediate notify events. When shutting down EISA controllers, don't EISA BIOS settings in the high portions of scratch ram. This fixes warm boot issues on some systems. Save a bit of space by only allocating the SCBs that we can use. Avoid some code paths in ahc_abort_scbs() if we are currently acting as a target. Correctly cleanup stranded SCBs in the card's SCB array. These are SCBs who's mapping has already been torn down by code that aborted the SCB by seeing it in another list first. Add a comment about some potential bus reset issues for target mode on Twin (EISA only) controllers. aic7xxx.h: Cleanup the hardware scb definitions a bit. Allocate a ful 256 byte scb mapping index. This simplifies the lookup code since the table covers all possible (and potentially bogus) values. Make AHC_DEBUG work again. aic7xxx.reg: Updates to hardware SCB definition. New definitions for target mode fixes. aic7xxx.seq: In target mode, initialize SAVED_LUN just after we receive the identify message. It may be required in the error recovery path when a normal cdb packet (includes lun) is not sent up to the host for processing. Respond to irregular messages during a selection in target mode. Defer looking for space for a cdb packet until we are about to enter command phase. We want to be able to handle irregular messages even if we would otherwise return QUEUE_FULL or BUSY. Add support for sending Ignore Wide Residue messages as a target. In the disable disconnect case in target mode, set our transfer rate correctly once data are availble. aic7xxx_93cx6.c: aic7xxx_93cx6.h: Add the ability to write and erase the seeprom. aic7xxx_inline.h: Correct Big Endian handling of large cdb sizes (> 12 bytes). Adaptec to changes in the calc_residual API. Correct a target mode bug where we always attempted to service the input queue even if no progress could be made due to lack of ATIOs. aic7xxx_osm.c: Adaptec to new IRQ mapping API. The new API allows the core to only enable our IRQ mapping once it is safe (sufficient initialization) to do so. Slap bootverbose protection around some diagnostics. Only attempt DT phases if we are wide. aic7xxx_osm.h: Enable big endian support. Adjust for IRQ API change. aic7xxx_pci.c: Be more careful about relying on subvendor 9005 information. We now only trust it for HBAs. This should allow the driver to attach to some MBs where the subvendor/device information does not follow the Adaptec spec. Only enable interrupts on the card once we are fully setup. Disable external SCB ram usage on the aic7895. I have not been able to make it 100% reliable. Adjust to seeprom routines being properly prefixed with "ahc". Fix a few bugs in the external SCB ram probing routine. We need to clear any parity errors we've triggered during the probe to avoid future, fatal, interrupts. If we detect an invalid cable combination, pretent there are no cable at all. This will enable all of the terminators which is probably the safest configuration we can "guess". MFC after: 4 days
2002-04-24 16:58:51 +00:00
int ahc_map_int(struct ahc_softc *ahc);
Move aicasm to its own subdirectory. Separate our platform independent hooks from core driver functionality shared between platforms (FreeBSD and Linux at this time). Add sequencer workarounds for several chip->chipset interactions. Correct external SCB corruption problem on aic7895 based cards (3940AUW). Lots of cleanups resulting from the port to another OS.
2000-09-16 20:02:28 +00:00
int ahc_attach(struct ahc_softc *);
int ahc_softc_comp(struct ahc_softc *lahc, struct ahc_softc *rahc);
ahc_eisa.c: ahc_pci.c: Add detach support. Make use of soft allocated on our behalf by newbus. For PCI devices, disable the mapping type we aren't using for extra protection from rogue code. aic7xxx_93cx6.c: aic7xxx_93cx6.h: Sync perforce IDs. aic7xxx_freebsd.c: Capture the eventhandle returned by EVENTHANDER_REGISTER so we can kill the handler off during detach. Use AHC_* constants instead of hard coded numbers in a few more places. Test PPR option state when deciding to "really" negotiate when the CAM_NEGOTIATE flag is passed in a CCB. Make use of core "ahc_pause_and_flushwork" routine in our timeout handler rather than re-inventing this code. Cleanup all of our resources (really!) in ahc_platform_free(). We should be all set to become a module now. Implement the core ahc_detach() routine shared by all of the FreeBSD front-ends. aic7xxx_freebsd.h: Softc storage for our event handler. Null implementation for the ahc_platform_flushwork() OSM callback. FreeBSD doesn't need this as XPT callbacks are safe from all contexts and are done directly in ahc_done(). aic7xxx_inline.h: Implement new lazy interrupt scheme. To avoid an extra PCI bus read, we first check our completion queues to see if any work has completed. If work is available, we assume that this is the source of the interrupt and skip reading INTSTAT. Any remaining interrupt status will be cleared by a second call to the interrupt handler should the interrupt line still be asserted. This drops the interrupt handler down to a single PCI bus read in the common case of I/O completion. This is the same overhead as in the not so distant past, but the extra sanity of perforning a PCI read after clearing the command complete interrupt and before running the completion queue to avoid missing command complete interrupts added a cycle. aic7xxx.c: During initialization, be sure to initialize all scratch ram locations before they are read to avoid parity errors. In this case, we use a new function, ahc_unbusy_tcl() to initialize the scratch ram busy target table. Replace instances of ahc_index_busy_tcl() used to unbusy a tcl without looking at the old value with ahc_unbusy_tcl(). Modify ahc_sent_msg so that it can find single byte messages. ahc_sent_msg is now used to determine if a transfer negotiation attempt resulted in a bus free. Be more careful in filtering out only the SCSI interrupts of interest in ahc_handle_scsiint. Rearrange interrupt clearing code to ensure that at least one PCI transaction occurrs after hitting CLRSINT1 and writting to CLRINT. CLRSINT1 writes take a bit to take effect, and the re-arrangement provides sufficient delay to ensure the write to CLRINT is effective. The old code might report a spurious interrupt on some "fast" chipsets. export ahc-update_target_msg_request for use by OSM code. If a target does not respond to our ATN request, clear it once we move to a non-message phase. This avoids sending a MSG_NOOP in some later message out phase. Use max lun and max target constants instead of hard-coded values. Use softc storage built into our device_t under FreeBSD. Fix a bug in ahc_free() that caused us to delete resources that were not allocated. Clean up any tstate/lstate info in ahc_free(). Clear the powerdown state in ahc_reset() so that registers can be accessed. Add a preliminary function for pausing the chip and processing any posted work. Add a preliminary suspend and resume functions. aic7xxx.h: Limit the number of supported luns to 64. We don't support information unit transfers, so this is the maximum that makes sense for these chips. Add a new flag AHC_ALL_INTERRUPTS that forces the processing of all interrupt state in a single invokation of ahc_intr(). When the flag is not set, we use the lazy interrupt handling scheme. Add data structures to store controller state while we are suspended. Use constants instead of hard coded values where appropriate. Correct some harmless "unsigned/signed" conflicts. aic7xxx.seq: Only perform the SCSIBUSL fix on ULTRA2 or newer controllers. Older controllers seem to be confused by this. In target mode, ignore PHASEMIS during data phases. This bit seems to be flakey on U160 controllers acting in target mode. aic7xxx_pci.c: Add support for the 29160C CPCI adapter. Add definitions for subvendor ID information available for devices with the "9005" vendor id. We currently use this information to determine if a multi-function device doesn't have the second channel hooked up on a board. Add rudimentary power mode code so we can put the controller into the D0 state. In the future this will be an OSM callback so that in FreeBSD we don't duplicate functionality provided by the PCI code. The powerstate code was added after I'd completed my regression tests on this code. Only capture "left over BIOS state" if the POWRDN setting is not set in HCNTRL. In target mode, don't bother sending incremental CRC data.
2000-12-20 01:11:37 +00:00
int ahc_detach(device_t);
/****************************** Interrupts ************************************/
void ahc_platform_intr(void *);
static __inline void ahc_platform_flushwork(struct ahc_softc *ahc);
static __inline void
ahc_platform_flushwork(struct ahc_softc *ahc)
{
}
Move aicasm to its own subdirectory. Separate our platform independent hooks from core driver functionality shared between platforms (FreeBSD and Linux at this time). Add sequencer workarounds for several chip->chipset interactions. Correct external SCB corruption problem on aic7895 based cards (3940AUW). Lots of cleanups resulting from the port to another OS.
2000-09-16 20:02:28 +00:00
/************************ Misc Function Declarations **************************/
timeout_t ahc_timeout;
void ahc_done(struct ahc_softc *ahc, struct scb *scb);
Add Perforce RCSIDs for easy revision correlation to my local tree. ahc_pci.c: Bring back the AHC_ALLOW_MEMIO option at least until the memory mapped I/O problem on the SuperMicro 370DR3 is better understood. aic7xxx.c: If we see a spurious SCSI interrupt, attempt to clear it and continue by unpausing the sequencer. Change the interface to ahc_send_async(). Some async messages need to be broadcast to all the luns of a target or all the targets of a bus. This is easier to achieve by passing explicit channel, target, and lun parameters instead of attempting to construct a device info struct to match. Filter the sync parameters for the PPR message in exactly the same way we do for an old fashioned SDTR message. Correct some typos and correct a panic message. Handle rejected PPR messages. In ahc_handle_msg_reject(), let ahc_build_transfer_msg() build any additional transfer messages instead of doing this inline. aic7xxx.h: Increase the size of both msgout_buf and msgin_buf to better accomodate PPR messages. aic7xxx_freebsd.c: Update for change in ahc_send_async() parameters. aic7xxx_freebsd.h Update for change in ahc_send_async() parameters. Honor AHC_ALLOW_MEMIO. aic7xxx_pci.c: Check the error register before going into full blown PCI interrupt handling. This avoids a few costly PCI configuration space reads when we run our PCI interrupt handler because another device sharing our interrupt line is more active than we are. Also unpause the sequencer after processing a PCI interrupt.
2000-09-22 22:18:05 +00:00
void ahc_send_async(struct ahc_softc *, char /*channel*/,
ahc_eisa.c: ahc_pci.c: Prepare for making ahc a module by adding module dependency and version info. aic7770.c: Remove linux header ifdefs. The headers are handled differently in Linux where local includes (those using "'s instead of <>'s) are allowed. Don't map our interrupt until after we are fully setup to handle interrupts. Our interrupt line may be shared so an interrupt could occur at any time. aic7xxx.c: Remove linux header ifdefs. current->curr to avoid Linux's use of current as a #define for the current task on some architectures. Add a helper function, ahc_assert_atn(), for use in message phases we handle manually. This hides the fact that U160 chips with the expected phase matching disabled need to have SCSISIGO updated differently. if (ahc_check_residual(scb) != 0) ahc_calc_residual(scb); else ahc_set_residual(scb, 0); becomes: ahc_update_residual(scb); Modify scsi parity error (or CRC error) handling to reflect expected phase being disabled on U160 chips. Move SELTO handling above BUSFREE handling so we can use the new busfree interrupt behavior on U160 chips. In ahc_build_transfer_msg() filter the period and ppr_options prior to deciding whether a PPR message is required. ppr_options may be forced to zero which will effect our decision. Correct a long standing but latent bug in ahc_find_syncrate(). We could choose a DT only rate even though DT transfers were disabled. In the CAM environment this was unlikely as CAM filters our rate to a non-DT value if the device does not support such rates. When displaing controller characteristics, include the speed of the chip. This way we can modify the transfer speed based on optional features that are enabled/disabled in a particular application. Add support for switching from fully blown tagged queing to just using simple queue tags should the device reject an ordered tag. Remove per-target "current" disconnect and tag queuing enable flags. These should be per-device and are not referenced internally be the driver, so we let the OSM track this state if it needs to. Use SCSI-3 message terminology. aic7xxx.h: The real 7850 does not support Ultra modes, but there are several cards that use the generic 7850 PCI ID even though they are using an Ultra capable chip (7859/7860). We start out with the AHC_ULTRA feature set and then check the DEVSTATUS register to determine if the capability is really present. current -> curr ahc_calc_residual() is no longer static allowing it to be called from ahc_update_residual() in aic7xxx_inline.h. Update some serial eeprom definitions for the latest BIOS versions. aic7xxx.reg: Add a combined DATA_PHASE mask to the SCSIPHASE register definition to simplify some sequencer code. aic7xxx.seq: Take advantage of some performance features available only on the U160 chips. The auto-ack feature allows us to ack data-in phases up to the data-fifo size while the sequencer is still setting up the DMA engine. This greatly reduces read transfer latency and simplifies testing for transfer complete (check SCSIEN only). We also disable the expected phase feature, and enable the new bus free interrupt behavior, to avoid a few instructions. Re-arrange the Ultra2+ data phase handling to allow us to do more work in parallel with the data fifo flushing on a read. On an SDTR, ack the message immediately so the target can prepare the next phase or message byte in parallel with our work to honor the message. aic7xxx_93cx6.c: Remove linux header ifdefs. aic7xxx_freebsd.c: current -> curr Add a module event handler. Handle tag downgrades in our ahc_send_async() handler. We won't be able to downgrade to "basic queuing" until CAM is made aware of this queuing type. aic7xxx_freebsd.h: Include cleanups. Define offsetof if required. Correct a few comments. Update prototype of ahc_send_async(). aic7xxx_inline.h: Implement ahc_update_residual(). aic7xxx_pci.c: Remove linux header ifdefs. Correct a few product strings. Enable several U160 performance enhancing features. Modify Ultra capability determination so we will enable Ultra speeds on devices with a 7850 PCI id that happen to really be a 7859 or 7860. Don't map our interrupt until after we are fully setup to handle interrupts. Our interrupt line may be shared so an interrupt could occur at any time.
2001-05-15 19:41:12 +00:00
u_int /*target*/, u_int /*lun*/, ac_code, void *arg);
Move aicasm to its own subdirectory. Separate our platform independent hooks from core driver functionality shared between platforms (FreeBSD and Linux at this time). Add sequencer workarounds for several chip->chipset interactions. Correct external SCB corruption problem on aic7895 based cards (3940AUW). Lots of cleanups resulting from the port to another OS.
2000-09-16 20:02:28 +00:00
#endif /* _AIC7XXX_FREEBSD_H_ */
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