1998-09-15 07:32:57 +00:00
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/*
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* Product specific probe and attach routines for:
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* Buslogic BT946, BT948, BT956, BT958 SCSI controllers
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*
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* Copyright (c) 1995, 1997, 1998 Justin T. Gibbs
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions, and the following disclaimer,
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* without modification, immediately at the beginning of the file.
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* 2. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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1998-11-10 06:45:14 +00:00
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* $Id: bt_pci.c,v 1.2 1998/10/30 02:06:42 gibbs Exp $
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1998-09-15 07:32:57 +00:00
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*/
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#include "pci.h"
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#if NPCI > 0
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <pci/pcireg.h>
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#include <pci/pcivar.h>
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#include <machine/bus_memio.h>
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#include <machine/bus_pio.h>
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#include <machine/bus.h>
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#include <dev/buslogic/btreg.h>
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#define BT_PCI_IOADDR PCIR_MAPS
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#define BT_PCI_MEMADDR PCIR_MAPS + 4
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#define PCI_DEVICE_ID_BUSLOGIC_MULTIMASTER 0x1040104Bul
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#define PCI_DEVICE_ID_BUSLOGIC_MULTIMASTER_NC 0x0140104Bul
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#define PCI_DEVICE_ID_BUSLOGIC_FLASHPOINT 0x8130104Bul
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static int btpcideterminebusspace(pcici_t config_id, bus_space_tag_t* tagp,
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bus_space_handle_t* bshp);
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static char* bt_pci_probe(pcici_t tag, pcidi_t type);
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static void bt_pci_attach(pcici_t config_id, int unit);
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static struct pci_device bt_pci_driver = {
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"bt",
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bt_pci_probe,
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bt_pci_attach,
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&bt_unit,
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NULL
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};
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DATA_SET (pcidevice_set, bt_pci_driver);
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static int
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btpcideterminebusspace(pcici_t config_id, bus_space_tag_t* tagp,
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bus_space_handle_t* bshp)
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{
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vm_offset_t vaddr;
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vm_offset_t paddr;
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u_int16_t io_port;
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int command;
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vaddr = 0;
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paddr = 0;
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command = pci_cfgread(config_id, PCIR_COMMAND, /*bytes*/1);
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/* XXX Memory Mapped I/O seems to cause problems */
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#if 0
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if ((command & PCIM_CMD_MEMEN) == 0
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|| (pci_map_mem(config_id, BT_PCI_MEMADDR, &vaddr, &paddr)) == 0)
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#endif
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if ((command & PCIM_CMD_PORTEN) == 0
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|| (pci_map_port(config_id, BT_PCI_IOADDR, &io_port)) == 0)
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return (-1);
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if (vaddr != 0) {
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*tagp = I386_BUS_SPACE_MEM;
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*bshp = vaddr;
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} else {
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*tagp = I386_BUS_SPACE_IO;
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*bshp = io_port;
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}
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return (0);
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}
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static char*
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bt_pci_probe (pcici_t config_id, pcidi_t type)
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{
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switch(type) {
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case PCI_DEVICE_ID_BUSLOGIC_MULTIMASTER:
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case PCI_DEVICE_ID_BUSLOGIC_MULTIMASTER_NC:
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{
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struct bt_softc *bt;
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bus_space_tag_t tag;
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bus_space_handle_t bsh;
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pci_info_data_t pci_info;
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int error;
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if (btpcideterminebusspace(config_id, &tag, &bsh) != 0)
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break;
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bt = bt_alloc(BT_TEMP_UNIT, tag, bsh);
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if (bt == NULL)
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break;
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/*
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* Determine if an ISA compatible I/O port has been
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* enabled. If so, record the port so it will not
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1998-10-30 02:06:44 +00:00
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* be probed by our ISA probe. If the PCI I/O port
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* was not set to the compatibility port, disable it.
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1998-09-15 07:32:57 +00:00
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*/
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error = bt_cmd(bt, BOP_INQUIRE_PCI_INFO,
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/*param*/NULL, /*paramlen*/0,
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(u_int8_t*)&pci_info, sizeof(pci_info),
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DEFAULT_CMD_TIMEOUT);
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if (error == 0
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&& pci_info.io_port < BIO_DISABLED) {
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bt_mark_probed_bio(pci_info.io_port);
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1998-11-10 06:45:14 +00:00
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if (bsh != bt_iop_from_bio(pci_info.io_port)) {
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1998-10-30 02:06:44 +00:00
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u_int8_t new_addr;
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new_addr = BIO_DISABLED;
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bt_cmd(bt, BOP_MODIFY_IO_ADDR,
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/*param*/&new_addr,
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/*paramlen*/1, /*reply_buf*/NULL,
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/*reply_len*/0,
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DEFAULT_CMD_TIMEOUT);
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}
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1998-09-15 07:32:57 +00:00
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}
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bt_free(bt);
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1998-11-10 06:45:14 +00:00
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return ("Buslogic Multi-Master SCSI Host Adapter");
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1998-09-15 07:32:57 +00:00
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break;
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}
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default:
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break;
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}
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return (NULL);
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}
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static void
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bt_pci_attach(pcici_t config_id, int unit)
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{
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struct bt_softc *bt;
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bus_space_tag_t tag;
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bus_space_handle_t bsh;
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int opri;
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if (btpcideterminebusspace(config_id, &tag, &bsh) != 0)
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return;
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if ((bt = bt_alloc(unit, tag, bsh)) == NULL)
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return; /* XXX PCI code should take return status */
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/* Allocate a dmatag for our CCB DMA maps */
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/* XXX Should be a child of the PCI bus dma tag */
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if (bus_dma_tag_create(/*parent*/NULL, /*alignemnt*/0, /*boundary*/0,
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/*lowaddr*/BUS_SPACE_MAXADDR_32BIT,
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/*highaddr*/BUS_SPACE_MAXADDR,
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/*filter*/NULL, /*filterarg*/NULL,
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/*maxsize*/BUS_SPACE_MAXSIZE_32BIT,
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/*nsegments*/BUS_SPACE_UNRESTRICTED,
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/*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT,
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/*flags*/0, &bt->parent_dmat) != 0) {
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bt_free(bt);
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return;
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}
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if ((pci_map_int(config_id, bt_intr, (void *)bt, &cam_imask)) == 0) {
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bt_free(bt);
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return;
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}
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/*
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* Protect ourself from spurrious interrupts during
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* intialization and attach. We should really rely
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* on interrupts during attach, but we don't have
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* access to our interrupts during ISA probes, so until
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* that changes, we mask our interrupts during attach
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* too.
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*/
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opri = splcam();
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if (bt_probe(bt) || bt_fetch_adapter_info(bt) || bt_init(bt)) {
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bt_free(bt);
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splx(opri);
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return; /* XXX PCI code should take return status */
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}
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bt_attach(bt);
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splx(opri);
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return;
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}
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#endif /* NPCI > 0 */
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