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freebsd-dev/sys/mips/broadcom/siba_nexus.c

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Bring over the initial rewrite of the broadcom bus support found in their SoCs and various chips (including, famously, their wifi chips.) This is "just" (all 20,000 lines of it) code to enumerate the various versions of busses inside these devices, including the PCI bridge and the direct SIBA bridge found in MIPS chips. It also includes shared code for some bus operations (suspend, resume, etc); EEPROM/SROM/etc parsing and other things that are shared between chips. Eventually this'll replace the code that bwi/bwn uses for the internal bus, as well as some apparently upcoming mips74k broadcom SoC support which uses bwn! Thanks to Landon Fuller <landonf@landonf.org> for all this work! Obtained from: https://github.com/landonf/freebsd/compare/user/landonf/bcm4331-CURRENT
2016-02-26 03:34:08 +00:00
/*-
Switch mips/sentry5 to bhnd(4), and unify with mips/broadcom Now that bhnd(4) provides feature parity with the previous siba/mips implementation, we can switch sentry5 over and begin lifting common support code out for use across bhnd(4) embedded targets. Changes: - Fixed enumeration of siba(4) per-core address maps, required for discovery of memory mapped chipc flash region on siba(4) devices. - Simplified bhnd kernel configuration (dropped 'bhndbus' option). - Replaced files.broadcom's direct file references with their corresponding standard kernel options. - Lifted out common bcma/siba nexus support, inheriting from the new generic bhnd_nexus driver. - Dropped now-unused sentry5 siba code. - Re-integrated BCM into the universe build now that it actually compiles. Approved by: adrian (mentor) Differential Revision: https://reviews.freebsd.org/D6712
2016-06-04 19:53:47 +00:00
* Copyright (c) 2015-2016 Landon Fuller <landon@freebsd.org>
Bring over the initial rewrite of the broadcom bus support found in their SoCs and various chips (including, famously, their wifi chips.) This is "just" (all 20,000 lines of it) code to enumerate the various versions of busses inside these devices, including the PCI bridge and the direct SIBA bridge found in MIPS chips. It also includes shared code for some bus operations (suspend, resume, etc); EEPROM/SROM/etc parsing and other things that are shared between chips. Eventually this'll replace the code that bwi/bwn uses for the internal bus, as well as some apparently upcoming mips74k broadcom SoC support which uses bwn! Thanks to Landon Fuller <landonf@landonf.org> for all this work! Obtained from: https://github.com/landonf/freebsd/compare/user/landonf/bcm4331-CURRENT
2016-02-26 03:34:08 +00:00
* Copyright (c) 2007 Bruce M. Simpson.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");
#include <sys/param.h>
#include <sys/kernel.h>
Switch mips/sentry5 to bhnd(4), and unify with mips/broadcom Now that bhnd(4) provides feature parity with the previous siba/mips implementation, we can switch sentry5 over and begin lifting common support code out for use across bhnd(4) embedded targets. Changes: - Fixed enumeration of siba(4) per-core address maps, required for discovery of memory mapped chipc flash region on siba(4) devices. - Simplified bhnd kernel configuration (dropped 'bhndbus' option). - Replaced files.broadcom's direct file references with their corresponding standard kernel options. - Lifted out common bcma/siba nexus support, inheriting from the new generic bhnd_nexus driver. - Dropped now-unused sentry5 siba code. - Re-integrated BCM into the universe build now that it actually compiles. Approved by: adrian (mentor) Differential Revision: https://reviews.freebsd.org/D6712
2016-06-04 19:53:47 +00:00
#include <sys/bus.h>
Bring over the initial rewrite of the broadcom bus support found in their SoCs and various chips (including, famously, their wifi chips.) This is "just" (all 20,000 lines of it) code to enumerate the various versions of busses inside these devices, including the PCI bridge and the direct SIBA bridge found in MIPS chips. It also includes shared code for some bus operations (suspend, resume, etc); EEPROM/SROM/etc parsing and other things that are shared between chips. Eventually this'll replace the code that bwi/bwn uses for the internal bus, as well as some apparently upcoming mips74k broadcom SoC support which uses bwn! Thanks to Landon Fuller <landonf@landonf.org> for all this work! Obtained from: https://github.com/landonf/freebsd/compare/user/landonf/bcm4331-CURRENT
2016-02-26 03:34:08 +00:00
#include <sys/module.h>
#include <machine/bus.h>
Switch mips/sentry5 to bhnd(4), and unify with mips/broadcom Now that bhnd(4) provides feature parity with the previous siba/mips implementation, we can switch sentry5 over and begin lifting common support code out for use across bhnd(4) embedded targets. Changes: - Fixed enumeration of siba(4) per-core address maps, required for discovery of memory mapped chipc flash region on siba(4) devices. - Simplified bhnd kernel configuration (dropped 'bhndbus' option). - Replaced files.broadcom's direct file references with their corresponding standard kernel options. - Lifted out common bcma/siba nexus support, inheriting from the new generic bhnd_nexus driver. - Dropped now-unused sentry5 siba code. - Re-integrated BCM into the universe build now that it actually compiles. Approved by: adrian (mentor) Differential Revision: https://reviews.freebsd.org/D6712
2016-06-04 19:53:47 +00:00
#include <sys/rman.h>
#include <machine/resource.h>
Bring over the initial rewrite of the broadcom bus support found in their SoCs and various chips (including, famously, their wifi chips.) This is "just" (all 20,000 lines of it) code to enumerate the various versions of busses inside these devices, including the PCI bridge and the direct SIBA bridge found in MIPS chips. It also includes shared code for some bus operations (suspend, resume, etc); EEPROM/SROM/etc parsing and other things that are shared between chips. Eventually this'll replace the code that bwi/bwn uses for the internal bus, as well as some apparently upcoming mips74k broadcom SoC support which uses bwn! Thanks to Landon Fuller <landonf@landonf.org> for all this work! Obtained from: https://github.com/landonf/freebsd/compare/user/landonf/bcm4331-CURRENT
2016-02-26 03:34:08 +00:00
#include <dev/bhnd/bhnd_ids.h>
bhnd(4): implement MIPS and PCI(e) interrupt support On BHND MIPS SoCs, this replaces the use of hard-coded MIPS IRQ#s in the common bhnd(4) core drivers; we now register an INTRNG child PIC that handles routing of backplane interrupt vectors via the MIPS core. On BHND PCI devices, backplane interrupt vectors are now routed to the PCI/PCIe host bridge core when bus_setup_intr() is called, where they are dispatched by the PCI core via a host interrupt (e.g. INTx/MSI). The bhndb(4) bridge driver tracks registered interrupt handlers for the bridged bhnd(4) devices and manages backplane interrupt routing, while delegating actual bus interrupt setup/teardown to the parent bus on behalf of the bridged cores. Approved by: adrian (mentor, implicit) Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D12518
2017-11-21 23:15:20 +00:00
#include <dev/bhnd/siba/sibareg.h>
[mips/broadcom] Move MIPS-specific bhnd(4) nexus drivers to sys/mips/broadcom, and add MIPS/BCM4706-specific workaround to bhnd_nexus_is_hw_disabled() -- the BCM4706 low-cost package leaves secondary GMAC cores floating. Reviewed by: mizhka Approved by: adrian (mentor) Differential Revision: https://reviews.freebsd.org/D9499
2017-02-13 19:58:55 +00:00
#include <dev/bhnd/siba/sibavar.h>
#include "bcm_machdep.h"
bhnd(4): implement MIPS and PCI(e) interrupt support On BHND MIPS SoCs, this replaces the use of hard-coded MIPS IRQ#s in the common bhnd(4) core drivers; we now register an INTRNG child PIC that handles routing of backplane interrupt vectors via the MIPS core. On BHND PCI devices, backplane interrupt vectors are now routed to the PCI/PCIe host bridge core when bus_setup_intr() is called, where they are dispatched by the PCI core via a host interrupt (e.g. INTx/MSI). The bhndb(4) bridge driver tracks registered interrupt handlers for the bridged bhnd(4) devices and manages backplane interrupt routing, while delegating actual bus interrupt setup/teardown to the parent bus on behalf of the bridged cores. Approved by: adrian (mentor, implicit) Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D12518
2017-11-21 23:15:20 +00:00
#include "bcm_mipsvar.h"
[mips/broadcom] Move MIPS-specific bhnd(4) nexus drivers to sys/mips/broadcom, and add MIPS/BCM4706-specific workaround to bhnd_nexus_is_hw_disabled() -- the BCM4706 low-cost package leaves secondary GMAC cores floating. Reviewed by: mizhka Approved by: adrian (mentor) Differential Revision: https://reviews.freebsd.org/D9499
2017-02-13 19:58:55 +00:00
#include "bhnd_nexusvar.h"
Bring over the initial rewrite of the broadcom bus support found in their SoCs and various chips (including, famously, their wifi chips.) This is "just" (all 20,000 lines of it) code to enumerate the various versions of busses inside these devices, including the PCI bridge and the direct SIBA bridge found in MIPS chips. It also includes shared code for some bus operations (suspend, resume, etc); EEPROM/SROM/etc parsing and other things that are shared between chips. Eventually this'll replace the code that bwi/bwn uses for the internal bus, as well as some apparently upcoming mips74k broadcom SoC support which uses bwn! Thanks to Landon Fuller <landonf@landonf.org> for all this work! Obtained from: https://github.com/landonf/freebsd/compare/user/landonf/bcm4331-CURRENT
2016-02-26 03:34:08 +00:00
/*
* Supports siba(4) attachment to a MIPS nexus bus.
*
Switch mips/sentry5 to bhnd(4), and unify with mips/broadcom Now that bhnd(4) provides feature parity with the previous siba/mips implementation, we can switch sentry5 over and begin lifting common support code out for use across bhnd(4) embedded targets. Changes: - Fixed enumeration of siba(4) per-core address maps, required for discovery of memory mapped chipc flash region on siba(4) devices. - Simplified bhnd kernel configuration (dropped 'bhndbus' option). - Replaced files.broadcom's direct file references with their corresponding standard kernel options. - Lifted out common bcma/siba nexus support, inheriting from the new generic bhnd_nexus driver. - Dropped now-unused sentry5 siba code. - Re-integrated BCM into the universe build now that it actually compiles. Approved by: adrian (mentor) Differential Revision: https://reviews.freebsd.org/D6712
2016-06-04 19:53:47 +00:00
* Derived from Bruce M. Simpson' original siba(4) driver.
Bring over the initial rewrite of the broadcom bus support found in their SoCs and various chips (including, famously, their wifi chips.) This is "just" (all 20,000 lines of it) code to enumerate the various versions of busses inside these devices, including the PCI bridge and the direct SIBA bridge found in MIPS chips. It also includes shared code for some bus operations (suspend, resume, etc); EEPROM/SROM/etc parsing and other things that are shared between chips. Eventually this'll replace the code that bwi/bwn uses for the internal bus, as well as some apparently upcoming mips74k broadcom SoC support which uses bwn! Thanks to Landon Fuller <landonf@landonf.org> for all this work! Obtained from: https://github.com/landonf/freebsd/compare/user/landonf/bcm4331-CURRENT
2016-02-26 03:34:08 +00:00
*/
bhnd(4): implement MIPS and PCI(e) interrupt support On BHND MIPS SoCs, this replaces the use of hard-coded MIPS IRQ#s in the common bhnd(4) core drivers; we now register an INTRNG child PIC that handles routing of backplane interrupt vectors via the MIPS core. On BHND PCI devices, backplane interrupt vectors are now routed to the PCI/PCIe host bridge core when bus_setup_intr() is called, where they are dispatched by the PCI core via a host interrupt (e.g. INTx/MSI). The bhndb(4) bridge driver tracks registered interrupt handlers for the bridged bhnd(4) devices and manages backplane interrupt routing, while delegating actual bus interrupt setup/teardown to the parent bus on behalf of the bridged cores. Approved by: adrian (mentor, implicit) Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D12518
2017-11-21 23:15:20 +00:00
_Static_assert(SIBA_MAX_INTR == BCM_MIPS_NINTR, "SIBA incompatible with "
"generic NINTR");
Bring over the initial rewrite of the broadcom bus support found in their SoCs and various chips (including, famously, their wifi chips.) This is "just" (all 20,000 lines of it) code to enumerate the various versions of busses inside these devices, including the PCI bridge and the direct SIBA bridge found in MIPS chips. It also includes shared code for some bus operations (suspend, resume, etc); EEPROM/SROM/etc parsing and other things that are shared between chips. Eventually this'll replace the code that bwi/bwn uses for the internal bus, as well as some apparently upcoming mips74k broadcom SoC support which uses bwn! Thanks to Landon Fuller <landonf@landonf.org> for all this work! Obtained from: https://github.com/landonf/freebsd/compare/user/landonf/bcm4331-CURRENT
2016-02-26 03:34:08 +00:00
static int
siba_nexus_probe(device_t dev)
{
[mips/broadcom] Move MIPS-specific bhnd(4) nexus drivers to sys/mips/broadcom, and add MIPS/BCM4706-specific workaround to bhnd_nexus_is_hw_disabled() -- the BCM4706 low-cost package leaves secondary GMAC cores floating. Reviewed by: mizhka Approved by: adrian (mentor) Differential Revision: https://reviews.freebsd.org/D9499
2017-02-13 19:58:55 +00:00
int error;
Bring over the initial rewrite of the broadcom bus support found in their SoCs and various chips (including, famously, their wifi chips.) This is "just" (all 20,000 lines of it) code to enumerate the various versions of busses inside these devices, including the PCI bridge and the direct SIBA bridge found in MIPS chips. It also includes shared code for some bus operations (suspend, resume, etc); EEPROM/SROM/etc parsing and other things that are shared between chips. Eventually this'll replace the code that bwi/bwn uses for the internal bus, as well as some apparently upcoming mips74k broadcom SoC support which uses bwn! Thanks to Landon Fuller <landonf@landonf.org> for all this work! Obtained from: https://github.com/landonf/freebsd/compare/user/landonf/bcm4331-CURRENT
2016-02-26 03:34:08 +00:00
[mips/broadcom] Move MIPS-specific bhnd(4) nexus drivers to sys/mips/broadcom, and add MIPS/BCM4706-specific workaround to bhnd_nexus_is_hw_disabled() -- the BCM4706 low-cost package leaves secondary GMAC cores floating. Reviewed by: mizhka Approved by: adrian (mentor) Differential Revision: https://reviews.freebsd.org/D9499
2017-02-13 19:58:55 +00:00
if (bcm_get_platform()->cid.chip_type != BHND_CHIPTYPE_SIBA)
Bring over the initial rewrite of the broadcom bus support found in their SoCs and various chips (including, famously, their wifi chips.) This is "just" (all 20,000 lines of it) code to enumerate the various versions of busses inside these devices, including the PCI bridge and the direct SIBA bridge found in MIPS chips. It also includes shared code for some bus operations (suspend, resume, etc); EEPROM/SROM/etc parsing and other things that are shared between chips. Eventually this'll replace the code that bwi/bwn uses for the internal bus, as well as some apparently upcoming mips74k broadcom SoC support which uses bwn! Thanks to Landon Fuller <landonf@landonf.org> for all this work! Obtained from: https://github.com/landonf/freebsd/compare/user/landonf/bcm4331-CURRENT
2016-02-26 03:34:08 +00:00
return (ENXIO);
[mips/broadcom] Move MIPS-specific bhnd(4) nexus drivers to sys/mips/broadcom, and add MIPS/BCM4706-specific workaround to bhnd_nexus_is_hw_disabled() -- the BCM4706 low-cost package leaves secondary GMAC cores floating. Reviewed by: mizhka Approved by: adrian (mentor) Differential Revision: https://reviews.freebsd.org/D9499
2017-02-13 19:58:55 +00:00
if ((error = siba_probe(dev)) > 0)
Switch mips/sentry5 to bhnd(4), and unify with mips/broadcom Now that bhnd(4) provides feature parity with the previous siba/mips implementation, we can switch sentry5 over and begin lifting common support code out for use across bhnd(4) embedded targets. Changes: - Fixed enumeration of siba(4) per-core address maps, required for discovery of memory mapped chipc flash region on siba(4) devices. - Simplified bhnd kernel configuration (dropped 'bhndbus' option). - Replaced files.broadcom's direct file references with their corresponding standard kernel options. - Lifted out common bcma/siba nexus support, inheriting from the new generic bhnd_nexus driver. - Dropped now-unused sentry5 siba code. - Re-integrated BCM into the universe build now that it actually compiles. Approved by: adrian (mentor) Differential Revision: https://reviews.freebsd.org/D6712
2016-06-04 19:53:47 +00:00
return (error);
Bring over the initial rewrite of the broadcom bus support found in their SoCs and various chips (including, famously, their wifi chips.) This is "just" (all 20,000 lines of it) code to enumerate the various versions of busses inside these devices, including the PCI bridge and the direct SIBA bridge found in MIPS chips. It also includes shared code for some bus operations (suspend, resume, etc); EEPROM/SROM/etc parsing and other things that are shared between chips. Eventually this'll replace the code that bwi/bwn uses for the internal bus, as well as some apparently upcoming mips74k broadcom SoC support which uses bwn! Thanks to Landon Fuller <landonf@landonf.org> for all this work! Obtained from: https://github.com/landonf/freebsd/compare/user/landonf/bcm4331-CURRENT
2016-02-26 03:34:08 +00:00
bhnd(4): Include the chip model (e.g. BCM4xxx) in bhnd(4) bus's device descriptions. Reviewed by: mizhka Approved by: adrian (mentor) Differential Revision: https://reviews.freebsd.org/D7570
2016-08-27 00:07:48 +00:00
/* Set device description */
[mips/broadcom] Move MIPS-specific bhnd(4) nexus drivers to sys/mips/broadcom, and add MIPS/BCM4706-specific workaround to bhnd_nexus_is_hw_disabled() -- the BCM4706 low-cost package leaves secondary GMAC cores floating. Reviewed by: mizhka Approved by: adrian (mentor) Differential Revision: https://reviews.freebsd.org/D9499
2017-02-13 19:58:55 +00:00
bhnd_set_default_bus_desc(dev, &bcm_get_platform()->cid);
bhnd(4): Include the chip model (e.g. BCM4xxx) in bhnd(4) bus's device descriptions. Reviewed by: mizhka Approved by: adrian (mentor) Differential Revision: https://reviews.freebsd.org/D7570
2016-08-27 00:07:48 +00:00
[mips/broadcom] Move MIPS-specific bhnd(4) nexus drivers to sys/mips/broadcom, and add MIPS/BCM4706-specific workaround to bhnd_nexus_is_hw_disabled() -- the BCM4706 low-cost package leaves secondary GMAC cores floating. Reviewed by: mizhka Approved by: adrian (mentor) Differential Revision: https://reviews.freebsd.org/D9499
2017-02-13 19:58:55 +00:00
return (BUS_PROBE_SPECIFIC);
Bring over the initial rewrite of the broadcom bus support found in their SoCs and various chips (including, famously, their wifi chips.) This is "just" (all 20,000 lines of it) code to enumerate the various versions of busses inside these devices, including the PCI bridge and the direct SIBA bridge found in MIPS chips. It also includes shared code for some bus operations (suspend, resume, etc); EEPROM/SROM/etc parsing and other things that are shared between chips. Eventually this'll replace the code that bwi/bwn uses for the internal bus, as well as some apparently upcoming mips74k broadcom SoC support which uses bwn! Thanks to Landon Fuller <landonf@landonf.org> for all this work! Obtained from: https://github.com/landonf/freebsd/compare/user/landonf/bcm4331-CURRENT
2016-02-26 03:34:08 +00:00
}
static int
siba_nexus_attach(device_t dev)
{
Switch mips/sentry5 to bhnd(4), and unify with mips/broadcom Now that bhnd(4) provides feature parity with the previous siba/mips implementation, we can switch sentry5 over and begin lifting common support code out for use across bhnd(4) embedded targets. Changes: - Fixed enumeration of siba(4) per-core address maps, required for discovery of memory mapped chipc flash region on siba(4) devices. - Simplified bhnd kernel configuration (dropped 'bhndbus' option). - Replaced files.broadcom's direct file references with their corresponding standard kernel options. - Lifted out common bcma/siba nexus support, inheriting from the new generic bhnd_nexus driver. - Dropped now-unused sentry5 siba code. - Re-integrated BCM into the universe build now that it actually compiles. Approved by: adrian (mentor) Differential Revision: https://reviews.freebsd.org/D6712
2016-06-04 19:53:47 +00:00
int error;
Bring over the initial rewrite of the broadcom bus support found in their SoCs and various chips (including, famously, their wifi chips.) This is "just" (all 20,000 lines of it) code to enumerate the various versions of busses inside these devices, including the PCI bridge and the direct SIBA bridge found in MIPS chips. It also includes shared code for some bus operations (suspend, resume, etc); EEPROM/SROM/etc parsing and other things that are shared between chips. Eventually this'll replace the code that bwi/bwn uses for the internal bus, as well as some apparently upcoming mips74k broadcom SoC support which uses bwn! Thanks to Landon Fuller <landonf@landonf.org> for all this work! Obtained from: https://github.com/landonf/freebsd/compare/user/landonf/bcm4331-CURRENT
2016-02-26 03:34:08 +00:00
Migrate bhndb(4) to the new bhnd_erom API. Adds support for probing and initializing bhndb(4) bridge state using the bhnd_erom API, ensuring that full bridge configuration is available *prior* to actually attaching and enumerating the bhnd(4) child device, allowing us to safely allocate bus-level agent/device resources during bhnd(4) bus enumeration. - Add a bhnd_erom_probe() method usable by bhndb(4). This is an analogue to the existing bhnd_erom_probe_static() method, and allows the bhndb bridge to discover the best available erom parser class prior to newbus probing of its children. - Add support for supplying identification hints when probing erom devices. This is required on early EXTIF-only chipsets, where chip identification registers are not available. - Migrate bhndb over to the new bhnd_erom API, using bhnd_core_info records rather than bridged bhnd(4) device_t references to determine the bridged chipsets' capability/bridge configuration. - The bhndb parent (e.g. if_bwn) is now required to supply a hardware priority table to the bridge. The default table is currently sufficient for our supported devices. - Drop the two-pass attach approach we used for compatibility with bhndb(4) in the bhnd(4) bus drivers, and instead perform bus enumeration immediately, and allocate bridged per-child bus-level resources during that enumeration. Approved by: adrian (mentor) Differential Revision: https://reviews.freebsd.org/D7768
2016-09-04 00:58:19 +00:00
/* Perform initial attach and enumerate our children. */
if ((error = siba_attach(dev)))
bhnd(4): extend the PMU APIs to support bwn(4) The bwn(4) driver requires a number of extensions to the bhnd(4) PMU interface to support external configuration of PLLs, LDOs, and other parameters that require chipset or PHY-specific workarounds. These changes add support for: - Writing raw voltage register values to PHY-specific LDO regulator registers (required by LP-PHY). - Enabling/disabling PHY-specific LDOs (required by LP-PHY) - Writing to arbitrary PMU chipctrl registers (required for common PHY PLL reset support). - Requesting chipset/PLL-specific spurious signal avoidance modes. - Querying clock frequency and latency. Additionally, rather than updating legacy PWRCTL support to conform to the new PMU interface: - PWRCTL API is now provided by a bhnd_pwrctl_if.m interface. - Since PWRCTL is only found in older SSB-based chipsets, translation from bhnd(4) bus APIs to corresponding PWRCTL operations is now handled entirely within the siba(4) driver. - The PWRCTL-specific host bridge clock gating APIs in bhnd_bus_if.m have been lifted out into a standalone bhnd_pwrctl_hostb_if.m interface. Approved by: adrian (mentor, implicit) Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D12664
2017-11-22 20:27:46 +00:00
return (error);
Bring over the initial rewrite of the broadcom bus support found in their SoCs and various chips (including, famously, their wifi chips.) This is "just" (all 20,000 lines of it) code to enumerate the various versions of busses inside these devices, including the PCI bridge and the direct SIBA bridge found in MIPS chips. It also includes shared code for some bus operations (suspend, resume, etc); EEPROM/SROM/etc parsing and other things that are shared between chips. Eventually this'll replace the code that bwi/bwn uses for the internal bus, as well as some apparently upcoming mips74k broadcom SoC support which uses bwn! Thanks to Landon Fuller <landonf@landonf.org> for all this work! Obtained from: https://github.com/landonf/freebsd/compare/user/landonf/bcm4331-CURRENT
2016-02-26 03:34:08 +00:00
Migrate bhndb(4) to the new bhnd_erom API. Adds support for probing and initializing bhndb(4) bridge state using the bhnd_erom API, ensuring that full bridge configuration is available *prior* to actually attaching and enumerating the bhnd(4) child device, allowing us to safely allocate bus-level agent/device resources during bhnd(4) bus enumeration. - Add a bhnd_erom_probe() method usable by bhndb(4). This is an analogue to the existing bhnd_erom_probe_static() method, and allows the bhndb bridge to discover the best available erom parser class prior to newbus probing of its children. - Add support for supplying identification hints when probing erom devices. This is required on early EXTIF-only chipsets, where chip identification registers are not available. - Migrate bhndb over to the new bhnd_erom API, using bhnd_core_info records rather than bridged bhnd(4) device_t references to determine the bridged chipsets' capability/bridge configuration. - The bhndb parent (e.g. if_bwn) is now required to supply a hardware priority table to the bridge. The default table is currently sufficient for our supported devices. - Drop the two-pass attach approach we used for compatibility with bhndb(4) in the bhnd(4) bus drivers, and instead perform bus enumeration immediately, and allocate bridged per-child bus-level resources during that enumeration. Approved by: adrian (mentor) Differential Revision: https://reviews.freebsd.org/D7768
2016-09-04 00:58:19 +00:00
/* Delegate remainder to standard bhnd method implementation */
if ((error = bhnd_generic_attach(dev)))
goto failed;
return (0);
Bring over the initial rewrite of the broadcom bus support found in their SoCs and various chips (including, famously, their wifi chips.) This is "just" (all 20,000 lines of it) code to enumerate the various versions of busses inside these devices, including the PCI bridge and the direct SIBA bridge found in MIPS chips. It also includes shared code for some bus operations (suspend, resume, etc); EEPROM/SROM/etc parsing and other things that are shared between chips. Eventually this'll replace the code that bwi/bwn uses for the internal bus, as well as some apparently upcoming mips74k broadcom SoC support which uses bwn! Thanks to Landon Fuller <landonf@landonf.org> for all this work! Obtained from: https://github.com/landonf/freebsd/compare/user/landonf/bcm4331-CURRENT
2016-02-26 03:34:08 +00:00
Migrate bhndb(4) to the new bhnd_erom API. Adds support for probing and initializing bhndb(4) bridge state using the bhnd_erom API, ensuring that full bridge configuration is available *prior* to actually attaching and enumerating the bhnd(4) child device, allowing us to safely allocate bus-level agent/device resources during bhnd(4) bus enumeration. - Add a bhnd_erom_probe() method usable by bhndb(4). This is an analogue to the existing bhnd_erom_probe_static() method, and allows the bhndb bridge to discover the best available erom parser class prior to newbus probing of its children. - Add support for supplying identification hints when probing erom devices. This is required on early EXTIF-only chipsets, where chip identification registers are not available. - Migrate bhndb over to the new bhnd_erom API, using bhnd_core_info records rather than bridged bhnd(4) device_t references to determine the bridged chipsets' capability/bridge configuration. - The bhndb parent (e.g. if_bwn) is now required to supply a hardware priority table to the bridge. The default table is currently sufficient for our supported devices. - Drop the two-pass attach approach we used for compatibility with bhndb(4) in the bhnd(4) bus drivers, and instead perform bus enumeration immediately, and allocate bridged per-child bus-level resources during that enumeration. Approved by: adrian (mentor) Differential Revision: https://reviews.freebsd.org/D7768
2016-09-04 00:58:19 +00:00
failed:
bhnd(4): extend the PMU APIs to support bwn(4) The bwn(4) driver requires a number of extensions to the bhnd(4) PMU interface to support external configuration of PLLs, LDOs, and other parameters that require chipset or PHY-specific workarounds. These changes add support for: - Writing raw voltage register values to PHY-specific LDO regulator registers (required by LP-PHY). - Enabling/disabling PHY-specific LDOs (required by LP-PHY) - Writing to arbitrary PMU chipctrl registers (required for common PHY PLL reset support). - Requesting chipset/PLL-specific spurious signal avoidance modes. - Querying clock frequency and latency. Additionally, rather than updating legacy PWRCTL support to conform to the new PMU interface: - PWRCTL API is now provided by a bhnd_pwrctl_if.m interface. - Since PWRCTL is only found in older SSB-based chipsets, translation from bhnd(4) bus APIs to corresponding PWRCTL operations is now handled entirely within the siba(4) driver. - The PWRCTL-specific host bridge clock gating APIs in bhnd_bus_if.m have been lifted out into a standalone bhnd_pwrctl_hostb_if.m interface. Approved by: adrian (mentor, implicit) Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D12664
2017-11-22 20:27:46 +00:00
siba_detach(dev);
Migrate bhndb(4) to the new bhnd_erom API. Adds support for probing and initializing bhndb(4) bridge state using the bhnd_erom API, ensuring that full bridge configuration is available *prior* to actually attaching and enumerating the bhnd(4) child device, allowing us to safely allocate bus-level agent/device resources during bhnd(4) bus enumeration. - Add a bhnd_erom_probe() method usable by bhndb(4). This is an analogue to the existing bhnd_erom_probe_static() method, and allows the bhndb bridge to discover the best available erom parser class prior to newbus probing of its children. - Add support for supplying identification hints when probing erom devices. This is required on early EXTIF-only chipsets, where chip identification registers are not available. - Migrate bhndb over to the new bhnd_erom API, using bhnd_core_info records rather than bridged bhnd(4) device_t references to determine the bridged chipsets' capability/bridge configuration. - The bhndb parent (e.g. if_bwn) is now required to supply a hardware priority table to the bridge. The default table is currently sufficient for our supported devices. - Drop the two-pass attach approach we used for compatibility with bhndb(4) in the bhnd(4) bus drivers, and instead perform bus enumeration immediately, and allocate bridged per-child bus-level resources during that enumeration. Approved by: adrian (mentor) Differential Revision: https://reviews.freebsd.org/D7768
2016-09-04 00:58:19 +00:00
return (error);
Bring over the initial rewrite of the broadcom bus support found in their SoCs and various chips (including, famously, their wifi chips.) This is "just" (all 20,000 lines of it) code to enumerate the various versions of busses inside these devices, including the PCI bridge and the direct SIBA bridge found in MIPS chips. It also includes shared code for some bus operations (suspend, resume, etc); EEPROM/SROM/etc parsing and other things that are shared between chips. Eventually this'll replace the code that bwi/bwn uses for the internal bus, as well as some apparently upcoming mips74k broadcom SoC support which uses bwn! Thanks to Landon Fuller <landonf@landonf.org> for all this work! Obtained from: https://github.com/landonf/freebsd/compare/user/landonf/bcm4331-CURRENT
2016-02-26 03:34:08 +00:00
}
static device_method_t siba_nexus_methods[] = {
/* Device interface */
Switch mips/sentry5 to bhnd(4), and unify with mips/broadcom Now that bhnd(4) provides feature parity with the previous siba/mips implementation, we can switch sentry5 over and begin lifting common support code out for use across bhnd(4) embedded targets. Changes: - Fixed enumeration of siba(4) per-core address maps, required for discovery of memory mapped chipc flash region on siba(4) devices. - Simplified bhnd kernel configuration (dropped 'bhndbus' option). - Replaced files.broadcom's direct file references with their corresponding standard kernel options. - Lifted out common bcma/siba nexus support, inheriting from the new generic bhnd_nexus driver. - Dropped now-unused sentry5 siba code. - Re-integrated BCM into the universe build now that it actually compiles. Approved by: adrian (mentor) Differential Revision: https://reviews.freebsd.org/D6712
2016-06-04 19:53:47 +00:00
DEVMETHOD(device_probe, siba_nexus_probe),
DEVMETHOD(device_attach, siba_nexus_attach),
Bring over the initial rewrite of the broadcom bus support found in their SoCs and various chips (including, famously, their wifi chips.) This is "just" (all 20,000 lines of it) code to enumerate the various versions of busses inside these devices, including the PCI bridge and the direct SIBA bridge found in MIPS chips. It also includes shared code for some bus operations (suspend, resume, etc); EEPROM/SROM/etc parsing and other things that are shared between chips. Eventually this'll replace the code that bwi/bwn uses for the internal bus, as well as some apparently upcoming mips74k broadcom SoC support which uses bwn! Thanks to Landon Fuller <landonf@landonf.org> for all this work! Obtained from: https://github.com/landonf/freebsd/compare/user/landonf/bcm4331-CURRENT
2016-02-26 03:34:08 +00:00
DEVMETHOD_END
};
Switch mips/sentry5 to bhnd(4), and unify with mips/broadcom Now that bhnd(4) provides feature parity with the previous siba/mips implementation, we can switch sentry5 over and begin lifting common support code out for use across bhnd(4) embedded targets. Changes: - Fixed enumeration of siba(4) per-core address maps, required for discovery of memory mapped chipc flash region on siba(4) devices. - Simplified bhnd kernel configuration (dropped 'bhndbus' option). - Replaced files.broadcom's direct file references with their corresponding standard kernel options. - Lifted out common bcma/siba nexus support, inheriting from the new generic bhnd_nexus driver. - Dropped now-unused sentry5 siba code. - Re-integrated BCM into the universe build now that it actually compiles. Approved by: adrian (mentor) Differential Revision: https://reviews.freebsd.org/D6712
2016-06-04 19:53:47 +00:00
DEFINE_CLASS_2(bhnd, siba_nexus_driver, siba_nexus_methods,
[mips/broadcom] Move MIPS-specific bhnd(4) nexus drivers to sys/mips/broadcom, and add MIPS/BCM4706-specific workaround to bhnd_nexus_is_hw_disabled() -- the BCM4706 low-cost package leaves secondary GMAC cores floating. Reviewed by: mizhka Approved by: adrian (mentor) Differential Revision: https://reviews.freebsd.org/D9499
2017-02-13 19:58:55 +00:00
sizeof(struct siba_softc), bhnd_nexus_driver, siba_driver);
Bring over the initial rewrite of the broadcom bus support found in their SoCs and various chips (including, famously, their wifi chips.) This is "just" (all 20,000 lines of it) code to enumerate the various versions of busses inside these devices, including the PCI bridge and the direct SIBA bridge found in MIPS chips. It also includes shared code for some bus operations (suspend, resume, etc); EEPROM/SROM/etc parsing and other things that are shared between chips. Eventually this'll replace the code that bwi/bwn uses for the internal bus, as well as some apparently upcoming mips74k broadcom SoC support which uses bwn! Thanks to Landon Fuller <landonf@landonf.org> for all this work! Obtained from: https://github.com/landonf/freebsd/compare/user/landonf/bcm4331-CURRENT
2016-02-26 03:34:08 +00:00
bhnd(4): Fix mips/broadcom core matching and bus pass order. Changes: - Fixed incorrect MIPS74k vendor ID in the bhnd core descriptor tables - Fixed MIPS core driver's matching against MIPS/MIPS33 cores. - Improved MIPS3302 core description. - Enabled BUS_PASS_BUS on the bhnd nexus drivers to allow early probing of the MIPS core. - Enabled BUS_PASS_CPU on the MIPS core driver to ensure correct attach order. - Disabled matching of the MIPS core driver on non-SoC devices. Reviewed by: Michael Zhilin <mizhka@gmail.com> Approved by: adrian (mentor) Differential Revision: https://reviews.freebsd.org/D6735
2016-06-08 21:38:51 +00:00
EARLY_DRIVER_MODULE(siba_nexus, nexus, siba_nexus_driver, bhnd_devclass, 0, 0,
BUS_PASS_BUS + BUS_PASS_ORDER_MIDDLE);
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