2013-10-22 15:29:59 +00:00
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/*-
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* Copyright (c) 2013 SRI International
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* All rights reserved.
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*
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* This software was developed by SRI International and the University of
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* Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237)
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* ("CTSRD"), as part of the DARPA CRASH research programme.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/kernel.h>
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#include <sys/lock.h>
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#include <sys/malloc.h>
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#include <sys/module.h>
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#include <sys/mutex.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <machine/bus.h>
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#include <machine/intr_machdep.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <dev/fdt/fdt_common.h>
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#include "fdt_ic_if.h"
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struct beripic_softc;
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static uint64_t bp_read_cfg(struct beripic_softc *, int);
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static void bp_write_cfg(struct beripic_softc *, int, uint64_t);
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static void bp_detach_resources(device_t);
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static char *bp_strconfig(uint64_t, char *, size_t);
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static void bp_config_source(device_t, int, int, u_long, u_long);
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#ifdef __mips__
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static void bp_set_counter_name(device_t, device_t, int);
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#endif
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static int beripic_fdt_probe(device_t);
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static int beripic_fdt_attach(device_t);
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static int beripic_activate_intr(device_t, struct resource *);
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static struct resource *
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beripic_alloc_intr(device_t, device_t, int *, u_long, u_int);
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static int beripic_config_intr(device_t, int, enum intr_trigger,
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enum intr_polarity);
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static int beripic_release_intr(device_t, struct resource *);
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static int beripic_setup_intr(device_t, device_t, struct resource *,
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int, driver_filter_t *, driver_intr_t *, void *, void **);
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static int beripic_teardown_intr(device_t, device_t, struct resource *,
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void *);
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static int beripic_filter(void *);
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static void beripic_intr(void *);
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#define BP_MAX_HARD_IRQS 6
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#define BP_FIRST_SOFT 64
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struct beripic_softc {
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device_t bp_dev;
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struct resource *bp_cfg_res;
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struct resource *bp_read_res;
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struct resource *bp_set_res;
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struct resource *bp_clear_res;
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int bp_cfg_rid;
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int bp_read_rid;
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int bp_set_rid;
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int bp_clear_rid;
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bus_space_tag_t bp_cfg_bst;
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bus_space_tag_t bp_read_bst;
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bus_space_tag_t bp_set_bst;
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bus_space_tag_t bp_clear_bst;
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bus_space_handle_t bp_cfg_bsh;
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bus_space_handle_t bp_read_bsh;
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bus_space_handle_t bp_set_bsh;
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bus_space_handle_t bp_clear_bsh;
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struct resource *bp_irqs[BP_MAX_HARD_IRQS];
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int bp_irq_rids[BP_MAX_HARD_IRQS];
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int bp_nirqs;
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int bp_next_irq;
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int bp_next_tid;
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int bp_nthreads;
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int bp_nhard;
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int bp_nsoft;
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int bp_nsrcs;
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struct rman bp_src_rman;
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#ifdef __mips__
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mips_intrcnt_t *bp_counters;
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#endif
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struct mtx bp_cfgmtx;
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};
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struct beripic_intr_arg {
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driver_filter_t *filter;
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driver_intr_t *intr;
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void *arg;
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struct resource *irq;
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#ifdef __mips__
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mips_intrcnt_t counter;
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#endif
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};
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struct beripic_cookie {
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struct beripic_intr_arg *bpia;
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struct resource *hirq;
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void *cookie;
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};
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#define BP_CFG_MASK_E 0x80000000ull
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#define BP_CFG_SHIFT_E 31
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#define BP_CFG_MASK_TID 0x7FFFFF00ull /* Depends on CPU */
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#define BP_CFG_SHIFT_TID 8
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#define BP_CFG_MASK_IRQ 0x0000000Full
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#define BP_CFG_SHIFT_IRQ 0
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#define BP_CFG_VALID (BP_CFG_MASK_E|BP_CFG_MASK_TID|BP_CFG_MASK_IRQ)
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#define BP_CFG_RESERVED ~BP_CFG_VALID
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#define BP_CFG_ENABLED(cfg) (((cfg) & BP_CFG_MASK_E) >> BP_CFG_SHIFT_E)
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#define BP_CFG_TID(cfg) (((cfg) & BP_CFG_MASK_TID) >> BP_CFG_SHIFT_TID)
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#define BP_CFG_IRQ(cfg) (((cfg) & BP_CFG_MASK_IRQ) >> BP_CFG_SHIFT_IRQ)
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MALLOC_DEFINE(M_BERIPIC, "beripic", "beripic memory");
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static uint64_t
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bp_read_cfg(struct beripic_softc *sc, int irq)
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{
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KASSERT((irq >= 0 && irq < sc->bp_nsrcs),
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("IRQ of of range %d (0-%d)", irq, sc->bp_nsrcs - 1));
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return (bus_space_read_8(sc->bp_cfg_bst, sc->bp_cfg_bsh, irq * 8));
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}
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static void
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bp_write_cfg(struct beripic_softc *sc, int irq, uint64_t config)
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{
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KASSERT((irq >= 0 && irq < sc->bp_nsrcs),
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("IRQ of of range %d (0-%d)", irq, sc->bp_nsrcs - 1));
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bus_space_write_8(sc->bp_cfg_bst, sc->bp_cfg_bsh, irq * 8, config);
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}
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static void
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bp_detach_resources(device_t dev)
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{
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struct beripic_softc *sc;
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int i;
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sc = device_get_softc(dev);
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if (sc->bp_cfg_res != NULL) {
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bus_release_resource(dev, SYS_RES_MEMORY, sc->bp_cfg_rid,
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sc->bp_cfg_res);
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sc->bp_cfg_res = NULL;
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}
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if (sc->bp_read_res != NULL) {
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bus_release_resource(dev, SYS_RES_MEMORY, sc->bp_read_rid,
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sc->bp_read_res);
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sc->bp_read_res = NULL;
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}
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if (sc->bp_set_res != NULL) {
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bus_release_resource(dev, SYS_RES_MEMORY, sc->bp_set_rid,
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sc->bp_set_res);
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sc->bp_set_res = NULL;
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}
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if (sc->bp_clear_res != NULL) {
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bus_release_resource(dev, SYS_RES_MEMORY, sc->bp_clear_rid,
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sc->bp_clear_res);
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sc->bp_clear_res = NULL;
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}
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for (i = sc->bp_nirqs - 1; i >= 0; i--) {
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bus_release_resource(dev, SYS_RES_IRQ, sc->bp_irq_rids[i],
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sc->bp_irqs[i]);
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}
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sc->bp_nirqs = 0;
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}
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static char *
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bp_strconfig(uint64_t config, char *configstr, size_t len)
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{
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if (snprintf(configstr, len, "%s tid: %llu hardintr %llu",
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BP_CFG_ENABLED(config) ? "enabled" : "disabled",
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BP_CFG_TID(config), BP_CFG_IRQ(config)) > len - 1)
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return (NULL);
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return (configstr);
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}
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static void
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bp_config_source(device_t ic, int src, int enable, u_long tid, u_long irq)
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{
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struct beripic_softc *sc;
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uint64_t config;
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sc = device_get_softc(ic);
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config = 0;
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config |= enable << BP_CFG_SHIFT_E;
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config |= tid << BP_CFG_SHIFT_TID;
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config |= irq << BP_CFG_SHIFT_IRQ;
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bp_write_cfg(sc, src, config);
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}
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#ifdef __mips__
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static void
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bp_set_counter_name(device_t ic, device_t child, int src)
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{
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struct beripic_softc *sc;
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char name[MAXCOMLEN + 1];
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sc = device_get_softc(ic);
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if (snprintf(name, sizeof(name), "bp%dsrc%d%s%s%s",
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device_get_unit(ic), src, src < sc->bp_nhard ? "" : "s",
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child == NULL ? "" : " ",
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child == NULL ? " " : device_get_nameunit(child)) >= sizeof(name))
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name[sizeof(name) - 2] = '+';
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mips_intrcnt_setname(sc->bp_counters[src], name);
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}
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#endif
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static int
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beripic_fdt_probe(device_t dev)
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{
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2014-02-02 19:17:28 +00:00
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if (!ofw_bus_status_okay(dev))
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return (ENXIO);
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2013-10-22 15:29:59 +00:00
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if (!ofw_bus_is_compatible(dev, "sri-cambridge,beri-pic"))
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return (ENXIO);
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device_set_desc(dev, "BERI Programmable Interrupt Controller");
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return (BUS_PROBE_DEFAULT);
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}
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static int
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beripic_fdt_attach(device_t dev)
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{
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char configstr[64];
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struct beripic_softc *sc;
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struct fdt_ic *fic;
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pcell_t nhard, nsoft;
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phandle_t ph;
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int error, i, src;
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uint64_t config;
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sc = device_get_softc(dev);
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sc->bp_dev = dev;
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mtx_init(&sc->bp_cfgmtx, "beripic config lock", NULL, MTX_DEF);
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/*
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* FDT lists CONFIG, IP_READ, IP_SET, and IP_CLEAR registers as
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* seperate memory regions in that order.
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*/
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sc->bp_cfg_rid = 0;
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sc->bp_cfg_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
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&sc->bp_cfg_rid, RF_ACTIVE);
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if (sc->bp_cfg_res == NULL) {
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device_printf(dev, "failed to map config memory");
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error = ENXIO;
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goto err;
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}
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if (bootverbose)
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device_printf(sc->bp_dev, "config region at mem %p-%p\n",
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(void *)rman_get_start(sc->bp_cfg_res),
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(void *)(rman_get_start(sc->bp_cfg_res) +
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rman_get_size(sc->bp_cfg_res)));
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sc->bp_read_rid = 1;
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sc->bp_read_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
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&sc->bp_read_rid, RF_ACTIVE);
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if (sc->bp_read_res == NULL) {
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device_printf(dev, "failed to map IP read memory");
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error = ENXIO;
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goto err;
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}
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if (bootverbose)
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device_printf(sc->bp_dev, "IP read region at mem %p-%p\n",
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(void *)rman_get_start(sc->bp_read_res),
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(void *)(rman_get_start(sc->bp_read_res) +
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rman_get_size(sc->bp_read_res)));
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sc->bp_set_rid = 2;
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sc->bp_set_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
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&sc->bp_set_rid, RF_ACTIVE);
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if (sc->bp_set_res == NULL) {
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device_printf(dev, "failed to map IP read memory");
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error = ENXIO;
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goto err;
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}
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if (bootverbose)
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device_printf(sc->bp_dev, "IP set region at mem %p-%p\n",
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(void *)rman_get_start(sc->bp_set_res),
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(void *)(rman_get_start(sc->bp_set_res) +
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rman_get_size(sc->bp_set_res)));
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sc->bp_clear_rid = 3;
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sc->bp_clear_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
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&sc->bp_clear_rid, RF_ACTIVE);
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if (sc->bp_clear_res == NULL) {
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device_printf(dev, "failed to map IP read memory");
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error = ENXIO;
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goto err;
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}
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if (bootverbose)
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device_printf(sc->bp_dev, "IP clear region at mem %p-%p\n",
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(void *)rman_get_start(sc->bp_clear_res),
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(void *)(rman_get_start(sc->bp_clear_res) +
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rman_get_size(sc->bp_clear_res)));
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i = 0;
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for (i = 0; i < BP_MAX_HARD_IRQS; i++) {
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sc->bp_irq_rids[i] = i;
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|
|
sc->bp_irqs[i] = bus_alloc_resource_any(dev, SYS_RES_IRQ,
|
|
|
|
&sc->bp_irq_rids[i], RF_ACTIVE | RF_SHAREABLE);
|
|
|
|
if (sc->bp_irqs[i] == NULL)
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
if (i == 0) {
|
|
|
|
device_printf(dev, "failed to allocate any parent IRQs!");
|
|
|
|
error = ENXIO;
|
|
|
|
goto err;
|
|
|
|
}
|
|
|
|
sc->bp_nirqs = i;
|
|
|
|
|
|
|
|
ph = ofw_bus_gen_get_node(device_get_parent(dev), dev);
|
|
|
|
|
|
|
|
#ifndef SMP
|
|
|
|
sc->bp_nthreads = 1;
|
|
|
|
#else
|
|
|
|
sc->bp_nthreads = 1;
|
|
|
|
/* XXX: get nthreads from cpu(s) somehow */
|
|
|
|
#endif
|
|
|
|
|
|
|
|
if (OF_getprop(ph, "hard-interrupt-sources", &nhard, sizeof(nhard))
|
|
|
|
<= 0) {
|
|
|
|
device_printf(dev, "failed to get number of hard sources");
|
|
|
|
error = ENXIO;
|
|
|
|
goto err;
|
|
|
|
}
|
|
|
|
if (OF_getprop(ph, "soft-interrupt-sources", &nsoft, sizeof(nsoft))
|
|
|
|
<= 0) {
|
|
|
|
device_printf(dev, "failed to get number of soft sources");
|
|
|
|
error = ENXIO;
|
|
|
|
goto err;
|
|
|
|
}
|
|
|
|
|
|
|
|
sc->bp_nhard = nhard;
|
|
|
|
sc->bp_nsoft = nsoft;
|
|
|
|
sc->bp_nsrcs = sc->bp_nhard + sc->bp_nsoft;
|
|
|
|
/* XXX: should deal with gap between hard and soft */
|
|
|
|
KASSERT(sc->bp_nhard <= BP_FIRST_SOFT,
|
|
|
|
("too many hard sources"));
|
|
|
|
KASSERT(rman_get_size(sc->bp_cfg_res) / 8 == sc->bp_nsrcs,
|
|
|
|
("config space size does not match sources"));
|
|
|
|
KASSERT(sc->bp_nhard % 64 == 0,
|
|
|
|
("Non-multiple of 64 intr counts not supported"));
|
|
|
|
KASSERT(sc->bp_nsoft % 64 == 0,
|
|
|
|
("Non-multiple of 64 intr counts not supported"));
|
|
|
|
if (bootverbose)
|
|
|
|
device_printf(dev, "%d hard and %d soft sources\n",
|
|
|
|
sc->bp_nhard, sc->bp_nsoft);
|
|
|
|
|
|
|
|
#ifdef __mips__
|
|
|
|
sc->bp_counters = malloc(sizeof(*sc->bp_counters) * sc->bp_nsrcs,
|
|
|
|
M_BERIPIC, M_WAITOK|M_ZERO);
|
|
|
|
for (i = 0; i < sc->bp_nsrcs; i++) {
|
|
|
|
sc->bp_counters[i] = mips_intrcnt_create("");
|
|
|
|
bp_set_counter_name(dev, NULL, i);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
sc->bp_src_rman.rm_start = 0;
|
|
|
|
sc->bp_src_rman.rm_end = sc->bp_nsrcs - 1;
|
|
|
|
sc->bp_src_rman.rm_type = RMAN_ARRAY;
|
|
|
|
sc->bp_src_rman.rm_descr = "Interrupt source";
|
|
|
|
if (rman_init(&(sc->bp_src_rman)) != 0 ||
|
|
|
|
rman_manage_region(&(sc->bp_src_rman), 0, sc->bp_nsrcs - 1) != 0) {
|
|
|
|
device_printf(dev, "Failed to set up sources rman");
|
|
|
|
error = ENXIO;
|
|
|
|
goto err;
|
|
|
|
}
|
|
|
|
|
|
|
|
sc->bp_cfg_bst = rman_get_bustag(sc->bp_cfg_res);
|
|
|
|
sc->bp_cfg_bsh = rman_get_bushandle(sc->bp_cfg_res);
|
|
|
|
sc->bp_read_bst = rman_get_bustag(sc->bp_read_res);
|
|
|
|
sc->bp_read_bsh = rman_get_bushandle(sc->bp_read_res);
|
|
|
|
sc->bp_set_bst = rman_get_bustag(sc->bp_set_res);
|
|
|
|
sc->bp_set_bsh = rman_get_bushandle(sc->bp_set_res);
|
|
|
|
sc->bp_clear_bst = rman_get_bustag(sc->bp_clear_res);
|
|
|
|
sc->bp_clear_bsh = rman_get_bushandle(sc->bp_clear_res);
|
|
|
|
|
|
|
|
for (src = 0; src < sc->bp_nsrcs; src++) {
|
|
|
|
config = bp_read_cfg(sc, src);
|
|
|
|
if (config == 0)
|
|
|
|
continue;
|
|
|
|
|
|
|
|
if (bootverbose) {
|
|
|
|
device_printf(dev, "initial config: src %d: %s\n", src,
|
|
|
|
bp_strconfig(config, configstr, sizeof(configstr)));
|
|
|
|
if (config & BP_CFG_RESERVED)
|
|
|
|
device_printf(dev,
|
|
|
|
"reserved bits not 0: 0x%016jx\n",
|
|
|
|
(uintmax_t) config);
|
|
|
|
}
|
|
|
|
|
|
|
|
bp_config_source(dev, src, 0, 0, 0);
|
|
|
|
}
|
|
|
|
|
|
|
|
fic = malloc(sizeof(*fic), M_BERIPIC, M_WAITOK|M_ZERO);
|
|
|
|
fic->iph = ph;
|
|
|
|
fic->dev = dev;
|
|
|
|
SLIST_INSERT_HEAD(&fdt_ic_list_head, fic, fdt_ics);
|
|
|
|
|
|
|
|
return (0);
|
|
|
|
err:
|
|
|
|
bp_detach_resources(dev);
|
|
|
|
|
|
|
|
return (error);
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct resource *
|
|
|
|
beripic_alloc_intr(device_t ic, device_t child, int *rid, u_long irq,
|
|
|
|
u_int flags)
|
|
|
|
{
|
|
|
|
struct beripic_softc *sc;
|
|
|
|
struct resource *rv;
|
|
|
|
|
|
|
|
sc = device_get_softc(ic);
|
|
|
|
|
|
|
|
rv = rman_reserve_resource(&(sc->bp_src_rman), irq, irq, 1, flags,
|
|
|
|
child);
|
|
|
|
if (rv == NULL)
|
|
|
|
printf("%s: could not reserve source interrupt for %s\n",
|
|
|
|
__func__, device_get_nameunit(child));
|
|
|
|
rman_set_rid(rv, *rid);
|
|
|
|
|
|
|
|
if ((flags & RF_ACTIVE) &&
|
|
|
|
beripic_activate_intr(ic, rv) != 0) {
|
|
|
|
printf("%s: could not activate interrupt\n", __func__);
|
|
|
|
rman_release_resource(rv);
|
|
|
|
return (NULL);
|
|
|
|
}
|
|
|
|
|
|
|
|
return (rv);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
beripic_release_intr(device_t ic, struct resource *r)
|
|
|
|
{
|
|
|
|
|
|
|
|
return (rman_release_resource(r));
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
beripic_activate_intr(device_t ic, struct resource *r)
|
|
|
|
{
|
|
|
|
|
|
|
|
return (rman_activate_resource(r));
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
beripic_deactivate_intr(device_t ic, struct resource *r)
|
|
|
|
{
|
|
|
|
|
|
|
|
return (rman_deactivate_resource(r));
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
beripic_config_intr(device_t dev, int irq, enum intr_trigger trig,
|
|
|
|
enum intr_polarity pol)
|
|
|
|
{
|
|
|
|
|
|
|
|
if (trig != INTR_TRIGGER_CONFORM || pol != INTR_POLARITY_CONFORM)
|
|
|
|
return (EINVAL);
|
|
|
|
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
beripic_setup_intr(device_t ic, device_t child, struct resource *irq,
|
|
|
|
int flags, driver_filter_t *filter, driver_intr_t *intr, void *arg,
|
|
|
|
void **cookiep)
|
|
|
|
{
|
|
|
|
struct beripic_softc *sc;
|
|
|
|
struct beripic_intr_arg *bpia;
|
|
|
|
struct beripic_cookie *bpc;
|
|
|
|
int error;
|
|
|
|
u_long hirq, src, tid;
|
|
|
|
|
|
|
|
sc = device_get_softc(ic);
|
|
|
|
|
|
|
|
src = rman_get_start(irq);
|
|
|
|
|
|
|
|
KASSERT(src < sc->bp_nsrcs, ("source (%lu) out of range 0-%d",
|
|
|
|
src, sc->bp_nsrcs - 1));
|
|
|
|
|
|
|
|
bpia = malloc(sizeof(*bpia), M_BERIPIC, M_WAITOK|M_ZERO);
|
|
|
|
bpia->filter = filter;
|
|
|
|
bpia->intr = intr;
|
|
|
|
bpia->arg = arg;
|
|
|
|
bpia->irq = irq;
|
|
|
|
#ifdef __mips__
|
|
|
|
bpia->counter = sc->bp_counters[src];
|
|
|
|
bp_set_counter_name(ic, child, src);
|
|
|
|
#endif
|
|
|
|
|
|
|
|
bpc = malloc(sizeof(*bpc), M_BERIPIC, M_WAITOK|M_ZERO);
|
|
|
|
bpc->bpia = bpia;
|
|
|
|
|
|
|
|
mtx_lock(&(sc->bp_cfgmtx));
|
|
|
|
bpc->hirq = sc->bp_irqs[sc->bp_next_irq];
|
|
|
|
hirq = rman_get_start(bpc->hirq);
|
|
|
|
tid = sc->bp_next_tid;
|
|
|
|
|
|
|
|
error = BUS_SETUP_INTR(device_get_parent(ic), ic, bpc->hirq, flags,
|
|
|
|
beripic_filter, intr == NULL ? NULL : beripic_intr, bpia,
|
|
|
|
&(bpc->cookie));
|
|
|
|
if (error != 0)
|
|
|
|
goto err;
|
|
|
|
|
|
|
|
#ifdef NOTYET
|
|
|
|
#ifdef SMP
|
|
|
|
/* XXX: bind ithread to cpu */
|
|
|
|
sc->bp_next_tid++;
|
|
|
|
if (sc->bp_next_tid >= sc->bp_nthreads)
|
|
|
|
sc->bp_next_tid = 0;
|
|
|
|
#endif
|
|
|
|
#endif
|
|
|
|
if (sc->bp_next_tid == 0) {
|
|
|
|
sc->bp_next_irq++;
|
|
|
|
if (sc->bp_next_irq >= sc->bp_nirqs)
|
|
|
|
sc->bp_next_irq = 0;
|
|
|
|
}
|
|
|
|
mtx_unlock(&(sc->bp_cfgmtx));
|
|
|
|
|
|
|
|
*cookiep = bpc;
|
|
|
|
|
|
|
|
bp_config_source(ic, rman_get_start(irq), 1, tid, hirq);
|
|
|
|
|
|
|
|
return (0);
|
|
|
|
err:
|
|
|
|
free(bpc, M_BERIPIC);
|
|
|
|
free(bpia, M_BERIPIC);
|
|
|
|
|
|
|
|
return (error);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
beripic_teardown_intr(device_t dev, device_t child, struct resource *irq,
|
|
|
|
void *cookie)
|
|
|
|
{
|
|
|
|
struct beripic_cookie *bpc;
|
|
|
|
int error;
|
|
|
|
|
|
|
|
bpc = cookie;
|
|
|
|
|
|
|
|
bp_config_source(dev, rman_get_start(irq), 0, 0, 0);
|
|
|
|
|
|
|
|
free(bpc->bpia, M_BERIPIC);
|
|
|
|
|
|
|
|
error = BUS_TEARDOWN_INTR(device_get_parent(dev), dev, bpc->hirq,
|
|
|
|
bpc->cookie);
|
|
|
|
|
|
|
|
free(bpc, M_BERIPIC);
|
|
|
|
|
|
|
|
return (error);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
beripic_filter(void *arg)
|
|
|
|
{
|
|
|
|
struct beripic_intr_arg *bpic;
|
|
|
|
|
|
|
|
bpic = arg;
|
|
|
|
|
|
|
|
#ifdef __mips__
|
|
|
|
mips_intrcnt_inc(bpic->counter);
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/* XXX: Add a check that our source is high */
|
|
|
|
|
|
|
|
if (bpic->filter == NULL)
|
|
|
|
return (FILTER_SCHEDULE_THREAD);
|
|
|
|
|
|
|
|
return (bpic->filter(bpic->arg));
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
beripic_intr(void *arg)
|
|
|
|
{
|
|
|
|
struct beripic_intr_arg *bpic;
|
|
|
|
|
|
|
|
bpic = arg;
|
|
|
|
|
|
|
|
KASSERT(bpic->intr != NULL,
|
|
|
|
("%s installed, but no child intr", __func__));
|
|
|
|
|
|
|
|
bpic->intr(bpic->arg);
|
|
|
|
}
|
|
|
|
|
|
|
|
#ifdef SMP
|
|
|
|
static void
|
|
|
|
beripic_setup_ipi(device_t ic, u_int tid, u_int ipi_irq)
|
|
|
|
{
|
|
|
|
|
|
|
|
bp_config_source(ic, BP_FIRST_SOFT + tid, 1, tid, ipi_irq);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
beripic_send_ipi(device_t ic, u_int tid)
|
|
|
|
{
|
|
|
|
struct beripic_softc *sc;
|
|
|
|
uint64_t bit;
|
|
|
|
|
|
|
|
sc = device_get_softc(ic);
|
|
|
|
|
|
|
|
KASSERT(tid < sc->bp_nsoft, ("tid (%d) too large\n", tid));
|
|
|
|
|
|
|
|
bit = 1ULL << (tid % 64);
|
|
|
|
bus_space_write_8(sc->bp_set_bst, sc->bp_set_bsh,
|
|
|
|
(BP_FIRST_SOFT / 8) + (tid / 64), bit);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
beripic_clear_ipi(device_t ic, u_int tid)
|
|
|
|
{
|
|
|
|
struct beripic_softc *sc;
|
|
|
|
uint64_t bit;
|
|
|
|
|
|
|
|
sc = device_get_softc(ic);
|
|
|
|
|
|
|
|
KASSERT(tid < sc->bp_nsoft, ("tid (%d) to large\n", tid));
|
|
|
|
|
|
|
|
bit = 1ULL << (tid % 64);
|
|
|
|
bus_space_write_8(sc->bp_clear_bst, sc->bp_clear_bsh,
|
|
|
|
(BP_FIRST_SOFT / 8) + (tid / 64), bit);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
devclass_t beripic_devclass;
|
|
|
|
|
|
|
|
static device_method_t beripic_fdt_methods[] = {
|
|
|
|
/* Device interface */
|
|
|
|
DEVMETHOD(device_probe, beripic_fdt_probe),
|
|
|
|
DEVMETHOD(device_attach, beripic_fdt_attach),
|
|
|
|
|
|
|
|
DEVMETHOD(fdt_ic_activate_intr, beripic_activate_intr),
|
|
|
|
DEVMETHOD(fdt_ic_alloc_intr, beripic_alloc_intr),
|
|
|
|
DEVMETHOD(fdt_ic_config_intr, beripic_config_intr),
|
|
|
|
DEVMETHOD(fdt_ic_deactivate_intr, beripic_deactivate_intr),
|
|
|
|
DEVMETHOD(fdt_ic_release_intr, beripic_release_intr),
|
|
|
|
DEVMETHOD(fdt_ic_setup_intr, beripic_setup_intr),
|
|
|
|
DEVMETHOD(fdt_ic_teardown_intr, beripic_teardown_intr),
|
|
|
|
|
|
|
|
#ifdef SMP
|
|
|
|
DEVMETHOD(fdt_ic_setup_ipi, beripic_setup_ipi),
|
|
|
|
DEVMETHOD(fdt_ic_clear_ipi, beripic_clear_ipi),
|
|
|
|
DEVMETHOD(fdt_ic_send_ipi, beripic_send_ipi),
|
|
|
|
#endif
|
|
|
|
|
|
|
|
{ 0, 0 },
|
|
|
|
};
|
|
|
|
|
|
|
|
static driver_t beripic_fdt_driver = {
|
|
|
|
"beripic",
|
|
|
|
beripic_fdt_methods,
|
|
|
|
sizeof(struct beripic_softc)
|
|
|
|
};
|
|
|
|
|
|
|
|
DRIVER_MODULE(beripic, simplebus, beripic_fdt_driver, beripic_devclass, 0, 0);
|