FreeBSD/mips port. The FreeBSD/mips port targets mips32, mips64,
mips32r2 and mips64r2 (and close relatives) processors. There
presently is support for ADMtek ADM5120, A mips 4Kc in a malta board,
the RB533 routerboard (based on IDT RC32434) and some preliminary
support for sibtye/broadcom designs. Other hardware support will be
forthcomcing.
This port boots multiuser under gxemul emulating the malta board and
also bootstraps on the hardware whose support is forthcoming...
Oleksandr Tymoshenko, Wojciech Koszek, Warner Losh, Olivier Houchard,
Randall Stewert and others that have contributed to the mips2 and/or
mips2-jnpr perforce branches. Juniper contirbuted a generic mips port
late in the life cycle of the misp2 branch. Warner Losh merged the
mips2 and Juniper code bases, and others list above have worked for
the past several months to get to multiuser.
In addition, the mips2 work owe a debt to the trail blazing efforts of
the original mips branch in perforce done by Juli Mallett.
2008-04-13 07:44:55 +00:00
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/*-
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* Copyright (c) 2005 Olivier Houchard. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/malloc.h>
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#include <sys/module.h>
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#include <sys/rman.h>
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#include <sys/types.h>
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#include <vm/vm.h>
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#include <vm/vm_kern.h>
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#include <vm/pmap.h>
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#include <vm/vm_page.h>
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#include <vm/vm_extern.h>
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#include <dev/ic/i8259.h>
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#include <machine/bus.h>
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#include <machine/intr_machdep.h>
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2008-09-10 03:49:08 +00:00
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#include <mips/malta/gtvar.h>
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FreeBSD/mips port. The FreeBSD/mips port targets mips32, mips64,
mips32r2 and mips64r2 (and close relatives) processors. There
presently is support for ADMtek ADM5120, A mips 4Kc in a malta board,
the RB533 routerboard (based on IDT RC32434) and some preliminary
support for sibtye/broadcom designs. Other hardware support will be
forthcomcing.
This port boots multiuser under gxemul emulating the malta board and
also bootstraps on the hardware whose support is forthcoming...
Oleksandr Tymoshenko, Wojciech Koszek, Warner Losh, Olivier Houchard,
Randall Stewert and others that have contributed to the mips2 and/or
mips2-jnpr perforce branches. Juniper contirbuted a generic mips port
late in the life cycle of the misp2 branch. Warner Losh merged the
mips2 and Juniper code bases, and others list above have worked for
the past several months to get to multiuser.
In addition, the mips2 work owe a debt to the trail blazing efforts of
the original mips branch in perforce done by Juli Mallett.
2008-04-13 07:44:55 +00:00
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static int
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gt_probe(device_t dev)
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{
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device_set_desc(dev, "GT64120 chip");
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return (0);
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}
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static void
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gt_identify(driver_t *drv, device_t parent)
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{
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BUS_ADD_CHILD(parent, 0, "gt", 0);
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}
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static int
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gt_attach(device_t dev)
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{
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struct gt_softc *sc = device_get_softc(dev);
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sc->dev = dev;
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device_add_child(dev, "pcib", 0);
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bus_generic_probe(dev);
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bus_generic_attach(dev);
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return (0);
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}
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static struct resource *
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gt_alloc_resource(device_t dev, device_t child, int type, int *rid,
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u_long start, u_long end, u_long count, u_int flags)
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{
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return (BUS_ALLOC_RESOURCE(device_get_parent(dev), child,
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type, rid, start, end, count, flags));
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}
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static int
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gt_setup_intr(device_t dev, device_t child,
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struct resource *ires, int flags, driver_filter_t *filt,
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driver_intr_t *intr, void *arg, void **cookiep)
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{
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return BUS_SETUP_INTR(device_get_parent(dev), child, ires, flags,
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filt, intr, arg, cookiep);
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}
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static int
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gt_teardown_intr(device_t dev, device_t child, struct resource *res,
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void *cookie)
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{
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return (BUS_TEARDOWN_INTR(device_get_parent(dev), child, res, cookie));
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}
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static int
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gt_activate_resource(device_t dev, device_t child, int type, int rid,
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struct resource *r)
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{
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return (BUS_ACTIVATE_RESOURCE(device_get_parent(dev), child,
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type, rid, r));
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}
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static device_method_t gt_methods[] = {
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DEVMETHOD(device_probe, gt_probe),
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DEVMETHOD(device_identify, gt_identify),
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DEVMETHOD(device_attach, gt_attach),
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DEVMETHOD(bus_setup_intr, gt_setup_intr),
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DEVMETHOD(bus_teardown_intr, gt_teardown_intr),
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DEVMETHOD(bus_alloc_resource, gt_alloc_resource),
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DEVMETHOD(bus_activate_resource, gt_activate_resource),
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DEVMETHOD(bus_print_child, bus_generic_print_child),
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{0, 0},
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};
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static driver_t gt_driver = {
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"gt",
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gt_methods,
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sizeof(struct gt_softc),
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};
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static devclass_t gt_devclass;
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DRIVER_MODULE(gt, nexus, gt_driver, gt_devclass, 0, 0);
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