2012-05-20 02:05:10 +00:00
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/*-
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* Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer,
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* without modification.
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* 2. Redistributions in binary form must reproduce at minimum a disclaimer
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* similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
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* redistribution must be conditioned upon including a substantially
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* similar Disclaimer requirement for further binary redistribution.
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*
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* NO WARRANTY
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
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* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
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* OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
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* IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
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* THE POSSIBILITY OF SUCH DAMAGES.
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*
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* $FreeBSD$
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*/
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#ifndef __IF_ATH_RX_H__
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#define __IF_ATH_RX_H__
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extern u_int32_t ath_calcrxfilter(struct ath_softc *sc);
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extern void ath_recv_mgmt(struct ieee80211_node *ni, struct mbuf *m,
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int subtype, int rssi, int nf);
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2012-07-03 06:59:12 +00:00
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#define ath_stoprecv(_sc, _dodelay) \
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(_sc)->sc_rx.recv_stop((_sc), (_dodelay))
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#define ath_startrecv(_sc) \
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(_sc)->sc_rx.recv_start((_sc))
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#define ath_rx_flush(_sc) \
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(_sc)->sc_rx.recv_flush((_sc))
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#define ath_rxbuf_init(_sc, _bf) \
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(_sc)->sc_rx.recv_rxbuf_init((_sc), (_bf))
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2012-07-09 08:37:59 +00:00
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#define ath_rxdma_setup(_sc) \
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(_sc)->sc_rx.recv_setup(_sc)
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#define ath_rxdma_teardown(_sc) \
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(_sc)->sc_rx.recv_teardown(_sc)
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2012-07-03 06:59:12 +00:00
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#if 0
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extern int ath_rxbuf_init(struct ath_softc *sc, struct ath_buf *bf);
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2012-05-20 02:05:10 +00:00
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extern void ath_rx_tasklet(void *arg, int npending);
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extern void ath_rx_proc(struct ath_softc *sc, int resched);
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extern void ath_stoprecv(struct ath_softc *sc, int dodelay);
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extern int ath_startrecv(struct ath_softc *sc);
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2012-07-03 06:59:12 +00:00
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#endif
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2012-07-10 00:02:19 +00:00
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extern int ath_rx_pkt(struct ath_softc *sc, struct ath_rx_status *rs,
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HAL_STATUS status, uint64_t tsf, int nf, HAL_RX_QUEUE qtype,
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Fix the busdma logic to work with EDMA chipsets when using bounce
buffers (ie, >4GB on amd64.)
The underlying problem was that PREREAD doesn't sync the mbuf
with the DMA memory (ie, bounce buffer), so the bounce buffer may
have had stale information. Thus it was always considering the
buffer completed and things just went off the rails.
This change does the following:
* Make ath_rx_pkt() always consume the mbuf somehow; it no longer
passes error mbufs (eg CRC errors, crypt errors, etc) back up
to the RX path to recycle. This means that a new mbuf is always
allocated each time, but it's cleaner.
* Push the RX buffer map/unmap to occur in the RX path, not
ath_rx_pkt(). Thus, ath_rx_pkt() now assumes (a) it has to consume
the mbuf somehow, and (b) that it's already been unmapped and
synced.
* For the legacy path, the descriptor isn't mapped, it comes out of
coherent, DMA memory anyway. So leave it there.
* For the EDMA path, the RX descriptor has to be cleared before
its passed to the hardware, so that when we check with
a POSTREAD sync, we actually get either a blank (not finished)
or a filled out descriptor (finished.) Otherwise we get stale
data in the DMA memory.
* .. so, for EDMA RX path, we need PREREAD|PREWRITE to sync the
data -> DMA memory, then POSTREAD|POSTWRITE to finish syncing
the DMA memory -> data.
* Whilst we're here, make sure that in EDMA buffer setup (ie,
bzero'ing the descriptor part) is done before the mbuf is
map/synched.
NOTE: there's been a lot of commits besides this one with regards to
tidying up the busdma handling in ath(4). Please check the recent
commit history.
Discussed with and thanks to: scottl
Tested:
* AR5416 (non-EDMA) on i386, with the DMA tag for the driver
set to 2^^30, not 2^^32, STA
* AR9580 (EDMA) on i386, as above, STA
* User - tested AR9380 on amd64 with 32GB RAM.
PR: kern/177530
2013-04-04 08:21:56 +00:00
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struct ath_buf *bf, struct mbuf *m);
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2012-07-10 00:02:19 +00:00
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2012-07-03 06:59:12 +00:00
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extern void ath_recv_setup_legacy(struct ath_softc *sc);
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2012-05-20 02:05:10 +00:00
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#endif
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