Bring over the initial QCA955x SoC support framework.
This is enough to bring up the basic SoC support.
What works thus far:
* The mips74k core, pll setup, and UART (or else well, stuff would
be really difficult..)
* both USB 2.0 EHCI controllers
* on-board 2GHz 3x3 wifi (the other variant has 2GHz/5GHz wifi on-chip);
* arge0 - not yet sure why arge1 isn't firing off interrupts and thus
handling traffic, but I will soon figure it out and fix it here.
Tested:
* AP135 reference design, QCA9558 SoC, pretending to be an 11n
2GHz AP.
TODO:
* There's an interrupt mux hooking up devices to IP2 and IP3 - but it's
not a read-and-clear or write-to-clear register. So, trying to use it
naively like I have been ends up with massive interrupt storms.
For now the things that share those interrupts can just take them as
shared interrupts and try to play nice.
* There's two PCIe root complexes /and/ one of them can actually be
a PCIe device endpoint. Yes, you heard right. I have to teach the
AR724x PCIe bridge code to handle multiple instances with multiple
memory/irq regions, and then there'll be RC support, but EP support
isn't on my TODO list.
* I'm not sure why arge1 isn't up and running. I'll go figure that
out soon and fix it here.
Thankyou to Qualcomm Atheros for providing me with hardware and
an abundance of documentation about these things.
2015-03-02 02:24:46 +00:00
|
|
|
#
|
|
|
|
|
# QCA955X_BASE -- Kernel configuration base file for the Qualcomm Atheros
|
|
|
|
|
# QCA955x SoC.
|
|
|
|
|
#
|
|
|
|
|
# This file (and the hints file accompanying it) are not designed to be
|
|
|
|
|
# used by themselves. Instead, users of this file should create a kernel
|
|
|
|
|
# config file which includes this file (which gets the basic hints), then
|
|
|
|
|
# override the default options (adding devices as needed) and adding
|
|
|
|
|
# hints as needed (for example, the GPIO and LAN PHY.)
|
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|
|
#
|
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|
|
|
# $FreeBSD$
|
|
|
|
|
#
|
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|
|
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|
|
|
machine mips mips
|
|
|
|
|
ident QCA955X_BASE
|
2016-02-02 07:47:38 +00:00
|
|
|
cpu CPU_MIPS74K
|
Bring over the initial QCA955x SoC support framework.
This is enough to bring up the basic SoC support.
What works thus far:
* The mips74k core, pll setup, and UART (or else well, stuff would
be really difficult..)
* both USB 2.0 EHCI controllers
* on-board 2GHz 3x3 wifi (the other variant has 2GHz/5GHz wifi on-chip);
* arge0 - not yet sure why arge1 isn't firing off interrupts and thus
handling traffic, but I will soon figure it out and fix it here.
Tested:
* AP135 reference design, QCA9558 SoC, pretending to be an 11n
2GHz AP.
TODO:
* There's an interrupt mux hooking up devices to IP2 and IP3 - but it's
not a read-and-clear or write-to-clear register. So, trying to use it
naively like I have been ends up with massive interrupt storms.
For now the things that share those interrupts can just take them as
shared interrupts and try to play nice.
* There's two PCIe root complexes /and/ one of them can actually be
a PCIe device endpoint. Yes, you heard right. I have to teach the
AR724x PCIe bridge code to handle multiple instances with multiple
memory/irq regions, and then there'll be RC support, but EP support
isn't on my TODO list.
* I'm not sure why arge1 isn't up and running. I'll go figure that
out soon and fix it here.
Thankyou to Qualcomm Atheros for providing me with hardware and
an abundance of documentation about these things.
2015-03-02 02:24:46 +00:00
|
|
|
makeoptions KERNLOADADDR=0x80050000
|
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|
|
options HZ=1000
|
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|
options BREAK_TO_DEBUGGER
|
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|
|
|
options ALT_BREAK_TO_DEBUGGER
|
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|
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|
|
|
|
# options BOOTVERBOSE=10
|
|
|
|
|
|
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|
|
files "../atheros/files.ar71xx"
|
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|
|
|
hints "QCA955X_BASE.hints"
|
|
|
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|
|
|
|
|
makeoptions DEBUG=-g #Build kernel with gdb(1) debug symbols
|
Huge cleanup of random(4) code.
* GENERAL
- Update copyright.
- Make kernel options for RANDOM_YARROW and RANDOM_DUMMY. Set
neither to ON, which means we want Fortuna
- If there is no 'device random' in the kernel, there will be NO
random(4) device in the kernel, and the KERN_ARND sysctl will
return nothing. With RANDOM_DUMMY there will be a random(4) that
always blocks.
- Repair kern.arandom (KERN_ARND sysctl). The old version went
through arc4random(9) and was a bit weird.
- Adjust arc4random stirring a bit - the existing code looks a little
suspect.
- Fix the nasty pre- and post-read overloading by providing explictit
functions to do these tasks.
- Redo read_random(9) so as to duplicate random(4)'s read internals.
This makes it a first-class citizen rather than a hack.
- Move stuff out of locked regions when it does not need to be
there.
- Trim RANDOM_DEBUG printfs. Some are excess to requirement, some
behind boot verbose.
- Use SYSINIT to sequence the startup.
- Fix init/deinit sysctl stuff.
- Make relevant sysctls also tunables.
- Add different harvesting "styles" to allow for different requirements
(direct, queue, fast).
- Add harvesting of FFS atime events. This needs to be checked for
weighing down the FS code.
- Add harvesting of slab allocator events. This needs to be checked for
weighing down the allocator code.
- Fix the random(9) manpage.
- Loadable modules are not present for now. These will be re-engineered
when the dust settles.
- Use macros for locks.
- Fix comments.
* src/share/man/...
- Update the man pages.
* src/etc/...
- The startup/shutdown work is done in D2924.
* src/UPDATING
- Add UPDATING announcement.
* src/sys/dev/random/build.sh
- Add copyright.
- Add libz for unit tests.
* src/sys/dev/random/dummy.c
- Remove; no longer needed. Functionality incorporated into randomdev.*.
* live_entropy_sources.c live_entropy_sources.h
- Remove; content moved.
- move content to randomdev.[ch] and optimise.
* src/sys/dev/random/random_adaptors.c src/sys/dev/random/random_adaptors.h
- Remove; plugability is no longer used. Compile-time algorithm
selection is the way to go.
* src/sys/dev/random/random_harvestq.c src/sys/dev/random/random_harvestq.h
- Add early (re)boot-time randomness caching.
* src/sys/dev/random/randomdev_soft.c src/sys/dev/random/randomdev_soft.h
- Remove; no longer needed.
* src/sys/dev/random/uint128.h
- Provide a fake uint128_t; if a real one ever arrived, we can use
that instead. All that is needed here is N=0, N++, N==0, and some
localised trickery is used to manufacture a 128-bit 0ULLL.
* src/sys/dev/random/unit_test.c src/sys/dev/random/unit_test.h
- Improve unit tests; previously the testing human needed clairvoyance;
now the test will do a basic check of compressibility. Clairvoyant
talent is still a good idea.
- This is still a long way off a proper unit test.
* src/sys/dev/random/fortuna.c src/sys/dev/random/fortuna.h
- Improve messy union to just uint128_t.
- Remove unneeded 'static struct fortuna_start_cache'.
- Tighten up up arithmetic.
- Provide a method to allow eternal junk to be introduced; harden
it against blatant by compress/hashing.
- Assert that locks are held correctly.
- Fix the nasty pre- and post-read overloading by providing explictit
functions to do these tasks.
- Turn into self-sufficient module (no longer requires randomdev_soft.[ch])
* src/sys/dev/random/yarrow.c src/sys/dev/random/yarrow.h
- Improve messy union to just uint128_t.
- Remove unneeded 'staic struct start_cache'.
- Tighten up up arithmetic.
- Provide a method to allow eternal junk to be introduced; harden
it against blatant by compress/hashing.
- Assert that locks are held correctly.
- Fix the nasty pre- and post-read overloading by providing explictit
functions to do these tasks.
- Turn into self-sufficient module (no longer requires randomdev_soft.[ch])
- Fix some magic numbers elsewhere used as FAST and SLOW.
Differential Revision: https://reviews.freebsd.org/D2025
Reviewed by: vsevolod,delphij,rwatson,trasz,jmg
Approved by: so (delphij)
2015-06-30 17:00:45 +00:00
|
|
|
# makeoptions MODULES_OVERRIDE="gpio ar71xx if_gif if_gre if_bridge bridgestp usb wlan wlan_xauth wlan_acl wlan_wep wlan_tkip wlan_ccmp wlan_rssadapt wlan_amrr ath ath_ahb hwpmc"
|
2015-05-19 05:41:00 +00:00
|
|
|
makeoptions MODULES_OVERRIDE="if_vlan ipfw if_gre if_gif if_bridge bridgestp"
|
Bring over the initial QCA955x SoC support framework.
This is enough to bring up the basic SoC support.
What works thus far:
* The mips74k core, pll setup, and UART (or else well, stuff would
be really difficult..)
* both USB 2.0 EHCI controllers
* on-board 2GHz 3x3 wifi (the other variant has 2GHz/5GHz wifi on-chip);
* arge0 - not yet sure why arge1 isn't firing off interrupts and thus
handling traffic, but I will soon figure it out and fix it here.
Tested:
* AP135 reference design, QCA9558 SoC, pretending to be an 11n
2GHz AP.
TODO:
* There's an interrupt mux hooking up devices to IP2 and IP3 - but it's
not a read-and-clear or write-to-clear register. So, trying to use it
naively like I have been ends up with massive interrupt storms.
For now the things that share those interrupts can just take them as
shared interrupts and try to play nice.
* There's two PCIe root complexes /and/ one of them can actually be
a PCIe device endpoint. Yes, you heard right. I have to teach the
AR724x PCIe bridge code to handle multiple instances with multiple
memory/irq regions, and then there'll be RC support, but EP support
isn't on my TODO list.
* I'm not sure why arge1 isn't up and running. I'll go figure that
out soon and fix it here.
Thankyou to Qualcomm Atheros for providing me with hardware and
an abundance of documentation about these things.
2015-03-02 02:24:46 +00:00
|
|
|
|
|
|
|
|
options DDB
|
|
|
|
|
options KDB
|
|
|
|
|
options ALQ
|
|
|
|
|
|
|
|
|
|
options SCHED_4BSD #4BSD scheduler
|
|
|
|
|
options INET #InterNETworking
|
|
|
|
|
#options INET6 #InterNETworking
|
|
|
|
|
#options NFSCL #Network Filesystem Client
|
|
|
|
|
options PSEUDOFS #Pseudo-filesystem framework
|
|
|
|
|
options _KPOSIX_PRIORITY_SCHEDULING #Posix P1003_1B real-time extensions
|
|
|
|
|
|
|
|
|
|
# Don't include the SCSI/CAM strings in the default build
|
|
|
|
|
options SCSI_NO_SENSE_STRINGS
|
|
|
|
|
options SCSI_NO_OP_STRINGS
|
|
|
|
|
|
|
|
|
|
# .. And no sysctl strings
|
|
|
|
|
options NO_SYSCTL_DESCR
|
|
|
|
|
|
|
|
|
|
# Limit IO size
|
|
|
|
|
options NBUF=128
|
|
|
|
|
|
|
|
|
|
# Limit UMTX hash size
|
|
|
|
|
# options UMTX_NUM_CHAINS=64
|
|
|
|
|
|
2015-05-19 05:41:00 +00:00
|
|
|
# PMC - fow now there's no hwpmc module for mips74k
|
Bring over the initial QCA955x SoC support framework.
This is enough to bring up the basic SoC support.
What works thus far:
* The mips74k core, pll setup, and UART (or else well, stuff would
be really difficult..)
* both USB 2.0 EHCI controllers
* on-board 2GHz 3x3 wifi (the other variant has 2GHz/5GHz wifi on-chip);
* arge0 - not yet sure why arge1 isn't firing off interrupts and thus
handling traffic, but I will soon figure it out and fix it here.
Tested:
* AP135 reference design, QCA9558 SoC, pretending to be an 11n
2GHz AP.
TODO:
* There's an interrupt mux hooking up devices to IP2 and IP3 - but it's
not a read-and-clear or write-to-clear register. So, trying to use it
naively like I have been ends up with massive interrupt storms.
For now the things that share those interrupts can just take them as
shared interrupts and try to play nice.
* There's two PCIe root complexes /and/ one of them can actually be
a PCIe device endpoint. Yes, you heard right. I have to teach the
AR724x PCIe bridge code to handle multiple instances with multiple
memory/irq regions, and then there'll be RC support, but EP support
isn't on my TODO list.
* I'm not sure why arge1 isn't up and running. I'll go figure that
out soon and fix it here.
Thankyou to Qualcomm Atheros for providing me with hardware and
an abundance of documentation about these things.
2015-03-02 02:24:46 +00:00
|
|
|
#options HWPMC_HOOKS
|
|
|
|
|
#device hwpmc
|
2015-05-19 05:41:00 +00:00
|
|
|
#device hwpmc_mips74k
|
Bring over the initial QCA955x SoC support framework.
This is enough to bring up the basic SoC support.
What works thus far:
* The mips74k core, pll setup, and UART (or else well, stuff would
be really difficult..)
* both USB 2.0 EHCI controllers
* on-board 2GHz 3x3 wifi (the other variant has 2GHz/5GHz wifi on-chip);
* arge0 - not yet sure why arge1 isn't firing off interrupts and thus
handling traffic, but I will soon figure it out and fix it here.
Tested:
* AP135 reference design, QCA9558 SoC, pretending to be an 11n
2GHz AP.
TODO:
* There's an interrupt mux hooking up devices to IP2 and IP3 - but it's
not a read-and-clear or write-to-clear register. So, trying to use it
naively like I have been ends up with massive interrupt storms.
For now the things that share those interrupts can just take them as
shared interrupts and try to play nice.
* There's two PCIe root complexes /and/ one of them can actually be
a PCIe device endpoint. Yes, you heard right. I have to teach the
AR724x PCIe bridge code to handle multiple instances with multiple
memory/irq regions, and then there'll be RC support, but EP support
isn't on my TODO list.
* I'm not sure why arge1 isn't up and running. I'll go figure that
out soon and fix it here.
Thankyou to Qualcomm Atheros for providing me with hardware and
an abundance of documentation about these things.
2015-03-02 02:24:46 +00:00
|
|
|
|
|
|
|
|
# options NFS_LEGACYRPC
|
|
|
|
|
# Debugging for use in -current
|
|
|
|
|
#options INVARIANTS
|
|
|
|
|
#options INVARIANT_SUPPORT
|
|
|
|
|
#options WITNESS
|
|
|
|
|
#options WITNESS_SKIPSPIN
|
|
|
|
|
options FFS #Berkeley Fast Filesystem
|
|
|
|
|
#options SOFTUPDATES #Enable FFS soft updates support
|
|
|
|
|
#options UFS_ACL #Support for access control lists
|
|
|
|
|
#options UFS_DIRHASH #Improve performance on big directories
|
|
|
|
|
options NO_FFS_SNAPSHOT # We don't require snapshot support
|
|
|
|
|
|
|
|
|
|
# Wireless NIC cards
|
|
|
|
|
options IEEE80211_DEBUG
|
|
|
|
|
options IEEE80211_SUPPORT_MESH
|
|
|
|
|
options IEEE80211_SUPPORT_TDMA
|
|
|
|
|
options IEEE80211_SUPPORT_SUPERG
|
|
|
|
|
options IEEE80211_ALQ # 802.11 ALQ logging support
|
|
|
|
|
device wlan # 802.11 support
|
|
|
|
|
device wlan_wep # 802.11 WEP support
|
|
|
|
|
device wlan_ccmp # 802.11 CCMP support
|
|
|
|
|
device wlan_tkip # 802.11 TKIP support
|
|
|
|
|
device wlan_xauth # 802.11 hostap support
|
|
|
|
|
|
|
|
|
|
# ath(4)
|
|
|
|
|
device ath # Atheros network device
|
|
|
|
|
device ath_rate_sample
|
|
|
|
|
device ath_ahb # Atheros host bus glue
|
|
|
|
|
options ATH_DEBUG
|
|
|
|
|
options ATH_DIAGAPI
|
|
|
|
|
option ATH_ENABLE_11N
|
|
|
|
|
option AH_DEBUG_ALQ
|
|
|
|
|
|
|
|
|
|
#device ath_hal
|
|
|
|
|
device ath_ar9300 # AR9330 HAL; no need for the others
|
|
|
|
|
option AH_DEBUG
|
|
|
|
|
option AH_SUPPORT_AR5416 # 11n HAL support
|
|
|
|
|
option AH_SUPPORT_QCA9550 # Chipset support
|
|
|
|
|
option AH_DEBUG_ALQ
|
|
|
|
|
option AH_AR5416_INTERRUPT_MITIGATION
|
|
|
|
|
|
|
|
|
|
device mii
|
|
|
|
|
device arge
|
|
|
|
|
options ARGE_DEBUG
|
|
|
|
|
|
|
|
|
|
device usb
|
|
|
|
|
options USB_EHCI_BIG_ENDIAN_DESC # handle big-endian byte order
|
|
|
|
|
options USB_DEBUG
|
|
|
|
|
options USB_HOST_ALIGN=32 # AR71XX (MIPS in general?) requires this
|
|
|
|
|
device ehci
|
|
|
|
|
|
|
|
|
|
device scbus
|
|
|
|
|
device umass
|
|
|
|
|
device da
|
|
|
|
|
|
|
|
|
|
device spibus
|
|
|
|
|
device ar71xx_spi
|
|
|
|
|
device mx25l
|
|
|
|
|
device ar71xx_wdog
|
|
|
|
|
|
|
|
|
|
device uart
|
|
|
|
|
device uart_ar71xx
|
|
|
|
|
|
|
|
|
|
device ar71xx_apb
|
|
|
|
|
# Until some better interrupt handling is shoehorned into qca955x_apb,
|
|
|
|
|
# we'll have to stick to shared interrupts for IP2/IP3 demux.
|
|
|
|
|
# device qca955x_apb
|
|
|
|
|
|
|
|
|
|
device loop
|
|
|
|
|
device ether
|
|
|
|
|
device md
|
|
|
|
|
device bpf
|
|
|
|
|
device random
|
|
|
|
|
device if_bridge
|
|
|
|
|
device gpio
|
|
|
|
|
device gpioled
|
|
|
|
|
|
|
|
|
|
#options KTR
|
|
|
|
|
#options KTR_MASK=(KTR_INTR)
|
|
|
|
|
#options KTR_COMPILE=(KTR_INTR)
|
|
|
|
|
#options KTR_VERBOSE
|