1995-12-05 13:01:33 +00:00
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/*
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* Copyright (c) 1995, David Greenman
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice unmodified, this list of conditions, and the following
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* disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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1996-04-23 18:36:56 +00:00
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* $Id: if_ed.c,v 1.96 1996/04/08 01:25:22 davidg Exp $
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1995-12-05 13:01:33 +00:00
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*/
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1993-06-14 22:21:25 +00:00
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/*
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1993-09-29 20:30:26 +00:00
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* Device driver for National Semiconductor DS8390/WD83C690 based ethernet
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1993-06-14 22:21:25 +00:00
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* adapters. By David Greenman, 29-April-1993
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*
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1993-09-29 20:30:26 +00:00
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* Currently supports the Western Digital/SMC 8003 and 8013 series,
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1994-01-03 17:17:19 +00:00
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* the SMC Elite Ultra (8216), the 3Com 3c503, the NE1000 and NE2000,
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* and a variety of similar clones.
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1993-09-29 22:15:53 +00:00
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*
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1993-09-22 17:47:43 +00:00
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*/
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1993-06-14 22:21:25 +00:00
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#include "ed.h"
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#include "bpfilter.h"
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1994-08-13 03:50:34 +00:00
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#include <sys/param.h>
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#include <sys/systm.h>
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1995-11-16 09:56:02 +00:00
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#include <sys/conf.h>
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1994-08-13 03:50:34 +00:00
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#include <sys/errno.h>
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#include <sys/ioctl.h>
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#include <sys/mbuf.h>
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#include <sys/socket.h>
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#include <sys/syslog.h>
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1994-10-19 01:59:11 +00:00
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#include <sys/devconf.h>
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1993-06-14 22:21:25 +00:00
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1994-08-13 03:50:34 +00:00
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#include <net/if.h>
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#include <net/if_dl.h>
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#include <net/if_types.h>
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1993-06-14 22:21:25 +00:00
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#ifdef INET
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1994-08-13 03:50:34 +00:00
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#include <netinet/in.h>
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#include <netinet/in_systm.h>
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#include <netinet/in_var.h>
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#include <netinet/ip.h>
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#include <netinet/if_ether.h>
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1993-06-14 22:21:25 +00:00
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#endif
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1995-10-26 20:31:59 +00:00
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#ifdef IPX
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#include <netipx/ipx.h>
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#include <netipx/ipx_if.h>
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#endif
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1993-06-14 22:21:25 +00:00
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#ifdef NS
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1994-08-13 03:50:34 +00:00
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#include <netns/ns.h>
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#include <netns/ns_if.h>
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1993-06-14 22:21:25 +00:00
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#endif
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#if NBPFILTER > 0
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1994-08-13 03:50:34 +00:00
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#include <net/bpf.h>
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#include <net/bpfdesc.h>
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1993-06-14 22:21:25 +00:00
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#endif
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1995-03-16 18:17:34 +00:00
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#include <machine/clock.h>
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1994-08-13 03:50:34 +00:00
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#include <i386/isa/isa.h>
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#include <i386/isa/isa_device.h>
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#include <i386/isa/icu.h>
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#include <i386/isa/if_edreg.h>
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1993-06-14 22:21:25 +00:00
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/*
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* ed_softc: per line info and status
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*/
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1995-12-15 00:54:32 +00:00
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struct ed_softc {
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1994-08-04 17:42:35 +00:00
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struct arpcom arpcom; /* ethernet common */
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1993-06-14 22:21:25 +00:00
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1994-08-04 17:42:35 +00:00
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char *type_str; /* pointer to type string */
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u_char vendor; /* interface vendor */
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u_char type; /* interface type code */
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1995-10-10 09:52:55 +00:00
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u_char gone; /* HW missing, presumed having a good time */
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1993-06-14 22:21:25 +00:00
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1994-08-04 17:42:35 +00:00
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u_short asic_addr; /* ASIC I/O bus address */
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u_short nic_addr; /* NIC (DS8390) I/O bus address */
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1993-06-14 22:21:25 +00:00
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1993-09-22 17:47:43 +00:00
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/*
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* The following 'proto' variable is part of a work-around for 8013EBT asics
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* being write-only. It's sort of a prototype/shadow of the real thing.
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*/
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1994-08-04 17:42:35 +00:00
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u_char wd_laar_proto;
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1994-09-07 06:11:29 +00:00
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u_char cr_proto;
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1994-08-04 17:42:35 +00:00
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u_char isa16bit; /* width of access to card 0=8 or 1=16 */
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int is790; /* set by the probe code if the card is 790
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* based */
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caddr_t mem_start; /* NIC memory start address */
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caddr_t mem_end; /* NIC memory end address */
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u_long mem_size; /* total NIC memory size */
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caddr_t mem_ring; /* start of RX ring-buffer (in NIC mem) */
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u_char mem_shared; /* NIC memory is shared with host */
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u_char xmit_busy; /* transmitter is busy */
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u_char txb_cnt; /* number of transmit buffers */
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u_char txb_inuse; /* number of TX buffers currently in-use */
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u_char txb_new; /* pointer to where new buffer will be added */
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u_char txb_next_tx; /* pointer to next buffer ready to xmit */
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u_short txb_len[8]; /* buffered xmit buffer lengths */
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u_char tx_page_start; /* first page of TX buffer area */
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u_char rec_page_start; /* first page of RX ring-buffer */
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u_char rec_page_stop; /* last page of RX ring-buffer */
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u_char next_packet; /* pointer to next unread RX packet */
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1995-01-15 00:18:17 +00:00
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struct kern_devconf kdc; /* kernel configuration database info */
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1995-12-15 00:54:32 +00:00
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};
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static struct ed_softc ed_softc[NED];
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1994-08-04 17:42:35 +00:00
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1995-12-05 02:01:59 +00:00
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static int ed_attach __P((struct isa_device *));
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static void ed_init __P((struct ifnet *));
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static int ed_ioctl __P((struct ifnet *, int, caddr_t));
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static int ed_probe __P((struct isa_device *));
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static void ed_start __P((struct ifnet *));
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static void ed_reset __P((struct ifnet *));
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static void ed_watchdog __P((struct ifnet *));
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static void ed_stop __P((struct ed_softc *));
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static int ed_probe_generic8390 __P((struct ed_softc *));
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static int ed_probe_WD80x3 __P((struct isa_device *));
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static int ed_probe_3Com __P((struct isa_device *));
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static int ed_probe_Novell __P((struct isa_device *));
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static int ed_probe_pccard __P((struct isa_device *, u_char *));
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1995-10-31 18:41:49 +00:00
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1995-12-15 00:54:32 +00:00
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static void ds_getmcaf __P((struct ed_softc *, u_long *));
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1994-08-04 17:42:35 +00:00
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1995-12-15 00:54:32 +00:00
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static void ed_get_packet(struct ed_softc *, char *, /* u_short */ int, int);
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1993-06-14 22:21:25 +00:00
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1995-12-15 00:54:32 +00:00
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static void ed_rint __P((struct ed_softc *));
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static void ed_xmit __P((struct ed_softc *));
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static char * ed_ring_copy __P((struct ed_softc *, char *, char *,
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/* u_short */ int));
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1993-06-14 22:21:25 +00:00
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1995-12-15 07:31:40 +00:00
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static void ed_pio_readmem __P((struct ed_softc *, int, unsigned char *,
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/* u_short */ int));
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1995-12-15 00:54:32 +00:00
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static void ed_pio_writemem __P((struct ed_softc *, char *,
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/* u_short */ int, /* u_short */ int));
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static u_short ed_pio_write_mbufs __P((struct ed_softc *, struct mbuf *,
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1995-12-15 07:31:40 +00:00
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int));
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1993-09-29 20:30:26 +00:00
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1995-12-05 02:01:59 +00:00
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static void ed_setrcr(struct ed_softc *);
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1995-10-31 18:41:49 +00:00
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static u_long ds_crc(u_char *ep);
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1994-08-04 17:42:35 +00:00
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1995-10-10 09:52:55 +00:00
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#include "crd.h"
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#if NCRD > 0
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#include <sys/select.h>
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#include <pccard/card.h>
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1995-12-15 00:54:32 +00:00
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#include <pccard/driver.h>
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1995-10-10 09:52:55 +00:00
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#include <pccard/slot.h>
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1996-04-23 18:36:56 +00:00
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1995-10-10 09:52:55 +00:00
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/*
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* PC-Card (PCMCIA) specific code.
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*/
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static int card_intr(struct pccard_dev *); /* Interrupt handler */
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1995-10-31 18:41:49 +00:00
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static void edunload(struct pccard_dev *); /* Disable driver */
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static void edsuspend(struct pccard_dev *); /* Suspend driver */
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1995-10-10 09:52:55 +00:00
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static int edinit(struct pccard_dev *, int); /* init device */
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1996-04-23 18:36:56 +00:00
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static struct pccard_drv ed_info = {
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1995-10-10 09:52:55 +00:00
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"ed",
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card_intr,
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edunload,
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edsuspend,
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edinit,
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0, /* Attributes - presently unused */
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&net_imask /* Interrupt mask for device */
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1996-04-23 18:36:56 +00:00
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/* XXX - Should this also include net_imask? */
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};
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1995-10-10 09:52:55 +00:00
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/*
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1996-04-23 18:36:56 +00:00
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* Called when a power down is requested. Shuts down the
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* device and configures the device as unavailable (but
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* still loaded...). A resume is done by calling
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* edinit with first=0. This is called when the user suspends
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* the system, or the APM code suspends the system.
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1995-10-10 09:52:55 +00:00
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*/
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1995-10-31 18:41:49 +00:00
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static void
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1995-10-10 09:52:55 +00:00
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edsuspend(struct pccard_dev *dp)
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{
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printf("ed%d: suspending\n", dp->isahd.id_unit);
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}
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1996-04-23 18:36:56 +00:00
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1995-10-10 09:52:55 +00:00
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/*
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* Initialize the device - called from Slot manager.
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1996-04-23 18:36:56 +00:00
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* If first is set, then check for the device's existence
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* before initializing it. Once initialized, the device table may
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* be set up.
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1995-10-10 09:52:55 +00:00
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*/
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1995-10-31 18:41:49 +00:00
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static int
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1995-10-10 09:52:55 +00:00
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edinit(struct pccard_dev *dp, int first)
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{
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struct ed_softc *sc = &ed_softc[dp->isahd.id_unit];
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1996-04-23 18:36:56 +00:00
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/* validate unit number. */
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1995-10-10 09:52:55 +00:00
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if (first) {
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if (dp->isahd.id_unit >= NED)
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return(ENODEV);
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1996-04-23 18:36:56 +00:00
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/*
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* Probe the device. If a value is returned, the
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* device was found at the location.
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*/
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1995-10-10 09:52:55 +00:00
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sc->gone = 0;
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1996-04-23 18:36:56 +00:00
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if (ed_probe_pccard(&dp->isahd,dp->misc)==0)
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1995-10-10 09:52:55 +00:00
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return(ENXIO);
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1996-04-23 18:36:56 +00:00
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if (ed_attach(&dp->isahd)==0)
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1995-10-10 09:52:55 +00:00
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return(ENXIO);
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}
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1996-04-23 18:36:56 +00:00
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/*
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* XXX TODO:
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* If it was initialized before, the device structure
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* should also be initialized. We should
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* reset (and possibly restart) the hardware, but
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* I am not sure of the best way to do this...
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*/
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1995-10-10 09:52:55 +00:00
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return(0);
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}
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1996-04-23 18:36:56 +00:00
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1995-10-10 09:52:55 +00:00
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/*
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* edunload - unload the driver and clear the table.
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* XXX TODO:
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1996-04-23 18:36:56 +00:00
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* This is usually called when the card is ejected, but
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* can be caused by a modunload of a controller driver.
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* The idea is to reset the driver's view of the device
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1995-10-10 09:52:55 +00:00
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* and ensure that any driver entry points such as
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* read and write do not hang.
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*/
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1995-10-31 18:41:49 +00:00
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static void
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1995-10-10 09:52:55 +00:00
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edunload(struct pccard_dev *dp)
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{
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struct ed_softc *sc = &ed_softc[dp->isahd.id_unit];
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1995-12-05 02:01:59 +00:00
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struct ifnet *ifp = &sc->arpcom.ac_if;
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1995-10-21 00:55:36 +00:00
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if (sc->kdc.kdc_state == DC_UNCONFIGURED) {
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printf("ed%d: already unloaded\n", dp->isahd.id_unit);
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return;
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}
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1995-10-10 09:52:55 +00:00
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sc->kdc.kdc_state = DC_UNCONFIGURED;
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1995-12-05 02:01:59 +00:00
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ifp->if_flags &= ~IFF_RUNNING;
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if_down(ifp);
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1995-10-10 09:52:55 +00:00
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sc->gone = 1;
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printf("ed%d: unload\n", dp->isahd.id_unit);
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}
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/*
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* card_intr - Shared interrupt called from
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* front end of PC-Card handler.
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*/
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static int
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card_intr(struct pccard_dev *dp)
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{
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edintr(dp->isahd.id_unit);
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return(1);
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}
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#endif /* NCRD > 0 */
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1993-06-14 22:21:25 +00:00
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struct isa_driver eddriver = {
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ed_probe,
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ed_attach,
|
1994-10-17 21:16:41 +00:00
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"ed",
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1 /* We are ultra sensitive */
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1993-06-14 22:21:25 +00:00
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};
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1994-08-04 17:42:35 +00:00
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|
/*
|
1994-11-26 10:51:49 +00:00
|
|
|
* Interrupt conversion table for WD/SMC ASIC/83C584
|
1993-06-14 22:21:25 +00:00
|
|
|
* (IRQ* are defined in icu.h)
|
|
|
|
*/
|
|
|
|
static unsigned short ed_intr_mask[] = {
|
|
|
|
IRQ9,
|
|
|
|
IRQ3,
|
|
|
|
IRQ5,
|
|
|
|
IRQ7,
|
|
|
|
IRQ10,
|
|
|
|
IRQ11,
|
|
|
|
IRQ15,
|
|
|
|
IRQ4
|
|
|
|
};
|
1994-08-04 17:42:35 +00:00
|
|
|
|
1993-11-22 11:08:16 +00:00
|
|
|
/*
|
1994-11-26 10:51:49 +00:00
|
|
|
* Interrupt conversion table for 83C790
|
1993-11-22 11:08:16 +00:00
|
|
|
*/
|
|
|
|
static unsigned short ed_790_intr_mask[] = {
|
|
|
|
0,
|
|
|
|
IRQ9,
|
|
|
|
IRQ3,
|
|
|
|
IRQ5,
|
1994-03-01 12:23:33 +00:00
|
|
|
IRQ7,
|
1993-11-22 11:08:16 +00:00
|
|
|
IRQ10,
|
|
|
|
IRQ11,
|
|
|
|
IRQ15
|
|
|
|
};
|
1994-08-04 17:42:35 +00:00
|
|
|
|
1995-05-14 11:01:20 +00:00
|
|
|
#define ETHER_MIN_LEN 60
|
|
|
|
#define ETHER_MAX_LEN 1514
|
1993-06-14 22:21:25 +00:00
|
|
|
#define ETHER_ADDR_LEN 6
|
|
|
|
#define ETHER_HDR_SIZE 14
|
|
|
|
|
1995-01-15 00:18:17 +00:00
|
|
|
static struct kern_devconf kdc_ed_template = {
|
1994-10-19 01:59:11 +00:00
|
|
|
0, 0, 0, /* filled in by dev_attach */
|
1994-10-23 21:28:03 +00:00
|
|
|
"ed", 0, { MDDT_ISA, 0, "net" },
|
|
|
|
isa_generic_externalize, 0, 0, ISA_EXTERNALLEN,
|
|
|
|
&kdc_isa0, /* parent */
|
|
|
|
0, /* parentdata */
|
1995-04-12 20:48:13 +00:00
|
|
|
DC_UNCONFIGURED, /* state */
|
|
|
|
"", /* description */
|
|
|
|
DC_CLS_NETIF /* class */
|
1995-01-15 00:18:17 +00:00
|
|
|
};
|
1994-10-19 01:59:11 +00:00
|
|
|
|
|
|
|
static inline void
|
1994-10-23 21:28:03 +00:00
|
|
|
ed_registerdev(struct isa_device *id, const char *descr)
|
1994-10-19 01:59:11 +00:00
|
|
|
{
|
1995-01-15 00:18:17 +00:00
|
|
|
struct kern_devconf *kdc = &ed_softc[id->id_unit].kdc;
|
|
|
|
*kdc = kdc_ed_template;
|
|
|
|
kdc->kdc_unit = id->id_unit;
|
|
|
|
kdc->kdc_parentdata = id;
|
|
|
|
kdc->kdc_description = descr;
|
|
|
|
dev_attach(kdc);
|
1994-10-19 01:59:11 +00:00
|
|
|
}
|
|
|
|
|
1993-06-14 22:21:25 +00:00
|
|
|
/*
|
|
|
|
* Determine if the device is present
|
|
|
|
*
|
|
|
|
* on entry:
|
|
|
|
* a pointer to an isa_device struct
|
|
|
|
* on exit:
|
|
|
|
* NULL if device not found
|
|
|
|
* or # of i/o addresses used (if found)
|
|
|
|
*/
|
1995-11-18 08:29:04 +00:00
|
|
|
static int
|
1993-06-14 22:21:25 +00:00
|
|
|
ed_probe(isa_dev)
|
|
|
|
struct isa_device *isa_dev;
|
|
|
|
{
|
1994-08-04 17:42:35 +00:00
|
|
|
int nports;
|
1996-04-23 18:36:56 +00:00
|
|
|
|
1995-10-10 09:52:55 +00:00
|
|
|
#if NCRD > 0
|
1996-04-23 18:36:56 +00:00
|
|
|
/*
|
|
|
|
* If PC-Card probe required, then register driver with
|
|
|
|
* slot manager.
|
|
|
|
*/
|
|
|
|
pccard_add_driver(&ed_info);
|
|
|
|
#endif
|
1993-06-14 22:21:25 +00:00
|
|
|
|
1995-04-12 20:48:13 +00:00
|
|
|
#ifndef DEV_LKM
|
1995-01-15 00:18:17 +00:00
|
|
|
ed_registerdev(isa_dev, "Ethernet adapter");
|
1995-04-12 20:48:13 +00:00
|
|
|
#endif /* not DEV_LKM */
|
1995-01-15 00:18:17 +00:00
|
|
|
|
1994-10-22 17:52:22 +00:00
|
|
|
nports = ed_probe_WD80x3(isa_dev);
|
|
|
|
if (nports)
|
1993-09-22 17:47:43 +00:00
|
|
|
return (nports);
|
|
|
|
|
1994-10-22 17:52:22 +00:00
|
|
|
nports = ed_probe_3Com(isa_dev);
|
|
|
|
if (nports)
|
1993-09-22 17:47:43 +00:00
|
|
|
return (nports);
|
1993-09-29 20:30:26 +00:00
|
|
|
|
1994-10-22 17:52:22 +00:00
|
|
|
nports = ed_probe_Novell(isa_dev);
|
|
|
|
if (nports)
|
1993-09-29 20:30:26 +00:00
|
|
|
return (nports);
|
1993-11-07 17:44:34 +00:00
|
|
|
|
1994-08-04 17:42:35 +00:00
|
|
|
return (0);
|
1993-09-09 07:01:23 +00:00
|
|
|
}
|
1993-06-14 22:21:25 +00:00
|
|
|
|
1993-09-29 20:30:26 +00:00
|
|
|
/*
|
|
|
|
* Generic probe routine for testing for the existance of a DS8390.
|
|
|
|
* Must be called after the NIC has just been reset. This routine
|
1995-02-25 15:56:00 +00:00
|
|
|
* works by looking at certain register values that are guaranteed
|
1993-09-29 20:30:26 +00:00
|
|
|
* to be initialized a certain way after power-up or reset. Seems
|
|
|
|
* not to currently work on the 83C690.
|
|
|
|
*
|
|
|
|
* Specifically:
|
|
|
|
*
|
|
|
|
* Register reset bits set bits
|
|
|
|
* Command Register (CR) TXP, STA RD2, STP
|
|
|
|
* Interrupt Status (ISR) RST
|
|
|
|
* Interrupt Mask (IMR) All bits
|
|
|
|
* Data Control (DCR) LAS
|
|
|
|
* Transmit Config. (TCR) LB1, LB0
|
|
|
|
*
|
|
|
|
* We only look at the CR and ISR registers, however, because looking at
|
|
|
|
* the others would require changing register pages (which would be
|
|
|
|
* intrusive if this isn't an 8390).
|
|
|
|
*
|
1994-08-04 17:42:35 +00:00
|
|
|
* Return 1 if 8390 was found, 0 if not.
|
1993-09-29 20:30:26 +00:00
|
|
|
*/
|
|
|
|
|
1995-11-18 08:29:04 +00:00
|
|
|
static int
|
1993-09-29 20:30:26 +00:00
|
|
|
ed_probe_generic8390(sc)
|
|
|
|
struct ed_softc *sc;
|
|
|
|
{
|
|
|
|
if ((inb(sc->nic_addr + ED_P0_CR) &
|
1994-08-04 17:42:35 +00:00
|
|
|
(ED_CR_RD2 | ED_CR_TXP | ED_CR_STA | ED_CR_STP)) !=
|
|
|
|
(ED_CR_RD2 | ED_CR_STP))
|
1994-01-03 17:17:19 +00:00
|
|
|
return (0);
|
1993-09-29 20:30:26 +00:00
|
|
|
if ((inb(sc->nic_addr + ED_P0_ISR) & ED_ISR_RST) != ED_ISR_RST)
|
|
|
|
return (0);
|
|
|
|
|
1994-08-04 17:42:35 +00:00
|
|
|
return (1);
|
1993-09-29 20:30:26 +00:00
|
|
|
}
|
1994-08-04 17:42:35 +00:00
|
|
|
|
1993-09-09 07:01:23 +00:00
|
|
|
/*
|
|
|
|
* Probe and vendor-specific initialization routine for SMC/WD80x3 boards
|
|
|
|
*/
|
1995-11-18 08:29:04 +00:00
|
|
|
static int
|
1993-09-09 07:01:23 +00:00
|
|
|
ed_probe_WD80x3(isa_dev)
|
|
|
|
struct isa_device *isa_dev;
|
|
|
|
{
|
|
|
|
struct ed_softc *sc = &ed_softc[isa_dev->id_unit];
|
1994-08-04 17:42:35 +00:00
|
|
|
int i;
|
|
|
|
u_int memsize;
|
|
|
|
u_char iptr, isa16bit, sum;
|
1993-09-22 17:47:43 +00:00
|
|
|
|
|
|
|
sc->asic_addr = isa_dev->id_iobase;
|
|
|
|
sc->nic_addr = sc->asic_addr + ED_WD_NIC_OFFSET;
|
1993-11-22 11:08:16 +00:00
|
|
|
sc->is790 = 0;
|
1993-06-14 22:21:25 +00:00
|
|
|
|
1994-01-11 23:28:21 +00:00
|
|
|
#ifdef TOSH_ETHER
|
1994-01-25 22:52:09 +00:00
|
|
|
outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_POW);
|
1994-01-11 23:28:21 +00:00
|
|
|
DELAY(10000);
|
|
|
|
#endif
|
1994-08-04 17:42:35 +00:00
|
|
|
|
1993-09-22 17:47:43 +00:00
|
|
|
/*
|
1994-08-04 17:42:35 +00:00
|
|
|
* Attempt to do a checksum over the station address PROM. If it
|
|
|
|
* fails, it's probably not a SMC/WD board. There is a problem with
|
|
|
|
* this, though: some clone WD boards don't pass the checksum test.
|
|
|
|
* Danpex boards for one.
|
1993-09-22 17:47:43 +00:00
|
|
|
*/
|
|
|
|
for (sum = 0, i = 0; i < 8; ++i)
|
|
|
|
sum += inb(sc->asic_addr + ED_WD_PROM + i);
|
1993-10-01 00:56:43 +00:00
|
|
|
|
|
|
|
if (sum != ED_WD_ROM_CHECKSUM_TOTAL) {
|
1994-08-04 17:42:35 +00:00
|
|
|
|
1993-10-01 00:56:43 +00:00
|
|
|
/*
|
1994-08-04 17:42:35 +00:00
|
|
|
* Checksum is invalid. This often happens with cheap WD8003E
|
|
|
|
* clones. In this case, the checksum byte (the eighth byte)
|
|
|
|
* seems to always be zero.
|
1993-10-01 00:56:43 +00:00
|
|
|
*/
|
|
|
|
if (inb(sc->asic_addr + ED_WD_CARD_ID) != ED_TYPE_WD8003E ||
|
1994-01-03 17:17:19 +00:00
|
|
|
inb(sc->asic_addr + ED_WD_PROM + 7) != 0)
|
1994-08-04 17:42:35 +00:00
|
|
|
return (0);
|
1993-10-01 00:56:43 +00:00
|
|
|
}
|
1993-06-14 22:21:25 +00:00
|
|
|
/* reset card to force it into a known state. */
|
1994-01-11 23:28:21 +00:00
|
|
|
#ifdef TOSH_ETHER
|
1994-01-25 22:52:09 +00:00
|
|
|
outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_RST | ED_WD_MSR_POW);
|
1994-01-11 23:28:21 +00:00
|
|
|
#else
|
1993-06-14 22:21:25 +00:00
|
|
|
outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_RST);
|
1994-01-11 23:28:21 +00:00
|
|
|
#endif
|
1993-06-14 22:21:25 +00:00
|
|
|
DELAY(100);
|
|
|
|
outb(sc->asic_addr + ED_WD_MSR, inb(sc->asic_addr + ED_WD_MSR) & ~ED_WD_MSR_RST);
|
|
|
|
/* wait in the case this card is reading it's EEROM */
|
|
|
|
DELAY(5000);
|
|
|
|
|
1993-09-29 20:30:26 +00:00
|
|
|
sc->vendor = ED_VENDOR_WD_SMC;
|
|
|
|
sc->type = inb(sc->asic_addr + ED_WD_CARD_ID);
|
|
|
|
|
1993-06-14 22:21:25 +00:00
|
|
|
/*
|
|
|
|
* Set initial values for width/size.
|
|
|
|
*/
|
1994-02-02 14:05:58 +00:00
|
|
|
memsize = 8192;
|
|
|
|
isa16bit = 0;
|
1993-06-14 22:21:25 +00:00
|
|
|
switch (sc->type) {
|
|
|
|
case ED_TYPE_WD8003S:
|
|
|
|
sc->type_str = "WD8003S";
|
1995-01-15 00:18:17 +00:00
|
|
|
sc->kdc.kdc_description = "Ethernet adapter: WD 8003S";
|
1993-06-14 22:21:25 +00:00
|
|
|
break;
|
|
|
|
case ED_TYPE_WD8003E:
|
|
|
|
sc->type_str = "WD8003E";
|
1995-01-15 00:18:17 +00:00
|
|
|
sc->kdc.kdc_description = "Ethernet adapter: WD 8003E";
|
1994-02-02 14:05:58 +00:00
|
|
|
break;
|
|
|
|
case ED_TYPE_WD8003EB:
|
|
|
|
sc->type_str = "WD8003EB";
|
1995-01-15 00:18:17 +00:00
|
|
|
sc->kdc.kdc_description = "Ethernet adapter: WD 8003EB";
|
1993-06-14 22:21:25 +00:00
|
|
|
break;
|
1994-02-02 02:24:42 +00:00
|
|
|
case ED_TYPE_WD8003W:
|
|
|
|
sc->type_str = "WD8003W";
|
1995-01-15 00:18:17 +00:00
|
|
|
sc->kdc.kdc_description = "Ethernet adapter: WD 8003W";
|
1994-02-02 02:24:42 +00:00
|
|
|
break;
|
1993-06-14 22:21:25 +00:00
|
|
|
case ED_TYPE_WD8013EBT:
|
|
|
|
sc->type_str = "WD8013EBT";
|
1995-01-15 00:18:17 +00:00
|
|
|
sc->kdc.kdc_description = "Ethernet adapter: WD 8013EBT";
|
1993-06-14 22:21:25 +00:00
|
|
|
memsize = 16384;
|
1993-09-22 17:47:43 +00:00
|
|
|
isa16bit = 1;
|
1993-06-14 22:21:25 +00:00
|
|
|
break;
|
1993-11-29 17:07:33 +00:00
|
|
|
case ED_TYPE_WD8013W:
|
|
|
|
sc->type_str = "WD8013W";
|
1995-01-15 00:18:17 +00:00
|
|
|
sc->kdc.kdc_description = "Ethernet adapter: WD 8013W";
|
1993-11-29 17:07:33 +00:00
|
|
|
memsize = 16384;
|
|
|
|
isa16bit = 1;
|
|
|
|
break;
|
1994-08-04 17:42:35 +00:00
|
|
|
case ED_TYPE_WD8013EP: /* also WD8003EP */
|
1993-06-14 22:21:25 +00:00
|
|
|
if (inb(sc->asic_addr + ED_WD_ICR)
|
1994-01-03 17:17:19 +00:00
|
|
|
& ED_WD_ICR_16BIT) {
|
1993-09-22 17:47:43 +00:00
|
|
|
isa16bit = 1;
|
1993-06-14 22:21:25 +00:00
|
|
|
memsize = 16384;
|
1993-09-09 07:01:23 +00:00
|
|
|
sc->type_str = "WD8013EP";
|
1995-05-30 08:16:23 +00:00
|
|
|
sc->kdc.kdc_description =
|
1995-01-15 00:18:17 +00:00
|
|
|
"Ethernet adapter: WD 8013EP";
|
1993-06-14 22:21:25 +00:00
|
|
|
} else {
|
1993-09-22 17:47:43 +00:00
|
|
|
sc->type_str = "WD8003EP";
|
1995-05-30 08:16:23 +00:00
|
|
|
sc->kdc.kdc_description =
|
1995-01-15 00:18:17 +00:00
|
|
|
"Ethernet adapter: WD 8003EP";
|
1993-06-14 22:21:25 +00:00
|
|
|
}
|
|
|
|
break;
|
1993-09-09 07:01:23 +00:00
|
|
|
case ED_TYPE_WD8013WC:
|
|
|
|
sc->type_str = "WD8013WC";
|
1995-01-15 00:18:17 +00:00
|
|
|
sc->kdc.kdc_description = "Ethernet adapter: WD 8013WC";
|
1993-09-09 07:01:23 +00:00
|
|
|
memsize = 16384;
|
1993-09-22 17:47:43 +00:00
|
|
|
isa16bit = 1;
|
1993-09-09 07:01:23 +00:00
|
|
|
break;
|
1993-06-14 22:21:25 +00:00
|
|
|
case ED_TYPE_WD8013EBP:
|
|
|
|
sc->type_str = "WD8013EBP";
|
1995-01-15 00:18:17 +00:00
|
|
|
sc->kdc.kdc_description = "Ethernet adapter: WD 8013EBP";
|
1993-06-14 22:21:25 +00:00
|
|
|
memsize = 16384;
|
1993-09-22 17:47:43 +00:00
|
|
|
isa16bit = 1;
|
1993-06-14 22:21:25 +00:00
|
|
|
break;
|
|
|
|
case ED_TYPE_WD8013EPC:
|
|
|
|
sc->type_str = "WD8013EPC";
|
1995-01-15 00:18:17 +00:00
|
|
|
sc->kdc.kdc_description = "Ethernet adapter: WD 8013EPC";
|
1993-06-14 22:21:25 +00:00
|
|
|
memsize = 16384;
|
1993-09-22 17:47:43 +00:00
|
|
|
isa16bit = 1;
|
1993-06-14 22:21:25 +00:00
|
|
|
break;
|
1994-12-31 17:09:58 +00:00
|
|
|
case ED_TYPE_SMC8216C: /* 8216 has 16K shared mem -- 8416 has 8K */
|
1995-11-15 07:45:56 +00:00
|
|
|
case ED_TYPE_SMC8216T:
|
1995-12-05 13:01:33 +00:00
|
|
|
if (sc->type == ED_TYPE_SMC8216C) {
|
1994-12-31 17:09:58 +00:00
|
|
|
sc->type_str = "SMC8216/SMC8216C";
|
1995-01-15 00:18:17 +00:00
|
|
|
sc->kdc.kdc_description =
|
|
|
|
"Ethernet adapter: SMC 8216 or 8216C";
|
1995-11-15 07:45:56 +00:00
|
|
|
} else {
|
|
|
|
sc->type_str = "SMC8216T";
|
|
|
|
sc->kdc.kdc_description =
|
|
|
|
"Ethernet adapter: SMC 8216T";
|
1994-12-31 17:09:58 +00:00
|
|
|
}
|
1995-01-23 19:06:08 +00:00
|
|
|
|
|
|
|
outb(sc->asic_addr + ED_WD790_HWR,
|
|
|
|
inb(sc->asic_addr + ED_WD790_HWR) | ED_WD790_HWR_SWH);
|
|
|
|
switch (inb(sc->asic_addr + ED_WD790_RAR) & ED_WD790_RAR_SZ64) {
|
|
|
|
case ED_WD790_RAR_SZ64:
|
|
|
|
memsize = 65536;
|
|
|
|
break;
|
|
|
|
case ED_WD790_RAR_SZ32:
|
|
|
|
memsize = 32768;
|
|
|
|
break;
|
|
|
|
case ED_WD790_RAR_SZ16:
|
|
|
|
memsize = 16384;
|
|
|
|
break;
|
|
|
|
case ED_WD790_RAR_SZ8:
|
1995-11-15 07:45:56 +00:00
|
|
|
/* 8216 has 16K shared mem -- 8416 has 8K */
|
1995-12-05 13:01:33 +00:00
|
|
|
if (sc->type == ED_TYPE_SMC8216C) {
|
1995-11-15 07:45:56 +00:00
|
|
|
sc->type_str = "SMC8416C/SMC8416BT";
|
|
|
|
sc->kdc.kdc_description =
|
|
|
|
"Ethernet adapter: SMC 8416C or 8416BT";
|
|
|
|
} else {
|
|
|
|
sc->type_str = "SMC8416T";
|
|
|
|
sc->kdc.kdc_description =
|
|
|
|
"Ethernet adapter: SMC 8416T";
|
|
|
|
}
|
1994-12-31 17:09:58 +00:00
|
|
|
memsize = 8192;
|
1995-01-23 19:06:08 +00:00
|
|
|
break;
|
1994-12-31 17:09:58 +00:00
|
|
|
}
|
1995-01-23 19:06:08 +00:00
|
|
|
outb(sc->asic_addr + ED_WD790_HWR,
|
|
|
|
inb(sc->asic_addr + ED_WD790_HWR) & ~ED_WD790_HWR_SWH);
|
|
|
|
|
1993-11-22 11:08:16 +00:00
|
|
|
isa16bit = 1;
|
|
|
|
sc->is790 = 1;
|
|
|
|
break;
|
1994-01-11 23:28:21 +00:00
|
|
|
#ifdef TOSH_ETHER
|
|
|
|
case ED_TYPE_TOSHIBA1:
|
|
|
|
sc->type_str = "Toshiba1";
|
1995-01-15 00:18:17 +00:00
|
|
|
sc->kdc.kdc_description = "Ethernet adapter: Toshiba1";
|
1994-01-11 23:28:21 +00:00
|
|
|
memsize = 32768;
|
|
|
|
isa16bit = 1;
|
|
|
|
break;
|
1994-01-25 22:52:09 +00:00
|
|
|
case ED_TYPE_TOSHIBA4:
|
|
|
|
sc->type_str = "Toshiba4";
|
1995-01-15 00:18:17 +00:00
|
|
|
sc->kdc.kdc_description = "Ethernet adapter: Toshiba4";
|
1994-01-11 23:28:21 +00:00
|
|
|
memsize = 32768;
|
|
|
|
isa16bit = 1;
|
|
|
|
break;
|
|
|
|
#endif
|
1993-06-14 22:21:25 +00:00
|
|
|
default:
|
1993-09-22 17:47:43 +00:00
|
|
|
sc->type_str = "";
|
1993-06-14 22:21:25 +00:00
|
|
|
break;
|
|
|
|
}
|
1994-08-04 17:42:35 +00:00
|
|
|
|
1993-06-14 22:21:25 +00:00
|
|
|
/*
|
1994-08-04 17:42:35 +00:00
|
|
|
* Make some adjustments to initial values depending on what is found
|
|
|
|
* in the ICR.
|
1993-06-14 22:21:25 +00:00
|
|
|
*/
|
1993-09-22 17:47:43 +00:00
|
|
|
if (isa16bit && (sc->type != ED_TYPE_WD8013EBT)
|
1994-01-11 23:28:21 +00:00
|
|
|
#ifdef TOSH_ETHER
|
1994-08-04 17:42:35 +00:00
|
|
|
&& (sc->type != ED_TYPE_TOSHIBA1) && (sc->type != ED_TYPE_TOSHIBA4)
|
1994-01-11 23:28:21 +00:00
|
|
|
#endif
|
1994-01-03 17:17:19 +00:00
|
|
|
&& ((inb(sc->asic_addr + ED_WD_ICR) & ED_WD_ICR_16BIT) == 0)) {
|
1993-09-22 17:47:43 +00:00
|
|
|
isa16bit = 0;
|
1993-06-14 22:21:25 +00:00
|
|
|
memsize = 8192;
|
|
|
|
}
|
1995-01-23 19:06:08 +00:00
|
|
|
|
1993-06-14 22:21:25 +00:00
|
|
|
#if ED_DEBUG
|
1994-01-11 23:28:21 +00:00
|
|
|
printf("type = %x type_str=%s isa16bit=%d memsize=%d id_msize=%d\n",
|
1994-08-04 17:42:35 +00:00
|
|
|
sc->type, sc->type_str, isa16bit, memsize, isa_dev->id_msize);
|
|
|
|
for (i = 0; i < 8; i++)
|
1993-06-14 22:21:25 +00:00
|
|
|
printf("%x -> %x\n", i, inb(sc->asic_addr + i));
|
|
|
|
#endif
|
1994-08-04 17:42:35 +00:00
|
|
|
|
1993-07-20 23:16:50 +00:00
|
|
|
/*
|
|
|
|
* Allow the user to override the autoconfiguration
|
|
|
|
*/
|
|
|
|
if (isa_dev->id_msize)
|
1993-07-20 01:39:24 +00:00
|
|
|
memsize = isa_dev->id_msize;
|
1994-08-04 17:42:35 +00:00
|
|
|
|
1993-07-20 23:16:50 +00:00
|
|
|
/*
|
1994-08-04 17:42:35 +00:00
|
|
|
* (note that if the user specifies both of the following flags that
|
|
|
|
* '8bit' mode intentionally has precedence)
|
1993-07-20 23:16:50 +00:00
|
|
|
*/
|
|
|
|
if (isa_dev->id_flags & ED_FLAGS_FORCE_16BIT_MODE)
|
1993-09-22 17:47:43 +00:00
|
|
|
isa16bit = 1;
|
1993-07-20 23:16:50 +00:00
|
|
|
if (isa_dev->id_flags & ED_FLAGS_FORCE_8BIT_MODE)
|
1993-09-22 17:47:43 +00:00
|
|
|
isa16bit = 0;
|
1993-07-20 01:39:24 +00:00
|
|
|
|
1993-06-23 16:22:04 +00:00
|
|
|
/*
|
1994-11-13 07:17:46 +00:00
|
|
|
* If possible, get the assigned interrupt number from the card and
|
|
|
|
* use it.
|
1993-06-23 16:22:04 +00:00
|
|
|
*/
|
1993-11-22 11:08:16 +00:00
|
|
|
if ((sc->type & ED_WD_SOFTCONFIG) && (!sc->is790)) {
|
1994-08-04 17:42:35 +00:00
|
|
|
|
1993-06-23 16:22:04 +00:00
|
|
|
/*
|
|
|
|
* Assemble together the encoded interrupt number.
|
|
|
|
*/
|
|
|
|
iptr = (inb(isa_dev->id_iobase + ED_WD_ICR) & ED_WD_ICR_IR2) |
|
1994-08-04 17:42:35 +00:00
|
|
|
((inb(isa_dev->id_iobase + ED_WD_IRR) &
|
|
|
|
(ED_WD_IRR_IR0 | ED_WD_IRR_IR1)) >> 5);
|
|
|
|
|
1993-06-23 16:22:04 +00:00
|
|
|
/*
|
1995-05-12 22:39:40 +00:00
|
|
|
* If no interrupt specified (or "?"), use what the board tells us.
|
1993-06-23 16:22:04 +00:00
|
|
|
*/
|
1995-05-12 22:39:40 +00:00
|
|
|
if (isa_dev->id_irq <= 0)
|
|
|
|
isa_dev->id_irq = ed_intr_mask[iptr];
|
1994-08-04 17:42:35 +00:00
|
|
|
|
1993-06-23 16:22:04 +00:00
|
|
|
/*
|
|
|
|
* Enable the interrupt.
|
|
|
|
*/
|
|
|
|
outb(isa_dev->id_iobase + ED_WD_IRR,
|
1994-08-04 17:42:35 +00:00
|
|
|
inb(isa_dev->id_iobase + ED_WD_IRR) | ED_WD_IRR_IEN);
|
1993-06-14 22:21:25 +00:00
|
|
|
}
|
1993-11-22 11:08:16 +00:00
|
|
|
if (sc->is790) {
|
1994-04-10 20:06:28 +00:00
|
|
|
outb(isa_dev->id_iobase + ED_WD790_HWR,
|
1994-08-04 17:42:35 +00:00
|
|
|
inb(isa_dev->id_iobase + ED_WD790_HWR) | ED_WD790_HWR_SWH);
|
1994-04-10 20:06:28 +00:00
|
|
|
iptr = (((inb(isa_dev->id_iobase + ED_WD790_GCR) & ED_WD790_GCR_IR2) >> 4) |
|
1994-08-04 17:42:35 +00:00
|
|
|
(inb(isa_dev->id_iobase + ED_WD790_GCR) &
|
|
|
|
(ED_WD790_GCR_IR1 | ED_WD790_GCR_IR0)) >> 2);
|
1994-04-10 20:06:28 +00:00
|
|
|
outb(isa_dev->id_iobase + ED_WD790_HWR,
|
1994-08-04 17:42:35 +00:00
|
|
|
inb(isa_dev->id_iobase + ED_WD790_HWR) & ~ED_WD790_HWR_SWH);
|
1993-11-22 11:08:16 +00:00
|
|
|
|
1994-11-13 07:17:46 +00:00
|
|
|
/*
|
1995-05-12 22:39:40 +00:00
|
|
|
* If no interrupt specified (or "?"), use what the board tells us.
|
1994-11-13 07:17:46 +00:00
|
|
|
*/
|
1995-05-12 22:39:40 +00:00
|
|
|
if (isa_dev->id_irq <= 0)
|
|
|
|
isa_dev->id_irq = ed_790_intr_mask[iptr];
|
1994-08-04 17:42:35 +00:00
|
|
|
|
1994-04-10 20:06:28 +00:00
|
|
|
/*
|
|
|
|
* Enable interrupts.
|
|
|
|
*/
|
|
|
|
outb(isa_dev->id_iobase + ED_WD790_ICR,
|
1994-08-04 17:42:35 +00:00
|
|
|
inb(isa_dev->id_iobase + ED_WD790_ICR) | ED_WD790_ICR_EIL);
|
1993-11-22 11:08:16 +00:00
|
|
|
}
|
1994-11-13 07:17:46 +00:00
|
|
|
if (isa_dev->id_irq <= 0) {
|
|
|
|
printf("ed%d: %s cards don't support auto-detected/assigned interrupts.\n",
|
|
|
|
isa_dev->id_unit, sc->type_str);
|
|
|
|
return (0);
|
|
|
|
}
|
1993-09-22 17:47:43 +00:00
|
|
|
sc->isa16bit = isa16bit;
|
1993-09-29 20:30:26 +00:00
|
|
|
sc->mem_shared = 1;
|
|
|
|
isa_dev->id_msize = memsize;
|
1994-08-04 17:42:35 +00:00
|
|
|
sc->mem_start = (caddr_t) isa_dev->id_maddr;
|
1993-09-22 17:47:43 +00:00
|
|
|
|
1993-06-14 22:21:25 +00:00
|
|
|
/*
|
|
|
|
* allocate one xmit buffer if < 16k, two buffers otherwise
|
|
|
|
*/
|
1995-10-10 09:52:55 +00:00
|
|
|
if ((memsize < 16384) ||
|
|
|
|
(isa_dev->id_flags & ED_FLAGS_NO_MULTI_BUFFERING)) {
|
1993-06-14 22:21:25 +00:00
|
|
|
sc->txb_cnt = 1;
|
|
|
|
} else {
|
|
|
|
sc->txb_cnt = 2;
|
|
|
|
}
|
1995-10-10 09:52:55 +00:00
|
|
|
sc->tx_page_start = ED_WD_PAGE_OFFSET;
|
|
|
|
sc->rec_page_start = ED_WD_PAGE_OFFSET + ED_TXBUF_SIZE * sc->txb_cnt;
|
|
|
|
sc->rec_page_stop = ED_WD_PAGE_OFFSET + memsize / ED_PAGE_SIZE;
|
|
|
|
sc->mem_ring = sc->mem_start + (ED_PAGE_SIZE * sc->rec_page_start);
|
1993-09-29 20:30:26 +00:00
|
|
|
sc->mem_size = memsize;
|
|
|
|
sc->mem_end = sc->mem_start + memsize;
|
1993-06-14 22:21:25 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Get station address from on-board ROM
|
|
|
|
*/
|
|
|
|
for (i = 0; i < ETHER_ADDR_LEN; ++i)
|
|
|
|
sc->arpcom.ac_enaddr[i] = inb(sc->asic_addr + ED_WD_PROM + i);
|
|
|
|
|
1994-09-07 06:11:29 +00:00
|
|
|
/*
|
|
|
|
* Set upper address bits and 8/16 bit access to shared memory
|
|
|
|
*/
|
|
|
|
if (isa16bit) {
|
|
|
|
if (sc->is790) {
|
|
|
|
sc->wd_laar_proto = inb(sc->asic_addr + ED_WD_LAAR);
|
|
|
|
outb(sc->asic_addr + ED_WD_LAAR, ED_WD_LAAR_M16EN);
|
1994-08-04 17:42:35 +00:00
|
|
|
} else {
|
1994-09-07 06:11:29 +00:00
|
|
|
outb(sc->asic_addr + ED_WD_LAAR, (sc->wd_laar_proto =
|
|
|
|
ED_WD_LAAR_L16EN | ED_WD_LAAR_M16EN |
|
|
|
|
((kvtop(sc->mem_start) >> 19) & ED_WD_LAAR_ADDRHI)));
|
|
|
|
}
|
|
|
|
} else {
|
1994-10-22 17:52:22 +00:00
|
|
|
if (((sc->type & ED_WD_SOFTCONFIG) ||
|
1994-01-11 23:28:21 +00:00
|
|
|
#ifdef TOSH_ETHER
|
1994-09-07 06:11:29 +00:00
|
|
|
(sc->type == ED_TYPE_TOSHIBA1) || (sc->type == ED_TYPE_TOSHIBA4) ||
|
1994-01-11 23:28:21 +00:00
|
|
|
#endif
|
1994-10-22 17:52:22 +00:00
|
|
|
(sc->type == ED_TYPE_WD8013EBT)) && (!sc->is790)) {
|
1994-09-07 06:11:29 +00:00
|
|
|
outb(sc->asic_addr + ED_WD_LAAR, (sc->wd_laar_proto =
|
|
|
|
((kvtop(sc->mem_start) >> 19) & ED_WD_LAAR_ADDRHI)));
|
1993-09-29 20:30:26 +00:00
|
|
|
}
|
1994-09-07 06:11:29 +00:00
|
|
|
}
|
1993-06-14 22:21:25 +00:00
|
|
|
|
1994-09-07 06:11:29 +00:00
|
|
|
/*
|
|
|
|
* Set address and enable interface shared memory.
|
|
|
|
*/
|
|
|
|
if (!sc->is790) {
|
1994-08-04 17:42:35 +00:00
|
|
|
#ifdef TOSH_ETHER
|
1994-09-07 06:11:29 +00:00
|
|
|
outb(sc->asic_addr + ED_WD_MSR + 1, ((kvtop(sc->mem_start) >> 8) & 0xe0) | 4);
|
|
|
|
outb(sc->asic_addr + ED_WD_MSR + 2, ((kvtop(sc->mem_start) >> 16) & 0x0f));
|
|
|
|
outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_MENB | ED_WD_MSR_POW);
|
1994-08-04 17:42:35 +00:00
|
|
|
|
|
|
|
#else
|
1994-09-07 06:11:29 +00:00
|
|
|
outb(sc->asic_addr + ED_WD_MSR, ((kvtop(sc->mem_start) >> 13) &
|
|
|
|
ED_WD_MSR_ADDR) | ED_WD_MSR_MENB);
|
1994-08-04 17:42:35 +00:00
|
|
|
#endif
|
1994-09-07 06:11:29 +00:00
|
|
|
sc->cr_proto = ED_CR_RD2;
|
|
|
|
} else {
|
|
|
|
outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_MENB);
|
1995-01-23 19:06:08 +00:00
|
|
|
outb(sc->asic_addr + ED_WD790_HWR, (inb(sc->asic_addr + ED_WD790_HWR) | ED_WD790_HWR_SWH));
|
|
|
|
outb(sc->asic_addr + ED_WD790_RAR, ((kvtop(sc->mem_start) >> 13) & 0x0f) |
|
1994-09-07 06:11:29 +00:00
|
|
|
((kvtop(sc->mem_start) >> 11) & 0x40) |
|
1995-01-23 19:06:08 +00:00
|
|
|
(inb(sc->asic_addr + ED_WD790_RAR) & 0xb0));
|
|
|
|
outb(sc->asic_addr + ED_WD790_HWR, (inb(sc->asic_addr + ED_WD790_HWR) & ~ED_WD790_HWR_SWH));
|
1994-09-07 06:11:29 +00:00
|
|
|
sc->cr_proto = 0;
|
|
|
|
}
|
1994-08-04 17:42:35 +00:00
|
|
|
|
1994-11-13 07:17:46 +00:00
|
|
|
#if 0
|
|
|
|
printf("starting memory performance test at 0x%x, size %d...\n",
|
|
|
|
sc->mem_start, memsize*16384);
|
|
|
|
for (i = 0; i < 16384; i++)
|
|
|
|
bzero(sc->mem_start, memsize);
|
|
|
|
printf("***DONE***\n");
|
|
|
|
#endif
|
|
|
|
|
1994-09-07 06:11:29 +00:00
|
|
|
/*
|
|
|
|
* Now zero memory and verify that it is clear
|
|
|
|
*/
|
|
|
|
bzero(sc->mem_start, memsize);
|
1993-06-14 22:21:25 +00:00
|
|
|
|
1994-09-07 06:11:29 +00:00
|
|
|
for (i = 0; i < memsize; ++i) {
|
|
|
|
if (sc->mem_start[i]) {
|
1994-10-22 17:52:22 +00:00
|
|
|
printf("ed%d: failed to clear shared memory at %lx - check configuration\n",
|
1994-09-07 06:11:29 +00:00
|
|
|
isa_dev->id_unit, kvtop(sc->mem_start + i));
|
1993-06-14 22:21:25 +00:00
|
|
|
|
1994-09-07 06:11:29 +00:00
|
|
|
/*
|
|
|
|
* Disable 16 bit access to shared memory
|
|
|
|
*/
|
|
|
|
if (isa16bit) {
|
|
|
|
if (sc->is790) {
|
|
|
|
outb(sc->asic_addr + ED_WD_MSR, 0x00);
|
1994-04-13 10:15:34 +00:00
|
|
|
}
|
1994-09-07 06:11:29 +00:00
|
|
|
outb(sc->asic_addr + ED_WD_LAAR, (sc->wd_laar_proto &=
|
|
|
|
~ED_WD_LAAR_M16EN));
|
1993-09-29 20:30:26 +00:00
|
|
|
}
|
1994-09-07 06:11:29 +00:00
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
}
|
1994-08-04 17:42:35 +00:00
|
|
|
|
1994-09-07 06:11:29 +00:00
|
|
|
/*
|
|
|
|
* Disable 16bit access to shared memory - we leave it
|
|
|
|
* disabled so that 1) machines reboot properly when the board
|
|
|
|
* is set 16 bit mode and there are conflicting 8bit
|
|
|
|
* devices/ROMS in the same 128k address space as this boards
|
|
|
|
* shared memory. and 2) so that other 8 bit devices with
|
|
|
|
* shared memory can be used in this 128k region, too.
|
|
|
|
*/
|
|
|
|
if (isa16bit) {
|
|
|
|
if (sc->is790) {
|
|
|
|
outb(sc->asic_addr + ED_WD_MSR, 0x00);
|
1994-04-13 10:15:34 +00:00
|
|
|
}
|
1994-09-07 06:11:29 +00:00
|
|
|
outb(sc->asic_addr + ED_WD_LAAR, (sc->wd_laar_proto &=
|
|
|
|
~ED_WD_LAAR_M16EN));
|
1993-09-29 20:30:26 +00:00
|
|
|
}
|
1993-06-14 22:21:25 +00:00
|
|
|
return (ED_WD_IO_PORTS);
|
1993-09-09 07:01:23 +00:00
|
|
|
}
|
1993-06-14 22:21:25 +00:00
|
|
|
|
1993-09-09 07:01:23 +00:00
|
|
|
/*
|
|
|
|
* Probe and vendor-specific initialization routine for 3Com 3c503 boards
|
|
|
|
*/
|
1995-11-18 08:29:04 +00:00
|
|
|
static int
|
1993-09-09 07:01:23 +00:00
|
|
|
ed_probe_3Com(isa_dev)
|
|
|
|
struct isa_device *isa_dev;
|
|
|
|
{
|
|
|
|
struct ed_softc *sc = &ed_softc[isa_dev->id_unit];
|
1994-08-04 17:42:35 +00:00
|
|
|
int i;
|
|
|
|
u_int memsize;
|
1994-10-22 17:52:22 +00:00
|
|
|
u_char isa16bit;
|
1993-06-14 22:21:25 +00:00
|
|
|
|
|
|
|
sc->asic_addr = isa_dev->id_iobase + ED_3COM_ASIC_OFFSET;
|
|
|
|
sc->nic_addr = isa_dev->id_iobase + ED_3COM_NIC_OFFSET;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Verify that the kernel configured I/O address matches the board
|
1994-08-04 17:42:35 +00:00
|
|
|
* configured address
|
1993-06-14 22:21:25 +00:00
|
|
|
*/
|
1993-06-27 10:28:28 +00:00
|
|
|
switch (inb(sc->asic_addr + ED_3COM_BCFR)) {
|
1993-06-14 22:21:25 +00:00
|
|
|
case ED_3COM_BCFR_300:
|
|
|
|
if (isa_dev->id_iobase != 0x300)
|
1994-08-04 17:42:35 +00:00
|
|
|
return (0);
|
1993-06-14 22:21:25 +00:00
|
|
|
break;
|
|
|
|
case ED_3COM_BCFR_310:
|
|
|
|
if (isa_dev->id_iobase != 0x310)
|
1994-08-04 17:42:35 +00:00
|
|
|
return (0);
|
1993-06-14 22:21:25 +00:00
|
|
|
break;
|
|
|
|
case ED_3COM_BCFR_330:
|
|
|
|
if (isa_dev->id_iobase != 0x330)
|
1994-08-04 17:42:35 +00:00
|
|
|
return (0);
|
1993-06-14 22:21:25 +00:00
|
|
|
break;
|
|
|
|
case ED_3COM_BCFR_350:
|
|
|
|
if (isa_dev->id_iobase != 0x350)
|
1994-08-04 17:42:35 +00:00
|
|
|
return (0);
|
1993-06-14 22:21:25 +00:00
|
|
|
break;
|
|
|
|
case ED_3COM_BCFR_250:
|
|
|
|
if (isa_dev->id_iobase != 0x250)
|
1994-08-04 17:42:35 +00:00
|
|
|
return (0);
|
1993-06-14 22:21:25 +00:00
|
|
|
break;
|
|
|
|
case ED_3COM_BCFR_280:
|
|
|
|
if (isa_dev->id_iobase != 0x280)
|
1994-08-04 17:42:35 +00:00
|
|
|
return (0);
|
1993-06-14 22:21:25 +00:00
|
|
|
break;
|
|
|
|
case ED_3COM_BCFR_2A0:
|
|
|
|
if (isa_dev->id_iobase != 0x2a0)
|
1994-08-04 17:42:35 +00:00
|
|
|
return (0);
|
1993-06-14 22:21:25 +00:00
|
|
|
break;
|
|
|
|
case ED_3COM_BCFR_2E0:
|
|
|
|
if (isa_dev->id_iobase != 0x2e0)
|
1994-08-04 17:42:35 +00:00
|
|
|
return (0);
|
1993-06-14 22:21:25 +00:00
|
|
|
break;
|
1993-06-26 02:32:26 +00:00
|
|
|
default:
|
1994-08-04 17:42:35 +00:00
|
|
|
return (0);
|
1993-06-14 22:21:25 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
1994-08-04 17:42:35 +00:00
|
|
|
* Verify that the kernel shared memory address matches the board
|
|
|
|
* configured address.
|
1993-06-14 22:21:25 +00:00
|
|
|
*/
|
1993-06-27 10:28:28 +00:00
|
|
|
switch (inb(sc->asic_addr + ED_3COM_PCFR)) {
|
1993-06-14 22:21:25 +00:00
|
|
|
case ED_3COM_PCFR_DC000:
|
1993-06-27 10:28:28 +00:00
|
|
|
if (kvtop(isa_dev->id_maddr) != 0xdc000)
|
1994-08-04 17:42:35 +00:00
|
|
|
return (0);
|
1993-06-14 22:21:25 +00:00
|
|
|
break;
|
|
|
|
case ED_3COM_PCFR_D8000:
|
1993-06-27 10:28:28 +00:00
|
|
|
if (kvtop(isa_dev->id_maddr) != 0xd8000)
|
1994-08-04 17:42:35 +00:00
|
|
|
return (0);
|
1993-06-14 22:21:25 +00:00
|
|
|
break;
|
|
|
|
case ED_3COM_PCFR_CC000:
|
1993-06-27 10:28:28 +00:00
|
|
|
if (kvtop(isa_dev->id_maddr) != 0xcc000)
|
1994-08-04 17:42:35 +00:00
|
|
|
return (0);
|
1993-06-14 22:21:25 +00:00
|
|
|
break;
|
|
|
|
case ED_3COM_PCFR_C8000:
|
1993-06-27 10:28:28 +00:00
|
|
|
if (kvtop(isa_dev->id_maddr) != 0xc8000)
|
1994-08-04 17:42:35 +00:00
|
|
|
return (0);
|
1993-06-14 22:21:25 +00:00
|
|
|
break;
|
1993-06-26 02:32:26 +00:00
|
|
|
default:
|
1994-08-04 17:42:35 +00:00
|
|
|
return (0);
|
1993-06-14 22:21:25 +00:00
|
|
|
}
|
|
|
|
|
1993-09-22 17:47:43 +00:00
|
|
|
|
1993-06-14 22:21:25 +00:00
|
|
|
/*
|
1993-09-22 17:47:43 +00:00
|
|
|
* Reset NIC and ASIC. Enable on-board transceiver throughout reset
|
1994-08-04 17:42:35 +00:00
|
|
|
* sequence because it'll lock up if the cable isn't connected if we
|
|
|
|
* don't.
|
1993-06-14 22:21:25 +00:00
|
|
|
*/
|
1993-09-09 07:01:23 +00:00
|
|
|
outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_RST | ED_3COM_CR_XSEL);
|
|
|
|
|
1993-06-14 22:21:25 +00:00
|
|
|
/*
|
|
|
|
* Wait for a while, then un-reset it
|
|
|
|
*/
|
1993-09-09 07:01:23 +00:00
|
|
|
DELAY(50);
|
1994-08-04 17:42:35 +00:00
|
|
|
|
1993-09-09 07:01:23 +00:00
|
|
|
/*
|
|
|
|
* The 3Com ASIC defaults to rather strange settings for the CR after
|
1994-08-04 17:42:35 +00:00
|
|
|
* a reset - it's important to set it again after the following outb
|
|
|
|
* (this is done when we map the PROM below).
|
1993-09-09 07:01:23 +00:00
|
|
|
*/
|
|
|
|
outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_XSEL);
|
1993-06-14 22:21:25 +00:00
|
|
|
|
|
|
|
/*
|
1993-06-22 12:10:07 +00:00
|
|
|
* Wait a bit for the NIC to recover from the reset
|
1993-06-14 22:21:25 +00:00
|
|
|
*/
|
1993-09-29 20:30:26 +00:00
|
|
|
DELAY(5000);
|
|
|
|
|
|
|
|
sc->vendor = ED_VENDOR_3COM;
|
|
|
|
sc->type_str = "3c503";
|
1995-01-15 00:18:17 +00:00
|
|
|
sc->kdc.kdc_description = "Ethernet adapter: 3c503";
|
1993-09-29 20:30:26 +00:00
|
|
|
sc->mem_shared = 1;
|
1994-09-07 06:11:29 +00:00
|
|
|
sc->cr_proto = ED_CR_RD2;
|
1993-09-29 20:30:26 +00:00
|
|
|
|
|
|
|
/*
|
1994-08-04 17:42:35 +00:00
|
|
|
* Hmmm...a 16bit 3Com board has 16k of memory, but only an 8k window
|
|
|
|
* to it.
|
1993-09-29 20:30:26 +00:00
|
|
|
*/
|
|
|
|
memsize = 8192;
|
1993-06-14 22:21:25 +00:00
|
|
|
|
|
|
|
/*
|
1993-09-09 07:01:23 +00:00
|
|
|
* Get station address from on-board ROM
|
|
|
|
*/
|
1994-08-04 17:42:35 +00:00
|
|
|
|
1993-09-09 07:01:23 +00:00
|
|
|
/*
|
|
|
|
* First, map ethernet address PROM over the top of where the NIC
|
1994-08-04 17:42:35 +00:00
|
|
|
* registers normally appear.
|
1993-09-09 07:01:23 +00:00
|
|
|
*/
|
|
|
|
outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_EALO | ED_3COM_CR_XSEL);
|
|
|
|
|
|
|
|
for (i = 0; i < ETHER_ADDR_LEN; ++i)
|
|
|
|
sc->arpcom.ac_enaddr[i] = inb(sc->nic_addr + i);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Unmap PROM - select NIC registers. The proper setting of the
|
1994-08-04 17:42:35 +00:00
|
|
|
* tranceiver is set in ed_init so that the attach code is given a
|
|
|
|
* chance to set the default based on a compile-time config option
|
1993-06-14 22:21:25 +00:00
|
|
|
*/
|
1993-09-09 07:01:23 +00:00
|
|
|
outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_XSEL);
|
1993-06-14 22:21:25 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Determine if this is an 8bit or 16bit board
|
|
|
|
*/
|
1993-06-22 12:10:07 +00:00
|
|
|
|
1993-06-14 22:21:25 +00:00
|
|
|
/*
|
|
|
|
* select page 0 registers
|
|
|
|
*/
|
1994-08-04 17:42:35 +00:00
|
|
|
outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_STP);
|
1993-06-22 12:10:07 +00:00
|
|
|
|
1993-06-14 22:21:25 +00:00
|
|
|
/*
|
1994-08-04 17:42:35 +00:00
|
|
|
* Attempt to clear WTS bit. If it doesn't clear, then this is a 16bit
|
|
|
|
* board.
|
1993-06-14 22:21:25 +00:00
|
|
|
*/
|
|
|
|
outb(sc->nic_addr + ED_P0_DCR, 0);
|
1993-06-22 12:10:07 +00:00
|
|
|
|
1993-06-14 22:21:25 +00:00
|
|
|
/*
|
|
|
|
* select page 2 registers
|
|
|
|
*/
|
1994-08-04 17:42:35 +00:00
|
|
|
outb(sc->nic_addr + ED_P0_CR, ED_CR_PAGE_2 | ED_CR_RD2 | ED_CR_STP);
|
1993-06-22 12:10:07 +00:00
|
|
|
|
1993-06-14 22:21:25 +00:00
|
|
|
/*
|
|
|
|
* The 3c503 forces the WTS bit to a one if this is a 16bit board
|
|
|
|
*/
|
|
|
|
if (inb(sc->nic_addr + ED_P2_DCR) & ED_DCR_WTS)
|
1993-09-22 17:47:43 +00:00
|
|
|
isa16bit = 1;
|
1993-06-14 22:21:25 +00:00
|
|
|
else
|
1993-09-22 17:47:43 +00:00
|
|
|
isa16bit = 0;
|
1993-06-14 22:21:25 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* select page 0 registers
|
|
|
|
*/
|
1994-08-04 17:42:35 +00:00
|
|
|
outb(sc->nic_addr + ED_P2_CR, ED_CR_RD2 | ED_CR_STP);
|
1993-06-14 22:21:25 +00:00
|
|
|
|
1994-08-04 17:42:35 +00:00
|
|
|
sc->mem_start = (caddr_t) isa_dev->id_maddr;
|
1993-09-29 20:30:26 +00:00
|
|
|
sc->mem_size = memsize;
|
|
|
|
sc->mem_end = sc->mem_start + memsize;
|
1993-06-14 22:21:25 +00:00
|
|
|
|
1993-09-29 20:30:26 +00:00
|
|
|
/*
|
|
|
|
* We have an entire 8k window to put the transmit buffers on the
|
1994-08-04 17:42:35 +00:00
|
|
|
* 16bit boards. But since the 16bit 3c503's shared memory is only
|
|
|
|
* fast enough to overlap the loading of one full-size packet, trying
|
|
|
|
* to load more than 2 buffers can actually leave the transmitter idle
|
|
|
|
* during the load. So 2 seems the best value. (Although a mix of
|
|
|
|
* variable-sized packets might change this assumption. Nonetheless,
|
|
|
|
* we optimize for linear transfers of same-size packets.)
|
1993-09-29 20:30:26 +00:00
|
|
|
*/
|
|
|
|
if (isa16bit) {
|
1994-08-04 17:42:35 +00:00
|
|
|
if (isa_dev->id_flags & ED_FLAGS_NO_MULTI_BUFFERING)
|
1993-09-29 20:30:26 +00:00
|
|
|
sc->txb_cnt = 1;
|
|
|
|
else
|
|
|
|
sc->txb_cnt = 2;
|
|
|
|
|
|
|
|
sc->tx_page_start = ED_3COM_TX_PAGE_OFFSET_16BIT;
|
|
|
|
sc->rec_page_start = ED_3COM_RX_PAGE_OFFSET_16BIT;
|
|
|
|
sc->rec_page_stop = memsize / ED_PAGE_SIZE +
|
1994-08-04 17:42:35 +00:00
|
|
|
ED_3COM_RX_PAGE_OFFSET_16BIT;
|
1993-09-29 20:30:26 +00:00
|
|
|
sc->mem_ring = sc->mem_start;
|
|
|
|
} else {
|
|
|
|
sc->txb_cnt = 1;
|
|
|
|
sc->tx_page_start = ED_3COM_TX_PAGE_OFFSET_8BIT;
|
|
|
|
sc->rec_page_start = ED_TXBUF_SIZE + ED_3COM_TX_PAGE_OFFSET_8BIT;
|
|
|
|
sc->rec_page_stop = memsize / ED_PAGE_SIZE +
|
1994-08-04 17:42:35 +00:00
|
|
|
ED_3COM_TX_PAGE_OFFSET_8BIT;
|
1993-09-29 20:30:26 +00:00
|
|
|
sc->mem_ring = sc->mem_start + (ED_PAGE_SIZE * ED_TXBUF_SIZE);
|
|
|
|
}
|
1993-06-14 22:21:25 +00:00
|
|
|
|
1993-09-22 17:47:43 +00:00
|
|
|
sc->isa16bit = isa16bit;
|
1993-06-14 22:21:25 +00:00
|
|
|
|
|
|
|
/*
|
1994-08-04 17:42:35 +00:00
|
|
|
* Initialize GA page start/stop registers. Probably only needed if
|
|
|
|
* doing DMA, but what the hell.
|
1993-06-14 22:21:25 +00:00
|
|
|
*/
|
|
|
|
outb(sc->asic_addr + ED_3COM_PSTR, sc->rec_page_start);
|
|
|
|
outb(sc->asic_addr + ED_3COM_PSPR, sc->rec_page_stop);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Set IRQ. 3c503 only allows a choice of irq 2-5.
|
|
|
|
*/
|
|
|
|
switch (isa_dev->id_irq) {
|
|
|
|
case IRQ2:
|
|
|
|
outb(sc->asic_addr + ED_3COM_IDCFR, ED_3COM_IDCFR_IRQ2);
|
|
|
|
break;
|
|
|
|
case IRQ3:
|
|
|
|
outb(sc->asic_addr + ED_3COM_IDCFR, ED_3COM_IDCFR_IRQ3);
|
|
|
|
break;
|
|
|
|
case IRQ4:
|
|
|
|
outb(sc->asic_addr + ED_3COM_IDCFR, ED_3COM_IDCFR_IRQ4);
|
|
|
|
break;
|
|
|
|
case IRQ5:
|
|
|
|
outb(sc->asic_addr + ED_3COM_IDCFR, ED_3COM_IDCFR_IRQ5);
|
|
|
|
break;
|
|
|
|
default:
|
1996-03-31 15:53:19 +00:00
|
|
|
printf("ed%d: Invalid irq configuration (%d) must be 3-5,9 for 3c503\n",
|
1994-08-04 17:42:35 +00:00
|
|
|
isa_dev->id_unit, ffs(isa_dev->id_irq) - 1);
|
|
|
|
return (0);
|
1993-06-14 22:21:25 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
1994-08-04 17:42:35 +00:00
|
|
|
* Initialize GA configuration register. Set bank and enable shared
|
|
|
|
* mem.
|
1993-06-14 22:21:25 +00:00
|
|
|
*/
|
|
|
|
outb(sc->asic_addr + ED_3COM_GACFR, ED_3COM_GACFR_RSEL |
|
1994-08-04 17:42:35 +00:00
|
|
|
ED_3COM_GACFR_MBS0);
|
1993-06-14 22:21:25 +00:00
|
|
|
|
|
|
|
/*
|
1994-08-04 17:42:35 +00:00
|
|
|
* Initialize "Vector Pointer" registers. These gawd-awful things are
|
|
|
|
* compared to 20 bits of the address on ISA, and if they match, the
|
|
|
|
* shared memory is disabled. We set them to 0xffff0...allegedly the
|
|
|
|
* reset vector.
|
1993-06-14 22:21:25 +00:00
|
|
|
*/
|
|
|
|
outb(sc->asic_addr + ED_3COM_VPTR2, 0xff);
|
|
|
|
outb(sc->asic_addr + ED_3COM_VPTR1, 0xff);
|
|
|
|
outb(sc->asic_addr + ED_3COM_VPTR0, 0x00);
|
|
|
|
|
1993-06-22 12:10:07 +00:00
|
|
|
/*
|
|
|
|
* Zero memory and verify that it is clear
|
|
|
|
*/
|
1993-09-29 20:30:26 +00:00
|
|
|
bzero(sc->mem_start, memsize);
|
1993-06-14 22:21:25 +00:00
|
|
|
|
|
|
|
for (i = 0; i < memsize; ++i)
|
1993-09-29 20:30:26 +00:00
|
|
|
if (sc->mem_start[i]) {
|
1994-10-22 17:52:22 +00:00
|
|
|
printf("ed%d: failed to clear shared memory at %lx - check configuration\n",
|
1994-08-04 17:42:35 +00:00
|
|
|
isa_dev->id_unit, kvtop(sc->mem_start + i));
|
|
|
|
return (0);
|
1993-06-14 22:21:25 +00:00
|
|
|
}
|
|
|
|
isa_dev->id_msize = memsize;
|
1994-08-04 17:42:35 +00:00
|
|
|
return (ED_3COM_IO_PORTS);
|
1993-06-14 22:21:25 +00:00
|
|
|
}
|
1993-09-29 20:30:26 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Probe and vendor-specific initialization routine for NE1000/2000 boards
|
|
|
|
*/
|
1995-11-18 08:29:04 +00:00
|
|
|
static int
|
1993-09-29 20:30:26 +00:00
|
|
|
ed_probe_Novell(isa_dev)
|
|
|
|
struct isa_device *isa_dev;
|
|
|
|
{
|
|
|
|
struct ed_softc *sc = &ed_softc[isa_dev->id_unit];
|
1994-08-04 17:42:35 +00:00
|
|
|
u_int memsize, n;
|
1994-10-22 17:52:22 +00:00
|
|
|
u_char romdata[16], tmp;
|
1993-09-29 20:30:26 +00:00
|
|
|
static char test_pattern[32] = "THIS is A memory TEST pattern";
|
1994-08-04 17:42:35 +00:00
|
|
|
char test_buffer[32];
|
1993-09-29 20:30:26 +00:00
|
|
|
|
|
|
|
sc->asic_addr = isa_dev->id_iobase + ED_NOVELL_ASIC_OFFSET;
|
|
|
|
sc->nic_addr = isa_dev->id_iobase + ED_NOVELL_NIC_OFFSET;
|
|
|
|
|
|
|
|
/* XXX - do Novell-specific probe here */
|
|
|
|
|
|
|
|
/* Reset the board */
|
1994-08-04 17:42:35 +00:00
|
|
|
#ifdef GWETHER
|
|
|
|
outb(sc->asic_addr + ED_NOVELL_RESET, 0);
|
|
|
|
DELAY(200);
|
|
|
|
#endif /* GWETHER */
|
1993-09-29 20:30:26 +00:00
|
|
|
tmp = inb(sc->asic_addr + ED_NOVELL_RESET);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* I don't know if this is necessary; probably cruft leftover from
|
1994-08-04 17:42:35 +00:00
|
|
|
* Clarkson packet driver code. Doesn't do a thing on the boards I've
|
|
|
|
* tested. -DG [note that a outb(0x84, 0) seems to work here, and is
|
|
|
|
* non-invasive...but some boards don't seem to reset and I don't have
|
|
|
|
* complete documentation on what the 'right' thing to do is...so we
|
|
|
|
* do the invasive thing for now. Yuck.]
|
1993-09-29 20:30:26 +00:00
|
|
|
*/
|
|
|
|
outb(sc->asic_addr + ED_NOVELL_RESET, tmp);
|
|
|
|
DELAY(5000);
|
|
|
|
|
1993-09-30 05:27:55 +00:00
|
|
|
/*
|
|
|
|
* This is needed because some NE clones apparently don't reset the
|
1994-08-04 17:42:35 +00:00
|
|
|
* NIC properly (or the NIC chip doesn't reset fully on power-up) XXX
|
|
|
|
* - this makes the probe invasive! ...Done against my better
|
|
|
|
* judgement. -DLG
|
1993-09-30 05:27:55 +00:00
|
|
|
*/
|
1994-08-04 17:42:35 +00:00
|
|
|
outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_STP);
|
1993-09-29 20:30:26 +00:00
|
|
|
|
1993-10-23 04:52:41 +00:00
|
|
|
DELAY(5000);
|
|
|
|
|
|
|
|
/* Make sure that we really have an 8390 based board */
|
|
|
|
if (!ed_probe_generic8390(sc))
|
1994-08-04 17:42:35 +00:00
|
|
|
return (0);
|
1993-10-23 04:52:41 +00:00
|
|
|
|
1993-09-29 20:30:26 +00:00
|
|
|
sc->vendor = ED_VENDOR_NOVELL;
|
|
|
|
sc->mem_shared = 0;
|
1994-09-07 06:11:29 +00:00
|
|
|
sc->cr_proto = ED_CR_RD2;
|
1993-09-29 20:30:26 +00:00
|
|
|
isa_dev->id_maddr = 0;
|
|
|
|
|
|
|
|
/*
|
1994-08-04 17:42:35 +00:00
|
|
|
* Test the ability to read and write to the NIC memory. This has the
|
|
|
|
* side affect of determining if this is an NE1000 or an NE2000.
|
1993-09-29 20:30:26 +00:00
|
|
|
*/
|
|
|
|
|
|
|
|
/*
|
1994-08-04 17:42:35 +00:00
|
|
|
* This prevents packets from being stored in the NIC memory when the
|
|
|
|
* readmem routine turns on the start bit in the CR.
|
1993-09-29 20:30:26 +00:00
|
|
|
*/
|
|
|
|
outb(sc->nic_addr + ED_P0_RCR, ED_RCR_MON);
|
|
|
|
|
|
|
|
/* Temporarily initialize DCR for byte operations */
|
1994-08-04 17:42:35 +00:00
|
|
|
outb(sc->nic_addr + ED_P0_DCR, ED_DCR_FT1 | ED_DCR_LS);
|
1993-09-29 20:30:26 +00:00
|
|
|
|
|
|
|
outb(sc->nic_addr + ED_P0_PSTART, 8192 / ED_PAGE_SIZE);
|
|
|
|
outb(sc->nic_addr + ED_P0_PSTOP, 16384 / ED_PAGE_SIZE);
|
|
|
|
|
|
|
|
sc->isa16bit = 0;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Write a test pattern in byte mode. If this fails, then there
|
1994-08-04 17:42:35 +00:00
|
|
|
* probably isn't any memory at 8k - which likely means that the board
|
|
|
|
* is an NE2000.
|
1993-09-29 20:30:26 +00:00
|
|
|
*/
|
|
|
|
ed_pio_writemem(sc, test_pattern, 8192, sizeof(test_pattern));
|
|
|
|
ed_pio_readmem(sc, 8192, test_buffer, sizeof(test_pattern));
|
|
|
|
|
|
|
|
if (bcmp(test_pattern, test_buffer, sizeof(test_pattern))) {
|
|
|
|
/* not an NE1000 - try NE2000 */
|
|
|
|
|
1994-08-04 17:42:35 +00:00
|
|
|
outb(sc->nic_addr + ED_P0_DCR, ED_DCR_WTS | ED_DCR_FT1 | ED_DCR_LS);
|
1993-09-29 20:30:26 +00:00
|
|
|
outb(sc->nic_addr + ED_P0_PSTART, 16384 / ED_PAGE_SIZE);
|
|
|
|
outb(sc->nic_addr + ED_P0_PSTOP, 32768 / ED_PAGE_SIZE);
|
|
|
|
|
|
|
|
sc->isa16bit = 1;
|
1994-08-04 17:42:35 +00:00
|
|
|
|
1993-09-29 20:30:26 +00:00
|
|
|
/*
|
|
|
|
* Write a test pattern in word mode. If this also fails, then
|
1994-08-04 17:42:35 +00:00
|
|
|
* we don't know what this board is.
|
1993-09-29 20:30:26 +00:00
|
|
|
*/
|
|
|
|
ed_pio_writemem(sc, test_pattern, 16384, sizeof(test_pattern));
|
|
|
|
ed_pio_readmem(sc, 16384, test_buffer, sizeof(test_pattern));
|
|
|
|
|
|
|
|
if (bcmp(test_pattern, test_buffer, sizeof(test_pattern)))
|
1994-08-04 17:42:35 +00:00
|
|
|
return (0); /* not an NE2000 either */
|
1993-09-29 20:30:26 +00:00
|
|
|
|
|
|
|
sc->type = ED_TYPE_NE2000;
|
|
|
|
sc->type_str = "NE2000";
|
1995-01-15 00:18:17 +00:00
|
|
|
sc->kdc.kdc_description = "Ethernet adapter: NE2000";
|
1993-09-29 20:30:26 +00:00
|
|
|
} else {
|
|
|
|
sc->type = ED_TYPE_NE1000;
|
|
|
|
sc->type_str = "NE1000";
|
1995-01-15 00:18:17 +00:00
|
|
|
sc->kdc.kdc_description = "Ethernet adapter: NE1000";
|
1993-09-29 20:30:26 +00:00
|
|
|
}
|
1994-08-04 17:42:35 +00:00
|
|
|
|
1993-09-29 20:30:26 +00:00
|
|
|
/* 8k of memory plus an additional 8k if 16bit */
|
|
|
|
memsize = 8192 + sc->isa16bit * 8192;
|
|
|
|
|
1994-08-04 17:42:35 +00:00
|
|
|
#if 0 /* probably not useful - NE boards only come two ways */
|
1993-09-29 20:30:26 +00:00
|
|
|
/* allow kernel config file overrides */
|
|
|
|
if (isa_dev->id_msize)
|
|
|
|
memsize = isa_dev->id_msize;
|
|
|
|
#endif
|
|
|
|
|
|
|
|
sc->mem_size = memsize;
|
|
|
|
|
|
|
|
/* NIC memory doesn't start at zero on an NE board */
|
|
|
|
/* The start address is tied to the bus width */
|
|
|
|
sc->mem_start = (char *) 8192 + sc->isa16bit * 8192;
|
|
|
|
sc->mem_end = sc->mem_start + memsize;
|
|
|
|
sc->tx_page_start = memsize / ED_PAGE_SIZE;
|
|
|
|
|
1994-08-04 17:42:35 +00:00
|
|
|
#ifdef GWETHER
|
|
|
|
{
|
|
|
|
int x, i, mstart = 0, msize = 0;
|
|
|
|
char pbuf0[ED_PAGE_SIZE], pbuf[ED_PAGE_SIZE], tbuf[ED_PAGE_SIZE];
|
|
|
|
|
|
|
|
for (i = 0; i < ED_PAGE_SIZE; i++)
|
|
|
|
pbuf0[i] = 0;
|
|
|
|
|
|
|
|
/* Clear all the memory. */
|
|
|
|
for (x = 1; x < 256; x++)
|
|
|
|
ed_pio_writemem(sc, pbuf0, x * 256, ED_PAGE_SIZE);
|
|
|
|
|
|
|
|
/* Search for the start of RAM. */
|
|
|
|
for (x = 1; x < 256; x++) {
|
|
|
|
ed_pio_readmem(sc, x * 256, tbuf, ED_PAGE_SIZE);
|
1995-07-25 22:18:56 +00:00
|
|
|
if (bcmp(pbuf0, tbuf, ED_PAGE_SIZE) == 0) {
|
1994-08-04 17:42:35 +00:00
|
|
|
for (i = 0; i < ED_PAGE_SIZE; i++)
|
|
|
|
pbuf[i] = 255 - x;
|
|
|
|
ed_pio_writemem(sc, pbuf, x * 256, ED_PAGE_SIZE);
|
|
|
|
ed_pio_readmem(sc, x * 256, tbuf, ED_PAGE_SIZE);
|
1995-07-25 22:18:56 +00:00
|
|
|
if (bcmp(pbuf, tbuf, ED_PAGE_SIZE) == 0) {
|
1994-08-04 17:42:35 +00:00
|
|
|
mstart = x * ED_PAGE_SIZE;
|
|
|
|
msize = ED_PAGE_SIZE;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (mstart == 0) {
|
|
|
|
printf("ed%d: Cannot find start of RAM.\n", isa_dev->id_unit);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
/* Search for the start of RAM. */
|
|
|
|
for (x = (mstart / ED_PAGE_SIZE) + 1; x < 256; x++) {
|
|
|
|
ed_pio_readmem(sc, x * 256, tbuf, ED_PAGE_SIZE);
|
1995-07-25 22:18:56 +00:00
|
|
|
if (bcmp(pbuf0, tbuf, ED_PAGE_SIZE) == 0) {
|
1994-08-04 17:42:35 +00:00
|
|
|
for (i = 0; i < ED_PAGE_SIZE; i++)
|
|
|
|
pbuf[i] = 255 - x;
|
|
|
|
ed_pio_writemem(sc, pbuf, x * 256, ED_PAGE_SIZE);
|
|
|
|
ed_pio_readmem(sc, x * 256, tbuf, ED_PAGE_SIZE);
|
1995-07-25 22:18:56 +00:00
|
|
|
if (bcmp(pbuf, tbuf, ED_PAGE_SIZE) == 0)
|
1994-08-04 17:42:35 +00:00
|
|
|
msize += ED_PAGE_SIZE;
|
|
|
|
else {
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (msize == 0) {
|
|
|
|
printf("ed%d: Cannot find any RAM, start : %d, x = %d.\n", isa_dev->id_unit, mstart, x);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
printf("ed%d: RAM start at %d, size : %d.\n", isa_dev->id_unit, mstart, msize);
|
|
|
|
|
|
|
|
sc->mem_size = msize;
|
|
|
|
sc->mem_start = (char *) mstart;
|
|
|
|
sc->mem_end = (char *) (msize + mstart);
|
|
|
|
sc->tx_page_start = mstart / ED_PAGE_SIZE;
|
|
|
|
}
|
|
|
|
#endif /* GWETHER */
|
|
|
|
|
1993-09-29 20:30:26 +00:00
|
|
|
/*
|
|
|
|
* Use one xmit buffer if < 16k, two buffers otherwise (if not told
|
1994-08-04 17:42:35 +00:00
|
|
|
* otherwise).
|
1993-09-29 20:30:26 +00:00
|
|
|
*/
|
|
|
|
if ((memsize < 16384) || (isa_dev->id_flags & ED_FLAGS_NO_MULTI_BUFFERING))
|
|
|
|
sc->txb_cnt = 1;
|
|
|
|
else
|
|
|
|
sc->txb_cnt = 2;
|
|
|
|
|
|
|
|
sc->rec_page_start = sc->tx_page_start + sc->txb_cnt * ED_TXBUF_SIZE;
|
|
|
|
sc->rec_page_stop = sc->tx_page_start + memsize / ED_PAGE_SIZE;
|
|
|
|
|
|
|
|
sc->mem_ring = sc->mem_start + sc->txb_cnt * ED_PAGE_SIZE * ED_TXBUF_SIZE;
|
|
|
|
|
|
|
|
ed_pio_readmem(sc, 0, romdata, 16);
|
1993-10-15 11:06:41 +00:00
|
|
|
for (n = 0; n < ETHER_ADDR_LEN; n++)
|
1994-08-04 17:42:35 +00:00
|
|
|
sc->arpcom.ac_enaddr[n] = romdata[n * (sc->isa16bit + 1)];
|
|
|
|
|
|
|
|
#ifdef GWETHER
|
1995-01-15 00:18:17 +00:00
|
|
|
if (sc->arpcom.ac_enaddr[2] == 0x86) {
|
1994-08-04 17:42:35 +00:00
|
|
|
sc->type_str = "Gateway AT";
|
1995-01-15 00:18:17 +00:00
|
|
|
sc->kdc.kdc_description = "Ethernet adapter: Gateway AT";
|
|
|
|
}
|
1994-08-04 17:42:35 +00:00
|
|
|
#endif /* GWETHER */
|
1993-09-29 20:30:26 +00:00
|
|
|
|
|
|
|
/* clear any pending interrupts that might have occurred above */
|
|
|
|
outb(sc->nic_addr + ED_P0_ISR, 0xff);
|
|
|
|
|
1994-08-04 17:42:35 +00:00
|
|
|
return (ED_NOVELL_IO_PORTS);
|
1993-09-29 20:30:26 +00:00
|
|
|
}
|
1994-08-04 17:42:35 +00:00
|
|
|
|
1995-10-10 09:52:55 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Probe and vendor-specific initialization routine for PCCARDs
|
|
|
|
*/
|
1995-11-18 08:29:04 +00:00
|
|
|
static int
|
1995-10-10 09:52:55 +00:00
|
|
|
ed_probe_pccard(isa_dev, ether)
|
|
|
|
struct isa_device *isa_dev;
|
|
|
|
u_char *ether;
|
|
|
|
{
|
|
|
|
struct ed_softc *sc = &ed_softc[isa_dev->id_unit];
|
|
|
|
int i;
|
|
|
|
u_int memsize;
|
1995-10-28 15:39:31 +00:00
|
|
|
u_char isa16bit;
|
1995-10-10 09:52:55 +00:00
|
|
|
|
|
|
|
sc->nic_addr = isa_dev->id_iobase;
|
|
|
|
sc->gone = 0;
|
|
|
|
sc->is790 = 0;
|
|
|
|
sc->cr_proto = ED_CR_RD2;
|
|
|
|
sc->vendor = ED_VENDOR_PCCARD;
|
|
|
|
sc->type = 0;
|
|
|
|
sc->type_str = "PCCARD";
|
|
|
|
sc->kdc.kdc_description = "PCCARD Ethernet";
|
|
|
|
sc->mem_size = isa_dev->id_msize = memsize = 16384;
|
|
|
|
sc->isa16bit = isa16bit = 1;
|
|
|
|
|
|
|
|
for (i = 0; i < ETHER_ADDR_LEN; ++i)
|
|
|
|
sc->arpcom.ac_enaddr[i] = ether[i];
|
|
|
|
|
|
|
|
#if ED_DEBUG
|
|
|
|
printf("type = %x type_str=%s isa16bit=%d memsize=%d id_msize=%d\n",
|
|
|
|
sc->type, sc->type_str, isa16bit, memsize, isa_dev->id_msize);
|
|
|
|
#endif
|
|
|
|
|
|
|
|
i = inb(sc->nic_addr + ED_PC_RESET);
|
|
|
|
DELAY(100000);
|
|
|
|
outb(sc->nic_addr + ED_PC_RESET,i);
|
|
|
|
DELAY(100000);
|
|
|
|
i = inb(sc->nic_addr + ED_PC_MISC);
|
|
|
|
if (!i) {
|
|
|
|
int j;
|
|
|
|
printf("ed_probe_pccard: possible failure\n");
|
|
|
|
for (j=0;j<20 && !i;j++) {
|
|
|
|
printf(".");
|
|
|
|
DELAY(100000);
|
|
|
|
i = inb(sc->nic_addr + ED_PC_MISC);
|
|
|
|
}
|
|
|
|
if (!i) {
|
|
|
|
printf("dead :-(\n");
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
printf("\n");
|
|
|
|
}
|
|
|
|
/*
|
|
|
|
* Set initial values for width/size.
|
|
|
|
*/
|
|
|
|
|
|
|
|
/* Make sure that we really have an 8390 based board */
|
|
|
|
if (!ed_probe_generic8390(sc)) {
|
|
|
|
printf("ed_probe_generic8390 failed\n");
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
sc->txb_cnt = 2;
|
|
|
|
sc->tx_page_start = ED_PC_PAGE_OFFSET;
|
|
|
|
sc->rec_page_start = sc->tx_page_start + ED_TXBUF_SIZE * sc->txb_cnt;
|
|
|
|
sc->rec_page_stop = sc->tx_page_start + memsize / ED_PAGE_SIZE;
|
|
|
|
|
|
|
|
sc->mem_shared = 1;
|
|
|
|
sc->mem_start = (caddr_t) isa_dev->id_maddr;
|
|
|
|
sc->mem_size = memsize;
|
|
|
|
sc->mem_end = sc->mem_start + memsize;
|
|
|
|
|
|
|
|
sc->mem_ring = sc->mem_start +
|
|
|
|
sc->txb_cnt * ED_PAGE_SIZE * ED_TXBUF_SIZE;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Now zero memory and verify that it is clear
|
|
|
|
*/
|
|
|
|
bzero(sc->mem_start, memsize);
|
|
|
|
|
|
|
|
for (i = 0; i < memsize; ++i) {
|
|
|
|
if (sc->mem_start[i]) {
|
|
|
|
printf("ed%d: failed to clear shared memory at %lx - check configuration\n",
|
|
|
|
isa_dev->id_unit, kvtop(sc->mem_start + i));
|
|
|
|
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
sc->mem_start[i] = (i - 5) & 0xff;
|
|
|
|
}
|
|
|
|
for (i = 0; i < memsize; ++i) {
|
|
|
|
if ((sc->mem_start[i] & 0xff) != ((i - 5) & 0xff)) {
|
|
|
|
printf("ed%d: shared memory failed at %lx (%x != %x) - check configuration\n",
|
|
|
|
isa_dev->id_unit, kvtop(sc->mem_start + i),
|
|
|
|
sc->mem_start[i], (i-5) & 0xff);
|
|
|
|
return (0);
|
|
|
|
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
i = inb(sc->nic_addr + ED_PC_MISC);
|
|
|
|
if (!i) {
|
|
|
|
printf("ed_probe_pccard: possible failure(2)\n");
|
|
|
|
}
|
|
|
|
|
|
|
|
/* clear any pending interupts that we may have caused */
|
|
|
|
outb(sc->nic_addr + ED_P0_ISR, 0xff);
|
|
|
|
|
|
|
|
return (ED_PC_IO_PORTS);
|
|
|
|
}
|
|
|
|
|
1993-06-14 22:21:25 +00:00
|
|
|
/*
|
|
|
|
* Install interface into kernel networking data structures
|
|
|
|
*/
|
1995-11-18 08:29:04 +00:00
|
|
|
static int
|
1993-06-14 22:21:25 +00:00
|
|
|
ed_attach(isa_dev)
|
|
|
|
struct isa_device *isa_dev;
|
|
|
|
{
|
|
|
|
struct ed_softc *sc = &ed_softc[isa_dev->id_unit];
|
|
|
|
struct ifnet *ifp = &sc->arpcom.ac_if;
|
1994-08-04 17:42:35 +00:00
|
|
|
|
1993-06-14 22:21:25 +00:00
|
|
|
/*
|
|
|
|
* Set interface to stopped condition (reset)
|
|
|
|
*/
|
1995-12-05 02:01:59 +00:00
|
|
|
ed_stop(sc);
|
1993-06-14 22:21:25 +00:00
|
|
|
|
1995-10-10 09:52:55 +00:00
|
|
|
if (!ifp->if_name) {
|
|
|
|
/*
|
|
|
|
* Initialize ifnet structure
|
|
|
|
*/
|
1996-02-06 18:51:28 +00:00
|
|
|
ifp->if_softc = sc;
|
1995-10-10 09:52:55 +00:00
|
|
|
ifp->if_unit = isa_dev->id_unit;
|
|
|
|
ifp->if_name = "ed";
|
|
|
|
ifp->if_output = ether_output;
|
|
|
|
ifp->if_start = ed_start;
|
|
|
|
ifp->if_ioctl = ed_ioctl;
|
|
|
|
ifp->if_watchdog = ed_watchdog;
|
|
|
|
ifp->if_snd.ifq_maxlen = IFQ_MAXLEN;
|
1993-06-14 22:21:25 +00:00
|
|
|
|
1995-10-10 09:52:55 +00:00
|
|
|
/*
|
|
|
|
* Set default state for ALTPHYS flag (used to disable the
|
|
|
|
* tranceiver for AUI operation), based on compile-time
|
|
|
|
* config option.
|
|
|
|
*/
|
|
|
|
if (isa_dev->id_flags & ED_FLAGS_DISABLE_TRANCEIVER)
|
|
|
|
ifp->if_flags = (IFF_BROADCAST | IFF_SIMPLEX |
|
1995-10-13 19:48:06 +00:00
|
|
|
IFF_MULTICAST | IFF_ALTPHYS);
|
1995-10-10 09:52:55 +00:00
|
|
|
else
|
|
|
|
ifp->if_flags = (IFF_BROADCAST | IFF_SIMPLEX |
|
1995-10-13 19:48:06 +00:00
|
|
|
IFF_MULTICAST);
|
1993-06-22 12:10:07 +00:00
|
|
|
|
1995-10-10 09:52:55 +00:00
|
|
|
/*
|
|
|
|
* Attach the interface
|
|
|
|
*/
|
|
|
|
if_attach(ifp);
|
1996-02-06 18:51:28 +00:00
|
|
|
ether_ifattach(ifp);
|
1995-10-10 09:52:55 +00:00
|
|
|
}
|
1995-01-15 00:18:17 +00:00
|
|
|
/* device attach does transition from UNCONFIGURED to IDLE state */
|
|
|
|
sc->kdc.kdc_state = DC_IDLE;
|
1993-06-14 22:21:25 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Print additional info when attached
|
|
|
|
*/
|
1996-01-24 21:12:23 +00:00
|
|
|
printf("ed%d: address %6D, ", isa_dev->id_unit,
|
|
|
|
sc->arpcom.ac_enaddr, ":");
|
1993-09-22 17:47:43 +00:00
|
|
|
|
|
|
|
if (sc->type_str && (*sc->type_str != 0))
|
|
|
|
printf("type %s ", sc->type_str);
|
|
|
|
else
|
|
|
|
printf("type unknown (0x%x) ", sc->type);
|
|
|
|
|
1994-08-04 17:42:35 +00:00
|
|
|
printf("%s ", sc->isa16bit ? "(16 bit)" : "(8 bit)");
|
1993-09-22 17:47:43 +00:00
|
|
|
|
|
|
|
printf("%s\n", ((sc->vendor == ED_VENDOR_3COM) &&
|
1994-08-04 17:42:35 +00:00
|
|
|
(ifp->if_flags & IFF_ALTPHYS)) ? " tranceiver disabled" : "");
|
1993-07-20 23:16:50 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* If BPF is in the kernel, call the attach for it
|
|
|
|
*/
|
|
|
|
#if NBPFILTER > 0
|
1996-02-06 18:51:28 +00:00
|
|
|
bpfattach(ifp, DLT_EN10MB, sizeof(struct ether_header));
|
1993-07-20 23:16:50 +00:00
|
|
|
#endif
|
1993-11-25 01:38:01 +00:00
|
|
|
return 1;
|
1993-06-14 22:21:25 +00:00
|
|
|
}
|
1994-08-04 17:42:35 +00:00
|
|
|
|
1993-06-14 22:21:25 +00:00
|
|
|
/*
|
|
|
|
* Reset interface.
|
|
|
|
*/
|
1995-11-18 08:29:04 +00:00
|
|
|
static void
|
1995-12-05 02:01:59 +00:00
|
|
|
ed_reset(ifp)
|
|
|
|
struct ifnet *ifp;
|
1993-06-14 22:21:25 +00:00
|
|
|
{
|
1996-02-06 18:51:28 +00:00
|
|
|
struct ed_softc *sc = ifp->if_softc;
|
1994-08-04 17:42:35 +00:00
|
|
|
int s;
|
1993-06-14 22:21:25 +00:00
|
|
|
|
1995-12-05 02:01:59 +00:00
|
|
|
if (sc->gone)
|
1995-10-10 09:52:55 +00:00
|
|
|
return;
|
1993-11-22 11:08:16 +00:00
|
|
|
s = splimp();
|
1993-06-14 22:21:25 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Stop interface and re-initialize.
|
|
|
|
*/
|
1995-12-05 02:01:59 +00:00
|
|
|
ed_stop(sc);
|
|
|
|
ed_init(ifp);
|
1993-06-14 22:21:25 +00:00
|
|
|
|
1993-07-27 10:52:31 +00:00
|
|
|
(void) splx(s);
|
1993-06-14 22:21:25 +00:00
|
|
|
}
|
1994-08-04 17:42:35 +00:00
|
|
|
|
1993-06-14 22:21:25 +00:00
|
|
|
/*
|
|
|
|
* Take interface offline.
|
|
|
|
*/
|
1995-11-18 08:29:04 +00:00
|
|
|
static void
|
1995-12-05 02:01:59 +00:00
|
|
|
ed_stop(sc)
|
|
|
|
struct ed_softc *sc;
|
1993-06-14 22:21:25 +00:00
|
|
|
{
|
1994-08-04 17:42:35 +00:00
|
|
|
int n = 5000;
|
|
|
|
|
1995-10-10 09:52:55 +00:00
|
|
|
if (sc->gone)
|
|
|
|
return;
|
1993-06-14 22:21:25 +00:00
|
|
|
/*
|
|
|
|
* Stop everything on the interface, and select page 0 registers.
|
|
|
|
*/
|
1994-09-07 06:11:29 +00:00
|
|
|
outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_STP);
|
1994-08-04 17:42:35 +00:00
|
|
|
|
1993-06-14 22:21:25 +00:00
|
|
|
/*
|
1994-08-04 17:42:35 +00:00
|
|
|
* Wait for interface to enter stopped state, but limit # of checks to
|
|
|
|
* 'n' (about 5ms). It shouldn't even take 5us on modern DS8390's, but
|
|
|
|
* just in case it's an old one.
|
1993-06-14 22:21:25 +00:00
|
|
|
*/
|
1993-07-27 03:13:50 +00:00
|
|
|
while (((inb(sc->nic_addr + ED_P0_ISR) & ED_ISR_RST) == 0) && --n);
|
1993-06-14 22:21:25 +00:00
|
|
|
}
|
|
|
|
|
1993-06-23 16:22:04 +00:00
|
|
|
/*
|
|
|
|
* Device timeout/watchdog routine. Entered if the device neglects to
|
|
|
|
* generate an interrupt after a transmit has been started on it.
|
|
|
|
*/
|
1995-11-18 08:29:04 +00:00
|
|
|
static void
|
1995-12-05 02:01:59 +00:00
|
|
|
ed_watchdog(ifp)
|
|
|
|
struct ifnet *ifp;
|
1993-06-14 22:21:25 +00:00
|
|
|
{
|
1996-02-06 18:51:28 +00:00
|
|
|
struct ed_softc *sc = ifp->if_softc;
|
1993-10-23 04:52:41 +00:00
|
|
|
|
1995-10-10 09:52:55 +00:00
|
|
|
if (sc->gone)
|
|
|
|
return;
|
1995-12-05 02:01:59 +00:00
|
|
|
log(LOG_ERR, "ed%d: device timeout\n", ifp->if_unit);
|
|
|
|
ifp->if_oerrors++;
|
1993-06-14 22:21:25 +00:00
|
|
|
|
1995-12-05 02:01:59 +00:00
|
|
|
ed_reset(ifp);
|
1993-06-14 22:21:25 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
1994-08-04 17:42:35 +00:00
|
|
|
* Initialize device.
|
1993-06-14 22:21:25 +00:00
|
|
|
*/
|
1995-11-18 08:29:04 +00:00
|
|
|
static void
|
1995-12-05 02:01:59 +00:00
|
|
|
ed_init(ifp)
|
|
|
|
struct ifnet *ifp;
|
1993-06-14 22:21:25 +00:00
|
|
|
{
|
1996-02-06 18:51:28 +00:00
|
|
|
struct ed_softc *sc = ifp->if_softc;
|
1994-08-04 17:42:35 +00:00
|
|
|
int i, s;
|
1993-06-14 22:21:25 +00:00
|
|
|
|
1995-10-10 09:52:55 +00:00
|
|
|
if (sc->gone)
|
|
|
|
return;
|
1993-06-14 22:21:25 +00:00
|
|
|
|
|
|
|
/* address not known */
|
1994-08-04 17:42:35 +00:00
|
|
|
if (ifp->if_addrlist == (struct ifaddr *) 0)
|
|
|
|
return;
|
1993-06-14 22:21:25 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Initialize the NIC in the exact order outlined in the NS manual.
|
1994-08-04 17:42:35 +00:00
|
|
|
* This init procedure is "mandatory"...don't change what or when
|
|
|
|
* things happen.
|
1993-06-14 22:21:25 +00:00
|
|
|
*/
|
1993-11-22 11:08:16 +00:00
|
|
|
s = splimp();
|
1993-06-14 22:21:25 +00:00
|
|
|
|
|
|
|
/* reset transmitter flags */
|
|
|
|
sc->xmit_busy = 0;
|
1995-12-05 02:01:59 +00:00
|
|
|
ifp->if_timer = 0;
|
1993-06-14 22:21:25 +00:00
|
|
|
|
1993-09-29 20:30:26 +00:00
|
|
|
sc->txb_inuse = 0;
|
|
|
|
sc->txb_new = 0;
|
|
|
|
sc->txb_next_tx = 0;
|
1993-06-14 22:21:25 +00:00
|
|
|
|
|
|
|
/* This variable is used below - don't move this assignment */
|
|
|
|
sc->next_packet = sc->rec_page_start + 1;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Set interface for page 0, Remote DMA complete, Stopped
|
|
|
|
*/
|
1994-09-07 06:11:29 +00:00
|
|
|
outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_STP);
|
|
|
|
|
1993-09-22 17:47:43 +00:00
|
|
|
if (sc->isa16bit) {
|
1994-08-04 17:42:35 +00:00
|
|
|
|
1993-06-14 22:21:25 +00:00
|
|
|
/*
|
1994-08-04 17:42:35 +00:00
|
|
|
* Set FIFO threshold to 8, No auto-init Remote DMA, byte
|
|
|
|
* order=80x86, word-wide DMA xfers,
|
1993-06-14 22:21:25 +00:00
|
|
|
*/
|
1994-08-04 17:42:35 +00:00
|
|
|
outb(sc->nic_addr + ED_P0_DCR, ED_DCR_FT1 | ED_DCR_WTS | ED_DCR_LS);
|
1993-06-14 22:21:25 +00:00
|
|
|
} else {
|
1994-08-04 17:42:35 +00:00
|
|
|
|
1993-06-14 22:21:25 +00:00
|
|
|
/*
|
|
|
|
* Same as above, but byte-wide DMA xfers
|
|
|
|
*/
|
1994-08-04 17:42:35 +00:00
|
|
|
outb(sc->nic_addr + ED_P0_DCR, ED_DCR_FT1 | ED_DCR_LS);
|
1993-06-14 22:21:25 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Clear Remote Byte Count Registers
|
|
|
|
*/
|
|
|
|
outb(sc->nic_addr + ED_P0_RBCR0, 0);
|
|
|
|
outb(sc->nic_addr + ED_P0_RBCR1, 0);
|
|
|
|
|
|
|
|
/*
|
1994-08-04 17:42:35 +00:00
|
|
|
* For the moment, don't store incoming packets in memory.
|
1993-06-14 22:21:25 +00:00
|
|
|
*/
|
1994-08-04 17:42:35 +00:00
|
|
|
outb(sc->nic_addr + ED_P0_RCR, ED_RCR_MON);
|
1993-06-14 22:21:25 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Place NIC in internal loopback mode
|
|
|
|
*/
|
|
|
|
outb(sc->nic_addr + ED_P0_TCR, ED_TCR_LB0);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Initialize transmit/receive (ring-buffer) Page Start
|
|
|
|
*/
|
|
|
|
outb(sc->nic_addr + ED_P0_TPSR, sc->tx_page_start);
|
|
|
|
outb(sc->nic_addr + ED_P0_PSTART, sc->rec_page_start);
|
1993-11-22 11:08:16 +00:00
|
|
|
/* Set lower bits of byte addressable framing to 0 */
|
|
|
|
if (sc->is790)
|
|
|
|
outb(sc->nic_addr + 0x09, 0);
|
1993-06-14 22:21:25 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Initialize Receiver (ring-buffer) Page Stop and Boundry
|
|
|
|
*/
|
|
|
|
outb(sc->nic_addr + ED_P0_PSTOP, sc->rec_page_stop);
|
|
|
|
outb(sc->nic_addr + ED_P0_BNRY, sc->rec_page_start);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Clear all interrupts. A '1' in each bit position clears the
|
1994-08-04 17:42:35 +00:00
|
|
|
* corresponding flag.
|
1993-06-14 22:21:25 +00:00
|
|
|
*/
|
|
|
|
outb(sc->nic_addr + ED_P0_ISR, 0xff);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Enable the following interrupts: receive/transmit complete,
|
1994-08-04 17:42:35 +00:00
|
|
|
* receive/transmit error, and Receiver OverWrite.
|
1995-05-30 08:16:23 +00:00
|
|
|
*
|
1993-06-14 22:21:25 +00:00
|
|
|
* Counter overflow and Remote DMA complete are *not* enabled.
|
|
|
|
*/
|
|
|
|
outb(sc->nic_addr + ED_P0_IMR,
|
1994-08-04 17:42:35 +00:00
|
|
|
ED_IMR_PRXE | ED_IMR_PTXE | ED_IMR_RXEE | ED_IMR_TXEE | ED_IMR_OVWE);
|
1993-06-14 22:21:25 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Program Command Register for page 1
|
|
|
|
*/
|
1994-09-07 06:11:29 +00:00
|
|
|
outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_PAGE_1 | ED_CR_STP);
|
1994-08-04 17:42:35 +00:00
|
|
|
|
1993-06-14 22:21:25 +00:00
|
|
|
/*
|
|
|
|
* Copy out our station address
|
|
|
|
*/
|
|
|
|
for (i = 0; i < ETHER_ADDR_LEN; ++i)
|
|
|
|
outb(sc->nic_addr + ED_P1_PAR0 + i, sc->arpcom.ac_enaddr[i]);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Set Current Page pointer to next_packet (initialized above)
|
|
|
|
*/
|
|
|
|
outb(sc->nic_addr + ED_P1_CURR, sc->next_packet);
|
|
|
|
|
|
|
|
/*
|
1994-08-04 17:42:35 +00:00
|
|
|
* Program Receiver Configuration Register and multicast filter. CR is
|
|
|
|
* set to page 0 on return.
|
1993-06-14 22:21:25 +00:00
|
|
|
*/
|
1995-12-05 02:01:59 +00:00
|
|
|
ed_setrcr(sc);
|
1994-08-04 17:42:35 +00:00
|
|
|
|
1993-06-14 22:21:25 +00:00
|
|
|
/*
|
|
|
|
* Take interface out of loopback
|
|
|
|
*/
|
|
|
|
outb(sc->nic_addr + ED_P0_TCR, 0);
|
|
|
|
|
1993-06-22 12:10:07 +00:00
|
|
|
/*
|
|
|
|
* If this is a 3Com board, the tranceiver must be software enabled
|
1994-08-04 17:42:35 +00:00
|
|
|
* (there is no settable hardware default).
|
1993-06-22 12:10:07 +00:00
|
|
|
*/
|
1993-07-25 23:43:30 +00:00
|
|
|
if (sc->vendor == ED_VENDOR_3COM) {
|
1993-09-09 07:01:23 +00:00
|
|
|
if (ifp->if_flags & IFF_ALTPHYS) {
|
1993-07-25 23:43:30 +00:00
|
|
|
outb(sc->asic_addr + ED_3COM_CR, 0);
|
|
|
|
} else {
|
|
|
|
outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_XSEL);
|
|
|
|
}
|
1993-06-22 12:10:07 +00:00
|
|
|
}
|
|
|
|
|
1993-06-14 22:21:25 +00:00
|
|
|
/*
|
|
|
|
* Set 'running' flag, and clear output active flag.
|
|
|
|
*/
|
|
|
|
ifp->if_flags |= IFF_RUNNING;
|
|
|
|
ifp->if_flags &= ~IFF_OACTIVE;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* ...and attempt to start output
|
|
|
|
*/
|
|
|
|
ed_start(ifp);
|
|
|
|
|
|
|
|
(void) splx(s);
|
|
|
|
}
|
1994-08-04 17:42:35 +00:00
|
|
|
|
1993-06-23 16:22:04 +00:00
|
|
|
/*
|
|
|
|
* This routine actually starts the transmission on the interface
|
|
|
|
*/
|
1994-08-04 17:42:35 +00:00
|
|
|
static inline void
|
1995-12-05 02:01:59 +00:00
|
|
|
ed_xmit(sc)
|
|
|
|
struct ed_softc *sc;
|
1993-06-14 22:21:25 +00:00
|
|
|
{
|
1995-12-05 02:01:59 +00:00
|
|
|
struct ifnet *ifp = (struct ifnet *)sc;
|
1993-09-29 20:30:26 +00:00
|
|
|
unsigned short len;
|
|
|
|
|
1995-10-10 09:52:55 +00:00
|
|
|
if (sc->gone)
|
|
|
|
return;
|
1993-09-29 20:30:26 +00:00
|
|
|
len = sc->txb_len[sc->txb_next_tx];
|
1993-06-14 22:21:25 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Set NIC for page 0 register access
|
|
|
|
*/
|
1994-09-07 06:11:29 +00:00
|
|
|
outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_STA);
|
1994-08-04 17:42:35 +00:00
|
|
|
|
1993-06-14 22:21:25 +00:00
|
|
|
/*
|
|
|
|
* Set TX buffer start page
|
|
|
|
*/
|
|
|
|
outb(sc->nic_addr + ED_P0_TPSR, sc->tx_page_start +
|
1994-08-04 17:42:35 +00:00
|
|
|
sc->txb_next_tx * ED_TXBUF_SIZE);
|
1993-06-14 22:21:25 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Set TX length
|
|
|
|
*/
|
1993-09-29 20:30:26 +00:00
|
|
|
outb(sc->nic_addr + ED_P0_TBCR0, len);
|
1993-06-14 22:21:25 +00:00
|
|
|
outb(sc->nic_addr + ED_P0_TBCR1, len >> 8);
|
|
|
|
|
|
|
|
/*
|
1993-06-23 16:22:04 +00:00
|
|
|
* Set page 0, Remote DMA complete, Transmit Packet, and *Start*
|
1993-06-14 22:21:25 +00:00
|
|
|
*/
|
1994-09-07 06:11:29 +00:00
|
|
|
outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_TXP | ED_CR_STA);
|
1993-06-14 22:21:25 +00:00
|
|
|
sc->xmit_busy = 1;
|
1994-08-04 17:42:35 +00:00
|
|
|
|
1993-06-23 16:22:04 +00:00
|
|
|
/*
|
1993-09-29 20:30:26 +00:00
|
|
|
* Point to next transmit buffer slot and wrap if necessary.
|
1993-06-23 16:22:04 +00:00
|
|
|
*/
|
1993-09-29 20:30:26 +00:00
|
|
|
sc->txb_next_tx++;
|
|
|
|
if (sc->txb_next_tx == sc->txb_cnt)
|
|
|
|
sc->txb_next_tx = 0;
|
1993-06-14 22:21:25 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Set a timer just in case we never hear from the board again
|
|
|
|
*/
|
|
|
|
ifp->if_timer = 2;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Start output on interface.
|
|
|
|
* We make two assumptions here:
|
1993-11-22 11:08:16 +00:00
|
|
|
* 1) that the current priority is set to splimp _before_ this code
|
1993-06-14 22:21:25 +00:00
|
|
|
* is called *and* is returned to the appropriate priority after
|
|
|
|
* return
|
|
|
|
* 2) that the IFF_OACTIVE flag is checked before this code is called
|
|
|
|
* (i.e. that the output part of the interface is idle)
|
|
|
|
*/
|
1995-11-18 08:29:04 +00:00
|
|
|
static void
|
1993-06-14 22:21:25 +00:00
|
|
|
ed_start(ifp)
|
|
|
|
struct ifnet *ifp;
|
|
|
|
{
|
1996-02-06 18:51:28 +00:00
|
|
|
struct ed_softc *sc = ifp->if_softc;
|
1993-06-14 22:21:25 +00:00
|
|
|
struct mbuf *m0, *m;
|
|
|
|
caddr_t buffer;
|
1994-08-04 17:42:35 +00:00
|
|
|
int len;
|
1993-06-14 22:21:25 +00:00
|
|
|
|
1995-10-10 09:52:55 +00:00
|
|
|
if (sc->gone) {
|
|
|
|
printf("ed_start(%p) GONE\n",ifp);
|
|
|
|
return;
|
|
|
|
}
|
1993-06-14 22:21:25 +00:00
|
|
|
outloop:
|
1994-08-04 17:42:35 +00:00
|
|
|
|
1993-06-23 16:22:04 +00:00
|
|
|
/*
|
1994-08-04 17:42:35 +00:00
|
|
|
* First, see if there are buffered packets and an idle transmitter -
|
|
|
|
* should never happen at this point.
|
1993-06-23 16:22:04 +00:00
|
|
|
*/
|
1993-09-29 20:30:26 +00:00
|
|
|
if (sc->txb_inuse && (sc->xmit_busy == 0)) {
|
1994-08-22 08:21:51 +00:00
|
|
|
printf("ed: packets buffered, but transmitter idle\n");
|
1995-12-05 02:01:59 +00:00
|
|
|
ed_xmit(sc);
|
1993-09-29 20:30:26 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* See if there is room to put another packet in the buffer.
|
|
|
|
*/
|
|
|
|
if (sc->txb_inuse == sc->txb_cnt) {
|
1994-08-04 17:42:35 +00:00
|
|
|
|
1993-09-29 20:30:26 +00:00
|
|
|
/*
|
1994-08-04 17:42:35 +00:00
|
|
|
* No room. Indicate this to the outside world and exit.
|
1993-09-29 20:30:26 +00:00
|
|
|
*/
|
|
|
|
ifp->if_flags |= IFF_OACTIVE;
|
|
|
|
return;
|
|
|
|
}
|
1995-12-05 02:01:59 +00:00
|
|
|
IF_DEQUEUE(&ifp->if_snd, m);
|
1993-06-14 22:21:25 +00:00
|
|
|
if (m == 0) {
|
1994-08-04 17:42:35 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* We are using the !OACTIVE flag to indicate to the outside
|
|
|
|
* world that we can accept an additional packet rather than
|
|
|
|
* that the transmitter is _actually_ active. Indeed, the
|
|
|
|
* transmitter may be active, but if we haven't filled all the
|
|
|
|
* buffers with data then we still want to accept more.
|
|
|
|
*/
|
1993-06-14 22:21:25 +00:00
|
|
|
ifp->if_flags &= ~IFF_OACTIVE;
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Copy the mbuf chain into the transmit buffer
|
|
|
|
*/
|
|
|
|
|
1993-10-15 11:06:41 +00:00
|
|
|
m0 = m;
|
|
|
|
|
1993-09-29 20:30:26 +00:00
|
|
|
/* txb_new points to next open buffer slot */
|
|
|
|
buffer = sc->mem_start + (sc->txb_new * ED_TXBUF_SIZE * ED_PAGE_SIZE);
|
1993-06-14 22:21:25 +00:00
|
|
|
|
1993-09-29 20:30:26 +00:00
|
|
|
if (sc->mem_shared) {
|
1994-08-04 17:42:35 +00:00
|
|
|
|
1993-09-29 20:30:26 +00:00
|
|
|
/*
|
|
|
|
* Special case setup for 16 bit boards...
|
|
|
|
*/
|
|
|
|
if (sc->isa16bit) {
|
|
|
|
switch (sc->vendor) {
|
1994-08-04 17:42:35 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* For 16bit 3Com boards (which have 16k of
|
|
|
|
* memory), we have the xmit buffers in a
|
|
|
|
* different page of memory ('page 0') - so
|
|
|
|
* change pages.
|
|
|
|
*/
|
1993-09-29 20:30:26 +00:00
|
|
|
case ED_VENDOR_3COM:
|
|
|
|
outb(sc->asic_addr + ED_3COM_GACFR,
|
1994-08-04 17:42:35 +00:00
|
|
|
ED_3COM_GACFR_RSEL);
|
1993-09-29 20:30:26 +00:00
|
|
|
break;
|
1994-08-04 17:42:35 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Enable 16bit access to shared memory on
|
1994-10-08 09:24:20 +00:00
|
|
|
* WD/SMC boards.
|
1994-08-04 17:42:35 +00:00
|
|
|
*/
|
|
|
|
case ED_VENDOR_WD_SMC:{
|
|
|
|
outb(sc->asic_addr + ED_WD_LAAR,
|
|
|
|
(sc->wd_laar_proto | ED_WD_LAAR_M16EN));
|
|
|
|
if (sc->is790) {
|
|
|
|
outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_MENB);
|
|
|
|
}
|
|
|
|
break;
|
1994-04-13 10:15:34 +00:00
|
|
|
}
|
1993-09-29 20:30:26 +00:00
|
|
|
}
|
|
|
|
}
|
1993-10-15 11:06:41 +00:00
|
|
|
for (len = 0; m != 0; m = m->m_next) {
|
1993-09-29 20:30:26 +00:00
|
|
|
bcopy(mtod(m, caddr_t), buffer, m->m_len);
|
|
|
|
buffer += m->m_len;
|
1994-08-04 17:42:35 +00:00
|
|
|
len += m->m_len;
|
1993-09-29 20:30:26 +00:00
|
|
|
}
|
1993-06-14 22:21:25 +00:00
|
|
|
|
|
|
|
/*
|
1993-09-29 20:30:26 +00:00
|
|
|
* Restore previous shared memory access
|
1993-06-14 22:21:25 +00:00
|
|
|
*/
|
1993-09-29 20:30:26 +00:00
|
|
|
if (sc->isa16bit) {
|
|
|
|
switch (sc->vendor) {
|
|
|
|
case ED_VENDOR_3COM:
|
|
|
|
outb(sc->asic_addr + ED_3COM_GACFR,
|
1994-08-04 17:42:35 +00:00
|
|
|
ED_3COM_GACFR_RSEL | ED_3COM_GACFR_MBS0);
|
1993-09-29 20:30:26 +00:00
|
|
|
break;
|
1994-08-04 17:42:35 +00:00
|
|
|
case ED_VENDOR_WD_SMC:{
|
|
|
|
if (sc->is790) {
|
|
|
|
outb(sc->asic_addr + ED_WD_MSR, 0x00);
|
|
|
|
}
|
|
|
|
outb(sc->asic_addr + ED_WD_LAAR, sc->wd_laar_proto);
|
|
|
|
break;
|
1994-04-13 10:15:34 +00:00
|
|
|
}
|
1993-09-29 20:30:26 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
} else {
|
1995-12-15 07:31:40 +00:00
|
|
|
len = ed_pio_write_mbufs(sc, m, (int)buffer);
|
1995-01-04 21:10:17 +00:00
|
|
|
if (len == 0)
|
|
|
|
goto outloop;
|
1993-09-29 20:30:26 +00:00
|
|
|
}
|
1994-08-04 17:42:35 +00:00
|
|
|
|
1994-05-25 09:21:21 +00:00
|
|
|
sc->txb_len[sc->txb_new] = max(len, ETHER_MIN_LEN);
|
1993-09-29 20:30:26 +00:00
|
|
|
|
|
|
|
sc->txb_inuse++;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Point to next buffer slot and wrap if necessary.
|
|
|
|
*/
|
|
|
|
sc->txb_new++;
|
|
|
|
if (sc->txb_new == sc->txb_cnt)
|
|
|
|
sc->txb_new = 0;
|
1993-06-14 22:21:25 +00:00
|
|
|
|
|
|
|
if (sc->xmit_busy == 0)
|
1995-12-05 02:01:59 +00:00
|
|
|
ed_xmit(sc);
|
1994-08-04 17:42:35 +00:00
|
|
|
|
1993-06-14 22:21:25 +00:00
|
|
|
/*
|
1994-10-08 09:24:20 +00:00
|
|
|
* Tap off here if there is a bpf listener.
|
1993-06-14 22:21:25 +00:00
|
|
|
*/
|
|
|
|
#if NBPFILTER > 0
|
1996-02-06 18:51:28 +00:00
|
|
|
if (ifp->if_bpf) {
|
|
|
|
bpf_mtap(ifp, m0);
|
1993-06-14 22:21:25 +00:00
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
m_freem(m0);
|
|
|
|
|
1993-06-23 16:22:04 +00:00
|
|
|
/*
|
1993-09-29 20:30:26 +00:00
|
|
|
* Loop back to the top to possibly buffer more packets
|
1993-06-23 16:22:04 +00:00
|
|
|
*/
|
1993-09-29 20:30:26 +00:00
|
|
|
goto outloop;
|
1993-06-14 22:21:25 +00:00
|
|
|
}
|
1994-08-04 17:42:35 +00:00
|
|
|
|
1993-06-14 22:21:25 +00:00
|
|
|
/*
|
|
|
|
* Ethernet interface receiver interrupt.
|
|
|
|
*/
|
1993-09-22 17:47:43 +00:00
|
|
|
static inline void
|
1995-12-05 02:01:59 +00:00
|
|
|
ed_rint(sc)
|
|
|
|
struct ed_softc *sc;
|
1993-06-14 22:21:25 +00:00
|
|
|
{
|
1996-02-06 18:51:28 +00:00
|
|
|
struct ifnet *ifp = &sc->arpcom.ac_if;
|
1994-10-22 17:52:22 +00:00
|
|
|
u_char boundry;
|
1993-06-14 22:21:25 +00:00
|
|
|
u_short len;
|
1993-09-29 20:30:26 +00:00
|
|
|
struct ed_ring packet_hdr;
|
1994-08-04 17:42:35 +00:00
|
|
|
char *packet_ptr;
|
1993-06-14 22:21:25 +00:00
|
|
|
|
1995-10-10 09:52:55 +00:00
|
|
|
if (sc->gone)
|
|
|
|
return;
|
|
|
|
|
1993-06-14 22:21:25 +00:00
|
|
|
/*
|
|
|
|
* Set NIC to page 1 registers to get 'current' pointer
|
|
|
|
*/
|
1994-09-07 06:11:29 +00:00
|
|
|
outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_PAGE_1 | ED_CR_STA);
|
1994-08-04 17:42:35 +00:00
|
|
|
|
1993-06-14 22:21:25 +00:00
|
|
|
/*
|
1994-08-04 17:42:35 +00:00
|
|
|
* 'sc->next_packet' is the logical beginning of the ring-buffer -
|
|
|
|
* i.e. it points to where new data has been buffered. The 'CURR'
|
|
|
|
* (current) register points to the logical end of the ring-buffer -
|
|
|
|
* i.e. it points to where additional new data will be added. We loop
|
|
|
|
* here until the logical beginning equals the logical end (or in
|
|
|
|
* other words, until the ring-buffer is empty).
|
1993-06-14 22:21:25 +00:00
|
|
|
*/
|
|
|
|
while (sc->next_packet != inb(sc->nic_addr + ED_P1_CURR)) {
|
|
|
|
|
1993-09-29 20:30:26 +00:00
|
|
|
/* get pointer to this buffer's header structure */
|
|
|
|
packet_ptr = sc->mem_ring +
|
1994-01-03 17:17:19 +00:00
|
|
|
(sc->next_packet - sc->rec_page_start) * ED_PAGE_SIZE;
|
1993-06-14 22:21:25 +00:00
|
|
|
|
|
|
|
/*
|
1994-08-04 17:42:35 +00:00
|
|
|
* The byte count includes a 4 byte header that was added by
|
|
|
|
* the NIC.
|
1993-06-14 22:21:25 +00:00
|
|
|
*/
|
1993-09-29 20:30:26 +00:00
|
|
|
if (sc->mem_shared)
|
1994-08-04 17:42:35 +00:00
|
|
|
packet_hdr = *(struct ed_ring *) packet_ptr;
|
1993-09-29 20:30:26 +00:00
|
|
|
else
|
1995-12-15 07:31:40 +00:00
|
|
|
ed_pio_readmem(sc, (int)packet_ptr, (char *) &packet_hdr,
|
1994-08-04 17:42:35 +00:00
|
|
|
sizeof(packet_hdr));
|
1993-09-29 20:30:26 +00:00
|
|
|
len = packet_hdr.count;
|
1995-07-28 12:15:16 +00:00
|
|
|
if (len > (ETHER_MAX_LEN + sizeof(struct ed_ring)) ||
|
|
|
|
len < (ETHER_HDR_SIZE + sizeof(struct ed_ring))) {
|
1994-10-08 09:24:20 +00:00
|
|
|
/*
|
|
|
|
* Length is a wild value. There's a good chance that
|
|
|
|
* this was caused by the NIC being old and buggy.
|
|
|
|
* The bug is that the length low byte is duplicated in
|
|
|
|
* the high byte. Try to recalculate the length based on
|
|
|
|
* the pointer to the next packet.
|
|
|
|
*/
|
|
|
|
/*
|
|
|
|
* NOTE: sc->next_packet is pointing at the current packet.
|
|
|
|
*/
|
|
|
|
len &= ED_PAGE_SIZE - 1; /* preserve offset into page */
|
|
|
|
if (packet_hdr.next_packet >= sc->next_packet) {
|
|
|
|
len += (packet_hdr.next_packet - sc->next_packet) * ED_PAGE_SIZE;
|
|
|
|
} else {
|
|
|
|
len += ((packet_hdr.next_packet - sc->rec_page_start) +
|
|
|
|
(sc->rec_page_stop - sc->next_packet)) * ED_PAGE_SIZE;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
/*
|
|
|
|
* Be fairly liberal about what we allow as a "reasonable" length
|
|
|
|
* so that a [crufty] packet will make it to BPF (and can thus
|
|
|
|
* be analyzed). Note that all that is really important is that
|
|
|
|
* we have a length that will fit into one mbuf cluster or less;
|
|
|
|
* the upper layer protocols can then figure out the length from
|
|
|
|
* their own length field(s).
|
|
|
|
*/
|
1995-07-28 12:15:16 +00:00
|
|
|
if ((len > sizeof(struct ed_ring)) &&
|
|
|
|
(len <= MCLBYTES) &&
|
1994-10-08 09:24:20 +00:00
|
|
|
(packet_hdr.next_packet >= sc->rec_page_start) &&
|
|
|
|
(packet_hdr.next_packet < sc->rec_page_stop)) {
|
1993-06-14 22:21:25 +00:00
|
|
|
/*
|
1994-08-04 17:42:35 +00:00
|
|
|
* Go get packet.
|
1993-06-14 22:21:25 +00:00
|
|
|
*/
|
1994-08-04 17:42:35 +00:00
|
|
|
ed_get_packet(sc, packet_ptr + sizeof(struct ed_ring),
|
|
|
|
len - sizeof(struct ed_ring), packet_hdr.rsr & ED_RSR_PHY);
|
1995-12-05 02:01:59 +00:00
|
|
|
ifp->if_ipackets++;
|
1993-06-14 22:21:25 +00:00
|
|
|
} else {
|
|
|
|
/*
|
1994-10-08 09:24:20 +00:00
|
|
|
* Really BAD. The ring pointers are corrupted.
|
1993-06-14 22:21:25 +00:00
|
|
|
*/
|
|
|
|
log(LOG_ERR,
|
1994-01-03 17:17:19 +00:00
|
|
|
"ed%d: NIC memory corrupt - invalid packet length %d\n",
|
1995-12-05 02:01:59 +00:00
|
|
|
ifp->if_unit, len);
|
|
|
|
ifp->if_ierrors++;
|
|
|
|
ed_reset(ifp);
|
1993-06-14 22:21:25 +00:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Update next packet pointer
|
|
|
|
*/
|
1993-09-29 20:30:26 +00:00
|
|
|
sc->next_packet = packet_hdr.next_packet;
|
1993-06-14 22:21:25 +00:00
|
|
|
|
|
|
|
/*
|
1994-08-04 17:42:35 +00:00
|
|
|
* Update NIC boundry pointer - being careful to keep it one
|
|
|
|
* buffer behind. (as recommended by NS databook)
|
1993-06-14 22:21:25 +00:00
|
|
|
*/
|
|
|
|
boundry = sc->next_packet - 1;
|
|
|
|
if (boundry < sc->rec_page_start)
|
|
|
|
boundry = sc->rec_page_stop - 1;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Set NIC to page 0 registers to update boundry register
|
|
|
|
*/
|
1994-09-07 06:11:29 +00:00
|
|
|
outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_STA);
|
|
|
|
|
1993-06-14 22:21:25 +00:00
|
|
|
outb(sc->nic_addr + ED_P0_BNRY, boundry);
|
|
|
|
|
|
|
|
/*
|
1994-08-04 17:42:35 +00:00
|
|
|
* Set NIC to page 1 registers before looping to top (prepare
|
|
|
|
* to get 'CURR' current pointer)
|
1993-06-14 22:21:25 +00:00
|
|
|
*/
|
1994-09-07 06:11:29 +00:00
|
|
|
outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_PAGE_1 | ED_CR_STA);
|
1993-06-14 22:21:25 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Ethernet interface interrupt processor
|
|
|
|
*/
|
1993-11-25 01:38:01 +00:00
|
|
|
void
|
1993-06-14 22:21:25 +00:00
|
|
|
edintr(unit)
|
1994-08-04 17:42:35 +00:00
|
|
|
int unit;
|
1993-06-14 22:21:25 +00:00
|
|
|
{
|
|
|
|
struct ed_softc *sc = &ed_softc[unit];
|
1995-12-05 02:01:59 +00:00
|
|
|
struct ifnet *ifp = (struct ifnet *)sc;
|
1994-08-04 17:42:35 +00:00
|
|
|
u_char isr;
|
1993-06-14 22:21:25 +00:00
|
|
|
|
1995-10-10 09:52:55 +00:00
|
|
|
if (sc->gone)
|
|
|
|
return;
|
1993-06-14 22:21:25 +00:00
|
|
|
/*
|
|
|
|
* Set NIC to page 0 registers
|
|
|
|
*/
|
1994-09-07 06:11:29 +00:00
|
|
|
outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_STA);
|
1994-08-04 17:42:35 +00:00
|
|
|
|
1993-06-14 22:21:25 +00:00
|
|
|
/*
|
|
|
|
* loop until there are no more new interrupts
|
|
|
|
*/
|
1994-10-22 17:52:22 +00:00
|
|
|
while ((isr = inb(sc->nic_addr + ED_P0_ISR)) != 0) {
|
1993-06-14 22:21:25 +00:00
|
|
|
|
|
|
|
/*
|
1994-08-04 17:42:35 +00:00
|
|
|
* reset all the bits that we are 'acknowledging' by writing a
|
|
|
|
* '1' to each bit position that was set (writing a '1'
|
|
|
|
* *clears* the bit)
|
1993-06-14 22:21:25 +00:00
|
|
|
*/
|
|
|
|
outb(sc->nic_addr + ED_P0_ISR, isr);
|
|
|
|
|
|
|
|
/*
|
1994-08-04 17:42:35 +00:00
|
|
|
* Handle transmitter interrupts. Handle these first because
|
|
|
|
* the receiver will reset the board under some conditions.
|
1993-06-14 22:21:25 +00:00
|
|
|
*/
|
1994-08-04 17:42:35 +00:00
|
|
|
if (isr & (ED_ISR_PTX | ED_ISR_TXE)) {
|
|
|
|
u_char collisions = inb(sc->nic_addr + ED_P0_NCR) & 0x0f;
|
1993-06-14 22:21:25 +00:00
|
|
|
|
|
|
|
/*
|
1993-09-22 17:47:43 +00:00
|
|
|
* Check for transmit error. If a TX completed with an
|
|
|
|
* error, we end up throwing the packet away. Really
|
|
|
|
* the only error that is possible is excessive
|
1994-08-04 17:42:35 +00:00
|
|
|
* collisions, and in this case it is best to allow
|
|
|
|
* the automatic mechanisms of TCP to backoff the
|
|
|
|
* flow. Of course, with UDP we're screwed, but this
|
|
|
|
* is expected when a network is heavily loaded.
|
1993-06-14 22:21:25 +00:00
|
|
|
*/
|
1993-11-22 11:08:16 +00:00
|
|
|
(void) inb(sc->nic_addr + ED_P0_TSR);
|
1993-09-22 17:47:43 +00:00
|
|
|
if (isr & ED_ISR_TXE) {
|
|
|
|
|
1993-06-14 22:21:25 +00:00
|
|
|
/*
|
1993-09-22 17:47:43 +00:00
|
|
|
* Excessive collisions (16)
|
1993-06-14 22:21:25 +00:00
|
|
|
*/
|
1993-09-22 17:47:43 +00:00
|
|
|
if ((inb(sc->nic_addr + ED_P0_TSR) & ED_TSR_ABT)
|
1994-01-03 17:17:19 +00:00
|
|
|
&& (collisions == 0)) {
|
1994-08-04 17:42:35 +00:00
|
|
|
|
1993-09-22 17:47:43 +00:00
|
|
|
/*
|
1994-08-04 17:42:35 +00:00
|
|
|
* When collisions total 16, the
|
1993-09-22 17:47:43 +00:00
|
|
|
* P0_NCR will indicate 0, and the
|
|
|
|
* TSR_ABT is set.
|
|
|
|
*/
|
|
|
|
collisions = 16;
|
|
|
|
}
|
1993-06-14 22:21:25 +00:00
|
|
|
|
1993-09-22 17:47:43 +00:00
|
|
|
/*
|
|
|
|
* update output errors counter
|
|
|
|
*/
|
1995-12-05 02:01:59 +00:00
|
|
|
ifp->if_oerrors++;
|
1993-09-22 17:47:43 +00:00
|
|
|
} else {
|
1994-08-04 17:42:35 +00:00
|
|
|
|
1993-09-22 17:47:43 +00:00
|
|
|
/*
|
|
|
|
* Update total number of successfully
|
1994-08-04 17:42:35 +00:00
|
|
|
* transmitted packets.
|
1993-09-22 17:47:43 +00:00
|
|
|
*/
|
1995-12-05 02:01:59 +00:00
|
|
|
ifp->if_opackets++;
|
1993-09-22 17:47:43 +00:00
|
|
|
}
|
1993-06-14 22:21:25 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* reset tx busy and output active flags
|
|
|
|
*/
|
|
|
|
sc->xmit_busy = 0;
|
1995-12-05 02:01:59 +00:00
|
|
|
ifp->if_flags &= ~IFF_OACTIVE;
|
1993-06-14 22:21:25 +00:00
|
|
|
|
|
|
|
/*
|
1993-06-23 16:22:04 +00:00
|
|
|
* clear watchdog timer
|
1993-06-14 22:21:25 +00:00
|
|
|
*/
|
1995-12-05 02:01:59 +00:00
|
|
|
ifp->if_timer = 0;
|
1993-06-14 22:21:25 +00:00
|
|
|
|
|
|
|
/*
|
1993-09-22 17:47:43 +00:00
|
|
|
* Add in total number of collisions on last
|
1994-08-04 17:42:35 +00:00
|
|
|
* transmission.
|
1993-06-14 22:21:25 +00:00
|
|
|
*/
|
1995-12-05 02:01:59 +00:00
|
|
|
ifp->if_collisions += collisions;
|
1993-09-22 17:47:43 +00:00
|
|
|
|
|
|
|
/*
|
1993-09-29 20:30:26 +00:00
|
|
|
* Decrement buffer in-use count if not zero (can only
|
1994-08-04 17:42:35 +00:00
|
|
|
* be zero if a transmitter interrupt occured while
|
|
|
|
* not actually transmitting). If data is ready to
|
|
|
|
* transmit, start it transmitting, otherwise defer
|
|
|
|
* until after handling receiver
|
1993-09-22 17:47:43 +00:00
|
|
|
*/
|
1993-09-29 20:30:26 +00:00
|
|
|
if (sc->txb_inuse && --sc->txb_inuse)
|
1995-12-05 02:01:59 +00:00
|
|
|
ed_xmit(sc);
|
1993-06-14 22:21:25 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
1993-09-22 17:47:43 +00:00
|
|
|
* Handle receiver interrupts
|
1993-06-14 22:21:25 +00:00
|
|
|
*/
|
1994-08-04 17:42:35 +00:00
|
|
|
if (isr & (ED_ISR_PRX | ED_ISR_RXE | ED_ISR_OVW)) {
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Overwrite warning. In order to make sure that a
|
|
|
|
* lockup of the local DMA hasn't occurred, we reset
|
|
|
|
* and re-init the NIC. The NSC manual suggests only a
|
|
|
|
* partial reset/re-init is necessary - but some chips
|
|
|
|
* seem to want more. The DMA lockup has been seen
|
|
|
|
* only with early rev chips - Methinks this bug was
|
|
|
|
* fixed in later revs. -DG
|
|
|
|
*/
|
1993-09-22 17:47:43 +00:00
|
|
|
if (isr & ED_ISR_OVW) {
|
1995-12-05 02:01:59 +00:00
|
|
|
ifp->if_ierrors++;
|
1993-09-29 20:30:26 +00:00
|
|
|
#ifdef DIAGNOSTIC
|
1993-09-22 17:47:43 +00:00
|
|
|
log(LOG_WARNING,
|
1994-08-04 17:42:35 +00:00
|
|
|
"ed%d: warning - receiver ring buffer overrun\n",
|
1995-12-05 02:01:59 +00:00
|
|
|
ifp->if_unit);
|
1993-09-29 20:30:26 +00:00
|
|
|
#endif
|
1994-08-04 17:42:35 +00:00
|
|
|
|
1993-09-22 17:47:43 +00:00
|
|
|
/*
|
|
|
|
* Stop/reset/re-init NIC
|
|
|
|
*/
|
1995-12-05 02:01:59 +00:00
|
|
|
ed_reset(ifp);
|
1993-09-22 17:47:43 +00:00
|
|
|
} else {
|
1993-06-14 22:21:25 +00:00
|
|
|
|
1994-08-04 17:42:35 +00:00
|
|
|
/*
|
|
|
|
* Receiver Error. One or more of: CRC error,
|
|
|
|
* frame alignment error FIFO overrun, or
|
|
|
|
* missed packet.
|
|
|
|
*/
|
1993-09-22 17:47:43 +00:00
|
|
|
if (isr & ED_ISR_RXE) {
|
1995-12-05 02:01:59 +00:00
|
|
|
ifp->if_ierrors++;
|
1993-09-22 17:47:43 +00:00
|
|
|
#ifdef ED_DEBUG
|
1995-12-05 02:01:59 +00:00
|
|
|
printf("ed%d: receive error %x\n", ifp->if_unit,
|
1994-08-04 17:42:35 +00:00
|
|
|
inb(sc->nic_addr + ED_P0_RSR));
|
1993-09-22 17:47:43 +00:00
|
|
|
#endif
|
|
|
|
}
|
1993-06-14 22:21:25 +00:00
|
|
|
|
1993-09-22 17:47:43 +00:00
|
|
|
/*
|
1994-08-04 17:42:35 +00:00
|
|
|
* Go get the packet(s) XXX - Doing this on an
|
|
|
|
* error is dubious because there shouldn't be
|
|
|
|
* any data to get (we've configured the
|
|
|
|
* interface to not accept packets with
|
|
|
|
* errors).
|
1993-09-22 17:47:43 +00:00
|
|
|
*/
|
1993-06-14 22:21:25 +00:00
|
|
|
|
1993-09-22 17:47:43 +00:00
|
|
|
/*
|
|
|
|
* Enable 16bit access to shared memory first
|
1994-08-04 17:42:35 +00:00
|
|
|
* on WD/SMC boards.
|
1993-09-22 17:47:43 +00:00
|
|
|
*/
|
|
|
|
if (sc->isa16bit &&
|
1994-01-03 17:17:19 +00:00
|
|
|
(sc->vendor == ED_VENDOR_WD_SMC)) {
|
1993-06-14 22:21:25 +00:00
|
|
|
|
|
|
|
outb(sc->asic_addr + ED_WD_LAAR,
|
1994-01-03 17:17:19 +00:00
|
|
|
(sc->wd_laar_proto |=
|
1994-08-04 17:42:35 +00:00
|
|
|
ED_WD_LAAR_M16EN));
|
1994-04-13 10:15:34 +00:00
|
|
|
if (sc->is790) {
|
|
|
|
outb(sc->asic_addr + ED_WD_MSR,
|
1994-08-04 17:42:35 +00:00
|
|
|
ED_WD_MSR_MENB);
|
1994-04-13 10:15:34 +00:00
|
|
|
}
|
1993-06-14 22:21:25 +00:00
|
|
|
}
|
1995-12-05 02:01:59 +00:00
|
|
|
ed_rint(sc);
|
1993-09-22 17:47:43 +00:00
|
|
|
|
|
|
|
/* disable 16bit access */
|
|
|
|
if (sc->isa16bit &&
|
1994-08-04 17:42:35 +00:00
|
|
|
(sc->vendor == ED_VENDOR_WD_SMC)) {
|
1993-06-14 22:21:25 +00:00
|
|
|
|
1994-04-13 10:15:34 +00:00
|
|
|
if (sc->is790) {
|
|
|
|
outb(sc->asic_addr + ED_WD_MSR, 0x00);
|
|
|
|
}
|
1994-08-04 17:42:35 +00:00
|
|
|
outb(sc->asic_addr + ED_WD_LAAR,
|
|
|
|
(sc->wd_laar_proto &=
|
|
|
|
~ED_WD_LAAR_M16EN));
|
1993-06-14 22:21:25 +00:00
|
|
|
}
|
1993-09-22 17:47:43 +00:00
|
|
|
}
|
1993-06-14 22:21:25 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* If it looks like the transmitter can take more data,
|
1994-08-04 17:42:35 +00:00
|
|
|
* attempt to start output on the interface. This is done
|
|
|
|
* after handling the receiver to give the receiver priority.
|
1993-06-14 22:21:25 +00:00
|
|
|
*/
|
1995-12-05 02:01:59 +00:00
|
|
|
if ((ifp->if_flags & IFF_OACTIVE) == 0)
|
|
|
|
ed_start(ifp);
|
1993-06-14 22:21:25 +00:00
|
|
|
|
|
|
|
/*
|
1994-08-04 17:42:35 +00:00
|
|
|
* return NIC CR to standard state: page 0, remote DMA
|
|
|
|
* complete, start (toggling the TXP bit off, even if was just
|
|
|
|
* set in the transmit routine, is *okay* - it is 'edge'
|
|
|
|
* triggered from low to high)
|
1993-06-14 22:21:25 +00:00
|
|
|
*/
|
1994-09-07 06:11:29 +00:00
|
|
|
outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_STA);
|
1994-08-04 17:42:35 +00:00
|
|
|
|
1993-07-27 03:13:50 +00:00
|
|
|
/*
|
1994-08-04 17:42:35 +00:00
|
|
|
* If the Network Talley Counters overflow, read them to reset
|
|
|
|
* them. It appears that old 8390's won't clear the ISR flag
|
|
|
|
* otherwise - resulting in an infinite loop.
|
1993-07-27 03:13:50 +00:00
|
|
|
*/
|
|
|
|
if (isr & ED_ISR_CNT) {
|
|
|
|
(void) inb(sc->nic_addr + ED_P0_CNTR0);
|
|
|
|
(void) inb(sc->nic_addr + ED_P0_CNTR1);
|
|
|
|
(void) inb(sc->nic_addr + ED_P0_CNTR2);
|
|
|
|
}
|
1993-06-14 22:21:25 +00:00
|
|
|
}
|
|
|
|
}
|
1994-08-04 17:42:35 +00:00
|
|
|
|
1993-06-14 22:21:25 +00:00
|
|
|
/*
|
|
|
|
* Process an ioctl request. This code needs some work - it looks
|
|
|
|
* pretty ugly.
|
|
|
|
*/
|
1995-11-18 08:29:04 +00:00
|
|
|
static int
|
1993-06-14 22:21:25 +00:00
|
|
|
ed_ioctl(ifp, command, data)
|
|
|
|
register struct ifnet *ifp;
|
1994-08-04 17:42:35 +00:00
|
|
|
int command;
|
1993-06-14 22:21:25 +00:00
|
|
|
caddr_t data;
|
|
|
|
{
|
1994-08-04 17:42:35 +00:00
|
|
|
register struct ifaddr *ifa = (struct ifaddr *) data;
|
1996-02-06 18:51:28 +00:00
|
|
|
struct ed_softc *sc = ifp->if_softc;
|
1994-08-04 17:42:35 +00:00
|
|
|
struct ifreq *ifr = (struct ifreq *) data;
|
|
|
|
int s, error = 0;
|
1993-06-14 22:21:25 +00:00
|
|
|
|
1995-10-21 00:55:36 +00:00
|
|
|
if (sc->gone) {
|
|
|
|
ifp->if_flags &= ~IFF_RUNNING;
|
|
|
|
return ENXIO;
|
|
|
|
}
|
1993-11-22 11:08:16 +00:00
|
|
|
s = splimp();
|
1993-06-14 22:21:25 +00:00
|
|
|
|
|
|
|
switch (command) {
|
|
|
|
|
|
|
|
case SIOCSIFADDR:
|
|
|
|
ifp->if_flags |= IFF_UP;
|
1995-01-15 00:18:17 +00:00
|
|
|
/* netifs are BUSY when UP */
|
|
|
|
sc->kdc.kdc_state = DC_BUSY;
|
1993-06-14 22:21:25 +00:00
|
|
|
|
|
|
|
switch (ifa->ifa_addr->sa_family) {
|
|
|
|
#ifdef INET
|
|
|
|
case AF_INET:
|
1995-12-05 02:01:59 +00:00
|
|
|
ed_init(ifp); /* before arpwhohas */
|
1994-12-22 21:56:22 +00:00
|
|
|
arp_ifinit((struct arpcom *)ifp, ifa);
|
1993-06-14 22:21:25 +00:00
|
|
|
break;
|
|
|
|
#endif
|
1995-10-26 20:31:59 +00:00
|
|
|
#ifdef IPX
|
|
|
|
/*
|
|
|
|
* XXX - This code is probably wrong
|
|
|
|
*/
|
|
|
|
case AF_IPX:
|
|
|
|
{
|
|
|
|
register struct ipx_addr *ina = &(IA_SIPX(ifa)->sipx_addr);
|
1994-08-04 17:42:35 +00:00
|
|
|
|
1995-10-26 20:31:59 +00:00
|
|
|
if (ipx_nullhost(*ina))
|
|
|
|
ina->x_host =
|
|
|
|
*(union ipx_host *) (sc->arpcom.ac_enaddr);
|
|
|
|
else {
|
|
|
|
bcopy((caddr_t) ina->x_host.c_host,
|
|
|
|
(caddr_t) sc->arpcom.ac_enaddr,
|
|
|
|
sizeof(sc->arpcom.ac_enaddr));
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Set new address
|
|
|
|
*/
|
1995-12-05 02:01:59 +00:00
|
|
|
ed_init(ifp);
|
1995-10-26 20:31:59 +00:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
#ifdef NS
|
|
|
|
/*
|
|
|
|
* XXX - This code is probably wrong
|
|
|
|
*/
|
1993-06-14 22:21:25 +00:00
|
|
|
case AF_NS:
|
1994-08-04 17:42:35 +00:00
|
|
|
{
|
|
|
|
register struct ns_addr *ina = &(IA_SNS(ifa)->sns_addr);
|
|
|
|
|
|
|
|
if (ns_nullhost(*ina))
|
|
|
|
ina->x_host =
|
|
|
|
*(union ns_host *) (sc->arpcom.ac_enaddr);
|
|
|
|
else {
|
|
|
|
bcopy((caddr_t) ina->x_host.c_host,
|
|
|
|
(caddr_t) sc->arpcom.ac_enaddr,
|
|
|
|
sizeof(sc->arpcom.ac_enaddr));
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Set new address
|
1993-06-14 22:21:25 +00:00
|
|
|
*/
|
1995-12-05 02:01:59 +00:00
|
|
|
ed_init(ifp);
|
1994-08-04 17:42:35 +00:00
|
|
|
break;
|
1993-06-14 22:21:25 +00:00
|
|
|
}
|
|
|
|
#endif
|
|
|
|
default:
|
1995-12-05 02:01:59 +00:00
|
|
|
ed_init(ifp);
|
1993-06-14 22:21:25 +00:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
1994-01-31 07:34:20 +00:00
|
|
|
case SIOCGIFADDR:
|
|
|
|
{
|
|
|
|
struct sockaddr *sa;
|
1994-08-04 17:42:35 +00:00
|
|
|
|
|
|
|
sa = (struct sockaddr *) & ifr->ifr_data;
|
|
|
|
bcopy((caddr_t) sc->arpcom.ac_enaddr,
|
|
|
|
(caddr_t) sa->sa_data, ETHER_ADDR_LEN);
|
1994-01-31 07:34:20 +00:00
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
1993-06-14 22:21:25 +00:00
|
|
|
case SIOCSIFFLAGS:
|
1994-08-04 17:42:35 +00:00
|
|
|
|
1993-06-14 22:21:25 +00:00
|
|
|
/*
|
1995-12-05 13:01:33 +00:00
|
|
|
* If the interface is marked up and stopped, then start it.
|
|
|
|
* If it is marked down and running, then stop it.
|
1993-06-14 22:21:25 +00:00
|
|
|
*/
|
1995-12-05 13:01:33 +00:00
|
|
|
if (ifp->if_flags & IFF_UP) {
|
|
|
|
if ((ifp->if_flags & IFF_RUNNING) == 0)
|
1995-12-05 02:01:59 +00:00
|
|
|
ed_init(ifp);
|
1995-12-05 13:01:33 +00:00
|
|
|
} else {
|
|
|
|
if (ifp->if_flags & IFF_RUNNING) {
|
|
|
|
ed_stop(sc);
|
|
|
|
ifp->if_flags &= ~IFF_RUNNING;
|
|
|
|
}
|
1993-06-14 22:21:25 +00:00
|
|
|
}
|
1995-01-15 00:18:17 +00:00
|
|
|
/* UP controls BUSY/IDLE */
|
1995-05-30 08:16:23 +00:00
|
|
|
sc->kdc.kdc_state = ((ifp->if_flags & IFF_UP)
|
|
|
|
? DC_BUSY
|
1995-01-15 00:18:17 +00:00
|
|
|
: DC_IDLE);
|
1994-08-04 17:42:35 +00:00
|
|
|
|
1993-06-14 22:21:25 +00:00
|
|
|
#if NBPFILTER > 0
|
1994-08-04 17:42:35 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Promiscuous flag may have changed, so reprogram the RCR.
|
|
|
|
*/
|
1995-12-05 02:01:59 +00:00
|
|
|
ed_setrcr(sc);
|
1993-06-14 22:21:25 +00:00
|
|
|
#endif
|
1994-08-04 17:42:35 +00:00
|
|
|
|
1993-06-22 12:10:07 +00:00
|
|
|
/*
|
1994-08-04 17:42:35 +00:00
|
|
|
* An unfortunate hack to provide the (required) software
|
|
|
|
* control of the tranceiver for 3Com boards. The ALTPHYS flag
|
|
|
|
* disables the tranceiver if set.
|
1993-06-22 12:10:07 +00:00
|
|
|
*/
|
1993-07-25 23:43:30 +00:00
|
|
|
if (sc->vendor == ED_VENDOR_3COM) {
|
1993-09-09 07:01:23 +00:00
|
|
|
if (ifp->if_flags & IFF_ALTPHYS) {
|
1993-07-25 23:43:30 +00:00
|
|
|
outb(sc->asic_addr + ED_3COM_CR, 0);
|
|
|
|
} else {
|
|
|
|
outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_XSEL);
|
|
|
|
}
|
1993-06-22 12:10:07 +00:00
|
|
|
}
|
1993-06-14 22:21:25 +00:00
|
|
|
break;
|
1994-09-07 06:11:29 +00:00
|
|
|
|
1994-08-04 17:42:35 +00:00
|
|
|
case SIOCADDMULTI:
|
|
|
|
case SIOCDELMULTI:
|
|
|
|
/*
|
|
|
|
* Update out multicast list.
|
|
|
|
*/
|
|
|
|
error = (command == SIOCADDMULTI) ?
|
1994-08-08 12:09:04 +00:00
|
|
|
ether_addmulti(ifr, &sc->arpcom) :
|
1994-08-08 16:45:11 +00:00
|
|
|
ether_delmulti(ifr, &sc->arpcom);
|
1994-08-04 17:42:35 +00:00
|
|
|
|
|
|
|
if (error == ENETRESET) {
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Multicast list has changed; set the hardware filter
|
|
|
|
* accordingly.
|
|
|
|
*/
|
1995-12-05 02:01:59 +00:00
|
|
|
ed_setrcr(sc);
|
1994-08-04 17:42:35 +00:00
|
|
|
error = 0;
|
|
|
|
}
|
|
|
|
break;
|
1994-08-08 12:09:04 +00:00
|
|
|
|
1994-09-07 06:11:29 +00:00
|
|
|
case SIOCSIFMTU:
|
1994-08-08 12:09:04 +00:00
|
|
|
/*
|
|
|
|
* Set the interface MTU.
|
|
|
|
*/
|
|
|
|
if (ifr->ifr_mtu > ETHERMTU) {
|
|
|
|
error = EINVAL;
|
|
|
|
} else {
|
|
|
|
ifp->if_mtu = ifr->ifr_mtu;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
1993-06-14 22:21:25 +00:00
|
|
|
default:
|
|
|
|
error = EINVAL;
|
|
|
|
}
|
|
|
|
(void) splx(s);
|
|
|
|
return (error);
|
|
|
|
}
|
1994-08-04 17:42:35 +00:00
|
|
|
|
1995-12-05 13:01:33 +00:00
|
|
|
/*
|
|
|
|
* Given a source and destination address, copy 'amount' of a packet from
|
|
|
|
* the ring buffer into a linear destination buffer. Takes into account
|
|
|
|
* ring-wrap.
|
|
|
|
*/
|
|
|
|
static inline char *
|
|
|
|
ed_ring_copy(sc, src, dst, amount)
|
|
|
|
struct ed_softc *sc;
|
|
|
|
char *src;
|
|
|
|
char *dst;
|
|
|
|
u_short amount;
|
|
|
|
{
|
|
|
|
u_short tmp_amount;
|
|
|
|
|
|
|
|
/* does copy wrap to lower addr in ring buffer? */
|
|
|
|
if (src + amount > sc->mem_end) {
|
|
|
|
tmp_amount = sc->mem_end - src;
|
|
|
|
|
|
|
|
/* copy amount up to end of NIC memory */
|
|
|
|
if (sc->mem_shared)
|
|
|
|
bcopy(src, dst, tmp_amount);
|
|
|
|
else
|
1995-12-15 07:31:40 +00:00
|
|
|
ed_pio_readmem(sc, (int)src, dst, tmp_amount);
|
1995-12-05 13:01:33 +00:00
|
|
|
|
|
|
|
amount -= tmp_amount;
|
|
|
|
src = sc->mem_ring;
|
|
|
|
dst += tmp_amount;
|
|
|
|
}
|
|
|
|
if (sc->mem_shared)
|
|
|
|
bcopy(src, dst, amount);
|
|
|
|
else
|
1995-12-15 07:31:40 +00:00
|
|
|
ed_pio_readmem(sc, (int)src, dst, amount);
|
1995-12-05 13:01:33 +00:00
|
|
|
|
|
|
|
return (src + amount);
|
|
|
|
}
|
|
|
|
|
1993-06-14 22:21:25 +00:00
|
|
|
/*
|
|
|
|
* Retreive packet from shared memory and send to the next level up via
|
|
|
|
* ether_input(). If there is a BPF listener, give a copy to BPF, too.
|
|
|
|
*/
|
1993-11-25 01:38:01 +00:00
|
|
|
static void
|
1994-08-04 17:42:35 +00:00
|
|
|
ed_get_packet(sc, buf, len, multicast)
|
1993-06-14 22:21:25 +00:00
|
|
|
struct ed_softc *sc;
|
1994-08-04 17:42:35 +00:00
|
|
|
char *buf;
|
1993-06-14 22:21:25 +00:00
|
|
|
u_short len;
|
1994-08-04 17:42:35 +00:00
|
|
|
int multicast;
|
1993-06-14 22:21:25 +00:00
|
|
|
{
|
|
|
|
struct ether_header *eh;
|
1994-11-26 10:51:49 +00:00
|
|
|
struct mbuf *m;
|
1993-06-14 22:21:25 +00:00
|
|
|
|
|
|
|
/* Allocate a header mbuf */
|
|
|
|
MGETHDR(m, M_DONTWAIT, MT_DATA);
|
1994-10-08 09:24:20 +00:00
|
|
|
if (m == NULL)
|
|
|
|
return;
|
1993-06-14 22:21:25 +00:00
|
|
|
m->m_pkthdr.rcvif = &sc->arpcom.ac_if;
|
1994-11-26 10:51:49 +00:00
|
|
|
m->m_pkthdr.len = m->m_len = len;
|
1993-06-14 22:21:25 +00:00
|
|
|
|
1995-12-05 13:01:33 +00:00
|
|
|
/*
|
|
|
|
* We always put the received packet in a single buffer -
|
|
|
|
* either with just an mbuf header or in a cluster attached
|
|
|
|
* to the header. The +2 is to compensate for the alignment
|
|
|
|
* fixup below.
|
|
|
|
*/
|
|
|
|
if ((len + 2) > MHLEN) {
|
|
|
|
/* Attach an mbuf cluster */
|
|
|
|
MCLGET(m, M_DONTWAIT);
|
1994-11-26 10:51:49 +00:00
|
|
|
|
1995-12-05 13:01:33 +00:00
|
|
|
/* Insist on getting a cluster */
|
|
|
|
if ((m->m_flags & M_EXT) == 0) {
|
|
|
|
m_freem(m);
|
|
|
|
return;
|
|
|
|
}
|
1994-11-26 10:51:49 +00:00
|
|
|
}
|
1993-06-14 22:21:25 +00:00
|
|
|
|
|
|
|
/*
|
1994-11-26 10:51:49 +00:00
|
|
|
* The +2 is to longword align the start of the real packet.
|
|
|
|
* This is important for NFS.
|
1993-06-14 22:21:25 +00:00
|
|
|
*/
|
1994-11-26 10:51:49 +00:00
|
|
|
m->m_data += 2;
|
1994-10-08 09:24:20 +00:00
|
|
|
eh = mtod(m, struct ether_header *);
|
1993-09-29 20:30:26 +00:00
|
|
|
|
1993-06-14 22:21:25 +00:00
|
|
|
/*
|
1994-11-26 10:51:49 +00:00
|
|
|
* Get packet, including link layer address, from interface.
|
1993-06-14 22:21:25 +00:00
|
|
|
*/
|
1994-11-26 10:51:49 +00:00
|
|
|
ed_ring_copy(sc, buf, (char *)eh, len);
|
1993-06-14 22:21:25 +00:00
|
|
|
|
|
|
|
#if NBPFILTER > 0
|
1994-08-04 17:42:35 +00:00
|
|
|
|
1993-06-14 22:21:25 +00:00
|
|
|
/*
|
1994-08-04 17:42:35 +00:00
|
|
|
* Check if there's a BPF listener on this interface. If so, hand off
|
|
|
|
* the raw packet to bpf.
|
1993-06-14 22:21:25 +00:00
|
|
|
*/
|
1996-02-06 18:51:28 +00:00
|
|
|
if (sc->arpcom.ac_if.if_bpf) {
|
|
|
|
bpf_mtap(&sc->arpcom.ac_if, m);
|
1993-06-14 22:21:25 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Note that the interface cannot be in promiscuous mode if
|
|
|
|
* there are no BPF listeners. And if we are in promiscuous
|
|
|
|
* mode, we have to check if this packet is really ours.
|
|
|
|
*/
|
|
|
|
if ((sc->arpcom.ac_if.if_flags & IFF_PROMISC) &&
|
1994-01-03 17:17:19 +00:00
|
|
|
bcmp(eh->ether_dhost, sc->arpcom.ac_enaddr,
|
1994-10-08 09:24:20 +00:00
|
|
|
sizeof(eh->ether_dhost)) != 0 && multicast == 0) {
|
|
|
|
m_freem(m);
|
1994-08-04 17:42:35 +00:00
|
|
|
return;
|
1993-06-14 22:21:25 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/*
|
1994-11-26 10:51:49 +00:00
|
|
|
* Remove link layer address.
|
1993-06-14 22:21:25 +00:00
|
|
|
*/
|
1994-11-26 10:51:49 +00:00
|
|
|
m->m_pkthdr.len = m->m_len = len - sizeof(struct ether_header);
|
|
|
|
m->m_data += sizeof(struct ether_header);
|
1993-06-14 22:21:25 +00:00
|
|
|
|
1994-10-08 09:24:20 +00:00
|
|
|
ether_input(&sc->arpcom.ac_if, eh, m);
|
1993-06-14 22:21:25 +00:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Supporting routines
|
|
|
|
*/
|
|
|
|
|
1993-09-29 20:30:26 +00:00
|
|
|
/*
|
|
|
|
* Given a NIC memory source address and a host memory destination
|
|
|
|
* address, copy 'amount' from NIC to host using Programmed I/O.
|
|
|
|
* The 'amount' is rounded up to a word - okay as long as mbufs
|
|
|
|
* are word sized.
|
|
|
|
* This routine is currently Novell-specific.
|
|
|
|
*/
|
1995-11-18 08:29:04 +00:00
|
|
|
static void
|
1994-08-04 17:42:35 +00:00
|
|
|
ed_pio_readmem(sc, src, dst, amount)
|
|
|
|
struct ed_softc *sc;
|
1995-12-15 07:31:40 +00:00
|
|
|
int src;
|
1993-09-29 20:30:26 +00:00
|
|
|
unsigned char *dst;
|
|
|
|
unsigned short amount;
|
|
|
|
{
|
|
|
|
/* select page 0 registers */
|
1994-08-04 17:42:35 +00:00
|
|
|
outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_STA);
|
1993-09-29 20:30:26 +00:00
|
|
|
|
|
|
|
/* round up to a word */
|
1994-08-04 17:42:35 +00:00
|
|
|
if (amount & 1)
|
|
|
|
++amount;
|
1993-09-29 20:30:26 +00:00
|
|
|
|
|
|
|
/* set up DMA byte count */
|
|
|
|
outb(sc->nic_addr + ED_P0_RBCR0, amount);
|
1994-08-04 17:42:35 +00:00
|
|
|
outb(sc->nic_addr + ED_P0_RBCR1, amount >> 8);
|
1993-09-29 20:30:26 +00:00
|
|
|
|
|
|
|
/* set up source address in NIC mem */
|
|
|
|
outb(sc->nic_addr + ED_P0_RSAR0, src);
|
1994-08-04 17:42:35 +00:00
|
|
|
outb(sc->nic_addr + ED_P0_RSAR1, src >> 8);
|
1993-09-29 20:30:26 +00:00
|
|
|
|
|
|
|
outb(sc->nic_addr + ED_P0_CR, ED_CR_RD0 | ED_CR_STA);
|
|
|
|
|
|
|
|
if (sc->isa16bit) {
|
1994-08-04 17:42:35 +00:00
|
|
|
insw(sc->asic_addr + ED_NOVELL_DATA, dst, amount / 2);
|
1993-09-29 20:30:26 +00:00
|
|
|
} else
|
|
|
|
insb(sc->asic_addr + ED_NOVELL_DATA, dst, amount);
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Stripped down routine for writing a linear buffer to NIC memory.
|
|
|
|
* Only used in the probe routine to test the memory. 'len' must
|
|
|
|
* be even.
|
|
|
|
*/
|
1995-11-18 08:29:04 +00:00
|
|
|
static void
|
1994-08-04 17:42:35 +00:00
|
|
|
ed_pio_writemem(sc, src, dst, len)
|
1993-09-29 20:30:26 +00:00
|
|
|
struct ed_softc *sc;
|
1994-08-04 17:42:35 +00:00
|
|
|
char *src;
|
1993-09-29 20:30:26 +00:00
|
|
|
unsigned short dst;
|
|
|
|
unsigned short len;
|
|
|
|
{
|
1995-02-26 20:03:53 +00:00
|
|
|
int maxwait = 200; /* about 240us */
|
1993-09-29 20:30:26 +00:00
|
|
|
|
|
|
|
/* select page 0 registers */
|
1994-08-04 17:42:35 +00:00
|
|
|
outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_STA);
|
1993-09-29 20:30:26 +00:00
|
|
|
|
|
|
|
/* reset remote DMA complete flag */
|
|
|
|
outb(sc->nic_addr + ED_P0_ISR, ED_ISR_RDC);
|
|
|
|
|
|
|
|
/* set up DMA byte count */
|
|
|
|
outb(sc->nic_addr + ED_P0_RBCR0, len);
|
1994-08-04 17:42:35 +00:00
|
|
|
outb(sc->nic_addr + ED_P0_RBCR1, len >> 8);
|
1993-09-29 20:30:26 +00:00
|
|
|
|
|
|
|
/* set up destination address in NIC mem */
|
|
|
|
outb(sc->nic_addr + ED_P0_RSAR0, dst);
|
1994-08-04 17:42:35 +00:00
|
|
|
outb(sc->nic_addr + ED_P0_RSAR1, dst >> 8);
|
1993-09-29 20:30:26 +00:00
|
|
|
|
|
|
|
/* set remote DMA write */
|
|
|
|
outb(sc->nic_addr + ED_P0_CR, ED_CR_RD1 | ED_CR_STA);
|
|
|
|
|
|
|
|
if (sc->isa16bit)
|
1994-08-04 17:42:35 +00:00
|
|
|
outsw(sc->asic_addr + ED_NOVELL_DATA, src, len / 2);
|
1993-09-29 20:30:26 +00:00
|
|
|
else
|
|
|
|
outsb(sc->asic_addr + ED_NOVELL_DATA, src, len);
|
1994-08-04 17:42:35 +00:00
|
|
|
|
1993-09-29 20:30:26 +00:00
|
|
|
/*
|
|
|
|
* Wait for remote DMA complete. This is necessary because on the
|
1994-08-04 17:42:35 +00:00
|
|
|
* transmit side, data is handled internally by the NIC in bursts and
|
|
|
|
* we can't start another remote DMA until this one completes. Not
|
|
|
|
* waiting causes really bad things to happen - like the NIC
|
|
|
|
* irrecoverably jamming the ISA bus.
|
1993-09-29 20:30:26 +00:00
|
|
|
*/
|
|
|
|
while (((inb(sc->nic_addr + ED_P0_ISR) & ED_ISR_RDC) != ED_ISR_RDC) && --maxwait);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Write an mbuf chain to the destination NIC memory address using
|
|
|
|
* programmed I/O.
|
|
|
|
*/
|
1995-11-18 08:29:04 +00:00
|
|
|
static u_short
|
1994-08-04 17:42:35 +00:00
|
|
|
ed_pio_write_mbufs(sc, m, dst)
|
1993-09-29 20:30:26 +00:00
|
|
|
struct ed_softc *sc;
|
|
|
|
struct mbuf *m;
|
1995-12-15 07:31:40 +00:00
|
|
|
int dst;
|
1993-09-29 20:30:26 +00:00
|
|
|
{
|
1995-12-05 02:01:59 +00:00
|
|
|
struct ifnet *ifp = (struct ifnet *)sc;
|
1995-01-04 21:10:17 +00:00
|
|
|
unsigned short total_len, dma_len;
|
1993-09-29 20:30:26 +00:00
|
|
|
struct mbuf *mp;
|
1995-02-26 20:03:53 +00:00
|
|
|
int maxwait = 200; /* about 240us */
|
1993-09-29 20:30:26 +00:00
|
|
|
|
|
|
|
/* First, count up the total number of bytes to copy */
|
1995-01-04 21:10:17 +00:00
|
|
|
for (total_len = 0, mp = m; mp; mp = mp->m_next)
|
|
|
|
total_len += mp->m_len;
|
1994-08-04 17:42:35 +00:00
|
|
|
|
1995-01-04 21:10:17 +00:00
|
|
|
dma_len = total_len;
|
1995-01-01 06:38:14 +00:00
|
|
|
if (sc->isa16bit && (dma_len & 1))
|
|
|
|
dma_len++;
|
|
|
|
|
1993-09-29 20:30:26 +00:00
|
|
|
/* select page 0 registers */
|
1994-08-04 17:42:35 +00:00
|
|
|
outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_STA);
|
1993-09-29 20:30:26 +00:00
|
|
|
|
|
|
|
/* reset remote DMA complete flag */
|
|
|
|
outb(sc->nic_addr + ED_P0_ISR, ED_ISR_RDC);
|
|
|
|
|
|
|
|
/* set up DMA byte count */
|
1995-01-01 06:38:14 +00:00
|
|
|
outb(sc->nic_addr + ED_P0_RBCR0, dma_len);
|
|
|
|
outb(sc->nic_addr + ED_P0_RBCR1, dma_len >> 8);
|
1993-09-29 20:30:26 +00:00
|
|
|
|
|
|
|
/* set up destination address in NIC mem */
|
|
|
|
outb(sc->nic_addr + ED_P0_RSAR0, dst);
|
1994-08-04 17:42:35 +00:00
|
|
|
outb(sc->nic_addr + ED_P0_RSAR1, dst >> 8);
|
1993-09-29 20:30:26 +00:00
|
|
|
|
|
|
|
/* set remote DMA write */
|
|
|
|
outb(sc->nic_addr + ED_P0_CR, ED_CR_RD1 | ED_CR_STA);
|
|
|
|
|
1994-10-14 11:56:36 +00:00
|
|
|
/*
|
1995-05-30 08:16:23 +00:00
|
|
|
* Transfer the mbuf chain to the NIC memory.
|
1994-10-14 11:56:36 +00:00
|
|
|
* 16-bit cards require that data be transferred as words, and only words.
|
|
|
|
* So that case requires some extra code to patch over odd-length mbufs.
|
|
|
|
*/
|
|
|
|
|
|
|
|
if (!sc->isa16bit) {
|
|
|
|
/* NE1000s are easy */
|
|
|
|
while (m) {
|
|
|
|
if (m->m_len) {
|
1995-05-30 08:16:23 +00:00
|
|
|
outsb(sc->asic_addr + ED_NOVELL_DATA,
|
1994-10-14 11:56:36 +00:00
|
|
|
m->m_data, m->m_len);
|
|
|
|
}
|
|
|
|
m = m->m_next;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
/* NE2000s are a pain */
|
|
|
|
unsigned char *data;
|
|
|
|
int len, wantbyte;
|
|
|
|
unsigned char savebyte[2];
|
1995-05-30 08:16:23 +00:00
|
|
|
|
1994-10-14 11:56:36 +00:00
|
|
|
wantbyte = 0;
|
|
|
|
|
|
|
|
while (m) {
|
|
|
|
len = m->m_len;
|
|
|
|
if (len) {
|
1995-01-04 21:10:17 +00:00
|
|
|
data = mtod(m, caddr_t);
|
1994-10-14 11:56:36 +00:00
|
|
|
/* finish the last word */
|
|
|
|
if (wantbyte) {
|
|
|
|
savebyte[1] = *data;
|
1995-01-04 21:10:17 +00:00
|
|
|
outw(sc->asic_addr + ED_NOVELL_DATA, *(u_short *)savebyte);
|
1994-10-14 11:56:36 +00:00
|
|
|
data++;
|
|
|
|
len--;
|
|
|
|
wantbyte = 0;
|
|
|
|
}
|
|
|
|
/* output contiguous words */
|
|
|
|
if (len > 1) {
|
1995-05-30 08:16:23 +00:00
|
|
|
outsw(sc->asic_addr + ED_NOVELL_DATA,
|
1994-10-14 11:56:36 +00:00
|
|
|
data, len >> 1);
|
|
|
|
data += len & ~1;
|
|
|
|
len &= 1;
|
|
|
|
}
|
|
|
|
/* save last byte, if necessary */
|
|
|
|
if (len == 1) {
|
|
|
|
savebyte[0] = *data;
|
|
|
|
wantbyte = 1;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
m = m->m_next;
|
1993-09-29 20:30:26 +00:00
|
|
|
}
|
1994-10-14 11:56:36 +00:00
|
|
|
/* spit last byte */
|
1995-01-04 21:10:17 +00:00
|
|
|
if (wantbyte) {
|
|
|
|
outw(sc->asic_addr + ED_NOVELL_DATA, *(u_short *)savebyte);
|
|
|
|
}
|
1993-09-29 20:30:26 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Wait for remote DMA complete. This is necessary because on the
|
1994-08-04 17:42:35 +00:00
|
|
|
* transmit side, data is handled internally by the NIC in bursts and
|
|
|
|
* we can't start another remote DMA until this one completes. Not
|
|
|
|
* waiting causes really bad things to happen - like the NIC
|
|
|
|
* irrecoverably jamming the ISA bus.
|
1993-09-29 20:30:26 +00:00
|
|
|
*/
|
|
|
|
while (((inb(sc->nic_addr + ED_P0_ISR) & ED_ISR_RDC) != ED_ISR_RDC) && --maxwait);
|
|
|
|
|
|
|
|
if (!maxwait) {
|
|
|
|
log(LOG_WARNING, "ed%d: remote transmit DMA failed to complete\n",
|
1995-12-05 02:01:59 +00:00
|
|
|
ifp->if_unit);
|
|
|
|
ed_reset(ifp);
|
1995-01-04 21:10:17 +00:00
|
|
|
return(0);
|
1993-09-29 20:30:26 +00:00
|
|
|
}
|
1995-01-04 21:10:17 +00:00
|
|
|
return (total_len);
|
1993-09-29 20:30:26 +00:00
|
|
|
}
|
1994-08-04 17:42:35 +00:00
|
|
|
|
1995-11-18 08:29:04 +00:00
|
|
|
static void
|
1995-12-05 02:01:59 +00:00
|
|
|
ed_setrcr(sc)
|
1994-08-04 17:42:35 +00:00
|
|
|
struct ed_softc *sc;
|
|
|
|
{
|
1995-12-05 02:01:59 +00:00
|
|
|
struct ifnet *ifp = (struct ifnet *)sc;
|
1994-08-04 17:42:35 +00:00
|
|
|
int i;
|
|
|
|
|
|
|
|
/* set page 1 registers */
|
1994-09-07 06:11:29 +00:00
|
|
|
outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_PAGE_1 | ED_CR_STP);
|
1994-08-04 17:42:35 +00:00
|
|
|
|
|
|
|
if (ifp->if_flags & IFF_PROMISC) {
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Reconfigure the multicast filter.
|
|
|
|
*/
|
|
|
|
for (i = 0; i < 8; i++)
|
|
|
|
outb(sc->nic_addr + ED_P1_MAR0 + i, 0xff);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* And turn on promiscuous mode. Also enable reception of
|
|
|
|
* runts and packets with CRC & alignment errors.
|
|
|
|
*/
|
|
|
|
/* Set page 0 registers */
|
1994-09-07 06:11:29 +00:00
|
|
|
outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_STP);
|
|
|
|
|
1994-08-04 17:42:35 +00:00
|
|
|
outb(sc->nic_addr + ED_P0_RCR, ED_RCR_PRO | ED_RCR_AM |
|
|
|
|
ED_RCR_AB | ED_RCR_AR | ED_RCR_SEP);
|
|
|
|
} else {
|
|
|
|
/* set up multicast addresses and filter modes */
|
|
|
|
if (ifp->if_flags & IFF_MULTICAST) {
|
|
|
|
u_long mcaf[2];
|
|
|
|
|
|
|
|
if (ifp->if_flags & IFF_ALLMULTI) {
|
|
|
|
mcaf[0] = 0xffffffff;
|
|
|
|
mcaf[1] = 0xffffffff;
|
|
|
|
} else
|
|
|
|
ds_getmcaf(sc, mcaf);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Set multicast filter on chip.
|
|
|
|
*/
|
|
|
|
for (i = 0; i < 8; i++)
|
|
|
|
outb(sc->nic_addr + ED_P1_MAR0 + i, ((u_char *) mcaf)[i]);
|
|
|
|
|
|
|
|
/* Set page 0 registers */
|
1994-09-07 06:11:29 +00:00
|
|
|
outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_STP);
|
1994-08-04 17:42:35 +00:00
|
|
|
|
|
|
|
outb(sc->nic_addr + ED_P0_RCR, ED_RCR_AM | ED_RCR_AB);
|
|
|
|
} else {
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Initialize multicast address hashing registers to
|
|
|
|
* not accept multicasts.
|
|
|
|
*/
|
|
|
|
for (i = 0; i < 8; ++i)
|
|
|
|
outb(sc->nic_addr + ED_P1_MAR0 + i, 0x00);
|
|
|
|
|
|
|
|
/* Set page 0 registers */
|
1994-09-07 06:11:29 +00:00
|
|
|
outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_STP);
|
1994-08-04 17:42:35 +00:00
|
|
|
|
|
|
|
outb(sc->nic_addr + ED_P0_RCR, ED_RCR_AB);
|
|
|
|
}
|
|
|
|
}
|
1994-11-17 14:42:27 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Start interface.
|
|
|
|
*/
|
|
|
|
outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_STA);
|
1994-08-04 17:42:35 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Compute crc for ethernet address
|
|
|
|
*/
|
1995-10-31 18:41:49 +00:00
|
|
|
static u_long
|
1994-08-04 17:42:35 +00:00
|
|
|
ds_crc(ep)
|
|
|
|
u_char *ep;
|
|
|
|
{
|
|
|
|
#define POLYNOMIAL 0x04c11db6
|
|
|
|
register u_long crc = 0xffffffffL;
|
|
|
|
register int carry, i, j;
|
|
|
|
register u_char b;
|
|
|
|
|
|
|
|
for (i = 6; --i >= 0;) {
|
|
|
|
b = *ep++;
|
|
|
|
for (j = 8; --j >= 0;) {
|
|
|
|
carry = ((crc & 0x80000000L) ? 1 : 0) ^ (b & 0x01);
|
|
|
|
crc <<= 1;
|
|
|
|
b >>= 1;
|
|
|
|
if (carry)
|
|
|
|
crc = ((crc ^ POLYNOMIAL) | carry);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return crc;
|
|
|
|
#undef POLYNOMIAL
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Compute the multicast address filter from the
|
|
|
|
* list of multicast addresses we need to listen to.
|
|
|
|
*/
|
1995-11-18 08:29:04 +00:00
|
|
|
static void
|
1994-08-04 17:42:35 +00:00
|
|
|
ds_getmcaf(sc, mcaf)
|
|
|
|
struct ed_softc *sc;
|
|
|
|
u_long *mcaf;
|
|
|
|
{
|
|
|
|
register u_int index;
|
|
|
|
register u_char *af = (u_char *) mcaf;
|
|
|
|
register struct ether_multi *enm;
|
|
|
|
register struct ether_multistep step;
|
|
|
|
|
|
|
|
mcaf[0] = 0;
|
|
|
|
mcaf[1] = 0;
|
|
|
|
|
|
|
|
ETHER_FIRST_MULTI(step, &sc->arpcom, enm);
|
|
|
|
while (enm != NULL) {
|
|
|
|
if (bcmp(enm->enm_addrlo, enm->enm_addrhi, 6) != 0) {
|
|
|
|
mcaf[0] = 0xffffffff;
|
|
|
|
mcaf[1] = 0xffffffff;
|
|
|
|
return;
|
|
|
|
}
|
1995-08-25 19:50:15 +00:00
|
|
|
index = ds_crc(enm->enm_addrlo) >> 26;
|
1994-08-04 17:42:35 +00:00
|
|
|
af[index >> 3] |= 1 << (index & 7);
|
|
|
|
|
|
|
|
ETHER_NEXT_MULTI(step, enm);
|
|
|
|
}
|
|
|
|
}
|