2011-04-03 13:19:58 +00:00
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#
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# This file adds to the values in AR91XX_BASE.hints.
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#
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# $FreeBSD$
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# Hard-code the PHY for now, until there's switch phy support.
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2012-05-03 07:48:19 +00:00
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# hint.arge.0.phymask=0x000c
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hint.arge.0.phymask=0x0000
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2011-04-03 13:19:58 +00:00
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hint.arge.0.media=1000
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hint.arge.0.fduplex=1
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# Where is the MAC address stored in flash for this particular unit.
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hint.arge.0.eeprommac=0x1f01fc00
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# This isn't used, but configure it anyway.
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# This should eventually just not be configured, but the if then
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# needs to be properly disabled or spurious interrupts occur.
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hint.arge.1.phymask=0x0
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# Where the ART is
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hint.ath.0.eepromaddr=0x1fff1000
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2011-11-24 04:39:01 +00:00
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#
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# Define a slightly custom flash layout.
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# The default flash layout:
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#
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# 128k: uboot
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# 1024k: kernel
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# 4096k: rootfs
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2011-11-24 07:37:19 +00:00
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# 2816: unknown
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# 64k: board config?
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2011-11-24 04:39:01 +00:00
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# 64k: ART
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#
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# from printenv:
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# bootargs=console=ttyS0,115200 root=31:02 rootfstype=jffs2 init=/sbin/init
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# mtdparts=ar9100-nor0:128k(u-boot),1024k(kernel),4096k(rootfs),64k(art)
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# This isn't a lot of space!
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# So:
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# 128k: uboot
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# 2048k: kernel
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2011-11-24 15:12:57 +00:00
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# 5888k: rootfs
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2011-11-24 07:37:19 +00:00
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# 64k: config
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2011-11-24 04:39:01 +00:00
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# 64k: ART
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hint.map.0.at="flash/spi0"
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hint.map.0.start=0x00000000
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2014-01-07 13:09:35 +00:00
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hint.map.0.end=0x00020000
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2011-11-24 04:39:01 +00:00
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hint.map.0.name="uboot"
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hint.map.0.readonly=1
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hint.map.1.at="flash/spi0"
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hint.map.1.start=0x00020000
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2014-01-07 13:09:35 +00:00
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hint.map.1.end="search:0x00100000:0x10000:.!/bin/sh"
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2011-11-24 04:39:01 +00:00
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hint.map.1.name="kernel"
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hint.map.1.readonly=1
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hint.map.2.at="flash/spi0"
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2014-01-07 13:09:35 +00:00
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hint.map.2.start="search:0x00100000:0x10000:.!/bin/sh"
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2011-11-24 15:12:57 +00:00
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hint.map.2.end=0x007e0000
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2011-11-24 04:39:01 +00:00
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hint.map.2.name="rootfs"
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hint.map.2.readonly=1
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2011-11-24 07:37:19 +00:00
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hint.map.3.at="flash/spi0"
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2011-11-24 15:12:57 +00:00
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hint.map.3.start=0x007e0000
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hint.map.3.end=0x007f0000
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2011-11-24 07:37:19 +00:00
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hint.map.3.name="cfg"
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hint.map.3.readonly=0
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2011-11-24 04:39:01 +00:00
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2011-11-24 07:37:19 +00:00
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# This is radio calibration section. It is (or should be!) unique
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# for each board, to take into account thermal and electrical differences
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# as well as the regulatory compliance data.
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#
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2011-11-24 15:12:57 +00:00
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hint.map.4.at="flash/spi0"
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hint.map.4.start=0x007f0000
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hint.map.4.end=0x00800000
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hint.map.4.name="art"
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hint.map.4.readonly=1
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2011-12-15 01:05:38 +00:00
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# GPIO specific configuration block
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# Don't flip on anything that isn't already enabled.
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# This includes leaving the SPI CS1/CS2 pins as GPIO pins as they're
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# not used here.
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2012-05-12 17:41:42 +00:00
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hint.gpio.0.function_set=0x00002000
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2011-12-15 01:05:38 +00:00
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hint.gpio.0.function_clear=0x00000000
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# These are the GPIO LEDs and buttons which can be software controlled.
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hint.gpio.0.pinmask=0x001c02ae
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# pin 1 - USB (LED)
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# pin 2 - System (LED)
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# Pin 3 - Reset (input)
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# Pin 5 - QSS (LED)
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# Pin 7 - QSS Button (input)
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# Pin 8 - wired into the chip reset line
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# Pin 9 - WLAN
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# Pin 10 - UART TX (not GPIO)
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# Pin 13 - UART RX (not GPIO)
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# Pin 18 - RTL8366RB switch data line
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# Pin 19 - RTL8366RB switch clock line
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# Pin 20 - "GPIO20"
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# LEDs are configured separately and driven by the LED device
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2012-05-12 17:41:42 +00:00
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#hint.gpioled.0.at="gpiobus0"
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#hint.gpioled.0.name="usb"
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#hint.gpioled.0.pins=0x0002
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2011-12-15 01:05:38 +00:00
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hint.gpioled.1.at="gpiobus0"
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hint.gpioled.1.name="system"
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hint.gpioled.1.pins=0x0004
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hint.gpioled.2.at="gpiobus0"
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hint.gpioled.2.name="qss"
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hint.gpioled.2.pins=0x0020
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hint.gpioled.3.at="gpiobus0"
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hint.gpioled.3.name="wlan"
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hint.gpioled.3.pins=0x0200
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2012-05-12 17:41:42 +00:00
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# GPIO I2C bus
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hint.gpioiic.0.at="gpiobus0"
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hint.gpioiic.0.pins=0xc0000
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hint.gpioiic.0.scl=1
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hint.gpioiic.0.sda=0
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# I2C bus
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# Don't be strict about I2C protocol - the relaxed semantics are required
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# by the realtek switch PHY.
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hint.iicbus.0.strict=0
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# Bit bang bus - override default delay
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#hint.iicbb.0.udelay=3
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