1999-08-27 18:33:36 +00:00
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/* $NetBSD: tlphyreg.h,v 1.1 1998/08/10 23:59:58 thorpej Exp $ */
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2005-01-06 01:43:34 +00:00
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/*-
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1999-08-27 18:33:36 +00:00
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* Copyright (c) 1997 Manuel Bouyer. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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1999-08-28 02:16:32 +00:00
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* $FreeBSD$
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1999-08-27 18:33:36 +00:00
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*/
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#ifndef _DEV_MII_TLPHYREG_H_
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#define _DEV_MII_TLPHYREG_H_
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/*
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* Registers for the TI ThunderLAN internal PHY.
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*/
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#define MII_TLPHY_ID 0x10 /* ThunderLAN PHY ID */
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#define ID_10BASETAUI 0x0001 /* 10baseT/AUI PHY */
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#define MII_TLPHY_CTRL 0x11 /* Control regiseter */
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#define CTRL_ILINK 0x8000 /* Ignore link */
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#define CTRL_SWPOL 0x4000 /* swap polarity */
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#define CTRL_AUISEL 0x2000 /* Select AUI */
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#define CTRL_SQEEN 0x1000 /* Enable SQE */
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#define CTRL_NFEW 0x0004 /* Not far end wrap */
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#define CTRL_INTEN 0x0002 /* Interrupts enable */
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#define CTRL_TINT 0x0001 /* Test Interrupts */
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#define MII_TLPHY_ST 0x12 /* Status register */
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#define ST_MII_INT 0x8000 /* MII interrupt */
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#define ST_PHOK 0x4000 /* Power high OK */
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#define ST_POLOK 0x2000 /* Polarity OK */
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#define ST_TPE 0x1000 /* Twisted pair energy */
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#endif /* _DEV_MII_TLPHYREG_H_ */
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