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freebsd-dev/sys/dev/mii/xmphy.c

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Add PHY drivers for the XMAC II's internal PHY and the Broadcom BCM5400 1000baseTX PHY. These will be used by the SysKonnect gigabit ethernet driver shortly.
2000-04-22 01:58:18 +00:00
/*
* Copyright (c) 2000
* Bill Paul <wpaul@ee.columbia.edu>. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by Bill Paul.
* 4. Neither the name of the author nor the names of any co-contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
* THE POSSIBILITY OF SUCH DAMAGE.
*
* $FreeBSD$
*/
/*
* driver for the XaQti XMAC II's internal PHY. This is sort of
* like a 10/100 PHY, except the only thing we're really autoselecting
* here is full/half duplex. Speed is always 1000mbps.
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/kernel.h>
#include <sys/malloc.h>
#include <sys/socket.h>
#include <sys/bus.h>
#include <net/if.h>
#include <net/if_media.h>
#include <dev/mii/mii.h>
#include <dev/mii/miivar.h>
#include <dev/mii/miidevs.h>
#include <dev/mii/xmphyreg.h>
#include "miibus_if.h"
#if !defined(lint)
static const char rcsid[] =
"$FreeBSD$";
#endif
static int xmphy_probe __P((device_t));
static int xmphy_attach __P((device_t));
static int xmphy_detach __P((device_t));
static device_method_t xmphy_methods[] = {
/* device interface */
DEVMETHOD(device_probe, xmphy_probe),
DEVMETHOD(device_attach, xmphy_attach),
DEVMETHOD(device_detach, xmphy_detach),
DEVMETHOD(device_shutdown, bus_generic_shutdown),
{ 0, 0 }
};
static devclass_t xmphy_devclass;
static driver_t xmphy_driver = {
"xmphy",
xmphy_methods,
sizeof(struct mii_softc)
};
DRIVER_MODULE(xmphy, miibus, xmphy_driver, xmphy_devclass, 0, 0);
int xmphy_service __P((struct mii_softc *, struct mii_data *, int));
void xmphy_status __P((struct mii_softc *));
static int xmphy_mii_phy_auto __P((struct mii_softc *, int));
extern void mii_phy_auto_timeout __P((void *));
static int xmphy_probe(dev)
device_t dev;
{
struct mii_attach_args *ma;
ma = device_get_ivars(dev);
Tweak the xmphy driver a little bit based on something I learned about the built-in 1000baseX interface in the Level 1 LXT1001 chip. The Level 1 PHY comes up with the isolate bit in the control register set by default, but it also has the autonegotiate bit set. When you tell the xmphy driver to select IFM_AUTO mode, it sees that the autoneg bit is already on, and thus doesn't bother updating the control register. However this means that the isolate bit is never turned off (unless you manually select 1000baseSX full or half duplex mode, which does result in the control register being modified and the ISO bit being turned off). This subtle and unusual behavioral difference stopped me from being able to receive packets on the SMC9462TX card for several days, since isolating the PHY disconnects it from the MAC's data interface. The fix is to omit the 'is the autoneg big set?' test, since it doesn't really provide much of an optimization anyway. This commit also updates the xmphy driver to support the Jato/Level 1 internal PHY. (I'm not sure how Jato Technologies is related to Level 1: all I know is the OUI from the PHY ID registers maps to Jato in the OUI database.) This will be used once I add the if_lge driver to support the LXT10010 chip.
2001-05-23 22:10:55 +00:00
if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_xxXAQTI &&
MII_MODEL(ma->mii_id2) == MII_MODEL_XAQTI_XMACII) {
device_set_desc(dev, MII_STR_XAQTI_XMACII);
return(0);
}
Add PHY drivers for the XMAC II's internal PHY and the Broadcom BCM5400 1000baseTX PHY. These will be used by the SysKonnect gigabit ethernet driver shortly.
2000-04-22 01:58:18 +00:00
Tweak the xmphy driver a little bit based on something I learned about the built-in 1000baseX interface in the Level 1 LXT1001 chip. The Level 1 PHY comes up with the isolate bit in the control register set by default, but it also has the autonegotiate bit set. When you tell the xmphy driver to select IFM_AUTO mode, it sees that the autoneg bit is already on, and thus doesn't bother updating the control register. However this means that the isolate bit is never turned off (unless you manually select 1000baseSX full or half duplex mode, which does result in the control register being modified and the ISO bit being turned off). This subtle and unusual behavioral difference stopped me from being able to receive packets on the SMC9462TX card for several days, since isolating the PHY disconnects it from the MAC's data interface. The fix is to omit the 'is the autoneg big set?' test, since it doesn't really provide much of an optimization anyway. This commit also updates the xmphy driver to support the Jato/Level 1 internal PHY. (I'm not sure how Jato Technologies is related to Level 1: all I know is the OUI from the PHY ID registers maps to Jato in the OUI database.) This will be used once I add the if_lge driver to support the LXT10010 chip.
2001-05-23 22:10:55 +00:00
if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_JATO &&
MII_MODEL(ma->mii_id2) == MII_MODEL_JATO_BASEX) {
device_set_desc(dev, MII_STR_JATO_BASEX);
return(0);
}
Add PHY drivers for the XMAC II's internal PHY and the Broadcom BCM5400 1000baseTX PHY. These will be used by the SysKonnect gigabit ethernet driver shortly.
2000-04-22 01:58:18 +00:00
Tweak the xmphy driver a little bit based on something I learned about the built-in 1000baseX interface in the Level 1 LXT1001 chip. The Level 1 PHY comes up with the isolate bit in the control register set by default, but it also has the autonegotiate bit set. When you tell the xmphy driver to select IFM_AUTO mode, it sees that the autoneg bit is already on, and thus doesn't bother updating the control register. However this means that the isolate bit is never turned off (unless you manually select 1000baseSX full or half duplex mode, which does result in the control register being modified and the ISO bit being turned off). This subtle and unusual behavioral difference stopped me from being able to receive packets on the SMC9462TX card for several days, since isolating the PHY disconnects it from the MAC's data interface. The fix is to omit the 'is the autoneg big set?' test, since it doesn't really provide much of an optimization anyway. This commit also updates the xmphy driver to support the Jato/Level 1 internal PHY. (I'm not sure how Jato Technologies is related to Level 1: all I know is the OUI from the PHY ID registers maps to Jato in the OUI database.) This will be used once I add the if_lge driver to support the LXT10010 chip.
2001-05-23 22:10:55 +00:00
return(ENXIO);
Add PHY drivers for the XMAC II's internal PHY and the Broadcom BCM5400 1000baseTX PHY. These will be used by the SysKonnect gigabit ethernet driver shortly.
2000-04-22 01:58:18 +00:00
}
static int xmphy_attach(dev)
device_t dev;
{
struct mii_softc *sc;
struct mii_attach_args *ma;
struct mii_data *mii;
const char *sep = "";
sc = device_get_softc(dev);
ma = device_get_ivars(dev);
sc->mii_dev = device_get_parent(dev);
mii = device_get_softc(sc->mii_dev);
LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list);
sc->mii_inst = mii->mii_instance;
sc->mii_phy = ma->mii_phyno;
sc->mii_service = xmphy_service;
sc->mii_pdata = mii;
sc->mii_flags |= MIIF_NOISOLATE;
mii->mii_instance++;
#define ADD(m, c) ifmedia_add(&mii->mii_media, (m), (c), NULL)
#define PRINT(s) printf("%s%s", sep, s); sep = ", "
ADD(IFM_MAKEWORD(IFM_ETHER, IFM_NONE, 0, sc->mii_inst),
BMCR_ISO);
#if 0
ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_LOOP, sc->mii_inst),
BMCR_LOOP|BMCR_S100);
#endif
mii_phy_reset(sc);
device_printf(dev, " ");
ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_SX, 0, sc->mii_inst),
XMPHY_BMCR_FDX);
PRINT("1000baseSX");
ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_SX, IFM_FDX, sc->mii_inst), 0);
PRINT("1000baseSX-FDX");
ADD(IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, sc->mii_inst), 0);
PRINT("auto");
printf("\n");
#undef ADD
#undef PRINT
MIIBUS_MEDIAINIT(sc->mii_dev);
return(0);
}
static int xmphy_detach(dev)
device_t dev;
{
struct mii_softc *sc;
struct mii_data *mii;
sc = device_get_softc(dev);
mii = device_get_softc(device_get_parent(dev));
Grrrrr. That last commit was supposed to be to the head, not to -stable (even though I want the fixes in -stable anyway). I'm sure I'm going to get flamed now for committing to -stable and -current too quickly. *sigh*
2000-12-12 19:31:14 +00:00
if (sc->mii_flags & MIIF_DOINGAUTO)
untimeout(mii_phy_auto_timeout, sc, sc->mii_auto_ch);
Add PHY drivers for the XMAC II's internal PHY and the Broadcom BCM5400 1000baseTX PHY. These will be used by the SysKonnect gigabit ethernet driver shortly.
2000-04-22 01:58:18 +00:00
sc->mii_dev = NULL;
LIST_REMOVE(sc, mii_list);
return(0);
}
int
xmphy_service(sc, mii, cmd)
struct mii_softc *sc;
struct mii_data *mii;
int cmd;
{
struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
int reg;
switch (cmd) {
case MII_POLLSTAT:
/*
* If we're not polling our PHY instance, just return.
*/
if (IFM_INST(ife->ifm_media) != sc->mii_inst)
return (0);
break;
case MII_MEDIACHG:
/*
* If the media indicates a different PHY instance,
* isolate ourselves.
*/
if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
reg = PHY_READ(sc, MII_BMCR);
PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
return (0);
}
/*
* If the interface is not up, don't do anything.
*/
if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
break;
switch (IFM_SUBTYPE(ife->ifm_media)) {
case IFM_AUTO:
Tweak the xmphy driver a little bit based on something I learned about the built-in 1000baseX interface in the Level 1 LXT1001 chip. The Level 1 PHY comes up with the isolate bit in the control register set by default, but it also has the autonegotiate bit set. When you tell the xmphy driver to select IFM_AUTO mode, it sees that the autoneg bit is already on, and thus doesn't bother updating the control register. However this means that the isolate bit is never turned off (unless you manually select 1000baseSX full or half duplex mode, which does result in the control register being modified and the ISO bit being turned off). This subtle and unusual behavioral difference stopped me from being able to receive packets on the SMC9462TX card for several days, since isolating the PHY disconnects it from the MAC's data interface. The fix is to omit the 'is the autoneg big set?' test, since it doesn't really provide much of an optimization anyway. This commit also updates the xmphy driver to support the Jato/Level 1 internal PHY. (I'm not sure how Jato Technologies is related to Level 1: all I know is the OUI from the PHY ID registers maps to Jato in the OUI database.) This will be used once I add the if_lge driver to support the LXT10010 chip.
2001-05-23 22:10:55 +00:00
#ifdef foo
Add PHY drivers for the XMAC II's internal PHY and the Broadcom BCM5400 1000baseTX PHY. These will be used by the SysKonnect gigabit ethernet driver shortly.
2000-04-22 01:58:18 +00:00
/*
* If we're already in auto mode, just return.
*/
if (PHY_READ(sc, XMPHY_MII_BMCR) & XMPHY_BMCR_AUTOEN)
return (0);
Tweak the xmphy driver a little bit based on something I learned about the built-in 1000baseX interface in the Level 1 LXT1001 chip. The Level 1 PHY comes up with the isolate bit in the control register set by default, but it also has the autonegotiate bit set. When you tell the xmphy driver to select IFM_AUTO mode, it sees that the autoneg bit is already on, and thus doesn't bother updating the control register. However this means that the isolate bit is never turned off (unless you manually select 1000baseSX full or half duplex mode, which does result in the control register being modified and the ISO bit being turned off). This subtle and unusual behavioral difference stopped me from being able to receive packets on the SMC9462TX card for several days, since isolating the PHY disconnects it from the MAC's data interface. The fix is to omit the 'is the autoneg big set?' test, since it doesn't really provide much of an optimization anyway. This commit also updates the xmphy driver to support the Jato/Level 1 internal PHY. (I'm not sure how Jato Technologies is related to Level 1: all I know is the OUI from the PHY ID registers maps to Jato in the OUI database.) This will be used once I add the if_lge driver to support the LXT10010 chip.
2001-05-23 22:10:55 +00:00
#endif
Add PHY drivers for the XMAC II's internal PHY and the Broadcom BCM5400 1000baseTX PHY. These will be used by the SysKonnect gigabit ethernet driver shortly.
2000-04-22 01:58:18 +00:00
(void) xmphy_mii_phy_auto(sc, 1);
break;
case IFM_1000_SX:
mii_phy_reset(sc);
if ((ife->ifm_media & IFM_GMASK) == IFM_FDX) {
PHY_WRITE(sc, XMPHY_MII_ANAR, XMPHY_ANAR_FDX);
PHY_WRITE(sc, XMPHY_MII_BMCR, XMPHY_BMCR_FDX);
} else {
PHY_WRITE(sc, XMPHY_MII_ANAR, XMPHY_ANAR_HDX);
PHY_WRITE(sc, XMPHY_MII_BMCR, 0);
}
break;
case IFM_100_T4:
case IFM_100_TX:
case IFM_10_T:
default:
return (EINVAL);
}
break;
case MII_TICK:
/*
* If we're not currently selected, just return.
*/
if (IFM_INST(ife->ifm_media) != sc->mii_inst)
return (0);
/*
* Only used for autonegotiation.
*/
if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
return (0);
/*
* Is the interface even up?
*/
if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
return (0);
/*
* Only retry autonegotiation every 5 seconds.
*/
if (++sc->mii_ticks != 5)
return (0);
sc->mii_ticks = 0;
/*
* Check to see if we have link. If we do, we don't
* need to restart the autonegotiation process. Read
* the BMSR twice in case it's latched.
*/
reg = PHY_READ(sc, XMPHY_MII_BMSR) |
PHY_READ(sc, XMPHY_MII_BMSR);
if (reg & XMPHY_BMSR_LINK)
break;
mii_phy_reset(sc);
if (xmphy_mii_phy_auto(sc, 0) == EJUSTRETURN)
return(0);
break;
}
/* Update the media status. */
xmphy_status(sc);
/* Callback if something changed. */
if (sc->mii_active != mii->mii_media_active || cmd == MII_MEDIACHG) {
MIIBUS_STATCHG(sc->mii_dev);
sc->mii_active = mii->mii_media_active;
}
return (0);
}
void
xmphy_status(sc)
struct mii_softc *sc;
{
struct mii_data *mii = sc->mii_pdata;
int bmsr, bmcr, anlpar;
mii->mii_media_status = IFM_AVALID;
mii->mii_media_active = IFM_ETHER;
bmsr = PHY_READ(sc, XMPHY_MII_BMSR) |
PHY_READ(sc, XMPHY_MII_BMSR);
if (bmsr & XMPHY_BMSR_LINK)
mii->mii_media_status |= IFM_ACTIVE;
/* Do dummy read of extended status register. */
bmcr = PHY_READ(sc, XMPHY_MII_EXTSTS);
bmcr = PHY_READ(sc, XMPHY_MII_BMCR);
if (bmcr & XMPHY_BMCR_LOOP)
mii->mii_media_active |= IFM_LOOP;
if (bmcr & XMPHY_BMCR_AUTOEN) {
if ((bmsr & XMPHY_BMSR_ACOMP) == 0) {
if (bmsr & XMPHY_BMSR_LINK) {
mii->mii_media_active |= IFM_1000_SX|IFM_HDX;
return;
}
/* Erg, still trying, I guess... */
mii->mii_media_active |= IFM_NONE;
return;
}
mii->mii_media_active |= IFM_1000_SX;
anlpar = PHY_READ(sc, XMPHY_MII_ANAR) &
PHY_READ(sc, XMPHY_MII_ANLPAR);
if (anlpar & XMPHY_ANLPAR_FDX)
mii->mii_media_active |= IFM_FDX;
else
mii->mii_media_active |= IFM_HDX;
return;
}
mii->mii_media_active |= IFM_1000_SX;
if (bmcr & XMPHY_BMCR_FDX)
mii->mii_media_active |= IFM_FDX;
else
mii->mii_media_active |= IFM_HDX;
return;
}
static int
xmphy_mii_phy_auto(mii, waitfor)
struct mii_softc *mii;
int waitfor;
{
Tweak the xmphy driver a little bit based on something I learned about the built-in 1000baseX interface in the Level 1 LXT1001 chip. The Level 1 PHY comes up with the isolate bit in the control register set by default, but it also has the autonegotiate bit set. When you tell the xmphy driver to select IFM_AUTO mode, it sees that the autoneg bit is already on, and thus doesn't bother updating the control register. However this means that the isolate bit is never turned off (unless you manually select 1000baseSX full or half duplex mode, which does result in the control register being modified and the ISO bit being turned off). This subtle and unusual behavioral difference stopped me from being able to receive packets on the SMC9462TX card for several days, since isolating the PHY disconnects it from the MAC's data interface. The fix is to omit the 'is the autoneg big set?' test, since it doesn't really provide much of an optimization anyway. This commit also updates the xmphy driver to support the Jato/Level 1 internal PHY. (I'm not sure how Jato Technologies is related to Level 1: all I know is the OUI from the PHY ID registers maps to Jato in the OUI database.) This will be used once I add the if_lge driver to support the LXT10010 chip.
2001-05-23 22:10:55 +00:00
int bmsr, anar = 0, i;
Add PHY drivers for the XMAC II's internal PHY and the Broadcom BCM5400 1000baseTX PHY. These will be used by the SysKonnect gigabit ethernet driver shortly.
2000-04-22 01:58:18 +00:00
if ((mii->mii_flags & MIIF_DOINGAUTO) == 0) {
Tweak the xmphy driver a little bit based on something I learned about the built-in 1000baseX interface in the Level 1 LXT1001 chip. The Level 1 PHY comes up with the isolate bit in the control register set by default, but it also has the autonegotiate bit set. When you tell the xmphy driver to select IFM_AUTO mode, it sees that the autoneg bit is already on, and thus doesn't bother updating the control register. However this means that the isolate bit is never turned off (unless you manually select 1000baseSX full or half duplex mode, which does result in the control register being modified and the ISO bit being turned off). This subtle and unusual behavioral difference stopped me from being able to receive packets on the SMC9462TX card for several days, since isolating the PHY disconnects it from the MAC's data interface. The fix is to omit the 'is the autoneg big set?' test, since it doesn't really provide much of an optimization anyway. This commit also updates the xmphy driver to support the Jato/Level 1 internal PHY. (I'm not sure how Jato Technologies is related to Level 1: all I know is the OUI from the PHY ID registers maps to Jato in the OUI database.) This will be used once I add the if_lge driver to support the LXT10010 chip.
2001-05-23 22:10:55 +00:00
anar = PHY_READ(mii, XMPHY_MII_ANAR);
anar |= XMPHY_ANAR_FDX|XMPHY_ANAR_HDX;
PHY_WRITE(mii, XMPHY_MII_ANAR, anar);
DELAY(1000);
Add PHY drivers for the XMAC II's internal PHY and the Broadcom BCM5400 1000baseTX PHY. These will be used by the SysKonnect gigabit ethernet driver shortly.
2000-04-22 01:58:18 +00:00
PHY_WRITE(mii, XMPHY_MII_BMCR,
XMPHY_BMCR_AUTOEN | XMPHY_BMCR_STARTNEG);
}
if (waitfor) {
/* Wait 500ms for it to complete. */
for (i = 0; i < 500; i++) {
if ((bmsr = PHY_READ(mii, XMPHY_MII_BMSR)) &
XMPHY_BMSR_ACOMP)
return (0);
DELAY(1000);
#if 0
if ((bmsr & BMSR_ACOMP) == 0)
printf("%s: autonegotiation failed to complete\n",
mii->mii_dev.dv_xname);
#endif
}
/*
* Don't need to worry about clearing MIIF_DOINGAUTO.
* If that's set, a timeout is pending, and it will
* clear the flag.
*/
return (EIO);
}
/*
* Just let it finish asynchronously. This is for the benefit of
* the tick handler driving autonegotiation. Don't want 500ms
* delays all the time while the system is running!
*/
if ((mii->mii_flags & MIIF_DOINGAUTO) == 0) {
mii->mii_flags |= MIIF_DOINGAUTO;
Grrrrr. That last commit was supposed to be to the head, not to -stable (even though I want the fixes in -stable anyway). I'm sure I'm going to get flamed now for committing to -stable and -current too quickly. *sigh*
2000-12-12 19:31:14 +00:00
mii->mii_auto_ch = timeout(mii_phy_auto_timeout, mii, hz >> 1);
Add PHY drivers for the XMAC II's internal PHY and the Broadcom BCM5400 1000baseTX PHY. These will be used by the SysKonnect gigabit ethernet driver shortly.
2000-04-22 01:58:18 +00:00
}
return (EJUSTRETURN);
}
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