Add terasic_mtl(4), a device driver for the Terasic Multi-Touch LCD,
used with Terasic's DE-4 and other similar FPGA boards. This display
is 800x480 and includes a capacitive touch screen, multi-touch
gesture recognition, etc. This device driver depends on a Cambridge-
provided IP core that allows the MTL device to be hooked up to the
Altera Avalon SoC bus, and also provides a VGA-like text frame buffer.
Although it is compiled as a single device driver, it actually
implements a number of different device nodes exporting various
aspects of this multi-function device to userspace:
- Simple memory-mapped driver for the MTL 24-bit pixel frame buffer.
- Simple memory-mapped driver for the MTL control register set.
- Simple memory-mapped driver for the MTL text frame buffer.
- syscons attachment for the MTL text frame buffer.
This driver attaches directly to Nexus as is common for SoC device
drivers, and for the time being is considered BERI-specific, although
in principle it might be used with other hard and soft cores on
Altera FPGAs.
Control registers, including touchscreen input, are simply memory
mapped; in the future it would be desirable to hook up a more
conventional device node that can stream events, support kqueue(2)/
poll(2)/select(2), etc.
This is the first use of syscons on MIPS, as far as I can tell, and
there are some loose ends, such as an inability to use the hardware
cursor. More fundamentally, it appears that syscons(4) assumes that
either a host is PC-like (i386, amd64) *or* it must be using a
graphical frame buffer. While the MTL supports a graphical frame
buffer, using the text frame buffer is preferable for console use.
Fixing this issue in syscons(4) requires non-trivial changes, as the
text frame buffer support assumes that direct memory access can be
done to the text frame buffer without using bus accessor methods,
which is not the case on MIPS. As a workaround for this, we instead
double-buffer and pretend to be a graphical frame buffer exposing
text accessor methods, leading to some quirks in syscons behaviour.
Sponsored by: DARPA, AFRL
2012-08-25 22:35:29 +00:00
|
|
|
/*-
|
|
|
|
|
* Copyright (c) 2012 Robert N. M. Watson
|
|
|
|
|
* All rights reserved.
|
|
|
|
|
*
|
|
|
|
|
* This software was developed by SRI International and the University of
|
|
|
|
|
* Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237)
|
|
|
|
|
* ("CTSRD"), as part of the DARPA CRASH research programme.
|
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|
|
|
*
|
|
|
|
|
* Redistribution and use in source and binary forms, with or without
|
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|
|
|
* modification, are permitted provided that the following conditions
|
|
|
|
|
* are met:
|
|
|
|
|
* 1. Redistributions of source code must retain the above copyright
|
|
|
|
|
* notice, this list of conditions and the following disclaimer.
|
|
|
|
|
* 2. Redistributions in binary form must reproduce the above copyright
|
|
|
|
|
* notice, this list of conditions and the following disclaimer in the
|
|
|
|
|
* documentation and/or other materials provided with the distribution.
|
|
|
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*
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|
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
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|
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
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|
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
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|
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
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|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
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|
* SUCH DAMAGE.
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|
*/
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|
#include <sys/cdefs.h>
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|
__FBSDID("$FreeBSD$");
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|
#include <sys/param.h>
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#include <sys/bus.h>
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|
#include <sys/conf.h>
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|
#include <sys/consio.h> /* struct vt_mode */
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#include <sys/endian.h>
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|
#include <sys/fbio.h> /* video_adapter_t */
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|
#include <sys/lock.h>
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|
#include <sys/mutex.h>
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|
#include <sys/rman.h>
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|
#include <sys/systm.h>
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|
#include <sys/uio.h>
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#include <machine/bus.h>
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#include <machine/resource.h>
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#include <machine/vm.h>
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#include <dev/terasic/mtl/terasic_mtl.h>
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static d_mmap_t terasic_mtl_reg_mmap;
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static d_read_t terasic_mtl_reg_read;
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static d_write_t terasic_mtl_reg_write;
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|
static struct cdevsw terasic_mtl_reg_cdevsw = {
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.d_version = D_VERSION,
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.d_mmap = terasic_mtl_reg_mmap,
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|
.d_read = terasic_mtl_reg_read,
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.d_write = terasic_mtl_reg_write,
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|
.d_name = "terasic_mtl_reg",
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|
|
};
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/*
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* All I/O to/from the MTL register device must be 32-bit, and aligned to
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* 32-bit.
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|
*/
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static int
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|
terasic_mtl_reg_read(struct cdev *dev, struct uio *uio, int flag)
|
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|
|
|
{
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|
struct terasic_mtl_softc *sc;
|
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|
|
|
u_long offset, size;
|
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|
|
uint32_t v;
|
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|
|
int error;
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if (uio->uio_offset < 0 || uio->uio_offset % 4 != 0 ||
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|
uio->uio_resid % 4 != 0)
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|
return (ENODEV);
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|
sc = dev->si_drv1;
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|
size = rman_get_size(sc->mtl_reg_res);
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|
error = 0;
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|
if ((uio->uio_offset + uio->uio_resid < 0) ||
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|
|
(uio->uio_offset + uio->uio_resid > size))
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|
return (ENODEV);
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|
while (uio->uio_resid > 0) {
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|
offset = uio->uio_offset;
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|
|
if (offset + sizeof(v) > size)
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|
return (ENODEV);
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|
v = bus_read_4(sc->mtl_reg_res, offset);
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|
error = uiomove(&v, sizeof(v), uio);
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|
if (error)
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|
return (error);
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|
}
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|
return (error);
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|
}
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|
static int
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|
terasic_mtl_reg_write(struct cdev *dev, struct uio *uio, int flag)
|
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|
|
|
{
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|
|
struct terasic_mtl_softc *sc;
|
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|
|
|
u_long offset, size;
|
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|
|
uint32_t v;
|
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|
|
int error;
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|
if (uio->uio_offset < 0 || uio->uio_offset % 4 != 0 ||
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|
|
uio->uio_resid % 4 != 0)
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|
return (ENODEV);
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|
sc = dev->si_drv1;
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|
size = rman_get_size(sc->mtl_reg_res);
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error = 0;
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|
while (uio->uio_resid > 0) {
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|
offset = uio->uio_offset;
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|
|
if (offset + sizeof(v) > size)
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return (ENODEV);
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error = uiomove(&v, sizeof(v), uio);
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if (error)
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|
return (error);
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bus_write_4(sc->mtl_reg_res, offset, v);
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|
}
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|
return (error);
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|
|
}
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|
static int
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|
|
terasic_mtl_reg_mmap(struct cdev *dev, vm_ooffset_t offset, vm_paddr_t *paddr,
|
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|
|
int nprot, vm_memattr_t *memattr)
|
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|
|
|
{
|
|
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|
|
struct terasic_mtl_softc *sc;
|
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|
int error;
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|
sc = dev->si_drv1;
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|
error = 0;
|
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if (trunc_page(offset) == offset &&
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|
rman_get_size(sc->mtl_reg_res) >= offset + PAGE_SIZE) {
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|
*paddr = rman_get_start(sc->mtl_reg_res) + offset;
|
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|
|
*memattr = VM_MEMATTR_UNCACHEABLE;
|
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|
|
} else
|
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|
|
error = ENODEV;
|
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|
|
|
return (error);
|
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|
|
|
}
|
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|
void
|
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|
|
terasic_mtl_reg_blend_get(struct terasic_mtl_softc *sc, uint32_t *blendp)
|
|
|
|
|
{
|
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|
|
|
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|
*blendp = le32toh(bus_read_4(sc->mtl_reg_res, TERASIC_MTL_OFF_BLEND));
|
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|
|
|
}
|
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|
|
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|
|
void
|
|
|
|
|
terasic_mtl_reg_blend_set(struct terasic_mtl_softc *sc, uint32_t blend)
|
|
|
|
|
{
|
|
|
|
|
|
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|
|
bus_write_4(sc->mtl_reg_res, TERASIC_MTL_OFF_BLEND, htole32(blend));
|
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|
|
|
}
|
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|
|
|
|
|
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|
|
void
|
|
|
|
|
terasic_mtl_blend_default_set(struct terasic_mtl_softc *sc, uint8_t colour)
|
|
|
|
|
{
|
|
|
|
|
uint32_t v;
|
|
|
|
|
|
|
|
|
|
TERASIC_MTL_LOCK(sc);
|
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|
|
|
terasic_mtl_reg_blend_get(sc, &v);
|
|
|
|
|
v &= ~TERASIC_MTL_BLEND_DEFAULT_MASK;
|
|
|
|
|
v |= colour << TERASIC_MTL_BLEND_DEFAULT_SHIFT;
|
|
|
|
|
terasic_mtl_reg_blend_set(sc, v);
|
|
|
|
|
TERASIC_MTL_UNLOCK(sc);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
terasic_mtl_blend_pixel_set(struct terasic_mtl_softc *sc, uint8_t alpha)
|
|
|
|
|
{
|
|
|
|
|
uint32_t v;
|
|
|
|
|
|
|
|
|
|
TERASIC_MTL_LOCK(sc);
|
|
|
|
|
terasic_mtl_reg_blend_get(sc, &v);
|
|
|
|
|
v &= ~TERASIC_MTL_BLEND_PIXEL_MASK;
|
|
|
|
|
v |= alpha << TERASIC_MTL_BLEND_PIXEL_SHIFT;
|
|
|
|
|
terasic_mtl_reg_blend_set(sc, v);
|
|
|
|
|
TERASIC_MTL_UNLOCK(sc);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
terasic_mtl_blend_textfg_set(struct terasic_mtl_softc *sc, uint8_t alpha)
|
|
|
|
|
{
|
|
|
|
|
uint32_t v;
|
|
|
|
|
|
|
|
|
|
TERASIC_MTL_LOCK(sc);
|
|
|
|
|
terasic_mtl_reg_blend_get(sc, &v);
|
|
|
|
|
v &= ~TERASIC_MTL_BLEND_TEXTFG_MASK;
|
|
|
|
|
v |= alpha << TERASIC_MTL_BLEND_TEXTFG_SHIFT;
|
|
|
|
|
terasic_mtl_reg_blend_set(sc, v);
|
|
|
|
|
TERASIC_MTL_UNLOCK(sc);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
terasic_mtl_blend_textbg_set(struct terasic_mtl_softc *sc, uint8_t alpha)
|
|
|
|
|
{
|
|
|
|
|
uint32_t v;
|
|
|
|
|
|
|
|
|
|
TERASIC_MTL_LOCK(sc);
|
|
|
|
|
terasic_mtl_reg_blend_get(sc, &v);
|
|
|
|
|
v &= ~TERASIC_MTL_BLEND_TEXTBG_MASK;
|
|
|
|
|
v |= alpha << TERASIC_MTL_BLEND_TEXTBG_SHIFT;
|
|
|
|
|
terasic_mtl_reg_blend_set(sc, v);
|
|
|
|
|
TERASIC_MTL_UNLOCK(sc);
|
|
|
|
|
}
|
|
|
|
|
|
2014-11-21 21:34:19 +00:00
|
|
|
void
|
|
|
|
|
terasic_mtl_reg_pixel_endian_set(struct terasic_mtl_softc *sc, int endian_swap)
|
|
|
|
|
{
|
|
|
|
|
uint32_t v;
|
|
|
|
|
|
|
|
|
|
TERASIC_MTL_LOCK(sc);
|
|
|
|
|
terasic_mtl_reg_blend_get(sc, &v);
|
|
|
|
|
if (endian_swap)
|
|
|
|
|
v |= TERASIC_MTL_BLEND_PIXEL_ENDIAN_SWAP;
|
|
|
|
|
else
|
|
|
|
|
v &= ~TERASIC_MTL_BLEND_PIXEL_ENDIAN_SWAP;
|
|
|
|
|
terasic_mtl_reg_blend_set(sc, v);
|
|
|
|
|
TERASIC_MTL_UNLOCK(sc);
|
|
|
|
|
}
|
|
|
|
|
|
Add terasic_mtl(4), a device driver for the Terasic Multi-Touch LCD,
used with Terasic's DE-4 and other similar FPGA boards. This display
is 800x480 and includes a capacitive touch screen, multi-touch
gesture recognition, etc. This device driver depends on a Cambridge-
provided IP core that allows the MTL device to be hooked up to the
Altera Avalon SoC bus, and also provides a VGA-like text frame buffer.
Although it is compiled as a single device driver, it actually
implements a number of different device nodes exporting various
aspects of this multi-function device to userspace:
- Simple memory-mapped driver for the MTL 24-bit pixel frame buffer.
- Simple memory-mapped driver for the MTL control register set.
- Simple memory-mapped driver for the MTL text frame buffer.
- syscons attachment for the MTL text frame buffer.
This driver attaches directly to Nexus as is common for SoC device
drivers, and for the time being is considered BERI-specific, although
in principle it might be used with other hard and soft cores on
Altera FPGAs.
Control registers, including touchscreen input, are simply memory
mapped; in the future it would be desirable to hook up a more
conventional device node that can stream events, support kqueue(2)/
poll(2)/select(2), etc.
This is the first use of syscons on MIPS, as far as I can tell, and
there are some loose ends, such as an inability to use the hardware
cursor. More fundamentally, it appears that syscons(4) assumes that
either a host is PC-like (i386, amd64) *or* it must be using a
graphical frame buffer. While the MTL supports a graphical frame
buffer, using the text frame buffer is preferable for console use.
Fixing this issue in syscons(4) requires non-trivial changes, as the
text frame buffer support assumes that direct memory access can be
done to the text frame buffer without using bus accessor methods,
which is not the case on MIPS. As a workaround for this, we instead
double-buffer and pretend to be a graphical frame buffer exposing
text accessor methods, leading to some quirks in syscons behaviour.
Sponsored by: DARPA, AFRL
2012-08-25 22:35:29 +00:00
|
|
|
void
|
|
|
|
|
terasic_mtl_reg_textcursor_get(struct terasic_mtl_softc *sc, uint8_t *colp,
|
|
|
|
|
uint8_t *rowp)
|
|
|
|
|
{
|
|
|
|
|
uint32_t v;
|
|
|
|
|
|
|
|
|
|
v = bus_read_4(sc->mtl_reg_res, TERASIC_MTL_OFF_TEXTCURSOR);
|
|
|
|
|
v = le32toh(v);
|
|
|
|
|
*colp = (v & TERASIC_MTL_TEXTCURSOR_COL_MASK) >>
|
|
|
|
|
TERASIC_MTL_TEXTCURSOR_COL_SHIFT;
|
|
|
|
|
*rowp = (v & TERASIC_MTL_TEXTCURSOR_ROW_MASK);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
terasic_mtl_reg_textcursor_set(struct terasic_mtl_softc *sc, uint8_t col,
|
|
|
|
|
uint8_t row)
|
|
|
|
|
{
|
|
|
|
|
uint32_t v;
|
|
|
|
|
|
|
|
|
|
v = (col << TERASIC_MTL_TEXTCURSOR_COL_SHIFT) | row;
|
|
|
|
|
v = htole32(v);
|
|
|
|
|
bus_write_4(sc->mtl_reg_res, TERASIC_MTL_OFF_TEXTCURSOR, v);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
terasic_mtl_reg_blank(struct terasic_mtl_softc *sc)
|
|
|
|
|
{
|
|
|
|
|
|
2014-11-21 21:34:19 +00:00
|
|
|
device_printf(sc->mtl_dev, "%s: not yet\n", __func__);
|
Add terasic_mtl(4), a device driver for the Terasic Multi-Touch LCD,
used with Terasic's DE-4 and other similar FPGA boards. This display
is 800x480 and includes a capacitive touch screen, multi-touch
gesture recognition, etc. This device driver depends on a Cambridge-
provided IP core that allows the MTL device to be hooked up to the
Altera Avalon SoC bus, and also provides a VGA-like text frame buffer.
Although it is compiled as a single device driver, it actually
implements a number of different device nodes exporting various
aspects of this multi-function device to userspace:
- Simple memory-mapped driver for the MTL 24-bit pixel frame buffer.
- Simple memory-mapped driver for the MTL control register set.
- Simple memory-mapped driver for the MTL text frame buffer.
- syscons attachment for the MTL text frame buffer.
This driver attaches directly to Nexus as is common for SoC device
drivers, and for the time being is considered BERI-specific, although
in principle it might be used with other hard and soft cores on
Altera FPGAs.
Control registers, including touchscreen input, are simply memory
mapped; in the future it would be desirable to hook up a more
conventional device node that can stream events, support kqueue(2)/
poll(2)/select(2), etc.
This is the first use of syscons on MIPS, as far as I can tell, and
there are some loose ends, such as an inability to use the hardware
cursor. More fundamentally, it appears that syscons(4) assumes that
either a host is PC-like (i386, amd64) *or* it must be using a
graphical frame buffer. While the MTL supports a graphical frame
buffer, using the text frame buffer is preferable for console use.
Fixing this issue in syscons(4) requires non-trivial changes, as the
text frame buffer support assumes that direct memory access can be
done to the text frame buffer without using bus accessor methods,
which is not the case on MIPS. As a workaround for this, we instead
double-buffer and pretend to be a graphical frame buffer exposing
text accessor methods, leading to some quirks in syscons behaviour.
Sponsored by: DARPA, AFRL
2012-08-25 22:35:29 +00:00
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}
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void
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terasic_mtl_reg_textframebufaddr_get(struct terasic_mtl_softc *sc,
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uint32_t *addrp)
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{
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uint32_t addr;
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addr = bus_read_4(sc->mtl_reg_res, TERASIC_MTL_OFF_TEXTFRAMEBUFADDR);
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*addrp = le32toh(addr);
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}
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void
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terasic_mtl_reg_textframebufaddr_set(struct terasic_mtl_softc *sc,
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uint32_t addr)
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{
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addr = htole32(addr);
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bus_write_4(sc->mtl_reg_res, TERASIC_MTL_OFF_TEXTFRAMEBUFADDR, addr);
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}
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int
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terasic_mtl_reg_attach(struct terasic_mtl_softc *sc)
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{
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sc->mtl_reg_cdev = make_dev(&terasic_mtl_reg_cdevsw, sc->mtl_unit,
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UID_ROOT, GID_WHEEL, 0400, "mtl_reg%d", sc->mtl_unit);
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if (sc->mtl_reg_cdev == NULL) {
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device_printf(sc->mtl_dev, "%s: make_dev failed\n", __func__);
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return (ENXIO);
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}
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/* XXXRW: Slight race between make_dev(9) and here. */
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sc->mtl_reg_cdev->si_drv1 = sc;
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return (0);
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}
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void
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terasic_mtl_reg_detach(struct terasic_mtl_softc *sc)
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{
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if (sc->mtl_reg_cdev != NULL)
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destroy_dev(sc->mtl_reg_cdev);
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}
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