1994-08-24 22:32:44 +00:00
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/*
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1999-08-28 01:08:13 +00:00
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* $FreeBSD$
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1994-08-24 22:32:44 +00:00
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* Definitions for 3C507
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*/
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#define IE507_CTRL 6 /* control port */
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#define IE507_ICTRL 10 /* interrupt control */
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#define IE507_ATTN 11 /* any write here sends a chan attn */
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2003-03-28 06:27:08 +00:00
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#define IE507_ROM 13 /* rom configuration? */
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1994-08-24 22:32:44 +00:00
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#define IE507_MADDR 14 /* shared memory configuration */
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#define IE507_IRQ 15 /* IRQ configuration */
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2003-03-28 06:27:08 +00:00
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/* Bank 0 -- "*3COM*" signature */
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#define EL_SIG 0 /* offset of ASCII signature -- "*3COM*" */
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/* Bank 1 -- ethernet address */
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#define EL_ADDR 0 /* offset of card's ethernet address */
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/* Bank 2 -- card part #, revision, date of manufacture */
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#define EL_TYPE 0 /* offset of card part # */
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#define EL_TYPE_HI 0 /* offset of card part # -- high byte */
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#define EL_TYPE_MID 1 /* offset of card part # -- middle byte */
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#define EL_TYPE_LOW 2 /* offset of card part # -- low byte */
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#define EL_REV 3 /* offset of card revision, in BCD */
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#define EL_DOM_DAY 4 /* offset of date of manf: day in BCD */
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#define EL_DOM_MY 4 /* offset of date of manf: month, year in BCD */
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/*
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* Definitions for non-bankswitched registers
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*/
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/* General control register */
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#define EL_CTRL_BNK0 0x00 /* register bank 0 */
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1994-08-24 22:32:44 +00:00
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#define EL_CTRL_BNK1 0x01 /* register bank 1 */
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2003-03-28 06:27:08 +00:00
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#define EL_CTRL_BNK2 0x02 /* register bank 2 */
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1994-08-24 22:32:44 +00:00
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#define EL_CTRL_IEN 0x04 /* interrupt enable */
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#define EL_CTRL_INTL 0x08 /* interrupt active latch */
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#define EL_CTRL_16BIT 0x10 /* bus width; clear = 8-bit, set = 16-bit */
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#define EL_CTRL_LOOP 0x20 /* loopback mode */
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#define EL_CTRL_NRST 0x80 /* turn off to reset */
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#define EL_CTRL_RESET (EL_CTRL_LOOP)
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#define EL_CTRL_NORMAL (EL_CTRL_NRST | EL_CTRL_IEN | EL_CTRL_BNK1)
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2003-03-28 06:27:08 +00:00
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/* ROM & media control register */
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#define EL_MEDIA_MASK 0x80 /* m1 = (EL_MEDIA register) & EL_MEDIA_MASK */
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#define EL_MEDIA_SHIFT 7 /* media index = m1 >> EL_MEDIA_SHIFT */
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/* shared memory control register */
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#define EL_MADDR_HIGH 0x20 /* memory mapping above 15Meg */
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#define EL_MADDR_MASK 0x1c /* m1 = (EL_MADDR register) & EL_MADDR_MASK */
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#define EL_MADDR_SHIFT 12 /* m2 = m1 << EL_MADDR_SHIFT */
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#define EL_MADDR_BASE 0xc0000 /* maddr = m2 + EL_MADDR_BASE */
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#define EL_MSIZE_MASK 0x03 /* m1 = (EL_MADDR register) & EL_MSIZE_MASK */
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#define EL_MSIZE_STEP 16384 /* msize = (m1 + 1) * EL_MSIZE_STEP */
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/* interrupt control register */
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#define EL_IRQ_MASK 0x0f /* irq = (EL_IRQ register) & EL_IRQ_MASK */
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/*
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* Definitions for Bank 0 registers
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*/
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#define EL_SIG_LEN 6 /* signature length */
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#define EL_SIGNATURE "*3COM*"
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/*
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* Definitions for Bank 1 registers
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*/
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#define EL_ADDR_LEN 6 /* ether address length */
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/*
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* Definitions for Bank 2 registers
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*/
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#define EL_TYPE_LEN 3 /* card part # length */
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/*
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* General card-specific macros and definitions
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*/
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#define EL_IOBASE_LOW 0x200
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#define EL_IOBASE_HIGH 0x3e0
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#define EL_IOSIZE 16
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/*
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* XXX: It seems that the 3C507-TP is differentiated from AUI/BNC 3C507
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* by part numbers, but I'm not sure how accurate this test is, seeing
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* as it's based on the sample of 3 cards I own (2AUI/BNC, 1 TP).
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*/
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#define EL_IS_TP(type) ((type)[EL_TYPE_MID] > 0x70)
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#define EL_CARD_BNC 0 /* regular AUI/BNC 3C507 */
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#define EL_CARD_TP 1 /* 3C507-TP -- no AUI/BNC */
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