136 lines
4.9 KiB
C
136 lines
4.9 KiB
C
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/*
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* SPDX-License-Identifier: BSD-3-Clause
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*
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* Copyright IBM Corp. 2007
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*
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* Authors:
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* Anthony Liguori <aliguori@us.ibm.com>
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*
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* This header is BSD licensed so anyone can use the definitions to implement
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* compatible drivers/servers.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of IBM nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL IBM OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _VIRTIO_PCI_MODERN_VAR_H
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#define _VIRTIO_PCI_MODERN_VAR_H
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#include <dev/virtio/pci/virtio_pci_var.h>
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/* IDs for different capabilities. Must all exist. */
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/* Common configuration */
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#define VIRTIO_PCI_CAP_COMMON_CFG 1
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/* Notifications */
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#define VIRTIO_PCI_CAP_NOTIFY_CFG 2
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/* ISR access */
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#define VIRTIO_PCI_CAP_ISR_CFG 3
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/* Device specific configuration */
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#define VIRTIO_PCI_CAP_DEVICE_CFG 4
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/* PCI configuration access */
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#define VIRTIO_PCI_CAP_PCI_CFG 5
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/* This is the PCI capability header: */
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struct virtio_pci_cap {
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uint8_t cap_vndr; /* Generic PCI field: PCI_CAP_ID_VNDR */
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uint8_t cap_next; /* Generic PCI field: next ptr. */
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uint8_t cap_len; /* Generic PCI field: capability length */
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uint8_t cfg_type; /* Identifies the structure. */
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uint8_t bar; /* Where to find it. */
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uint8_t padding[3]; /* Pad to full dword. */
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uint32_t offset; /* Offset within bar. */
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uint32_t length; /* Length of the structure, in bytes. */
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};
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struct virtio_pci_notify_cap {
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struct virtio_pci_cap cap;
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uint32_t notify_off_multiplier; /* Multiplier for queue_notify_off. */
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};
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/* Fields in VIRTIO_PCI_CAP_COMMON_CFG: */
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struct virtio_pci_common_cfg {
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/* About the whole device. */
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uint32_t device_feature_select; /* read-write */
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uint32_t device_feature; /* read-only */
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uint32_t guest_feature_select; /* read-write */
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uint32_t guest_feature; /* read-write */
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uint16_t msix_config; /* read-write */
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uint16_t num_queues; /* read-only */
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uint8_t device_status; /* read-write */
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uint8_t config_generation; /* read-only */
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/* About a specific virtqueue. */
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uint16_t queue_select; /* read-write */
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uint16_t queue_size; /* read-write, power of 2. */
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uint16_t queue_msix_vector; /* read-write */
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uint16_t queue_enable; /* read-write */
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uint16_t queue_notify_off; /* read-only */
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uint32_t queue_desc_lo; /* read-write */
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uint32_t queue_desc_hi; /* read-write */
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uint32_t queue_avail_lo; /* read-write */
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uint32_t queue_avail_hi; /* read-write */
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uint32_t queue_used_lo; /* read-write */
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uint32_t queue_used_hi; /* read-write */
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};
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/* Fields in VIRTIO_PCI_CAP_PCI_CFG: */
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struct virtio_pci_cfg_cap {
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struct virtio_pci_cap cap;
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uint8_t pci_cfg_data[4]; /* Data for BAR access. */
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};
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/* Macro versions of offsets for the Old Timers! */
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#define VIRTIO_PCI_CAP_VNDR 0
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#define VIRTIO_PCI_CAP_NEXT 1
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#define VIRTIO_PCI_CAP_LEN 2
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#define VIRTIO_PCI_CAP_CFG_TYPE 3
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#define VIRTIO_PCI_CAP_BAR 4
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#define VIRTIO_PCI_CAP_OFFSET 8
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#define VIRTIO_PCI_CAP_LENGTH 12
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#define VIRTIO_PCI_NOTIFY_CAP_MULT 16
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#define VIRTIO_PCI_COMMON_DFSELECT 0
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#define VIRTIO_PCI_COMMON_DF 4
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#define VIRTIO_PCI_COMMON_GFSELECT 8
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#define VIRTIO_PCI_COMMON_GF 12
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#define VIRTIO_PCI_COMMON_MSIX 16
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#define VIRTIO_PCI_COMMON_NUMQ 18
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#define VIRTIO_PCI_COMMON_STATUS 20
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#define VIRTIO_PCI_COMMON_CFGGENERATION 21
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#define VIRTIO_PCI_COMMON_Q_SELECT 22
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#define VIRTIO_PCI_COMMON_Q_SIZE 24
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#define VIRTIO_PCI_COMMON_Q_MSIX 26
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#define VIRTIO_PCI_COMMON_Q_ENABLE 28
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#define VIRTIO_PCI_COMMON_Q_NOFF 30
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#define VIRTIO_PCI_COMMON_Q_DESCLO 32
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#define VIRTIO_PCI_COMMON_Q_DESCHI 36
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#define VIRTIO_PCI_COMMON_Q_AVAILLO 40
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#define VIRTIO_PCI_COMMON_Q_AVAILHI 44
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#define VIRTIO_PCI_COMMON_Q_USEDLO 48
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#define VIRTIO_PCI_COMMON_Q_USEDHI 52
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#endif /* _VIRTIO_PCI_MODERN_VAR_H */
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