2013-10-23 00:39:43 +00:00
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/*-
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2014-03-25 08:31:47 +00:00
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* Copyright (c) 2013 Ganbold Tsagaankhuu <ganbold@freebsd.org>
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2013-10-23 00:39:43 +00:00
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* Copyright (c) 2012 Oleksandr Tymoshenko <gonzo@freebsd.org>
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* Copyright (c) 2012 Luiz Otavio O Souza.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/rman.h>
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#include <sys/lock.h>
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#include <sys/mutex.h>
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#include <sys/gpio.h>
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#include <machine/bus.h>
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#include <machine/resource.h>
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#include <machine/intr.h>
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#include <dev/fdt/fdt_common.h>
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2015-01-31 19:32:14 +00:00
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#include <dev/gpio/gpiobusvar.h>
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2013-10-23 00:39:43 +00:00
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include "gpio_if.h"
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#include "rk30xx_grf.h"
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#include "rk30xx_pmu.h"
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/*
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* RK3188 has 4 banks of gpio.
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* 32 pins per bank
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* PA0 - PA7 | PB0 - PB7
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* PC0 - PC7 | PD0 - PD7
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*/
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2015-01-07 16:55:55 +00:00
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#define RK30_GPIO_PINS 32
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2013-10-23 00:39:43 +00:00
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#define RK30_GPIO_DEFAULT_CAPS (GPIO_PIN_INPUT | GPIO_PIN_OUTPUT | \
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GPIO_PIN_PULLUP | GPIO_PIN_PULLDOWN)
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#define RK30_GPIO_NONE 0
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#define RK30_GPIO_PULLUP 1
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#define RK30_GPIO_PULLDOWN 2
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struct rk30_gpio_softc {
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device_t sc_dev;
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2015-01-31 19:32:14 +00:00
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device_t sc_busdev;
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2013-10-23 00:39:43 +00:00
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struct mtx sc_mtx;
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struct resource * sc_mem_res;
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struct resource * sc_irq_res;
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bus_space_tag_t sc_bst;
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bus_space_handle_t sc_bsh;
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void * sc_intrhand;
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2015-01-07 19:15:11 +00:00
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int sc_bank;
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2013-10-23 00:39:43 +00:00
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int sc_gpio_npins;
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struct gpio_pin sc_gpio_pins[RK30_GPIO_PINS];
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};
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2015-01-07 19:15:11 +00:00
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/* We use our base address to find out our bank number. */
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static unsigned long rk30_gpio_base_addr[4] =
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{ 0x2000a000, 0x2003c000, 0x2003e000, 0x20080000 };
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2013-12-09 07:14:59 +00:00
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static struct rk30_gpio_softc *rk30_gpio_sc = NULL;
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typedef int (*gpios_phandler_t)(phandle_t, pcell_t *, int);
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struct gpio_ctrl_entry {
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const char *compat;
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gpios_phandler_t handler;
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};
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int rk30_gpios_prop_handle(phandle_t ctrl, pcell_t *gpios, int len);
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2014-05-10 20:26:49 +00:00
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static int rk30_gpio_init(void);
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2013-12-09 07:14:59 +00:00
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struct gpio_ctrl_entry gpio_controllers[] = {
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{ "rockchip,rk30xx-gpio", &rk30_gpios_prop_handle },
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{ "rockchip,rk30xx-gpio", &rk30_gpios_prop_handle },
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{ "rockchip,rk30xx-gpio", &rk30_gpios_prop_handle },
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{ "rockchip,rk30xx-gpio", &rk30_gpios_prop_handle },
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{ NULL, NULL }
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};
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2013-10-23 00:39:43 +00:00
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#define RK30_GPIO_LOCK(_sc) mtx_lock(&_sc->sc_mtx)
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#define RK30_GPIO_UNLOCK(_sc) mtx_unlock(&_sc->sc_mtx)
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#define RK30_GPIO_LOCK_ASSERT(_sc) mtx_assert(&_sc->sc_mtx, MA_OWNED)
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#define RK30_GPIO_SWPORT_DR 0x00
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#define RK30_GPIO_SWPORT_DDR 0x04
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#define RK30_GPIO_INTEN 0x30
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#define RK30_GPIO_INTMASK 0x34
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#define RK30_GPIO_INTTYPE_LEVEL 0x38
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#define RK30_GPIO_INT_POLARITY 0x3c
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#define RK30_GPIO_INT_STATUS 0x40
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#define RK30_GPIO_INT_RAWSTATUS 0x44
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#define RK30_GPIO_DEBOUNCE 0x48
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2015-01-07 16:55:55 +00:00
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#define RK30_GPIO_PORT_EOI 0x4c
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2013-10-23 00:39:43 +00:00
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#define RK30_GPIO_EXT_PORT 0x50
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#define RK30_GPIO_LS_SYNC 0x60
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#define RK30_GPIO_WRITE(_sc, _off, _val) \
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bus_space_write_4(_sc->sc_bst, _sc->sc_bsh, _off, _val)
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#define RK30_GPIO_READ(_sc, _off) \
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bus_space_read_4(_sc->sc_bst, _sc->sc_bsh, _off)
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static uint32_t
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rk30_gpio_get_function(struct rk30_gpio_softc *sc, uint32_t pin)
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{
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2015-01-07 16:55:55 +00:00
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if (RK30_GPIO_READ(sc, RK30_GPIO_SWPORT_DDR) & (1U << pin))
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2013-10-23 00:39:43 +00:00
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return (GPIO_PIN_OUTPUT);
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2015-01-07 16:55:55 +00:00
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else
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return (GPIO_PIN_INPUT);
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2013-10-23 00:39:43 +00:00
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}
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static void
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2015-01-07 16:55:55 +00:00
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rk30_gpio_set_function(struct rk30_gpio_softc *sc, uint32_t pin, uint32_t func)
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2013-10-23 00:39:43 +00:00
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{
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2015-01-07 16:55:55 +00:00
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uint32_t data;
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2013-10-23 00:39:43 +00:00
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/* Must be called with lock held. */
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RK30_GPIO_LOCK_ASSERT(sc);
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data = RK30_GPIO_READ(sc, RK30_GPIO_SWPORT_DDR);
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2015-01-07 16:55:55 +00:00
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if (func == GPIO_PIN_OUTPUT)
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data |= (1U << pin);
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2013-10-23 00:39:43 +00:00
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else
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2015-01-07 16:55:55 +00:00
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data &= ~(1U << pin);
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2013-10-23 00:39:43 +00:00
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RK30_GPIO_WRITE(sc, RK30_GPIO_SWPORT_DDR, data);
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}
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static void
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rk30_gpio_set_pud(struct rk30_gpio_softc *sc, uint32_t pin, uint32_t state)
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{
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2015-01-07 19:15:11 +00:00
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uint32_t pud;
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2013-10-23 00:39:43 +00:00
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/* Must be called with lock held. */
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RK30_GPIO_LOCK_ASSERT(sc);
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2015-01-07 19:15:11 +00:00
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switch (state) {
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case GPIO_PIN_PULLUP:
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pud = RK30_GPIO_PULLUP;
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break;
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case GPIO_PIN_PULLDOWN:
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pud = RK30_GPIO_PULLDOWN;
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break;
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default:
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pud = RK30_GPIO_NONE;
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}
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/*
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* The pull up/down registers for GPIO0A and half of GPIO0B
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* (the first 12 pins on bank 0) are at a different location.
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*/
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if (sc->sc_bank == 0 && pin < 12)
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rk30_pmu_gpio_pud(pin, pud);
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2013-10-23 00:39:43 +00:00
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else
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2015-01-07 19:15:11 +00:00
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rk30_grf_gpio_pud(sc->sc_bank, pin, pud);
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2013-10-23 00:39:43 +00:00
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}
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static void
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rk30_gpio_pin_configure(struct rk30_gpio_softc *sc, struct gpio_pin *pin,
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unsigned int flags)
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{
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RK30_GPIO_LOCK(sc);
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/*
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* Manage input/output.
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*/
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2015-01-07 16:55:55 +00:00
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if (flags & (GPIO_PIN_INPUT | GPIO_PIN_OUTPUT)) {
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pin->gp_flags &= ~(GPIO_PIN_INPUT | GPIO_PIN_OUTPUT);
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if (flags & GPIO_PIN_OUTPUT)
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2013-10-23 00:39:43 +00:00
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pin->gp_flags |= GPIO_PIN_OUTPUT;
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2015-01-07 16:55:55 +00:00
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else
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2013-10-23 00:39:43 +00:00
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pin->gp_flags |= GPIO_PIN_INPUT;
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2015-01-07 16:55:55 +00:00
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rk30_gpio_set_function(sc, pin->gp_pin, pin->gp_flags);
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2013-10-23 00:39:43 +00:00
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}
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/* Manage Pull-up/pull-down. */
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2015-01-07 19:15:11 +00:00
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pin->gp_flags &= ~(GPIO_PIN_PULLUP | GPIO_PIN_PULLDOWN);
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if (flags & (GPIO_PIN_PULLUP | GPIO_PIN_PULLDOWN)) {
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if (flags & GPIO_PIN_PULLUP)
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2013-10-23 00:39:43 +00:00
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pin->gp_flags |= GPIO_PIN_PULLUP;
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2015-01-07 19:15:11 +00:00
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else
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2013-10-23 00:39:43 +00:00
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pin->gp_flags |= GPIO_PIN_PULLDOWN;
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2015-01-07 19:15:11 +00:00
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}
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rk30_gpio_set_pud(sc, pin->gp_pin, pin->gp_flags);
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2013-10-23 00:39:43 +00:00
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RK30_GPIO_UNLOCK(sc);
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}
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2015-01-31 19:32:14 +00:00
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static device_t
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rk30_gpio_get_bus(device_t dev)
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{
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struct rk30_gpio_softc *sc;
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sc = device_get_softc(dev);
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return (sc->sc_busdev);
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}
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2013-10-23 00:39:43 +00:00
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static int
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rk30_gpio_pin_max(device_t dev, int *maxpin)
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{
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*maxpin = RK30_GPIO_PINS - 1;
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return (0);
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}
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static int
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rk30_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps)
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{
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struct rk30_gpio_softc *sc = device_get_softc(dev);
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int i;
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for (i = 0; i < sc->sc_gpio_npins; i++) {
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if (sc->sc_gpio_pins[i].gp_pin == pin)
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break;
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}
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if (i >= sc->sc_gpio_npins)
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return (EINVAL);
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RK30_GPIO_LOCK(sc);
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*caps = sc->sc_gpio_pins[i].gp_caps;
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RK30_GPIO_UNLOCK(sc);
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return (0);
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}
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static int
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rk30_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags)
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{
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struct rk30_gpio_softc *sc = device_get_softc(dev);
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int i;
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for (i = 0; i < sc->sc_gpio_npins; i++) {
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if (sc->sc_gpio_pins[i].gp_pin == pin)
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break;
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}
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if (i >= sc->sc_gpio_npins)
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return (EINVAL);
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RK30_GPIO_LOCK(sc);
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*flags = sc->sc_gpio_pins[i].gp_flags;
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RK30_GPIO_UNLOCK(sc);
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return (0);
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}
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static int
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rk30_gpio_pin_getname(device_t dev, uint32_t pin, char *name)
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{
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struct rk30_gpio_softc *sc = device_get_softc(dev);
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int i;
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for (i = 0; i < sc->sc_gpio_npins; i++) {
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if (sc->sc_gpio_pins[i].gp_pin == pin)
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break;
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}
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if (i >= sc->sc_gpio_npins)
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return (EINVAL);
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RK30_GPIO_LOCK(sc);
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memcpy(name, sc->sc_gpio_pins[i].gp_name, GPIOMAXNAME);
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RK30_GPIO_UNLOCK(sc);
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return (0);
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}
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static int
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rk30_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags)
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{
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struct rk30_gpio_softc *sc = device_get_softc(dev);
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int i;
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for (i = 0; i < sc->sc_gpio_npins; i++) {
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if (sc->sc_gpio_pins[i].gp_pin == pin)
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break;
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}
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if (i >= sc->sc_gpio_npins)
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return (EINVAL);
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rk30_gpio_pin_configure(sc, &sc->sc_gpio_pins[i], flags);
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return (0);
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}
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static int
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rk30_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value)
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{
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int i;
|
2015-01-07 16:55:55 +00:00
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struct rk30_gpio_softc *sc;
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uint32_t data;
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2013-10-23 00:39:43 +00:00
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2015-01-07 16:55:55 +00:00
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sc = device_get_softc(dev);
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2013-10-23 00:39:43 +00:00
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for (i = 0; i < sc->sc_gpio_npins; i++) {
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|
|
if (sc->sc_gpio_pins[i].gp_pin == pin)
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
if (i >= sc->sc_gpio_npins)
|
|
|
|
return (EINVAL);
|
|
|
|
RK30_GPIO_LOCK(sc);
|
|
|
|
data = RK30_GPIO_READ(sc, RK30_GPIO_SWPORT_DR);
|
|
|
|
if (value)
|
2015-01-07 16:55:55 +00:00
|
|
|
data |= (1U << pin);
|
2013-10-23 00:39:43 +00:00
|
|
|
else
|
2015-01-07 16:55:55 +00:00
|
|
|
data &= ~(1U << pin);
|
2013-10-23 00:39:43 +00:00
|
|
|
RK30_GPIO_WRITE(sc, RK30_GPIO_SWPORT_DR, data);
|
|
|
|
RK30_GPIO_UNLOCK(sc);
|
|
|
|
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
rk30_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val)
|
|
|
|
{
|
|
|
|
int i;
|
2015-01-07 16:55:55 +00:00
|
|
|
struct rk30_gpio_softc *sc;
|
|
|
|
uint32_t data;
|
2013-10-23 00:39:43 +00:00
|
|
|
|
2015-01-07 16:55:55 +00:00
|
|
|
sc = device_get_softc(dev);
|
2013-10-23 00:39:43 +00:00
|
|
|
for (i = 0; i < sc->sc_gpio_npins; i++) {
|
|
|
|
if (sc->sc_gpio_pins[i].gp_pin == pin)
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
if (i >= sc->sc_gpio_npins)
|
|
|
|
return (EINVAL);
|
|
|
|
RK30_GPIO_LOCK(sc);
|
2015-01-07 16:55:55 +00:00
|
|
|
data = RK30_GPIO_READ(sc, RK30_GPIO_EXT_PORT);
|
2013-10-23 00:39:43 +00:00
|
|
|
RK30_GPIO_UNLOCK(sc);
|
2015-01-07 16:55:55 +00:00
|
|
|
*val = (data & (1U << pin)) ? 1 : 0;
|
2013-10-23 00:39:43 +00:00
|
|
|
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
rk30_gpio_pin_toggle(device_t dev, uint32_t pin)
|
|
|
|
{
|
|
|
|
int i;
|
2015-01-07 16:55:55 +00:00
|
|
|
struct rk30_gpio_softc *sc;
|
|
|
|
uint32_t data;
|
2013-10-23 00:39:43 +00:00
|
|
|
|
2015-01-07 16:55:55 +00:00
|
|
|
sc = device_get_softc(dev);
|
2013-10-23 00:39:43 +00:00
|
|
|
for (i = 0; i < sc->sc_gpio_npins; i++) {
|
|
|
|
if (sc->sc_gpio_pins[i].gp_pin == pin)
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
if (i >= sc->sc_gpio_npins)
|
|
|
|
return (EINVAL);
|
|
|
|
RK30_GPIO_LOCK(sc);
|
|
|
|
data = RK30_GPIO_READ(sc, RK30_GPIO_SWPORT_DR);
|
2015-01-07 16:55:55 +00:00
|
|
|
if (data & (1U << pin))
|
|
|
|
data &= ~(1U << pin);
|
2013-10-23 00:39:43 +00:00
|
|
|
else
|
2015-01-07 16:55:55 +00:00
|
|
|
data |= (1U << pin);
|
2013-10-23 00:39:43 +00:00
|
|
|
RK30_GPIO_WRITE(sc, RK30_GPIO_SWPORT_DR, data);
|
|
|
|
RK30_GPIO_UNLOCK(sc);
|
|
|
|
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
rk30_gpio_probe(device_t dev)
|
|
|
|
{
|
|
|
|
|
2014-02-02 19:17:28 +00:00
|
|
|
if (!ofw_bus_status_okay(dev))
|
|
|
|
return (ENXIO);
|
|
|
|
|
2013-10-23 00:39:43 +00:00
|
|
|
if (!ofw_bus_is_compatible(dev, "rockchip,rk30xx-gpio"))
|
|
|
|
return (ENXIO);
|
|
|
|
|
|
|
|
device_set_desc(dev, "Rockchip RK30XX GPIO controller");
|
|
|
|
return (BUS_PROBE_DEFAULT);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
rk30_gpio_attach(device_t dev)
|
|
|
|
{
|
|
|
|
struct rk30_gpio_softc *sc = device_get_softc(dev);
|
|
|
|
int i, rid;
|
|
|
|
phandle_t gpio;
|
2015-01-07 19:15:11 +00:00
|
|
|
unsigned long start;
|
2013-10-23 00:39:43 +00:00
|
|
|
|
2013-12-09 07:14:59 +00:00
|
|
|
if (rk30_gpio_sc)
|
|
|
|
return (ENXIO);
|
2013-10-23 00:39:43 +00:00
|
|
|
sc->sc_dev = dev;
|
2015-01-31 12:17:07 +00:00
|
|
|
mtx_init(&sc->sc_mtx, "rk30 gpio", "gpio", MTX_DEF);
|
2013-10-23 00:39:43 +00:00
|
|
|
|
|
|
|
rid = 0;
|
|
|
|
sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
|
|
|
|
RF_ACTIVE);
|
|
|
|
if (!sc->sc_mem_res) {
|
|
|
|
device_printf(dev, "cannot allocate memory window\n");
|
2015-01-31 12:17:07 +00:00
|
|
|
goto fail;
|
2013-10-23 00:39:43 +00:00
|
|
|
}
|
|
|
|
sc->sc_bst = rman_get_bustag(sc->sc_mem_res);
|
|
|
|
sc->sc_bsh = rman_get_bushandle(sc->sc_mem_res);
|
2015-01-07 19:15:11 +00:00
|
|
|
/* Check the unit we are attaching by our base address. */
|
|
|
|
sc->sc_bank = -1;
|
|
|
|
start = rman_get_start(sc->sc_mem_res);
|
|
|
|
for (i = 0; i < nitems(rk30_gpio_base_addr); i++) {
|
|
|
|
if (rk30_gpio_base_addr[i] == start) {
|
|
|
|
sc->sc_bank = i;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
if (sc->sc_bank == -1) {
|
|
|
|
device_printf(dev,
|
|
|
|
"unsupported device unit (only GPIO0..3 are supported)\n");
|
2015-01-31 12:17:07 +00:00
|
|
|
goto fail;
|
2015-01-07 19:15:11 +00:00
|
|
|
}
|
2013-10-23 00:39:43 +00:00
|
|
|
|
|
|
|
rid = 0;
|
|
|
|
sc->sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
|
|
|
|
RF_ACTIVE);
|
|
|
|
if (!sc->sc_irq_res) {
|
|
|
|
device_printf(dev, "cannot allocate interrupt\n");
|
2015-01-31 12:17:07 +00:00
|
|
|
goto fail;
|
2013-10-23 00:39:43 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Find our node. */
|
|
|
|
gpio = ofw_bus_get_node(sc->sc_dev);
|
|
|
|
|
|
|
|
if (!OF_hasprop(gpio, "gpio-controller"))
|
|
|
|
/* Node is not a GPIO controller. */
|
|
|
|
goto fail;
|
|
|
|
|
|
|
|
/* Initialize the software controlled pins. */
|
|
|
|
for (i = 0; i < RK30_GPIO_PINS; i++) {
|
|
|
|
snprintf(sc->sc_gpio_pins[i].gp_name, GPIOMAXNAME,
|
|
|
|
"pin %d", i);
|
|
|
|
sc->sc_gpio_pins[i].gp_pin = i;
|
|
|
|
sc->sc_gpio_pins[i].gp_caps = RK30_GPIO_DEFAULT_CAPS;
|
2015-01-07 16:55:55 +00:00
|
|
|
sc->sc_gpio_pins[i].gp_flags = rk30_gpio_get_function(sc, i);
|
2013-10-23 00:39:43 +00:00
|
|
|
}
|
|
|
|
sc->sc_gpio_npins = i;
|
2013-12-09 07:14:59 +00:00
|
|
|
rk30_gpio_sc = sc;
|
2014-05-10 20:26:49 +00:00
|
|
|
rk30_gpio_init();
|
2015-01-31 19:32:14 +00:00
|
|
|
sc->sc_busdev = gpiobus_attach_bus(dev);
|
|
|
|
if (sc->sc_busdev == NULL)
|
|
|
|
goto fail;
|
|
|
|
|
|
|
|
return (0);
|
2013-10-23 00:39:43 +00:00
|
|
|
|
|
|
|
fail:
|
|
|
|
if (sc->sc_irq_res)
|
|
|
|
bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sc_irq_res);
|
|
|
|
if (sc->sc_mem_res)
|
|
|
|
bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res);
|
2015-01-31 12:17:07 +00:00
|
|
|
mtx_destroy(&sc->sc_mtx);
|
|
|
|
|
2013-10-23 00:39:43 +00:00
|
|
|
return (ENXIO);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
rk30_gpio_detach(device_t dev)
|
|
|
|
{
|
|
|
|
|
|
|
|
return (EBUSY);
|
|
|
|
}
|
|
|
|
|
|
|
|
static device_method_t rk30_gpio_methods[] = {
|
|
|
|
/* Device interface */
|
|
|
|
DEVMETHOD(device_probe, rk30_gpio_probe),
|
|
|
|
DEVMETHOD(device_attach, rk30_gpio_attach),
|
|
|
|
DEVMETHOD(device_detach, rk30_gpio_detach),
|
|
|
|
|
|
|
|
/* GPIO protocol */
|
2015-01-31 19:32:14 +00:00
|
|
|
DEVMETHOD(gpio_get_bus, rk30_gpio_get_bus),
|
2013-10-23 00:39:43 +00:00
|
|
|
DEVMETHOD(gpio_pin_max, rk30_gpio_pin_max),
|
|
|
|
DEVMETHOD(gpio_pin_getname, rk30_gpio_pin_getname),
|
|
|
|
DEVMETHOD(gpio_pin_getflags, rk30_gpio_pin_getflags),
|
|
|
|
DEVMETHOD(gpio_pin_getcaps, rk30_gpio_pin_getcaps),
|
|
|
|
DEVMETHOD(gpio_pin_setflags, rk30_gpio_pin_setflags),
|
|
|
|
DEVMETHOD(gpio_pin_get, rk30_gpio_pin_get),
|
|
|
|
DEVMETHOD(gpio_pin_set, rk30_gpio_pin_set),
|
|
|
|
DEVMETHOD(gpio_pin_toggle, rk30_gpio_pin_toggle),
|
|
|
|
|
|
|
|
DEVMETHOD_END
|
|
|
|
};
|
|
|
|
|
|
|
|
static devclass_t rk30_gpio_devclass;
|
|
|
|
|
|
|
|
static driver_t rk30_gpio_driver = {
|
|
|
|
"gpio",
|
|
|
|
rk30_gpio_methods,
|
|
|
|
sizeof(struct rk30_gpio_softc),
|
|
|
|
};
|
|
|
|
|
|
|
|
DRIVER_MODULE(rk30_gpio, simplebus, rk30_gpio_driver, rk30_gpio_devclass, 0, 0);
|
2013-12-09 07:14:59 +00:00
|
|
|
|
|
|
|
int
|
|
|
|
rk30_gpios_prop_handle(phandle_t ctrl, pcell_t *gpios, int len)
|
|
|
|
{
|
|
|
|
struct rk30_gpio_softc *sc;
|
|
|
|
pcell_t gpio_cells;
|
|
|
|
int inc, t, tuples, tuple_size;
|
|
|
|
int dir, flags, pin, i;
|
|
|
|
u_long gpio_ctrl, size;
|
|
|
|
|
|
|
|
sc = rk30_gpio_sc;
|
|
|
|
if (sc == NULL)
|
|
|
|
return ENXIO;
|
|
|
|
|
2016-11-14 12:03:08 +00:00
|
|
|
if (OF_getencprop(ctrl, "#gpio-cells", &gpio_cells, sizeof(pcell_t)) < 0)
|
2013-12-09 07:14:59 +00:00
|
|
|
return (ENXIO);
|
|
|
|
if (gpio_cells != 2)
|
|
|
|
return (ENXIO);
|
|
|
|
|
|
|
|
tuple_size = gpio_cells * sizeof(pcell_t) + sizeof(phandle_t);
|
|
|
|
tuples = len / tuple_size;
|
|
|
|
|
|
|
|
if (fdt_regsize(ctrl, &gpio_ctrl, &size))
|
|
|
|
return (ENXIO);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Skip controller reference, since controller's phandle is given
|
|
|
|
* explicitly (in a function argument).
|
|
|
|
*/
|
|
|
|
inc = sizeof(ihandle_t) / sizeof(pcell_t);
|
|
|
|
gpios += inc;
|
|
|
|
for (t = 0; t < tuples; t++) {
|
2016-11-14 12:03:08 +00:00
|
|
|
pin = gpios[0];
|
|
|
|
dir = gpios[1];
|
|
|
|
flags = gpios[2];
|
2013-12-09 07:14:59 +00:00
|
|
|
|
|
|
|
for (i = 0; i < sc->sc_gpio_npins; i++) {
|
|
|
|
if (sc->sc_gpio_pins[i].gp_pin == pin)
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
if (i >= sc->sc_gpio_npins)
|
|
|
|
return (EINVAL);
|
|
|
|
|
|
|
|
rk30_gpio_pin_configure(sc, &sc->sc_gpio_pins[i], flags);
|
|
|
|
|
|
|
|
if (dir == 1) {
|
|
|
|
/* Input. */
|
2015-01-07 16:55:55 +00:00
|
|
|
rk30_gpio_pin_set(sc->sc_dev, pin, GPIO_PIN_INPUT);
|
2013-12-09 07:14:59 +00:00
|
|
|
} else {
|
|
|
|
/* Output. */
|
2015-01-07 16:55:55 +00:00
|
|
|
rk30_gpio_pin_set(sc->sc_dev, pin, GPIO_PIN_OUTPUT);
|
2013-12-09 07:14:59 +00:00
|
|
|
}
|
|
|
|
gpios += gpio_cells + inc;
|
|
|
|
}
|
|
|
|
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
#define MAX_PINS_PER_NODE 5
|
|
|
|
#define GPIOS_PROP_CELLS 4
|
|
|
|
|
2014-05-10 20:26:49 +00:00
|
|
|
static int
|
|
|
|
rk30_gpio_init(void)
|
2013-12-09 07:14:59 +00:00
|
|
|
{
|
|
|
|
phandle_t child, parent, root, ctrl;
|
|
|
|
pcell_t gpios[MAX_PINS_PER_NODE * GPIOS_PROP_CELLS];
|
|
|
|
struct gpio_ctrl_entry *e;
|
|
|
|
int len, rv;
|
|
|
|
|
|
|
|
root = OF_finddevice("/");
|
|
|
|
len = 0;
|
|
|
|
parent = root;
|
|
|
|
|
|
|
|
/* Traverse through entire tree to find nodes with 'gpios' prop */
|
|
|
|
for (child = OF_child(parent); child != 0; child = OF_peer(child)) {
|
|
|
|
|
|
|
|
/* Find a 'leaf'. Start the search from this node. */
|
|
|
|
while (OF_child(child)) {
|
|
|
|
parent = child;
|
|
|
|
child = OF_child(child);
|
|
|
|
}
|
|
|
|
if ((len = OF_getproplen(child, "gpios")) > 0) {
|
|
|
|
|
|
|
|
if (len > sizeof(gpios))
|
|
|
|
return (ENXIO);
|
|
|
|
|
|
|
|
/* Get 'gpios' property. */
|
2016-11-14 12:03:08 +00:00
|
|
|
OF_getencprop(child, "gpios", gpios, len);
|
2013-12-09 07:14:59 +00:00
|
|
|
|
|
|
|
e = (struct gpio_ctrl_entry *)&gpio_controllers;
|
|
|
|
|
|
|
|
/* Find and call a handler. */
|
|
|
|
for (; e->compat; e++) {
|
|
|
|
/*
|
|
|
|
* First cell of 'gpios' property should
|
|
|
|
* contain a ref. to a node defining GPIO
|
|
|
|
* controller.
|
|
|
|
*/
|
2016-11-14 12:03:08 +00:00
|
|
|
ctrl = OF_node_from_xref(gpios[0]);
|
2013-12-09 07:14:59 +00:00
|
|
|
|
2016-11-11 15:13:30 +00:00
|
|
|
if (ofw_bus_node_is_compatible(ctrl, e->compat))
|
2013-12-09 07:14:59 +00:00
|
|
|
/* Call a handler. */
|
|
|
|
if ((rv = e->handler(ctrl,
|
|
|
|
(pcell_t *)&gpios, len)))
|
|
|
|
return (rv);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (OF_peer(child) == 0) {
|
|
|
|
/* No more siblings. */
|
|
|
|
child = parent;
|
|
|
|
parent = OF_parent(child);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return (0);
|
|
|
|
}
|