freebsd-dev/sys/dev/ahci/ahci.h

/*-
 * Copyright (c) 1998 - 2008 S<EFBFBD>ren Schmidt <sos@FreeBSD.org>
 * Copyright (c) 2009 Alexander Motin <mav@FreeBSD.org>
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer,
 *    without modification, immediately at the beginning of the file.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * $FreeBSD$
 */

/* ATA register defines */
#define ATA_DATA                        0       /* (RW) data */

#define ATA_FEATURE                     1       /* (W) feature */
#define         ATA_F_DMA               0x01    /* enable DMA */
#define         ATA_F_OVL               0x02    /* enable overlap */

#define ATA_COUNT                       2       /* (W) sector count */

#define ATA_SECTOR                      3       /* (RW) sector # */
#define ATA_CYL_LSB                     4       /* (RW) cylinder# LSB */
#define ATA_CYL_MSB                     5       /* (RW) cylinder# MSB */
#define ATA_DRIVE                       6       /* (W) Sector/Drive/Head */
#define         ATA_D_LBA               0x40    /* use LBA addressing */
#define         ATA_D_IBM               0xa0    /* 512 byte sectors, ECC */

#define ATA_COMMAND                     7       /* (W) command */

#define ATA_ERROR                       8       /* (R) error */
#define         ATA_E_ILI               0x01    /* illegal length */
#define         ATA_E_NM                0x02    /* no media */
#define         ATA_E_ABORT             0x04    /* command aborted */
#define         ATA_E_MCR               0x08    /* media change request */
#define         ATA_E_IDNF              0x10    /* ID not found */
#define         ATA_E_MC                0x20    /* media changed */
#define         ATA_E_UNC               0x40    /* uncorrectable data */
#define         ATA_E_ICRC              0x80    /* UDMA crc error */
#define		ATA_E_ATAPI_SENSE_MASK	0xf0	/* ATAPI sense key mask */

#define ATA_IREASON                     9       /* (R) interrupt reason */
#define         ATA_I_CMD               0x01    /* cmd (1) | data (0) */
#define         ATA_I_IN                0x02    /* read (1) | write (0) */
#define         ATA_I_RELEASE           0x04    /* released bus (1) */
#define         ATA_I_TAGMASK           0xf8    /* tag mask */

#define ATA_STATUS                      10      /* (R) status */
#define ATA_ALTSTAT                     11      /* (R) alternate status */
#define         ATA_S_ERROR             0x01    /* error */
#define         ATA_S_INDEX             0x02    /* index */
#define         ATA_S_CORR              0x04    /* data corrected */
#define         ATA_S_DRQ               0x08    /* data request */
#define         ATA_S_DSC               0x10    /* drive seek completed */
#define         ATA_S_SERVICE           0x10    /* drive needs service */
#define         ATA_S_DWF               0x20    /* drive write fault */
#define         ATA_S_DMA               0x20    /* DMA ready */
#define         ATA_S_READY             0x40    /* drive ready */
#define         ATA_S_BUSY              0x80    /* busy */

#define ATA_CONTROL                     12      /* (W) control */
#define         ATA_A_IDS               0x02    /* disable interrupts */
#define         ATA_A_RESET             0x04    /* RESET controller */
#define         ATA_A_4BIT              0x08    /* 4 head bits */
#define         ATA_A_HOB               0x80    /* High Order Byte enable */

/* SATA register defines */
#define ATA_SSTATUS                     13
#define         ATA_SS_DET_MASK         0x0000000f
#define         ATA_SS_DET_NO_DEVICE    0x00000000
#define         ATA_SS_DET_DEV_PRESENT  0x00000001
#define         ATA_SS_DET_PHY_ONLINE   0x00000003
#define         ATA_SS_DET_PHY_OFFLINE  0x00000004

#define         ATA_SS_SPD_MASK         0x000000f0
#define         ATA_SS_SPD_NO_SPEED     0x00000000
#define         ATA_SS_SPD_GEN1         0x00000010
#define         ATA_SS_SPD_GEN2         0x00000020
#define         ATA_SS_SPD_GEN3         0x00000040

#define         ATA_SS_IPM_MASK         0x00000f00
#define         ATA_SS_IPM_NO_DEVICE    0x00000000
#define         ATA_SS_IPM_ACTIVE       0x00000100
#define         ATA_SS_IPM_PARTIAL      0x00000200
#define         ATA_SS_IPM_SLUMBER      0x00000600

#define ATA_SERROR                      14
#define         ATA_SE_DATA_CORRECTED   0x00000001
#define         ATA_SE_COMM_CORRECTED   0x00000002
#define         ATA_SE_DATA_ERR         0x00000100
#define         ATA_SE_COMM_ERR         0x00000200
#define         ATA_SE_PROT_ERR         0x00000400
#define         ATA_SE_HOST_ERR         0x00000800
#define         ATA_SE_PHY_CHANGED      0x00010000
#define         ATA_SE_PHY_IERROR       0x00020000
#define         ATA_SE_COMM_WAKE        0x00040000
#define         ATA_SE_DECODE_ERR       0x00080000
#define         ATA_SE_PARITY_ERR       0x00100000
#define         ATA_SE_CRC_ERR          0x00200000
#define         ATA_SE_HANDSHAKE_ERR    0x00400000
#define         ATA_SE_LINKSEQ_ERR      0x00800000
#define         ATA_SE_TRANSPORT_ERR    0x01000000
#define         ATA_SE_UNKNOWN_FIS      0x02000000
#define         ATA_SE_EXCHANGED        0x04000000

#define ATA_SCONTROL                    15
#define         ATA_SC_DET_MASK         0x0000000f
#define         ATA_SC_DET_IDLE         0x00000000
#define         ATA_SC_DET_RESET        0x00000001
#define         ATA_SC_DET_DISABLE      0x00000004

#define         ATA_SC_SPD_MASK         0x000000f0
#define         ATA_SC_SPD_NO_SPEED     0x00000000
#define         ATA_SC_SPD_SPEED_GEN1   0x00000010
#define         ATA_SC_SPD_SPEED_GEN2   0x00000020
#define         ATA_SC_SPD_SPEED_GEN3   0x00000040

#define         ATA_SC_IPM_MASK         0x00000f00
#define         ATA_SC_IPM_NONE         0x00000000
#define         ATA_SC_IPM_DIS_PARTIAL  0x00000100
#define         ATA_SC_IPM_DIS_SLUMBER  0x00000200

#define ATA_SACTIVE                     16

#define AHCI_MAX_PORTS			32
#define AHCI_MAX_SLOTS			32

/* SATA AHCI v1.0 register defines */
#define AHCI_CAP                    0x00
#define		AHCI_CAP_NPMASK	0x0000001f
#define		AHCI_CAP_SXS	0x00000020
#define		AHCI_CAP_EMS	0x00000040
#define		AHCI_CAP_CCCS	0x00000080
#define		AHCI_CAP_NCS	0x00001F00
#define		AHCI_CAP_NCS_SHIFT	8
#define		AHCI_CAP_PSC	0x00002000
#define		AHCI_CAP_SSC	0x00004000
#define		AHCI_CAP_PMD	0x00008000
#define		AHCI_CAP_FBSS	0x00010000
#define		AHCI_CAP_SPM	0x00020000
#define		AHCI_CAP_SAM	0x00080000
#define		AHCI_CAP_ISS	0x00F00000
#define		AHCI_CAP_ISS_SHIFT	20
#define		AHCI_CAP_SCLO	0x01000000
#define		AHCI_CAP_SAL	0x02000000
#define		AHCI_CAP_SALP	0x04000000
#define		AHCI_CAP_SSS	0x08000000
#define		AHCI_CAP_SMPS	0x10000000
#define		AHCI_CAP_SSNTF	0x20000000
#define		AHCI_CAP_SNCQ	0x40000000
#define		AHCI_CAP_64BIT	0x80000000

#define AHCI_GHC                    0x04
#define         AHCI_GHC_AE         0x80000000
#define         AHCI_GHC_MRSM       0x00000004
#define         AHCI_GHC_IE         0x00000002
#define         AHCI_GHC_HR         0x00000001

#define AHCI_IS                     0x08
#define AHCI_PI                     0x0c
#define AHCI_VS                     0x10

#define AHCI_CCCC                   0x14
#define		AHCI_CCCC_TV_MASK	0xffff0000
#define		AHCI_CCCC_TV_SHIFT	16
#define		AHCI_CCCC_CC_MASK	0x0000ff00
#define		AHCI_CCCC_CC_SHIFT	8
#define		AHCI_CCCC_INT_MASK	0x000000f8
#define		AHCI_CCCC_INT_SHIFT	3
#define		AHCI_CCCC_EN		0x00000001
#define AHCI_CCCP                   0x18

#define AHCI_EM_LOC                 0x1C
#define AHCI_EM_CTL                 0x20
#define 	AHCI_EM_MR              0x00000001
#define 	AHCI_EM_TM              0x00000100
#define 	AHCI_EM_RST             0x00000200
#define 	AHCI_EM_LED             0x00010000
#define 	AHCI_EM_SAFTE           0x00020000
#define 	AHCI_EM_SES2            0x00040000
#define 	AHCI_EM_SGPIO           0x00080000
#define 	AHCI_EM_SMB             0x01000000
#define 	AHCI_EM_XMT             0x02000000
#define 	AHCI_EM_ALHD            0x04000000
#define 	AHCI_EM_PM              0x08000000

#define AHCI_CAP2                   0x24
#define		AHCI_CAP2_BOH	0x00000001
#define		AHCI_CAP2_NVMP	0x00000002
#define		AHCI_CAP2_APST	0x00000004

#define AHCI_OFFSET                 0x100
#define AHCI_STEP                   0x80

#define AHCI_P_CLB                  0x00
#define AHCI_P_CLBU                 0x04
#define AHCI_P_FB                   0x08
#define AHCI_P_FBU                  0x0c
#define AHCI_P_IS                   0x10
#define AHCI_P_IE                   0x14
#define         AHCI_P_IX_DHR       0x00000001
#define         AHCI_P_IX_PS        0x00000002
#define         AHCI_P_IX_DS        0x00000004
#define         AHCI_P_IX_SDB       0x00000008
#define         AHCI_P_IX_UF        0x00000010
#define         AHCI_P_IX_DP        0x00000020
#define         AHCI_P_IX_PC        0x00000040
#define         AHCI_P_IX_MP        0x00000080

#define         AHCI_P_IX_PRC       0x00400000
#define         AHCI_P_IX_IPM       0x00800000
#define         AHCI_P_IX_OF        0x01000000
#define         AHCI_P_IX_INF       0x04000000
#define         AHCI_P_IX_IF        0x08000000
#define         AHCI_P_IX_HBD       0x10000000
#define         AHCI_P_IX_HBF       0x20000000
#define         AHCI_P_IX_TFE       0x40000000
#define         AHCI_P_IX_CPD       0x80000000

#define AHCI_P_CMD                  0x18
#define         AHCI_P_CMD_ST       0x00000001
#define         AHCI_P_CMD_SUD      0x00000002
#define         AHCI_P_CMD_POD      0x00000004
#define         AHCI_P_CMD_CLO      0x00000008
#define         AHCI_P_CMD_FRE      0x00000010
#define         AHCI_P_CMD_CCS_MASK 0x00001f00
#define         AHCI_P_CMD_CCS_SHIFT 8
#define         AHCI_P_CMD_ISS      0x00002000
#define         AHCI_P_CMD_FR       0x00004000
#define         AHCI_P_CMD_CR       0x00008000
#define         AHCI_P_CMD_CPS      0x00010000
#define         AHCI_P_CMD_PMA      0x00020000
#define         AHCI_P_CMD_HPCP     0x00040000
#define         AHCI_P_CMD_MPSP     0x00080000
#define         AHCI_P_CMD_CPD      0x00100000
#define         AHCI_P_CMD_ESP      0x00200000
#define         AHCI_P_CMD_FBSCP    0x00400000
#define         AHCI_P_CMD_APSTE    0x00800000
#define         AHCI_P_CMD_ATAPI    0x01000000
#define         AHCI_P_CMD_DLAE     0x02000000
#define         AHCI_P_CMD_ALPE     0x04000000
#define         AHCI_P_CMD_ASP      0x08000000
#define         AHCI_P_CMD_ICC_MASK 0xf0000000
#define         AHCI_P_CMD_NOOP     0x00000000
#define         AHCI_P_CMD_ACTIVE   0x10000000
#define         AHCI_P_CMD_PARTIAL  0x20000000
#define         AHCI_P_CMD_SLUMBER  0x60000000

#define AHCI_P_TFD                  0x20
#define AHCI_P_SIG                  0x24
#define AHCI_P_SSTS                 0x28
#define AHCI_P_SCTL                 0x2c
#define AHCI_P_SERR                 0x30
#define AHCI_P_SACT                 0x34
#define AHCI_P_CI                   0x38
#define AHCI_P_SNTF                 0x3C
#define AHCI_P_FBS                  0x40
#define 	AHCI_P_FBS_EN       0x00000001
#define 	AHCI_P_FBS_DEC      0x00000002
#define 	AHCI_P_FBS_SDE      0x00000004
#define 	AHCI_P_FBS_DEV      0x00000f00
#define 	AHCI_P_FBS_DEV_SHIFT 8
#define 	AHCI_P_FBS_ADO      0x0000f000
#define 	AHCI_P_FBS_ADO_SHIFT 12
#define 	AHCI_P_FBS_DWE      0x000f0000
#define 	AHCI_P_FBS_DWE_SHIFT 16

/* Just to be sure, if building as module. */
#if MAXPHYS < 512 * 1024
#undef MAXPHYS
#define MAXPHYS				512 * 1024
#endif
/* Pessimistic prognosis on number of required S/G entries */
#define AHCI_SG_ENTRIES	(roundup(btoc(MAXPHYS) + 1, 8))
/* Command list. 32 commands. First, 1Kbyte aligned. */
#define AHCI_CL_OFFSET              0
#define AHCI_CL_SIZE                32
/* Command tables. Up to 32 commands, Each, 128byte aligned. */
#define AHCI_CT_OFFSET              (AHCI_CL_OFFSET + AHCI_CL_SIZE * AHCI_MAX_SLOTS)
#define AHCI_CT_SIZE                (128 + AHCI_SG_ENTRIES * 16)
/* Total main work area. */
#define AHCI_WORK_SIZE              (AHCI_CT_OFFSET + AHCI_CT_SIZE * ch->numslots)

struct ahci_dma_prd {
    u_int64_t                   dba;
    u_int32_t                   reserved;
    u_int32_t                   dbc;            /* 0 based */
#define AHCI_PRD_MASK		0x003fffff      /* max 4MB */
#define AHCI_PRD_MAX		(AHCI_PRD_MASK + 1)
#define AHCI_PRD_IPC		(1 << 31)
} __packed;

struct ahci_cmd_tab {
    u_int8_t                    cfis[64];
    u_int8_t                    acmd[32];
    u_int8_t                    reserved[32];
    struct ahci_dma_prd         prd_tab[AHCI_SG_ENTRIES];
} __packed;

struct ahci_cmd_list {
    u_int16_t                   cmd_flags;
#define AHCI_CMD_ATAPI		0x0020
#define AHCI_CMD_WRITE		0x0040
#define AHCI_CMD_PREFETCH		0x0080
#define AHCI_CMD_RESET		0x0100
#define AHCI_CMD_BIST		0x0200
#define AHCI_CMD_CLR_BUSY		0x0400

    u_int16_t                   prd_length;     /* PRD entries */
    u_int32_t                   bytecount;
    u_int64_t                   cmd_table_phys; /* 128byte aligned */
} __packed;

/* misc defines */
#define ATA_IRQ_RID                     0
#define ATA_INTR_FLAGS                  (INTR_MPSAFE|INTR_TYPE_BIO|INTR_ENTROPY)

struct ata_dmaslot {
    bus_dmamap_t                data_map;       /* data DMA map */
    int				nsegs;		/* Number of segs loaded */
};

/* structure holding DMA related information */
struct ata_dma {
    bus_dma_tag_t               work_tag;       /* workspace DMA tag */
    bus_dmamap_t                work_map;       /* workspace DMA map */
    uint8_t                     *work;          /* workspace */
    bus_addr_t                  work_bus;       /* bus address of work */
    bus_dma_tag_t               rfis_tag;       /* RFIS list DMA tag */
    bus_dmamap_t                rfis_map;       /* RFIS list DMA map */
    uint8_t                     *rfis;          /* FIS receive area */
    bus_addr_t                  rfis_bus;       /* bus address of rfis */
    bus_dma_tag_t               data_tag;       /* data DMA tag */
    u_int64_t                   max_address;    /* highest DMA'able address */
};

enum ahci_slot_states {
	AHCI_SLOT_EMPTY,
	AHCI_SLOT_LOADING,
	AHCI_SLOT_RUNNING,
	AHCI_SLOT_EXECUTING
};

struct ahci_slot {
    device_t                    dev;            /* Device handle */
    u_int8_t			slot;           /* Number of this slot */
    enum ahci_slot_states	state;          /* Slot state */
    union ccb			*ccb;		/* CCB occupying slot */
    struct ata_dmaslot          dma;            /* DMA data of this slot */
    struct callout              timeout;        /* Execution timeout */
};

struct ahci_device {
	int			revision;
	int			mode;
	u_int			bytecount;
	u_int			atapi;
	u_int			tags;
	u_int			caps;
};

struct ahci_led {
	device_t		dev;		/* Device handle */
	struct cdev		*led;
	uint8_t			num;		/* Number of this led */
	uint8_t			state;		/* State of this led */
};

#define	AHCI_NUM_LEDS		3

/* structure describing an ATA channel */
struct ahci_channel {
	device_t		dev;            /* Device handle */
	int			unit;           /* Physical channel */
	struct resource		*r_mem;		/* Memory of this channel */
	struct resource		*r_irq;         /* Interrupt of this channel */
	void			*ih;            /* Interrupt handle */
	struct ata_dma		dma;            /* DMA data */
	struct cam_sim		*sim;
	struct cam_path		*path;
	struct ahci_led		leds[3];
	uint32_t		caps;		/* Controller capabilities */
	uint32_t		caps2;		/* Controller capabilities */
	uint32_t		chcaps;		/* Channel capabilities */
	int			quirks;
	int			numslots;	/* Number of present slots */
	int			pm_level;	/* power management level */

	struct ahci_slot	slot[AHCI_MAX_SLOTS];
	union ccb		*hold[AHCI_MAX_SLOTS];
	struct mtx		mtx;		/* state lock */
	int			devices;        /* What is present */
	int			pm_present;	/* PM presence reported */
	int			fbs_enabled;	/* FIS-based switching enabled */
	uint32_t		oslots;		/* Occupied slots */
	uint32_t		rslots;		/* Running slots */
	uint32_t		aslots;		/* Slots with atomic commands  */
	uint32_t		eslots;		/* Slots in error */
	uint32_t		toslots;	/* Slots in timeout */
	int			numrslots;	/* Number of running slots */
	int			numrslotspd[16];/* Number of running slots per dev */
	int			numtslots;	/* Number of tagged slots */
	int			numtslotspd[16];/* Number of tagged slots per dev */
	int			numhslots;	/* Number of held slots */
	int			recoverycmd;	/* Our READ LOG active */
	int			fatalerr;	/* Fatal error happend */
	int			lastslot;	/* Last used slot */
	int			taggedtarget;	/* Last tagged target */
	int			resetting;	/* Hard-reset in progress. */
	int			resetpolldiv;	/* Hard-reset poll divider. */
	int			listening;	/* SUD bit is cleared. */
	int			wrongccs;	/* CCS field in CMD was wrong */
	union ccb		*frozen;	/* Frozen command */
	struct callout		pm_timer;	/* Power management events */
	struct callout		reset_timer;	/* Hard-reset timeout */

	struct ahci_device	user[16];	/* User-specified settings */
	struct ahci_device	curr[16];	/* Current settings */
};

/* structure describing a AHCI controller */
struct ahci_controller {
	device_t		dev;
	int			r_rid;
	struct resource		*r_mem;
	struct rman		sc_iomem;
	struct ahci_controller_irq {
		struct ahci_controller	*ctlr;
		struct resource		*r_irq;
		void			*handle;
		int			r_irq_rid;
		int			mode;
#define	AHCI_IRQ_MODE_ALL	0
#define	AHCI_IRQ_MODE_AFTER	1
#define	AHCI_IRQ_MODE_ONE	2
	} irqs[16];
	uint32_t		caps;		/* Controller capabilities */
	uint32_t		caps2;		/* Controller capabilities */
	uint32_t		capsem;		/* Controller capabilities */
	uint32_t		emloc;		/* EM buffer location */
	int			quirks;
	int			numirqs;
	int			channels;
	int			ichannels;
	int			ccc;		/* CCC timeout */
	int			cccv;		/* CCC vector */
	struct {
		void			(*function)(void *);
		void			*argument;
	} interrupt[AHCI_MAX_PORTS];
	struct mtx		em_mtx;		/* EM access lock */
};

enum ahci_err_type {
	AHCI_ERR_NONE,		/* No error */
	AHCI_ERR_INVALID,	/* Error detected by us before submitting. */
	AHCI_ERR_INNOCENT,	/* Innocent victim. */
	AHCI_ERR_TFE,		/* Task File Error. */
	AHCI_ERR_SATA,		/* SATA error. */
	AHCI_ERR_TIMEOUT,	/* Command execution timeout. */
	AHCI_ERR_NCQ,		/* NCQ command error. CCB should be put on hold
				 * until READ LOG executed to reveal error. */
};

/* macros to hide busspace uglyness */
#define ATA_INB(res, offset) \
	bus_read_1((res), (offset))
#define ATA_INW(res, offset) \
	bus_read_2((res), (offset))
#define ATA_INL(res, offset) \
	bus_read_4((res), (offset))
#define ATA_INSW(res, offset, addr, count) \
	bus_read_multi_2((res), (offset), (addr), (count))
#define ATA_INSW_STRM(res, offset, addr, count) \
	bus_read_multi_stream_2((res), (offset), (addr), (count))
#define ATA_INSL(res, offset, addr, count) \
	bus_read_multi_4((res), (offset), (addr), (count))
#define ATA_INSL_STRM(res, offset, addr, count) \
	bus_read_multi_stream_4((res), (offset), (addr), (count))
#define ATA_OUTB(res, offset, value) \
	bus_write_1((res), (offset), (value))
#define ATA_OUTW(res, offset, value) \
	bus_write_2((res), (offset), (value))
#define ATA_OUTL(res, offset, value) \
	bus_write_4((res), (offset), (value))
#define ATA_OUTSW(res, offset, addr, count) \
	bus_write_multi_2((res), (offset), (addr), (count))
#define ATA_OUTSW_STRM(res, offset, addr, count) \
	bus_write_multi_stream_2((res), (offset), (addr), (count))
#define ATA_OUTSL(res, offset, addr, count) \
	bus_write_multi_4((res), (offset), (addr), (count))
#define ATA_OUTSL_STRM(res, offset, addr, count) \
	bus_write_multi_stream_4((res), (offset), (addr), (count))
-												Separate the parallel scsi knowledge out of the core of the XPT, and
modularize it so that new transports can be created.

Add a transport for SATA

Add a periph+protocol layer for ATA

Add a driver for AHCI-compliant hardware.

Add a maxio field to CAM so that drivers can advertise their max
I/O capability.  Modify various drivers so that they are insulated
from the value of MAXPHYS.

The new ATA/SATA code supports AHCI-compliant hardware, and will override
the classic ATA driver if it is loaded as a module at boot time or compiled
into the kernel.  The stack now support NCQ (tagged queueing) for increased
performance on modern SATA drives.  It also supports port multipliers.

ATA drives are accessed via 'ada' device nodes.  ATAPI drives are
accessed via 'cd' device nodes.  They can all be enumerated and manipulated
via camcontrol, just like SCSI drives.  SCSI commands are not translated to
their ATA equivalents; ATA native commands are used throughout the entire
stack, including camcontrol.  See the camcontrol manpage for further
details.  Testing this code may require that you update your fstab, and
possibly modify your BIOS to enable AHCI functionality, if available.

This code is very experimental at the moment.  The userland ABI/API has
changed, so applications will need to be recompiled.  It may change
further in the near future.  The 'ada' device name may also change as
more infrastructure is completed in this project.  The goal is to
eventually put all CAM busses and devices until newbus, allowing for
interesting topology and management options.

Few functional changes will be seen with existing SCSI/SAS/FC drivers,
though the userland ABI has still changed.  In the future, transports
specific modules for SAS and FC may appear in order to better support
the topologies and capabilities of these technologies.

The modularization of CAM and the addition of the ATA/SATA modules is
meant to break CAM out of the mold of being specific to SCSI, letting it
grow to be a framework for arbitrary transports and protocols.  It also
allows drivers to be written to support discrete hardware without
jeopardizing the stability of non-related hardware.  While only an AHCI
driver is provided now, a Silicon Image driver is also in the works.
Drivers for ICH1-4, ICH5-6, PIIX, classic IDE, and any other hardware
is possible and encouraged.  Help with new transports is also encouraged.

Submitted by:	scottl, mav
Approved by:	re

											
										
										
											2009-07-10 08:18:08 +00:00
+								/*-
 								 * Copyright (c) 1998 - 2008 S<EFBFBD>ren Schmidt <sos@FreeBSD.org>
 								 * Copyright (c) 2009 Alexander Motin <mav@FreeBSD.org>
 								 * All rights reserved.
 								 *
 								 * Redistribution and use in source and binary forms, with or without
 								 * modification, are permitted provided that the following conditions
 								 * are met:
 								 * 1. Redistributions of source code must retain the above copyright
 								 *    notice, this list of conditions and the following disclaimer,
 								 *    without modification, immediately at the beginning of the file.
 								 * 2. Redistributions in binary form must reproduce the above copyright
 								 *    notice, this list of conditions and the following disclaimer in the
 								 *    documentation and/or other materials provided with the distribution.
 								 *
 								 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 								 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 								 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 								 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 								 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 								 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 								 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 								 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 								 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 								 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 								 *
 								 * $FreeBSD$
 								 */
 								/* ATA register defines */
 								#define ATA_DATA                        0       /* (RW) data */
 								#define ATA_FEATURE                     1       /* (W) feature */
 								#define         ATA_F_DMA               0x01    /* enable DMA */
 								#define         ATA_F_OVL               0x02    /* enable overlap */
 								#define ATA_COUNT                       2       /* (W) sector count */
 								#define ATA_SECTOR                      3       /* (RW) sector # */
 								#define ATA_CYL_LSB                     4       /* (RW) cylinder# LSB */
 								#define ATA_CYL_MSB                     5       /* (RW) cylinder# MSB */
 								#define ATA_DRIVE                       6       /* (W) Sector/Drive/Head */
 								#define         ATA_D_LBA               0x40    /* use LBA addressing */
 								#define         ATA_D_IBM               0xa0    /* 512 byte sectors, ECC */
 								#define ATA_COMMAND                     7       /* (W) command */
 								#define ATA_ERROR                       8       /* (R) error */
 								#define         ATA_E_ILI               0x01    /* illegal length */
 								#define         ATA_E_NM                0x02    /* no media */
 								#define         ATA_E_ABORT             0x04    /* command aborted */
 								#define         ATA_E_MCR               0x08    /* media change request */
 								#define         ATA_E_IDNF              0x10    /* ID not found */
 								#define         ATA_E_MC                0x20    /* media changed */
 								#define         ATA_E_UNC               0x40    /* uncorrectable data */
 								#define         ATA_E_ICRC              0x80    /* UDMA crc error */
 								#define		ATA_E_ATAPI_SENSE_MASK	0xf0	/* ATAPI sense key mask */
 								#define ATA_IREASON                     9       /* (R) interrupt reason */
 								#define         ATA_I_CMD               0x01    /* cmd (1) | data (0) */
 								#define         ATA_I_IN                0x02    /* read (1) | write (0) */
 								#define         ATA_I_RELEASE           0x04    /* released bus (1) */
 								#define         ATA_I_TAGMASK           0xf8    /* tag mask */
 								#define ATA_STATUS                      10      /* (R) status */
 								#define ATA_ALTSTAT                     11      /* (R) alternate status */
 								#define         ATA_S_ERROR             0x01    /* error */
 								#define         ATA_S_INDEX             0x02    /* index */
 								#define         ATA_S_CORR              0x04    /* data corrected */
 								#define         ATA_S_DRQ               0x08    /* data request */
 								#define         ATA_S_DSC               0x10    /* drive seek completed */
 								#define         ATA_S_SERVICE           0x10    /* drive needs service */
 								#define         ATA_S_DWF               0x20    /* drive write fault */
 								#define         ATA_S_DMA               0x20    /* DMA ready */
 								#define         ATA_S_READY             0x40    /* drive ready */
 								#define         ATA_S_BUSY              0x80    /* busy */
 								#define ATA_CONTROL                     12      /* (W) control */
 								#define         ATA_A_IDS               0x02    /* disable interrupts */
 								#define         ATA_A_RESET             0x04    /* RESET controller */
 								#define         ATA_A_4BIT              0x08    /* 4 head bits */
 								#define         ATA_A_HOB               0x80    /* High Order Byte enable */
 								/* SATA register defines */
 								#define ATA_SSTATUS                     13
 								#define         ATA_SS_DET_MASK         0x0000000f
 								#define         ATA_SS_DET_NO_DEVICE    0x00000000
 								#define         ATA_SS_DET_DEV_PRESENT  0x00000001
 								#define         ATA_SS_DET_PHY_ONLINE   0x00000003
 								#define         ATA_SS_DET_PHY_OFFLINE  0x00000004
 								#define         ATA_SS_SPD_MASK         0x000000f0
 								#define         ATA_SS_SPD_NO_SPEED     0x00000000
 								#define         ATA_SS_SPD_GEN1         0x00000010
 								#define         ATA_SS_SPD_GEN2         0x00000020
 								#define         ATA_SS_SPD_GEN3         0x00000040
 								#define         ATA_SS_IPM_MASK         0x00000f00
 								#define         ATA_SS_IPM_NO_DEVICE    0x00000000
 								#define         ATA_SS_IPM_ACTIVE       0x00000100
 								#define         ATA_SS_IPM_PARTIAL      0x00000200
 								#define         ATA_SS_IPM_SLUMBER      0x00000600
 								#define ATA_SERROR                      14
 								#define         ATA_SE_DATA_CORRECTED   0x00000001
 								#define         ATA_SE_COMM_CORRECTED   0x00000002
 								#define         ATA_SE_DATA_ERR         0x00000100
 								#define         ATA_SE_COMM_ERR         0x00000200
 								#define         ATA_SE_PROT_ERR         0x00000400
 								#define         ATA_SE_HOST_ERR         0x00000800
 								#define         ATA_SE_PHY_CHANGED      0x00010000
 								#define         ATA_SE_PHY_IERROR       0x00020000
 								#define         ATA_SE_COMM_WAKE        0x00040000
 								#define         ATA_SE_DECODE_ERR       0x00080000
 								#define         ATA_SE_PARITY_ERR       0x00100000
 								#define         ATA_SE_CRC_ERR          0x00200000
 								#define         ATA_SE_HANDSHAKE_ERR    0x00400000
 								#define         ATA_SE_LINKSEQ_ERR      0x00800000
 								#define         ATA_SE_TRANSPORT_ERR    0x01000000
 								#define         ATA_SE_UNKNOWN_FIS      0x02000000
-												Some changes around hot-plug and interface power-management:
 - use ATA_SE_EXCHANGED (SError.DIAG.X) bit to detect hot-plug events when
power-management enabled and ATA_SE_PHY_CHANGED (SError.DIAG.N) can't be
trusted;
 - on controllers supporting staggered spin-up (SS) put unused channels
into Listen state instead of Off. It should still save some power, but
allow plug-in events to be detected;
 - on controllers supporting cold presence detection (CPD), when power
management enabled, use CPD events to detect hot-plug in addition to PHY
events.

											
										
										
											2011-04-15 16:40:31 +00:00
+								#define         ATA_SE_EXCHANGED        0x04000000
-												Separate the parallel scsi knowledge out of the core of the XPT, and
modularize it so that new transports can be created.

Add a transport for SATA

Add a periph+protocol layer for ATA

Add a driver for AHCI-compliant hardware.

Add a maxio field to CAM so that drivers can advertise their max
I/O capability.  Modify various drivers so that they are insulated
from the value of MAXPHYS.

The new ATA/SATA code supports AHCI-compliant hardware, and will override
the classic ATA driver if it is loaded as a module at boot time or compiled
into the kernel.  The stack now support NCQ (tagged queueing) for increased
performance on modern SATA drives.  It also supports port multipliers.

ATA drives are accessed via 'ada' device nodes.  ATAPI drives are
accessed via 'cd' device nodes.  They can all be enumerated and manipulated
via camcontrol, just like SCSI drives.  SCSI commands are not translated to
their ATA equivalents; ATA native commands are used throughout the entire
stack, including camcontrol.  See the camcontrol manpage for further
details.  Testing this code may require that you update your fstab, and
possibly modify your BIOS to enable AHCI functionality, if available.

This code is very experimental at the moment.  The userland ABI/API has
changed, so applications will need to be recompiled.  It may change
further in the near future.  The 'ada' device name may also change as
more infrastructure is completed in this project.  The goal is to
eventually put all CAM busses and devices until newbus, allowing for
interesting topology and management options.

Few functional changes will be seen with existing SCSI/SAS/FC drivers,
though the userland ABI has still changed.  In the future, transports
specific modules for SAS and FC may appear in order to better support
the topologies and capabilities of these technologies.

The modularization of CAM and the addition of the ATA/SATA modules is
meant to break CAM out of the mold of being specific to SCSI, letting it
grow to be a framework for arbitrary transports and protocols.  It also
allows drivers to be written to support discrete hardware without
jeopardizing the stability of non-related hardware.  While only an AHCI
driver is provided now, a Silicon Image driver is also in the works.
Drivers for ICH1-4, ICH5-6, PIIX, classic IDE, and any other hardware
is possible and encouraged.  Help with new transports is also encouraged.

Submitted by:	scottl, mav
Approved by:	re

											
										
										
											2009-07-10 08:18:08 +00:00
 								#define ATA_SCONTROL                    15
 								#define         ATA_SC_DET_MASK         0x0000000f
 								#define         ATA_SC_DET_IDLE         0x00000000
 								#define         ATA_SC_DET_RESET        0x00000001
 								#define         ATA_SC_DET_DISABLE      0x00000004
 								#define         ATA_SC_SPD_MASK         0x000000f0
 								#define         ATA_SC_SPD_NO_SPEED     0x00000000
 								#define         ATA_SC_SPD_SPEED_GEN1   0x00000010
 								#define         ATA_SC_SPD_SPEED_GEN2   0x00000020
 								#define         ATA_SC_SPD_SPEED_GEN3   0x00000040
 								#define         ATA_SC_IPM_MASK         0x00000f00
 								#define         ATA_SC_IPM_NONE         0x00000000
 								#define         ATA_SC_IPM_DIS_PARTIAL  0x00000100
 								#define         ATA_SC_IPM_DIS_SLUMBER  0x00000200
 								#define ATA_SACTIVE                     16
 								#define AHCI_MAX_PORTS			32
 								#define AHCI_MAX_SLOTS			32
 								/* SATA AHCI v1.0 register defines */
 								#define AHCI_CAP                    0x00
 								#define		AHCI_CAP_NPMASK	0x0000001f
 								#define		AHCI_CAP_SXS	0x00000020
 								#define		AHCI_CAP_EMS	0x00000040
 								#define		AHCI_CAP_CCCS	0x00000080
 								#define		AHCI_CAP_NCS	0x00001F00
 								#define		AHCI_CAP_NCS_SHIFT	8
 								#define		AHCI_CAP_PSC	0x00002000
 								#define		AHCI_CAP_SSC	0x00004000
 								#define		AHCI_CAP_PMD	0x00008000
 								#define		AHCI_CAP_FBSS	0x00010000
 								#define		AHCI_CAP_SPM	0x00020000
 								#define		AHCI_CAP_SAM	0x00080000
 								#define		AHCI_CAP_ISS	0x00F00000
 								#define		AHCI_CAP_ISS_SHIFT	20
 								#define		AHCI_CAP_SCLO	0x01000000
 								#define		AHCI_CAP_SAL	0x02000000
 								#define		AHCI_CAP_SALP	0x04000000
 								#define		AHCI_CAP_SSS	0x08000000
 								#define		AHCI_CAP_SMPS	0x10000000
 								#define		AHCI_CAP_SSNTF	0x20000000
 								#define		AHCI_CAP_SNCQ	0x40000000
 								#define		AHCI_CAP_64BIT	0x80000000
 								#define AHCI_GHC                    0x04
 								#define         AHCI_GHC_AE         0x80000000
 								#define         AHCI_GHC_MRSM       0x00000004
 								#define         AHCI_GHC_IE         0x00000002
 								#define         AHCI_GHC_HR         0x00000001
 								#define AHCI_IS                     0x08
 								#define AHCI_PI                     0x0c
 								#define AHCI_VS                     0x10
-												MFp4:
 - Add Command Completion Coalescing support.
 - Add SNTF support.
 - Add two more power management modes (4, 5), implemented on driver level.
 - Fix interface mode setting.
 - Reduce interface reset time.
 - Do not report meaningless protocol/transport versions.
 - Report CAP2 register content.
 - Some performance optimizations.

											
										
										
											2009-08-30 15:20:13 +00:00
+								#define AHCI_CCCC                   0x14
 								#define		AHCI_CCCC_TV_MASK	0xffff0000
 								#define		AHCI_CCCC_TV_SHIFT	16
 								#define		AHCI_CCCC_CC_MASK	0x0000ff00
 								#define		AHCI_CCCC_CC_SHIFT	8
 								#define		AHCI_CCCC_INT_MASK	0x000000f8
 								#define		AHCI_CCCC_INT_SHIFT	3
 								#define		AHCI_CCCC_EN		0x00000001
 								#define AHCI_CCCP                   0x18
-												MFp4: Large set of CAM inprovements.

- Unify bus reset/probe sequence. Whenever bus attached at boot or later,
CAM will automatically reset and scan it. It allows to remove duplicate
code from many drivers.
- Any bus, attached before CAM completed it's boot-time initialization,
will equally join to the process, delaying boot if needed.
- New kern.cam.boot_delay loader tunable should help controllers that
are still unable to register their buses in time (such as slow USB/
PCCard/ CardBus devices), by adding one more event to wait on boot.
- To allow synchronization between different CAM levels, concept of
requests priorities was extended. Priorities now split between several
"run levels". Device can be freezed at specified level, allowing higher
priority requests to pass. For example, no payload requests allowed,
until PMP driver enable port. ATA XPT negotiate transfer parameters,
periph driver configure caching and so on.
- Frozen requests are no more counted by request allocation scheduler.
It fixes deadlocks, when frozen low priority payload requests occupying
slots, required by higher levels to manage theit execution.
- Two last changes were holding proper ATA reinitialization and error
recovery implementation. Now it is done: SATA controllers and Port
Multipliers now implement automatic hot-plug and should correctly
recover from timeouts and bus resets.
- Improve SCSI error recovery for devices on buses without automatic sense
reporting, such as ATAPI or USB. For example, it allows CAM to wait, while
CD drive loads disk, instead of immediately return error status.
- Decapitalize diagnostic messages and make them more readable and sensible.
- Teach PMP driver to limit maximum speed on fan-out ports.
- Make boot wait for PMP scan completes, and make rescan more reliable.
- Fix pass driver, to return CCB to user level in case of error.
- Increase number of retries in cd driver, as device may return several UAs.

											
										
										
											2010-01-28 08:41:30 +00:00
+								#define AHCI_EM_LOC                 0x1C
 								#define AHCI_EM_CTL                 0x20
 								#define 	AHCI_EM_MR              0x00000001
 								#define 	AHCI_EM_TM              0x00000100
 								#define 	AHCI_EM_RST             0x00000200
 								#define 	AHCI_EM_LED             0x00010000
 								#define 	AHCI_EM_SAFTE           0x00020000
 								#define 	AHCI_EM_SES2            0x00040000
 								#define 	AHCI_EM_SGPIO           0x00080000
 								#define 	AHCI_EM_SMB             0x01000000
 								#define 	AHCI_EM_XMT             0x02000000
 								#define 	AHCI_EM_ALHD            0x04000000
 								#define 	AHCI_EM_PM              0x08000000
-												MFp4:
 - Add Command Completion Coalescing support.
 - Add SNTF support.
 - Add two more power management modes (4, 5), implemented on driver level.
 - Fix interface mode setting.
 - Reduce interface reset time.
 - Do not report meaningless protocol/transport versions.
 - Report CAP2 register content.
 - Some performance optimizations.

											
										
										
											2009-08-30 15:20:13 +00:00
+								#define AHCI_CAP2                   0x24
 								#define		AHCI_CAP2_BOH	0x00000001
 								#define		AHCI_CAP2_NVMP	0x00000002
 								#define		AHCI_CAP2_APST	0x00000004
-												Separate the parallel scsi knowledge out of the core of the XPT, and
modularize it so that new transports can be created.

Add a transport for SATA

Add a periph+protocol layer for ATA

Add a driver for AHCI-compliant hardware.

Add a maxio field to CAM so that drivers can advertise their max
I/O capability.  Modify various drivers so that they are insulated
from the value of MAXPHYS.

The new ATA/SATA code supports AHCI-compliant hardware, and will override
the classic ATA driver if it is loaded as a module at boot time or compiled
into the kernel.  The stack now support NCQ (tagged queueing) for increased
performance on modern SATA drives.  It also supports port multipliers.

ATA drives are accessed via 'ada' device nodes.  ATAPI drives are
accessed via 'cd' device nodes.  They can all be enumerated and manipulated
via camcontrol, just like SCSI drives.  SCSI commands are not translated to
their ATA equivalents; ATA native commands are used throughout the entire
stack, including camcontrol.  See the camcontrol manpage for further
details.  Testing this code may require that you update your fstab, and
possibly modify your BIOS to enable AHCI functionality, if available.

This code is very experimental at the moment.  The userland ABI/API has
changed, so applications will need to be recompiled.  It may change
further in the near future.  The 'ada' device name may also change as
more infrastructure is completed in this project.  The goal is to
eventually put all CAM busses and devices until newbus, allowing for
interesting topology and management options.

Few functional changes will be seen with existing SCSI/SAS/FC drivers,
though the userland ABI has still changed.  In the future, transports
specific modules for SAS and FC may appear in order to better support
the topologies and capabilities of these technologies.

The modularization of CAM and the addition of the ATA/SATA modules is
meant to break CAM out of the mold of being specific to SCSI, letting it
grow to be a framework for arbitrary transports and protocols.  It also
allows drivers to be written to support discrete hardware without
jeopardizing the stability of non-related hardware.  While only an AHCI
driver is provided now, a Silicon Image driver is also in the works.
Drivers for ICH1-4, ICH5-6, PIIX, classic IDE, and any other hardware
is possible and encouraged.  Help with new transports is also encouraged.

Submitted by:	scottl, mav
Approved by:	re

											
										
										
											2009-07-10 08:18:08 +00:00
+								#define AHCI_OFFSET                 0x100
 								#define AHCI_STEP                   0x80
 								#define AHCI_P_CLB                  0x00
 								#define AHCI_P_CLBU                 0x04
 								#define AHCI_P_FB                   0x08
 								#define AHCI_P_FBU                  0x0c
 								#define AHCI_P_IS                   0x10
 								#define AHCI_P_IE                   0x14
 								#define         AHCI_P_IX_DHR       0x00000001
 								#define         AHCI_P_IX_PS        0x00000002
 								#define         AHCI_P_IX_DS        0x00000004
 								#define         AHCI_P_IX_SDB       0x00000008
 								#define         AHCI_P_IX_UF        0x00000010
 								#define         AHCI_P_IX_DP        0x00000020
 								#define         AHCI_P_IX_PC        0x00000040
-												Some changes around hot-plug and interface power-management:
 - use ATA_SE_EXCHANGED (SError.DIAG.X) bit to detect hot-plug events when
power-management enabled and ATA_SE_PHY_CHANGED (SError.DIAG.N) can't be
trusted;
 - on controllers supporting staggered spin-up (SS) put unused channels
into Listen state instead of Off. It should still save some power, but
allow plug-in events to be detected;
 - on controllers supporting cold presence detection (CPD), when power
management enabled, use CPD events to detect hot-plug in addition to PHY
events.

											
										
										
											2011-04-15 16:40:31 +00:00
+								#define         AHCI_P_IX_MP        0x00000080
-												Separate the parallel scsi knowledge out of the core of the XPT, and
modularize it so that new transports can be created.

Add a transport for SATA

Add a periph+protocol layer for ATA

Add a driver for AHCI-compliant hardware.

Add a maxio field to CAM so that drivers can advertise their max
I/O capability.  Modify various drivers so that they are insulated
from the value of MAXPHYS.

The new ATA/SATA code supports AHCI-compliant hardware, and will override
the classic ATA driver if it is loaded as a module at boot time or compiled
into the kernel.  The stack now support NCQ (tagged queueing) for increased
performance on modern SATA drives.  It also supports port multipliers.

ATA drives are accessed via 'ada' device nodes.  ATAPI drives are
accessed via 'cd' device nodes.  They can all be enumerated and manipulated
via camcontrol, just like SCSI drives.  SCSI commands are not translated to
their ATA equivalents; ATA native commands are used throughout the entire
stack, including camcontrol.  See the camcontrol manpage for further
details.  Testing this code may require that you update your fstab, and
possibly modify your BIOS to enable AHCI functionality, if available.

This code is very experimental at the moment.  The userland ABI/API has
changed, so applications will need to be recompiled.  It may change
further in the near future.  The 'ada' device name may also change as
more infrastructure is completed in this project.  The goal is to
eventually put all CAM busses and devices until newbus, allowing for
interesting topology and management options.

Few functional changes will be seen with existing SCSI/SAS/FC drivers,
though the userland ABI has still changed.  In the future, transports
specific modules for SAS and FC may appear in order to better support
the topologies and capabilities of these technologies.

The modularization of CAM and the addition of the ATA/SATA modules is
meant to break CAM out of the mold of being specific to SCSI, letting it
grow to be a framework for arbitrary transports and protocols.  It also
allows drivers to be written to support discrete hardware without
jeopardizing the stability of non-related hardware.  While only an AHCI
driver is provided now, a Silicon Image driver is also in the works.
Drivers for ICH1-4, ICH5-6, PIIX, classic IDE, and any other hardware
is possible and encouraged.  Help with new transports is also encouraged.

Submitted by:	scottl, mav
Approved by:	re

											
										
										
											2009-07-10 08:18:08 +00:00
 								#define         AHCI_P_IX_PRC       0x00400000
 								#define         AHCI_P_IX_IPM       0x00800000
 								#define         AHCI_P_IX_OF        0x01000000
 								#define         AHCI_P_IX_INF       0x04000000
 								#define         AHCI_P_IX_IF        0x08000000
 								#define         AHCI_P_IX_HBD       0x10000000
 								#define         AHCI_P_IX_HBF       0x20000000
 								#define         AHCI_P_IX_TFE       0x40000000
 								#define         AHCI_P_IX_CPD       0x80000000
 								#define AHCI_P_CMD                  0x18
 								#define         AHCI_P_CMD_ST       0x00000001
 								#define         AHCI_P_CMD_SUD      0x00000002
 								#define         AHCI_P_CMD_POD      0x00000004
 								#define         AHCI_P_CMD_CLO      0x00000008
 								#define         AHCI_P_CMD_FRE      0x00000010
 								#define         AHCI_P_CMD_CCS_MASK 0x00001f00
 								#define         AHCI_P_CMD_CCS_SHIFT 8
 								#define         AHCI_P_CMD_ISS      0x00002000
 								#define         AHCI_P_CMD_FR       0x00004000
 								#define         AHCI_P_CMD_CR       0x00008000
 								#define         AHCI_P_CMD_CPS      0x00010000
 								#define         AHCI_P_CMD_PMA      0x00020000
 								#define         AHCI_P_CMD_HPCP     0x00040000
-												Add FIS-based switching support. If controller supports FBS, it allows
several devices beyond Port Multiplier to work simultaneously, substantially
increasing performance.

											
										
										
											2010-01-28 17:54:47 +00:00
+								#define         AHCI_P_CMD_MPSP     0x00080000
-												Separate the parallel scsi knowledge out of the core of the XPT, and
modularize it so that new transports can be created.

Add a transport for SATA

Add a periph+protocol layer for ATA

Add a driver for AHCI-compliant hardware.

Add a maxio field to CAM so that drivers can advertise their max
I/O capability.  Modify various drivers so that they are insulated
from the value of MAXPHYS.

The new ATA/SATA code supports AHCI-compliant hardware, and will override
the classic ATA driver if it is loaded as a module at boot time or compiled
into the kernel.  The stack now support NCQ (tagged queueing) for increased
performance on modern SATA drives.  It also supports port multipliers.

ATA drives are accessed via 'ada' device nodes.  ATAPI drives are
accessed via 'cd' device nodes.  They can all be enumerated and manipulated
via camcontrol, just like SCSI drives.  SCSI commands are not translated to
their ATA equivalents; ATA native commands are used throughout the entire
stack, including camcontrol.  See the camcontrol manpage for further
details.  Testing this code may require that you update your fstab, and
possibly modify your BIOS to enable AHCI functionality, if available.

This code is very experimental at the moment.  The userland ABI/API has
changed, so applications will need to be recompiled.  It may change
further in the near future.  The 'ada' device name may also change as
more infrastructure is completed in this project.  The goal is to
eventually put all CAM busses and devices until newbus, allowing for
interesting topology and management options.

Few functional changes will be seen with existing SCSI/SAS/FC drivers,
though the userland ABI has still changed.  In the future, transports
specific modules for SAS and FC may appear in order to better support
the topologies and capabilities of these technologies.

The modularization of CAM and the addition of the ATA/SATA modules is
meant to break CAM out of the mold of being specific to SCSI, letting it
grow to be a framework for arbitrary transports and protocols.  It also
allows drivers to be written to support discrete hardware without
jeopardizing the stability of non-related hardware.  While only an AHCI
driver is provided now, a Silicon Image driver is also in the works.
Drivers for ICH1-4, ICH5-6, PIIX, classic IDE, and any other hardware
is possible and encouraged.  Help with new transports is also encouraged.

Submitted by:	scottl, mav
Approved by:	re

											
										
										
											2009-07-10 08:18:08 +00:00
+								#define         AHCI_P_CMD_CPD      0x00100000
-												Add FIS-based switching support. If controller supports FBS, it allows
several devices beyond Port Multiplier to work simultaneously, substantially
increasing performance.

											
										
										
											2010-01-28 17:54:47 +00:00
+								#define         AHCI_P_CMD_ESP      0x00200000
 								#define         AHCI_P_CMD_FBSCP    0x00400000
 								#define         AHCI_P_CMD_APSTE    0x00800000
-												Separate the parallel scsi knowledge out of the core of the XPT, and
modularize it so that new transports can be created.

Add a transport for SATA

Add a periph+protocol layer for ATA

Add a driver for AHCI-compliant hardware.

Add a maxio field to CAM so that drivers can advertise their max
I/O capability.  Modify various drivers so that they are insulated
from the value of MAXPHYS.

The new ATA/SATA code supports AHCI-compliant hardware, and will override
the classic ATA driver if it is loaded as a module at boot time or compiled
into the kernel.  The stack now support NCQ (tagged queueing) for increased
performance on modern SATA drives.  It also supports port multipliers.

ATA drives are accessed via 'ada' device nodes.  ATAPI drives are
accessed via 'cd' device nodes.  They can all be enumerated and manipulated
via camcontrol, just like SCSI drives.  SCSI commands are not translated to
their ATA equivalents; ATA native commands are used throughout the entire
stack, including camcontrol.  See the camcontrol manpage for further
details.  Testing this code may require that you update your fstab, and
possibly modify your BIOS to enable AHCI functionality, if available.

This code is very experimental at the moment.  The userland ABI/API has
changed, so applications will need to be recompiled.  It may change
further in the near future.  The 'ada' device name may also change as
more infrastructure is completed in this project.  The goal is to
eventually put all CAM busses and devices until newbus, allowing for
interesting topology and management options.

Few functional changes will be seen with existing SCSI/SAS/FC drivers,
though the userland ABI has still changed.  In the future, transports
specific modules for SAS and FC may appear in order to better support
the topologies and capabilities of these technologies.

The modularization of CAM and the addition of the ATA/SATA modules is
meant to break CAM out of the mold of being specific to SCSI, letting it
grow to be a framework for arbitrary transports and protocols.  It also
allows drivers to be written to support discrete hardware without
jeopardizing the stability of non-related hardware.  While only an AHCI
driver is provided now, a Silicon Image driver is also in the works.
Drivers for ICH1-4, ICH5-6, PIIX, classic IDE, and any other hardware
is possible and encouraged.  Help with new transports is also encouraged.

Submitted by:	scottl, mav
Approved by:	re

											
										
										
											2009-07-10 08:18:08 +00:00
+								#define         AHCI_P_CMD_ATAPI    0x01000000
 								#define         AHCI_P_CMD_DLAE     0x02000000
 								#define         AHCI_P_CMD_ALPE     0x04000000
 								#define         AHCI_P_CMD_ASP      0x08000000
 								#define         AHCI_P_CMD_ICC_MASK 0xf0000000
 								#define         AHCI_P_CMD_NOOP     0x00000000
 								#define         AHCI_P_CMD_ACTIVE   0x10000000
 								#define         AHCI_P_CMD_PARTIAL  0x20000000
 								#define         AHCI_P_CMD_SLUMBER  0x60000000
 								#define AHCI_P_TFD                  0x20
 								#define AHCI_P_SIG                  0x24
 								#define AHCI_P_SSTS                 0x28
 								#define AHCI_P_SCTL                 0x2c
 								#define AHCI_P_SERR                 0x30
 								#define AHCI_P_SACT                 0x34
 								#define AHCI_P_CI                   0x38
 								#define AHCI_P_SNTF                 0x3C
 								#define AHCI_P_FBS                  0x40
-												Add FIS-based switching support. If controller supports FBS, it allows
several devices beyond Port Multiplier to work simultaneously, substantially
increasing performance.

											
										
										
											2010-01-28 17:54:47 +00:00
+								#define 	AHCI_P_FBS_EN       0x00000001
 								#define 	AHCI_P_FBS_DEC      0x00000002
 								#define 	AHCI_P_FBS_SDE      0x00000004
 								#define 	AHCI_P_FBS_DEV      0x00000f00
 								#define 	AHCI_P_FBS_DEV_SHIFT 8
 								#define 	AHCI_P_FBS_ADO      0x0000f000
 								#define 	AHCI_P_FBS_ADO_SHIFT 12
 								#define 	AHCI_P_FBS_DWE      0x000f0000
 								#define 	AHCI_P_FBS_DWE_SHIFT 16
-												Separate the parallel scsi knowledge out of the core of the XPT, and
modularize it so that new transports can be created.

Add a transport for SATA

Add a periph+protocol layer for ATA

Add a driver for AHCI-compliant hardware.

Add a maxio field to CAM so that drivers can advertise their max
I/O capability.  Modify various drivers so that they are insulated
from the value of MAXPHYS.

The new ATA/SATA code supports AHCI-compliant hardware, and will override
the classic ATA driver if it is loaded as a module at boot time or compiled
into the kernel.  The stack now support NCQ (tagged queueing) for increased
performance on modern SATA drives.  It also supports port multipliers.

ATA drives are accessed via 'ada' device nodes.  ATAPI drives are
accessed via 'cd' device nodes.  They can all be enumerated and manipulated
via camcontrol, just like SCSI drives.  SCSI commands are not translated to
their ATA equivalents; ATA native commands are used throughout the entire
stack, including camcontrol.  See the camcontrol manpage for further
details.  Testing this code may require that you update your fstab, and
possibly modify your BIOS to enable AHCI functionality, if available.

This code is very experimental at the moment.  The userland ABI/API has
changed, so applications will need to be recompiled.  It may change
further in the near future.  The 'ada' device name may also change as
more infrastructure is completed in this project.  The goal is to
eventually put all CAM busses and devices until newbus, allowing for
interesting topology and management options.

Few functional changes will be seen with existing SCSI/SAS/FC drivers,
though the userland ABI has still changed.  In the future, transports
specific modules for SAS and FC may appear in order to better support
the topologies and capabilities of these technologies.

The modularization of CAM and the addition of the ATA/SATA modules is
meant to break CAM out of the mold of being specific to SCSI, letting it
grow to be a framework for arbitrary transports and protocols.  It also
allows drivers to be written to support discrete hardware without
jeopardizing the stability of non-related hardware.  While only an AHCI
driver is provided now, a Silicon Image driver is also in the works.
Drivers for ICH1-4, ICH5-6, PIIX, classic IDE, and any other hardware
is possible and encouraged.  Help with new transports is also encouraged.

Submitted by:	scottl, mav
Approved by:	re

											
										
										
											2009-07-10 08:18:08 +00:00
 								/* Just to be sure, if building as module. */
 								#if MAXPHYS < 512 * 1024
 								#undef MAXPHYS
 								#define MAXPHYS				512 * 1024
 								#endif
 								/* Pessimistic prognosis on number of required S/G entries */
 								#define AHCI_SG_ENTRIES	(roundup(btoc(MAXPHYS) + 1, 8))
 								/* Command list. 32 commands. First, 1Kbyte aligned. */
 								#define AHCI_CL_OFFSET              0
 								#define AHCI_CL_SIZE                32
 								/* Command tables. Up to 32 commands, Each, 128byte aligned. */
 								#define AHCI_CT_OFFSET              (AHCI_CL_OFFSET + AHCI_CL_SIZE * AHCI_MAX_SLOTS)
 								#define AHCI_CT_SIZE                (128 + AHCI_SG_ENTRIES * 16)
 								/* Total main work area. */
 								#define AHCI_WORK_SIZE              (AHCI_CT_OFFSET + AHCI_CT_SIZE * ch->numslots)
 								struct ahci_dma_prd {
 								    u_int64_t                   dba;
 								    u_int32_t                   reserved;
 								    u_int32_t                   dbc;            /* 0 based */
 								#define AHCI_PRD_MASK		0x003fffff      /* max 4MB */
 								#define AHCI_PRD_MAX		(AHCI_PRD_MASK + 1)
 								#define AHCI_PRD_IPC		(1 << 31)
 								} __packed;
 								struct ahci_cmd_tab {
 								    u_int8_t                    cfis[64];
 								    u_int8_t                    acmd[32];
 								    u_int8_t                    reserved[32];
 								    struct ahci_dma_prd         prd_tab[AHCI_SG_ENTRIES];
 								} __packed;
 								struct ahci_cmd_list {
 								    u_int16_t                   cmd_flags;
 								#define AHCI_CMD_ATAPI		0x0020
 								#define AHCI_CMD_WRITE		0x0040
 								#define AHCI_CMD_PREFETCH		0x0080
 								#define AHCI_CMD_RESET		0x0100
 								#define AHCI_CMD_BIST		0x0200
 								#define AHCI_CMD_CLR_BUSY		0x0400
 								    u_int16_t                   prd_length;     /* PRD entries */
 								    u_int32_t                   bytecount;
 								    u_int64_t                   cmd_table_phys; /* 128byte aligned */
 								} __packed;
 								/* misc defines */
 								#define ATA_IRQ_RID                     0
 								#define ATA_INTR_FLAGS                  (INTR_MPSAFE|INTR_TYPE_BIO|INTR_ENTROPY)
 								struct ata_dmaslot {
 								    bus_dmamap_t                data_map;       /* data DMA map */
 								    int				nsegs;		/* Number of segs loaded */
 								};
 								/* structure holding DMA related information */
 								struct ata_dma {
 								    bus_dma_tag_t               work_tag;       /* workspace DMA tag */
 								    bus_dmamap_t                work_map;       /* workspace DMA map */
 								    uint8_t                     *work;          /* workspace */
 								    bus_addr_t                  work_bus;       /* bus address of work */
 								    bus_dma_tag_t               rfis_tag;       /* RFIS list DMA tag */
 								    bus_dmamap_t                rfis_map;       /* RFIS list DMA map */
 								    uint8_t                     *rfis;          /* FIS receive area */
 								    bus_addr_t                  rfis_bus;       /* bus address of rfis */
 								    bus_dma_tag_t               data_tag;       /* data DMA tag */
 								    u_int64_t                   max_address;    /* highest DMA'able address */
 								};
 								enum ahci_slot_states {
 									AHCI_SLOT_EMPTY,
 									AHCI_SLOT_LOADING,
 									AHCI_SLOT_RUNNING,
-												MFp4:
On error, freeze device queue, to allow periph driver to do proper recovery.
Freeze SIM queue only in some cases, when it is needed to protect SIM.

Implement better command timeout detection logic for non-queued commands.
This fixes false positives when command with short timeout waiting for the
long one. For example, when hald tastes CD during burning process.

Read and clear SERR register on interrupt.

											
										
										
											2009-10-21 12:42:25 +00:00
+									AHCI_SLOT_EXECUTING
-												Separate the parallel scsi knowledge out of the core of the XPT, and
modularize it so that new transports can be created.

Add a transport for SATA

Add a periph+protocol layer for ATA

Add a driver for AHCI-compliant hardware.

Add a maxio field to CAM so that drivers can advertise their max
I/O capability.  Modify various drivers so that they are insulated
from the value of MAXPHYS.

The new ATA/SATA code supports AHCI-compliant hardware, and will override
the classic ATA driver if it is loaded as a module at boot time or compiled
into the kernel.  The stack now support NCQ (tagged queueing) for increased
performance on modern SATA drives.  It also supports port multipliers.

ATA drives are accessed via 'ada' device nodes.  ATAPI drives are
accessed via 'cd' device nodes.  They can all be enumerated and manipulated
via camcontrol, just like SCSI drives.  SCSI commands are not translated to
their ATA equivalents; ATA native commands are used throughout the entire
stack, including camcontrol.  See the camcontrol manpage for further
details.  Testing this code may require that you update your fstab, and
possibly modify your BIOS to enable AHCI functionality, if available.

This code is very experimental at the moment.  The userland ABI/API has
changed, so applications will need to be recompiled.  It may change
further in the near future.  The 'ada' device name may also change as
more infrastructure is completed in this project.  The goal is to
eventually put all CAM busses and devices until newbus, allowing for
interesting topology and management options.

Few functional changes will be seen with existing SCSI/SAS/FC drivers,
though the userland ABI has still changed.  In the future, transports
specific modules for SAS and FC may appear in order to better support
the topologies and capabilities of these technologies.

The modularization of CAM and the addition of the ATA/SATA modules is
meant to break CAM out of the mold of being specific to SCSI, letting it
grow to be a framework for arbitrary transports and protocols.  It also
allows drivers to be written to support discrete hardware without
jeopardizing the stability of non-related hardware.  While only an AHCI
driver is provided now, a Silicon Image driver is also in the works.
Drivers for ICH1-4, ICH5-6, PIIX, classic IDE, and any other hardware
is possible and encouraged.  Help with new transports is also encouraged.

Submitted by:	scottl, mav
Approved by:	re

											
										
										
											2009-07-10 08:18:08 +00:00
+								};
 								struct ahci_slot {
 								    device_t                    dev;            /* Device handle */
 								    u_int8_t			slot;           /* Number of this slot */
 								    enum ahci_slot_states	state;          /* Slot state */
 								    union ccb			*ccb;		/* CCB occupying slot */
 								    struct ata_dmaslot          dma;            /* DMA data of this slot */
 								    struct callout              timeout;        /* Execution timeout */
 								};
-												MFp4:
- Extend XPT-SIM transfer settings control API. Now it allows to report to
SATA SIM number of tags supported by each device, implement ATA mode and
SATA revision negotiation for both SATA and PATA SIMs.
- Make ahci(4) and siis(4) to use submitted maximum tag number, when
scheduling requests. It allows to support NCQ on devices with lower tags
count then controller supports.
- Make PMP driver to report attached devices connection speeds.
- Implement ATA mode negotiation between user settings, device and
controller capabilities.

											
										
										
											2009-11-24 12:47:58 +00:00
+								struct ahci_device {
-												MFp4:
Improve ATA mode/SATA revision control.

											
										
										
											2009-11-26 08:49:46 +00:00
+									int			revision;
-												MFp4:
- Extend XPT-SIM transfer settings control API. Now it allows to report to
SATA SIM number of tags supported by each device, implement ATA mode and
SATA revision negotiation for both SATA and PATA SIMs.
- Make ahci(4) and siis(4) to use submitted maximum tag number, when
scheduling requests. It allows to support NCQ on devices with lower tags
count then controller supports.
- Make PMP driver to report attached devices connection speeds.
- Implement ATA mode negotiation between user settings, device and
controller capabilities.

											
										
										
											2009-11-24 12:47:58 +00:00
+									int			mode;
 									u_int			bytecount;
-												- Give ATA/SATA SIMs info about ATAPI packet size, supported by device.
- Make ATA XPT to reject longer SCSI CDBs then supported by device, or
any SCSI CDBs, if device doesn't support ATAPI.

											
										
										
											2010-02-02 11:09:28 +00:00
+									u_int			atapi;
-												MFp4:
- Extend XPT-SIM transfer settings control API. Now it allows to report to
SATA SIM number of tags supported by each device, implement ATA mode and
SATA revision negotiation for both SATA and PATA SIMs.
- Make ahci(4) and siis(4) to use submitted maximum tag number, when
scheduling requests. It allows to support NCQ on devices with lower tags
count then controller supports.
- Make PMP driver to report attached devices connection speeds.
- Implement ATA mode negotiation between user settings, device and
controller capabilities.

											
										
										
											2009-11-24 12:47:58 +00:00
+									u_int			tags;
-												Make SATA XPT negotiate and enable some additional SATA features, such as:
 - device initiated power management (some devices support only this way);
 - Automatic Partial to Slumber Transition (more power saving);
 - DMA auto-activation (expected to slightly improve performance).
More features could be added later, when hardware supports.

											
										
										
											2010-05-02 12:07:47 +00:00
+									u_int			caps;
-												MFp4:
- Extend XPT-SIM transfer settings control API. Now it allows to report to
SATA SIM number of tags supported by each device, implement ATA mode and
SATA revision negotiation for both SATA and PATA SIMs.
- Make ahci(4) and siis(4) to use submitted maximum tag number, when
scheduling requests. It allows to support NCQ on devices with lower tags
count then controller supports.
- Make PMP driver to report attached devices connection speeds.
- Implement ATA mode negotiation between user settings, device and
controller capabilities.

											
										
										
											2009-11-24 12:47:58 +00:00
+								};
-												Add support for "LED" enclosure management messages, defined by the AHCI.

When supported by hardware, this allows to control per-port activity, locate
and fault LEDs via the led(4) API for localization and status reporting
purposes. Supporting AHCI controllers may transmit that information to the
backplane controllers via SGPIO interface. Backplane controllers interpret
received statuses in some way (IBPI standard) to report them using present
indicators.

											
										
										
											2011-05-17 22:07:45 +00:00
+								struct ahci_led {
 									device_t		dev;		/* Device handle */
 									struct cdev		*led;
 									uint8_t			num;		/* Number of this led */
 									uint8_t			state;		/* State of this led */
 								};
 								#define	AHCI_NUM_LEDS		3
-												Separate the parallel scsi knowledge out of the core of the XPT, and
modularize it so that new transports can be created.

Add a transport for SATA

Add a periph+protocol layer for ATA

Add a driver for AHCI-compliant hardware.

Add a maxio field to CAM so that drivers can advertise their max
I/O capability.  Modify various drivers so that they are insulated
from the value of MAXPHYS.

The new ATA/SATA code supports AHCI-compliant hardware, and will override
the classic ATA driver if it is loaded as a module at boot time or compiled
into the kernel.  The stack now support NCQ (tagged queueing) for increased
performance on modern SATA drives.  It also supports port multipliers.

ATA drives are accessed via 'ada' device nodes.  ATAPI drives are
accessed via 'cd' device nodes.  They can all be enumerated and manipulated
via camcontrol, just like SCSI drives.  SCSI commands are not translated to
their ATA equivalents; ATA native commands are used throughout the entire
stack, including camcontrol.  See the camcontrol manpage for further
details.  Testing this code may require that you update your fstab, and
possibly modify your BIOS to enable AHCI functionality, if available.

This code is very experimental at the moment.  The userland ABI/API has
changed, so applications will need to be recompiled.  It may change
further in the near future.  The 'ada' device name may also change as
more infrastructure is completed in this project.  The goal is to
eventually put all CAM busses and devices until newbus, allowing for
interesting topology and management options.

Few functional changes will be seen with existing SCSI/SAS/FC drivers,
though the userland ABI has still changed.  In the future, transports
specific modules for SAS and FC may appear in order to better support
the topologies and capabilities of these technologies.

The modularization of CAM and the addition of the ATA/SATA modules is
meant to break CAM out of the mold of being specific to SCSI, letting it
grow to be a framework for arbitrary transports and protocols.  It also
allows drivers to be written to support discrete hardware without
jeopardizing the stability of non-related hardware.  While only an AHCI
driver is provided now, a Silicon Image driver is also in the works.
Drivers for ICH1-4, ICH5-6, PIIX, classic IDE, and any other hardware
is possible and encouraged.  Help with new transports is also encouraged.

Submitted by:	scottl, mav
Approved by:	re

											
										
										
											2009-07-10 08:18:08 +00:00
+								/* structure describing an ATA channel */
 								struct ahci_channel {
 									device_t		dev;            /* Device handle */
 									int			unit;           /* Physical channel */
 									struct resource		*r_mem;		/* Memory of this channel */
 									struct resource		*r_irq;         /* Interrupt of this channel */
 									void			*ih;            /* Interrupt handle */
 									struct ata_dma		dma;            /* DMA data */
 									struct cam_sim		*sim;
 									struct cam_path		*path;
-												Add support for "LED" enclosure management messages, defined by the AHCI.

When supported by hardware, this allows to control per-port activity, locate
and fault LEDs via the led(4) API for localization and status reporting
purposes. Supporting AHCI controllers may transmit that information to the
backplane controllers via SGPIO interface. Backplane controllers interpret
received statuses in some way (IBPI standard) to report them using present
indicators.

											
										
										
											2011-05-17 22:07:45 +00:00
+									struct ahci_led		leds[3];
-												Separate the parallel scsi knowledge out of the core of the XPT, and
modularize it so that new transports can be created.

Add a transport for SATA

Add a periph+protocol layer for ATA

Add a driver for AHCI-compliant hardware.

Add a maxio field to CAM so that drivers can advertise their max
I/O capability.  Modify various drivers so that they are insulated
from the value of MAXPHYS.

The new ATA/SATA code supports AHCI-compliant hardware, and will override
the classic ATA driver if it is loaded as a module at boot time or compiled
into the kernel.  The stack now support NCQ (tagged queueing) for increased
performance on modern SATA drives.  It also supports port multipliers.

ATA drives are accessed via 'ada' device nodes.  ATAPI drives are
accessed via 'cd' device nodes.  They can all be enumerated and manipulated
via camcontrol, just like SCSI drives.  SCSI commands are not translated to
their ATA equivalents; ATA native commands are used throughout the entire
stack, including camcontrol.  See the camcontrol manpage for further
details.  Testing this code may require that you update your fstab, and
possibly modify your BIOS to enable AHCI functionality, if available.

This code is very experimental at the moment.  The userland ABI/API has
changed, so applications will need to be recompiled.  It may change
further in the near future.  The 'ada' device name may also change as
more infrastructure is completed in this project.  The goal is to
eventually put all CAM busses and devices until newbus, allowing for
interesting topology and management options.

Few functional changes will be seen with existing SCSI/SAS/FC drivers,
though the userland ABI has still changed.  In the future, transports
specific modules for SAS and FC may appear in order to better support
the topologies and capabilities of these technologies.

The modularization of CAM and the addition of the ATA/SATA modules is
meant to break CAM out of the mold of being specific to SCSI, letting it
grow to be a framework for arbitrary transports and protocols.  It also
allows drivers to be written to support discrete hardware without
jeopardizing the stability of non-related hardware.  While only an AHCI
driver is provided now, a Silicon Image driver is also in the works.
Drivers for ICH1-4, ICH5-6, PIIX, classic IDE, and any other hardware
is possible and encouraged.  Help with new transports is also encouraged.

Submitted by:	scottl, mav
Approved by:	re

											
										
										
											2009-07-10 08:18:08 +00:00
+									uint32_t		caps;		/* Controller capabilities */
-												MFp4:
 - Add Command Completion Coalescing support.
 - Add SNTF support.
 - Add two more power management modes (4, 5), implemented on driver level.
 - Fix interface mode setting.
 - Reduce interface reset time.
 - Do not report meaningless protocol/transport versions.
 - Report CAP2 register content.
 - Some performance optimizations.

											
										
										
											2009-08-30 15:20:13 +00:00
+									uint32_t		caps2;		/* Controller capabilities */
-												Add FIS-based switching support. If controller supports FBS, it allows
several devices beyond Port Multiplier to work simultaneously, substantially
increasing performance.

											
										
										
											2010-01-28 17:54:47 +00:00
+									uint32_t		chcaps;		/* Channel capabilities */
-												Change the way in which AHCI+PATA combined controllers, such as JMicron
and Marvell handled. Instead of trying to attach two different drivers to
single device, wrapping each call, make one of them (atajmicron, atamarvell)
attach do device solely, but create child device for AHCI driver,
passing it all required resources. It is quite easy, as none of
resources are shared, except IRQ.

As result, it:
- makes drivers operation more independent and straitforward,
- allows to use new ahci(4) driver with such devices, adding support for
new features, such as PMP and NCQ, same time keeping legacy PATA support,
- will allow to just drop old ataahci driver, when it's time come.

											
										
										
											2009-11-16 15:38:27 +00:00
+									int			quirks;
-												Separate the parallel scsi knowledge out of the core of the XPT, and
modularize it so that new transports can be created.

Add a transport for SATA

Add a periph+protocol layer for ATA

Add a driver for AHCI-compliant hardware.

Add a maxio field to CAM so that drivers can advertise their max
I/O capability.  Modify various drivers so that they are insulated
from the value of MAXPHYS.

The new ATA/SATA code supports AHCI-compliant hardware, and will override
the classic ATA driver if it is loaded as a module at boot time or compiled
into the kernel.  The stack now support NCQ (tagged queueing) for increased
performance on modern SATA drives.  It also supports port multipliers.

ATA drives are accessed via 'ada' device nodes.  ATAPI drives are
accessed via 'cd' device nodes.  They can all be enumerated and manipulated
via camcontrol, just like SCSI drives.  SCSI commands are not translated to
their ATA equivalents; ATA native commands are used throughout the entire
stack, including camcontrol.  See the camcontrol manpage for further
details.  Testing this code may require that you update your fstab, and
possibly modify your BIOS to enable AHCI functionality, if available.

This code is very experimental at the moment.  The userland ABI/API has
changed, so applications will need to be recompiled.  It may change
further in the near future.  The 'ada' device name may also change as
more infrastructure is completed in this project.  The goal is to
eventually put all CAM busses and devices until newbus, allowing for
interesting topology and management options.

Few functional changes will be seen with existing SCSI/SAS/FC drivers,
though the userland ABI has still changed.  In the future, transports
specific modules for SAS and FC may appear in order to better support
the topologies and capabilities of these technologies.

The modularization of CAM and the addition of the ATA/SATA modules is
meant to break CAM out of the mold of being specific to SCSI, letting it
grow to be a framework for arbitrary transports and protocols.  It also
allows drivers to be written to support discrete hardware without
jeopardizing the stability of non-related hardware.  While only an AHCI
driver is provided now, a Silicon Image driver is also in the works.
Drivers for ICH1-4, ICH5-6, PIIX, classic IDE, and any other hardware
is possible and encouraged.  Help with new transports is also encouraged.

Submitted by:	scottl, mav
Approved by:	re

											
										
										
											2009-07-10 08:18:08 +00:00
+									int			numslots;	/* Number of present slots */
 									int			pm_level;	/* power management level */
 									struct ahci_slot	slot[AHCI_MAX_SLOTS];
 									union ccb		*hold[AHCI_MAX_SLOTS];
 									struct mtx		mtx;		/* state lock */
 									int			devices;        /* What is present */
 									int			pm_present;	/* PM presence reported */
-												Add FIS-based switching support. If controller supports FBS, it allows
several devices beyond Port Multiplier to work simultaneously, substantially
increasing performance.

											
										
										
											2010-01-28 17:54:47 +00:00
+									int			fbs_enabled;	/* FIS-based switching enabled */
-												MFp4:
- Extend XPT-SIM transfer settings control API. Now it allows to report to
SATA SIM number of tags supported by each device, implement ATA mode and
SATA revision negotiation for both SATA and PATA SIMs.
- Make ahci(4) and siis(4) to use submitted maximum tag number, when
scheduling requests. It allows to support NCQ on devices with lower tags
count then controller supports.
- Make PMP driver to report attached devices connection speeds.
- Implement ATA mode negotiation between user settings, device and
controller capabilities.

											
										
										
											2009-11-24 12:47:58 +00:00
+									uint32_t		oslots;		/* Occupied slots */
-												Separate the parallel scsi knowledge out of the core of the XPT, and
modularize it so that new transports can be created.

Add a transport for SATA

Add a periph+protocol layer for ATA

Add a driver for AHCI-compliant hardware.

Add a maxio field to CAM so that drivers can advertise their max
I/O capability.  Modify various drivers so that they are insulated
from the value of MAXPHYS.

The new ATA/SATA code supports AHCI-compliant hardware, and will override
the classic ATA driver if it is loaded as a module at boot time or compiled
into the kernel.  The stack now support NCQ (tagged queueing) for increased
performance on modern SATA drives.  It also supports port multipliers.

ATA drives are accessed via 'ada' device nodes.  ATAPI drives are
accessed via 'cd' device nodes.  They can all be enumerated and manipulated
via camcontrol, just like SCSI drives.  SCSI commands are not translated to
their ATA equivalents; ATA native commands are used throughout the entire
stack, including camcontrol.  See the camcontrol manpage for further
details.  Testing this code may require that you update your fstab, and
possibly modify your BIOS to enable AHCI functionality, if available.

This code is very experimental at the moment.  The userland ABI/API has
changed, so applications will need to be recompiled.  It may change
further in the near future.  The 'ada' device name may also change as
more infrastructure is completed in this project.  The goal is to
eventually put all CAM busses and devices until newbus, allowing for
interesting topology and management options.

Few functional changes will be seen with existing SCSI/SAS/FC drivers,
though the userland ABI has still changed.  In the future, transports
specific modules for SAS and FC may appear in order to better support
the topologies and capabilities of these technologies.

The modularization of CAM and the addition of the ATA/SATA modules is
meant to break CAM out of the mold of being specific to SCSI, letting it
grow to be a framework for arbitrary transports and protocols.  It also
allows drivers to be written to support discrete hardware without
jeopardizing the stability of non-related hardware.  While only an AHCI
driver is provided now, a Silicon Image driver is also in the works.
Drivers for ICH1-4, ICH5-6, PIIX, classic IDE, and any other hardware
is possible and encouraged.  Help with new transports is also encouraged.

Submitted by:	scottl, mav
Approved by:	re

											
										
										
											2009-07-10 08:18:08 +00:00
+									uint32_t		rslots;		/* Running slots */
 									uint32_t		aslots;		/* Slots with atomic commands  */
-												Add FIS-based switching support. If controller supports FBS, it allows
several devices beyond Port Multiplier to work simultaneously, substantially
increasing performance.

											
										
										
											2010-01-28 17:54:47 +00:00
+									uint32_t		eslots;		/* Slots in error */
-												MFp4:
With FBS enabled, we have no idea what command caused timeout.
Implement same logic as in siis(4) - wait for other commands
complete or timeout and then give some more time.

											
										
										
											2010-02-14 12:30:35 +00:00
+									uint32_t		toslots;	/* Slots in timeout */
-												Separate the parallel scsi knowledge out of the core of the XPT, and
modularize it so that new transports can be created.

Add a transport for SATA

Add a periph+protocol layer for ATA

Add a driver for AHCI-compliant hardware.

Add a maxio field to CAM so that drivers can advertise their max
I/O capability.  Modify various drivers so that they are insulated
from the value of MAXPHYS.

The new ATA/SATA code supports AHCI-compliant hardware, and will override
the classic ATA driver if it is loaded as a module at boot time or compiled
into the kernel.  The stack now support NCQ (tagged queueing) for increased
performance on modern SATA drives.  It also supports port multipliers.

ATA drives are accessed via 'ada' device nodes.  ATAPI drives are
accessed via 'cd' device nodes.  They can all be enumerated and manipulated
via camcontrol, just like SCSI drives.  SCSI commands are not translated to
their ATA equivalents; ATA native commands are used throughout the entire
stack, including camcontrol.  See the camcontrol manpage for further
details.  Testing this code may require that you update your fstab, and
possibly modify your BIOS to enable AHCI functionality, if available.

This code is very experimental at the moment.  The userland ABI/API has
changed, so applications will need to be recompiled.  It may change
further in the near future.  The 'ada' device name may also change as
more infrastructure is completed in this project.  The goal is to
eventually put all CAM busses and devices until newbus, allowing for
interesting topology and management options.

Few functional changes will be seen with existing SCSI/SAS/FC drivers,
though the userland ABI has still changed.  In the future, transports
specific modules for SAS and FC may appear in order to better support
the topologies and capabilities of these technologies.

The modularization of CAM and the addition of the ATA/SATA modules is
meant to break CAM out of the mold of being specific to SCSI, letting it
grow to be a framework for arbitrary transports and protocols.  It also
allows drivers to be written to support discrete hardware without
jeopardizing the stability of non-related hardware.  While only an AHCI
driver is provided now, a Silicon Image driver is also in the works.
Drivers for ICH1-4, ICH5-6, PIIX, classic IDE, and any other hardware
is possible and encouraged.  Help with new transports is also encouraged.

Submitted by:	scottl, mav
Approved by:	re

											
										
										
											2009-07-10 08:18:08 +00:00
+									int			numrslots;	/* Number of running slots */
-												Add FIS-based switching support. If controller supports FBS, it allows
several devices beyond Port Multiplier to work simultaneously, substantially
increasing performance.

											
										
										
											2010-01-28 17:54:47 +00:00
+									int			numrslotspd[16];/* Number of running slots per dev */
-												Separate the parallel scsi knowledge out of the core of the XPT, and
modularize it so that new transports can be created.

Add a transport for SATA

Add a periph+protocol layer for ATA

Add a driver for AHCI-compliant hardware.

Add a maxio field to CAM so that drivers can advertise their max
I/O capability.  Modify various drivers so that they are insulated
from the value of MAXPHYS.

The new ATA/SATA code supports AHCI-compliant hardware, and will override
the classic ATA driver if it is loaded as a module at boot time or compiled
into the kernel.  The stack now support NCQ (tagged queueing) for increased
performance on modern SATA drives.  It also supports port multipliers.

ATA drives are accessed via 'ada' device nodes.  ATAPI drives are
accessed via 'cd' device nodes.  They can all be enumerated and manipulated
via camcontrol, just like SCSI drives.  SCSI commands are not translated to
their ATA equivalents; ATA native commands are used throughout the entire
stack, including camcontrol.  See the camcontrol manpage for further
details.  Testing this code may require that you update your fstab, and
possibly modify your BIOS to enable AHCI functionality, if available.

This code is very experimental at the moment.  The userland ABI/API has
changed, so applications will need to be recompiled.  It may change
further in the near future.  The 'ada' device name may also change as
more infrastructure is completed in this project.  The goal is to
eventually put all CAM busses and devices until newbus, allowing for
interesting topology and management options.

Few functional changes will be seen with existing SCSI/SAS/FC drivers,
though the userland ABI has still changed.  In the future, transports
specific modules for SAS and FC may appear in order to better support
the topologies and capabilities of these technologies.

The modularization of CAM and the addition of the ATA/SATA modules is
meant to break CAM out of the mold of being specific to SCSI, letting it
grow to be a framework for arbitrary transports and protocols.  It also
allows drivers to be written to support discrete hardware without
jeopardizing the stability of non-related hardware.  While only an AHCI
driver is provided now, a Silicon Image driver is also in the works.
Drivers for ICH1-4, ICH5-6, PIIX, classic IDE, and any other hardware
is possible and encouraged.  Help with new transports is also encouraged.

Submitted by:	scottl, mav
Approved by:	re

											
										
										
											2009-07-10 08:18:08 +00:00
+									int			numtslots;	/* Number of tagged slots */
-												Add FIS-based switching support. If controller supports FBS, it allows
several devices beyond Port Multiplier to work simultaneously, substantially
increasing performance.

											
										
										
											2010-01-28 17:54:47 +00:00
+									int			numtslotspd[16];/* Number of tagged slots per dev */
-												Fix some English grammar.

											
										
										
											2011-04-19 10:57:40 +00:00
+									int			numhslots;	/* Number of held slots */
-												Implement automatic SCSI sense fetching for ahci(4).

											
										
										
											2011-04-12 11:24:59 +00:00
+									int			recoverycmd;	/* Our READ LOG active */
-												MFp4:
- Handle timeouts and fatal errors with port hard-reset. The rest of
recovery will be done by XPT on receiving async event. More gracefull
per-device soft-reset recovery can be implemented later.
- Add workaround for ATI SB600/SB700 PMP probe related bug, to speedup boot.

											
										
										
											2009-11-03 11:47:07 +00:00
+									int			fatalerr;	/* Fatal error happend */
-												Separate the parallel scsi knowledge out of the core of the XPT, and
modularize it so that new transports can be created.

Add a transport for SATA

Add a periph+protocol layer for ATA

Add a driver for AHCI-compliant hardware.

Add a maxio field to CAM so that drivers can advertise their max
I/O capability.  Modify various drivers so that they are insulated
from the value of MAXPHYS.

The new ATA/SATA code supports AHCI-compliant hardware, and will override
the classic ATA driver if it is loaded as a module at boot time or compiled
into the kernel.  The stack now support NCQ (tagged queueing) for increased
performance on modern SATA drives.  It also supports port multipliers.

ATA drives are accessed via 'ada' device nodes.  ATAPI drives are
accessed via 'cd' device nodes.  They can all be enumerated and manipulated
via camcontrol, just like SCSI drives.  SCSI commands are not translated to
their ATA equivalents; ATA native commands are used throughout the entire
stack, including camcontrol.  See the camcontrol manpage for further
details.  Testing this code may require that you update your fstab, and
possibly modify your BIOS to enable AHCI functionality, if available.

This code is very experimental at the moment.  The userland ABI/API has
changed, so applications will need to be recompiled.  It may change
further in the near future.  The 'ada' device name may also change as
more infrastructure is completed in this project.  The goal is to
eventually put all CAM busses and devices until newbus, allowing for
interesting topology and management options.

Few functional changes will be seen with existing SCSI/SAS/FC drivers,
though the userland ABI has still changed.  In the future, transports
specific modules for SAS and FC may appear in order to better support
the topologies and capabilities of these technologies.

The modularization of CAM and the addition of the ATA/SATA modules is
meant to break CAM out of the mold of being specific to SCSI, letting it
grow to be a framework for arbitrary transports and protocols.  It also
allows drivers to be written to support discrete hardware without
jeopardizing the stability of non-related hardware.  While only an AHCI
driver is provided now, a Silicon Image driver is also in the works.
Drivers for ICH1-4, ICH5-6, PIIX, classic IDE, and any other hardware
is possible and encouraged.  Help with new transports is also encouraged.

Submitted by:	scottl, mav
Approved by:	re

											
										
										
											2009-07-10 08:18:08 +00:00
+									int			lastslot;	/* Last used slot */
 									int			taggedtarget;	/* Last tagged target */
-												Refactor hard-reset implementation in ahci(4).

Instead of spinning in a tight loop for up to 15 seconds, polling for device
readiness while it spins up, return reset completion just after PHY reports
"connect well" or 100ms connection timeout. If device was found, use callout
for checking device readiness with 100ms period up to full 31 second timeout.

This fixes system freeze for 5-10 seconds on drives hot plug-in.

											
										
										
											2011-04-12 20:50:57 +00:00
+									int			resetting;	/* Hard-reset in progress. */
-												Handle ready timeout during polled operation same as done in mvs(4) before.

											
										
										
											2011-04-18 16:00:46 +00:00
+									int			resetpolldiv;	/* Hard-reset poll divider. */
-												Some changes around hot-plug and interface power-management:
 - use ATA_SE_EXCHANGED (SError.DIAG.X) bit to detect hot-plug events when
power-management enabled and ATA_SE_PHY_CHANGED (SError.DIAG.N) can't be
trusted;
 - on controllers supporting staggered spin-up (SS) put unused channels
into Listen state instead of Off. It should still save some power, but
allow plug-in events to be detected;
 - on controllers supporting cold presence detection (CPD), when power
management enabled, use CPD events to detect hot-plug in addition to PHY
events.

											
										
										
											2011-04-15 16:40:31 +00:00
+									int			listening;	/* SUD bit is cleared. */
-												In some cases, at least on Marvell 88SE912x controllers, Current Command
Slot field of the PxCMD register may point to an empty command slot.
That breaks command timeout detection logic, making impossible to find
what command actually caused timeout, and leading to infinite wait.
Workaround that by checking whether pointed command slot is really used
and can timeout in its time. And if not, fallback to the dumb algorithm
used with FBS -- let all commands to time out and then fail all of them.

Approved by:	re (kib)
MFC after:	1 week

											
										
										
											2011-07-29 20:35:23 +00:00
+									int			wrongccs;	/* CCS field in CMD was wrong */
-												Separate the parallel scsi knowledge out of the core of the XPT, and
modularize it so that new transports can be created.

Add a transport for SATA

Add a periph+protocol layer for ATA

Add a driver for AHCI-compliant hardware.

Add a maxio field to CAM so that drivers can advertise their max
I/O capability.  Modify various drivers so that they are insulated
from the value of MAXPHYS.

The new ATA/SATA code supports AHCI-compliant hardware, and will override
the classic ATA driver if it is loaded as a module at boot time or compiled
into the kernel.  The stack now support NCQ (tagged queueing) for increased
performance on modern SATA drives.  It also supports port multipliers.

ATA drives are accessed via 'ada' device nodes.  ATAPI drives are
accessed via 'cd' device nodes.  They can all be enumerated and manipulated
via camcontrol, just like SCSI drives.  SCSI commands are not translated to
their ATA equivalents; ATA native commands are used throughout the entire
stack, including camcontrol.  See the camcontrol manpage for further
details.  Testing this code may require that you update your fstab, and
possibly modify your BIOS to enable AHCI functionality, if available.

This code is very experimental at the moment.  The userland ABI/API has
changed, so applications will need to be recompiled.  It may change
further in the near future.  The 'ada' device name may also change as
more infrastructure is completed in this project.  The goal is to
eventually put all CAM busses and devices until newbus, allowing for
interesting topology and management options.

Few functional changes will be seen with existing SCSI/SAS/FC drivers,
though the userland ABI has still changed.  In the future, transports
specific modules for SAS and FC may appear in order to better support
the topologies and capabilities of these technologies.

The modularization of CAM and the addition of the ATA/SATA modules is
meant to break CAM out of the mold of being specific to SCSI, letting it
grow to be a framework for arbitrary transports and protocols.  It also
allows drivers to be written to support discrete hardware without
jeopardizing the stability of non-related hardware.  While only an AHCI
driver is provided now, a Silicon Image driver is also in the works.
Drivers for ICH1-4, ICH5-6, PIIX, classic IDE, and any other hardware
is possible and encouraged.  Help with new transports is also encouraged.

Submitted by:	scottl, mav
Approved by:	re

											
										
										
											2009-07-10 08:18:08 +00:00
+									union ccb		*frozen;	/* Frozen command */
-												MFp4:
 - Add Command Completion Coalescing support.
 - Add SNTF support.
 - Add two more power management modes (4, 5), implemented on driver level.
 - Fix interface mode setting.
 - Reduce interface reset time.
 - Do not report meaningless protocol/transport versions.
 - Report CAP2 register content.
 - Some performance optimizations.

											
										
										
											2009-08-30 15:20:13 +00:00
+									struct callout		pm_timer;	/* Power management events */
-												Refactor hard-reset implementation in ahci(4).

Instead of spinning in a tight loop for up to 15 seconds, polling for device
readiness while it spins up, return reset completion just after PHY reports
"connect well" or 100ms connection timeout. If device was found, use callout
for checking device readiness with 100ms period up to full 31 second timeout.

This fixes system freeze for 5-10 seconds on drives hot plug-in.

											
										
										
											2011-04-12 20:50:57 +00:00
+									struct callout		reset_timer;	/* Hard-reset timeout */
-												MFp4:
- Extend XPT-SIM transfer settings control API. Now it allows to report to
SATA SIM number of tags supported by each device, implement ATA mode and
SATA revision negotiation for both SATA and PATA SIMs.
- Make ahci(4) and siis(4) to use submitted maximum tag number, when
scheduling requests. It allows to support NCQ on devices with lower tags
count then controller supports.
- Make PMP driver to report attached devices connection speeds.
- Implement ATA mode negotiation between user settings, device and
controller capabilities.

											
										
										
											2009-11-24 12:47:58 +00:00
 									struct ahci_device	user[16];	/* User-specified settings */
 									struct ahci_device	curr[16];	/* Current settings */
-												Separate the parallel scsi knowledge out of the core of the XPT, and
modularize it so that new transports can be created.

Add a transport for SATA

Add a periph+protocol layer for ATA

Add a driver for AHCI-compliant hardware.

Add a maxio field to CAM so that drivers can advertise their max
I/O capability.  Modify various drivers so that they are insulated
from the value of MAXPHYS.

The new ATA/SATA code supports AHCI-compliant hardware, and will override
the classic ATA driver if it is loaded as a module at boot time or compiled
into the kernel.  The stack now support NCQ (tagged queueing) for increased
performance on modern SATA drives.  It also supports port multipliers.

ATA drives are accessed via 'ada' device nodes.  ATAPI drives are
accessed via 'cd' device nodes.  They can all be enumerated and manipulated
via camcontrol, just like SCSI drives.  SCSI commands are not translated to
their ATA equivalents; ATA native commands are used throughout the entire
stack, including camcontrol.  See the camcontrol manpage for further
details.  Testing this code may require that you update your fstab, and
possibly modify your BIOS to enable AHCI functionality, if available.

This code is very experimental at the moment.  The userland ABI/API has
changed, so applications will need to be recompiled.  It may change
further in the near future.  The 'ada' device name may also change as
more infrastructure is completed in this project.  The goal is to
eventually put all CAM busses and devices until newbus, allowing for
interesting topology and management options.

Few functional changes will be seen with existing SCSI/SAS/FC drivers,
though the userland ABI has still changed.  In the future, transports
specific modules for SAS and FC may appear in order to better support
the topologies and capabilities of these technologies.

The modularization of CAM and the addition of the ATA/SATA modules is
meant to break CAM out of the mold of being specific to SCSI, letting it
grow to be a framework for arbitrary transports and protocols.  It also
allows drivers to be written to support discrete hardware without
jeopardizing the stability of non-related hardware.  While only an AHCI
driver is provided now, a Silicon Image driver is also in the works.
Drivers for ICH1-4, ICH5-6, PIIX, classic IDE, and any other hardware
is possible and encouraged.  Help with new transports is also encouraged.

Submitted by:	scottl, mav
Approved by:	re

											
										
										
											2009-07-10 08:18:08 +00:00
+								};
 								/* structure describing a AHCI controller */
 								struct ahci_controller {
 									device_t		dev;
 									int			r_rid;
 									struct resource		*r_mem;
 									struct rman		sc_iomem;
 									struct ahci_controller_irq {
 										struct ahci_controller	*ctlr;
 										struct resource		*r_irq;
 										void			*handle;
 										int			r_irq_rid;
 										int			mode;
 								#define	AHCI_IRQ_MODE_ALL	0
 								#define	AHCI_IRQ_MODE_AFTER	1
 								#define	AHCI_IRQ_MODE_ONE	2
 									} irqs[16];
-												MFp4:
 - Add Command Completion Coalescing support.
 - Add SNTF support.
 - Add two more power management modes (4, 5), implemented on driver level.
 - Fix interface mode setting.
 - Reduce interface reset time.
 - Do not report meaningless protocol/transport versions.
 - Report CAP2 register content.
 - Some performance optimizations.

											
										
										
											2009-08-30 15:20:13 +00:00
+									uint32_t		caps;		/* Controller capabilities */
 									uint32_t		caps2;		/* Controller capabilities */
-												MFp4: Large set of CAM inprovements.

- Unify bus reset/probe sequence. Whenever bus attached at boot or later,
CAM will automatically reset and scan it. It allows to remove duplicate
code from many drivers.
- Any bus, attached before CAM completed it's boot-time initialization,
will equally join to the process, delaying boot if needed.
- New kern.cam.boot_delay loader tunable should help controllers that
are still unable to register their buses in time (such as slow USB/
PCCard/ CardBus devices), by adding one more event to wait on boot.
- To allow synchronization between different CAM levels, concept of
requests priorities was extended. Priorities now split between several
"run levels". Device can be freezed at specified level, allowing higher
priority requests to pass. For example, no payload requests allowed,
until PMP driver enable port. ATA XPT negotiate transfer parameters,
periph driver configure caching and so on.
- Frozen requests are no more counted by request allocation scheduler.
It fixes deadlocks, when frozen low priority payload requests occupying
slots, required by higher levels to manage theit execution.
- Two last changes were holding proper ATA reinitialization and error
recovery implementation. Now it is done: SATA controllers and Port
Multipliers now implement automatic hot-plug and should correctly
recover from timeouts and bus resets.
- Improve SCSI error recovery for devices on buses without automatic sense
reporting, such as ATAPI or USB. For example, it allows CAM to wait, while
CD drive loads disk, instead of immediately return error status.
- Decapitalize diagnostic messages and make them more readable and sensible.
- Teach PMP driver to limit maximum speed on fan-out ports.
- Make boot wait for PMP scan completes, and make rescan more reliable.
- Fix pass driver, to return CCB to user level in case of error.
- Increase number of retries in cd driver, as device may return several UAs.

											
										
										
											2010-01-28 08:41:30 +00:00
+									uint32_t		capsem;		/* Controller capabilities */
-												Add support for "LED" enclosure management messages, defined by the AHCI.

When supported by hardware, this allows to control per-port activity, locate
and fault LEDs via the led(4) API for localization and status reporting
purposes. Supporting AHCI controllers may transmit that information to the
backplane controllers via SGPIO interface. Backplane controllers interpret
received statuses in some way (IBPI standard) to report them using present
indicators.

											
										
										
											2011-05-17 22:07:45 +00:00
+									uint32_t		emloc;		/* EM buffer location */
-												Change the way in which AHCI+PATA combined controllers, such as JMicron
and Marvell handled. Instead of trying to attach two different drivers to
single device, wrapping each call, make one of them (atajmicron, atamarvell)
attach do device solely, but create child device for AHCI driver,
passing it all required resources. It is quite easy, as none of
resources are shared, except IRQ.

As result, it:
- makes drivers operation more independent and straitforward,
- allows to use new ahci(4) driver with such devices, adding support for
new features, such as PMP and NCQ, same time keeping legacy PATA support,
- will allow to just drop old ataahci driver, when it's time come.

											
										
										
											2009-11-16 15:38:27 +00:00
+									int			quirks;
-												Separate the parallel scsi knowledge out of the core of the XPT, and
modularize it so that new transports can be created.

Add a transport for SATA

Add a periph+protocol layer for ATA

Add a driver for AHCI-compliant hardware.

Add a maxio field to CAM so that drivers can advertise their max
I/O capability.  Modify various drivers so that they are insulated
from the value of MAXPHYS.

The new ATA/SATA code supports AHCI-compliant hardware, and will override
the classic ATA driver if it is loaded as a module at boot time or compiled
into the kernel.  The stack now support NCQ (tagged queueing) for increased
performance on modern SATA drives.  It also supports port multipliers.

ATA drives are accessed via 'ada' device nodes.  ATAPI drives are
accessed via 'cd' device nodes.  They can all be enumerated and manipulated
via camcontrol, just like SCSI drives.  SCSI commands are not translated to
their ATA equivalents; ATA native commands are used throughout the entire
stack, including camcontrol.  See the camcontrol manpage for further
details.  Testing this code may require that you update your fstab, and
possibly modify your BIOS to enable AHCI functionality, if available.

This code is very experimental at the moment.  The userland ABI/API has
changed, so applications will need to be recompiled.  It may change
further in the near future.  The 'ada' device name may also change as
more infrastructure is completed in this project.  The goal is to
eventually put all CAM busses and devices until newbus, allowing for
interesting topology and management options.

Few functional changes will be seen with existing SCSI/SAS/FC drivers,
though the userland ABI has still changed.  In the future, transports
specific modules for SAS and FC may appear in order to better support
the topologies and capabilities of these technologies.

The modularization of CAM and the addition of the ATA/SATA modules is
meant to break CAM out of the mold of being specific to SCSI, letting it
grow to be a framework for arbitrary transports and protocols.  It also
allows drivers to be written to support discrete hardware without
jeopardizing the stability of non-related hardware.  While only an AHCI
driver is provided now, a Silicon Image driver is also in the works.
Drivers for ICH1-4, ICH5-6, PIIX, classic IDE, and any other hardware
is possible and encouraged.  Help with new transports is also encouraged.

Submitted by:	scottl, mav
Approved by:	re

											
										
										
											2009-07-10 08:18:08 +00:00
+									int			numirqs;
 									int			channels;
 									int			ichannels;
-												MFp4:
 - Add Command Completion Coalescing support.
 - Add SNTF support.
 - Add two more power management modes (4, 5), implemented on driver level.
 - Fix interface mode setting.
 - Reduce interface reset time.
 - Do not report meaningless protocol/transport versions.
 - Report CAP2 register content.
 - Some performance optimizations.

											
										
										
											2009-08-30 15:20:13 +00:00
+									int			ccc;		/* CCC timeout */
 									int			cccv;		/* CCC vector */
-												Separate the parallel scsi knowledge out of the core of the XPT, and
modularize it so that new transports can be created.

Add a transport for SATA

Add a periph+protocol layer for ATA

Add a driver for AHCI-compliant hardware.

Add a maxio field to CAM so that drivers can advertise their max
I/O capability.  Modify various drivers so that they are insulated
from the value of MAXPHYS.

The new ATA/SATA code supports AHCI-compliant hardware, and will override
the classic ATA driver if it is loaded as a module at boot time or compiled
into the kernel.  The stack now support NCQ (tagged queueing) for increased
performance on modern SATA drives.  It also supports port multipliers.

ATA drives are accessed via 'ada' device nodes.  ATAPI drives are
accessed via 'cd' device nodes.  They can all be enumerated and manipulated
via camcontrol, just like SCSI drives.  SCSI commands are not translated to
their ATA equivalents; ATA native commands are used throughout the entire
stack, including camcontrol.  See the camcontrol manpage for further
details.  Testing this code may require that you update your fstab, and
possibly modify your BIOS to enable AHCI functionality, if available.

This code is very experimental at the moment.  The userland ABI/API has
changed, so applications will need to be recompiled.  It may change
further in the near future.  The 'ada' device name may also change as
more infrastructure is completed in this project.  The goal is to
eventually put all CAM busses and devices until newbus, allowing for
interesting topology and management options.

Few functional changes will be seen with existing SCSI/SAS/FC drivers,
though the userland ABI has still changed.  In the future, transports
specific modules for SAS and FC may appear in order to better support
the topologies and capabilities of these technologies.

The modularization of CAM and the addition of the ATA/SATA modules is
meant to break CAM out of the mold of being specific to SCSI, letting it
grow to be a framework for arbitrary transports and protocols.  It also
allows drivers to be written to support discrete hardware without
jeopardizing the stability of non-related hardware.  While only an AHCI
driver is provided now, a Silicon Image driver is also in the works.
Drivers for ICH1-4, ICH5-6, PIIX, classic IDE, and any other hardware
is possible and encouraged.  Help with new transports is also encouraged.

Submitted by:	scottl, mav
Approved by:	re

											
										
										
											2009-07-10 08:18:08 +00:00
+									struct {
 										void			(*function)(void *);
 										void			*argument;
 									} interrupt[AHCI_MAX_PORTS];
-												Add support for "LED" enclosure management messages, defined by the AHCI.

When supported by hardware, this allows to control per-port activity, locate
and fault LEDs via the led(4) API for localization and status reporting
purposes. Supporting AHCI controllers may transmit that information to the
backplane controllers via SGPIO interface. Backplane controllers interpret
received statuses in some way (IBPI standard) to report them using present
indicators.

											
										
										
											2011-05-17 22:07:45 +00:00
+									struct mtx		em_mtx;		/* EM access lock */
-												Separate the parallel scsi knowledge out of the core of the XPT, and
modularize it so that new transports can be created.

Add a transport for SATA

Add a periph+protocol layer for ATA

Add a driver for AHCI-compliant hardware.

Add a maxio field to CAM so that drivers can advertise their max
I/O capability.  Modify various drivers so that they are insulated
from the value of MAXPHYS.

The new ATA/SATA code supports AHCI-compliant hardware, and will override
the classic ATA driver if it is loaded as a module at boot time or compiled
into the kernel.  The stack now support NCQ (tagged queueing) for increased
performance on modern SATA drives.  It also supports port multipliers.

ATA drives are accessed via 'ada' device nodes.  ATAPI drives are
accessed via 'cd' device nodes.  They can all be enumerated and manipulated
via camcontrol, just like SCSI drives.  SCSI commands are not translated to
their ATA equivalents; ATA native commands are used throughout the entire
stack, including camcontrol.  See the camcontrol manpage for further
details.  Testing this code may require that you update your fstab, and
possibly modify your BIOS to enable AHCI functionality, if available.

This code is very experimental at the moment.  The userland ABI/API has
changed, so applications will need to be recompiled.  It may change
further in the near future.  The 'ada' device name may also change as
more infrastructure is completed in this project.  The goal is to
eventually put all CAM busses and devices until newbus, allowing for
interesting topology and management options.

Few functional changes will be seen with existing SCSI/SAS/FC drivers,
though the userland ABI has still changed.  In the future, transports
specific modules for SAS and FC may appear in order to better support
the topologies and capabilities of these technologies.

The modularization of CAM and the addition of the ATA/SATA modules is
meant to break CAM out of the mold of being specific to SCSI, letting it
grow to be a framework for arbitrary transports and protocols.  It also
allows drivers to be written to support discrete hardware without
jeopardizing the stability of non-related hardware.  While only an AHCI
driver is provided now, a Silicon Image driver is also in the works.
Drivers for ICH1-4, ICH5-6, PIIX, classic IDE, and any other hardware
is possible and encouraged.  Help with new transports is also encouraged.

Submitted by:	scottl, mav
Approved by:	re

											
										
										
											2009-07-10 08:18:08 +00:00
+								};
 								enum ahci_err_type {
 									AHCI_ERR_NONE,		/* No error */
 									AHCI_ERR_INVALID,	/* Error detected by us before submitting. */
 									AHCI_ERR_INNOCENT,	/* Innocent victim. */
 									AHCI_ERR_TFE,		/* Task File Error. */
 									AHCI_ERR_SATA,		/* SATA error. */
 									AHCI_ERR_TIMEOUT,	/* Command execution timeout. */
 									AHCI_ERR_NCQ,		/* NCQ command error. CCB should be put on hold
 												 * until READ LOG executed to reveal error. */
 								};
 								/* macros to hide busspace uglyness */
 								#define ATA_INB(res, offset) \
 									bus_read_1((res), (offset))
 								#define ATA_INW(res, offset) \
 									bus_read_2((res), (offset))
 								#define ATA_INL(res, offset) \
 									bus_read_4((res), (offset))
 								#define ATA_INSW(res, offset, addr, count) \
 									bus_read_multi_2((res), (offset), (addr), (count))
 								#define ATA_INSW_STRM(res, offset, addr, count) \
 									bus_read_multi_stream_2((res), (offset), (addr), (count))
 								#define ATA_INSL(res, offset, addr, count) \
 									bus_read_multi_4((res), (offset), (addr), (count))
 								#define ATA_INSL_STRM(res, offset, addr, count) \
 									bus_read_multi_stream_4((res), (offset), (addr), (count))
 								#define ATA_OUTB(res, offset, value) \
 									bus_write_1((res), (offset), (value))
 								#define ATA_OUTW(res, offset, value) \
 									bus_write_2((res), (offset), (value))
 								#define ATA_OUTL(res, offset, value) \
 									bus_write_4((res), (offset), (value))
 								#define ATA_OUTSW(res, offset, addr, count) \
 									bus_write_multi_2((res), (offset), (addr), (count))
 								#define ATA_OUTSW_STRM(res, offset, addr, count) \
 									bus_write_multi_stream_2((res), (offset), (addr), (count))
 								#define ATA_OUTSL(res, offset, addr, count) \
 									bus_write_multi_4((res), (offset), (addr), (count))
 								#define ATA_OUTSL_STRM(res, offset, addr, count) \
 									bus_write_multi_stream_4((res), (offset), (addr), (count))