2010-03-20 03:39:35 +00:00
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/*
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* Copyright (c) 2003 Marcel Moolenaar
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* Copyright (c) 2007-2009 Andrew Turner
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/conf.h>
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#include <sys/cons.h>
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#include <sys/tty.h>
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#include <sys/rman.h>
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#include <machine/bus.h>
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#include <machine/intr.h>
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#include <dev/uart/uart.h>
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#include <dev/uart/uart_cpu.h>
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#include <dev/uart/uart_bus.h>
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2014-09-25 11:38:26 +00:00
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#include <arm/samsung/s3c2xx0/s3c2440reg.h>
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#include <arm/samsung/s3c2xx0/uart_dev_s3c2410.h>
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#include <arm/samsung/s3c2xx0/s3c2xx0reg.h>
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#include <arm/samsung/s3c2xx0/s3c2xx0var.h>
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2010-03-20 03:39:35 +00:00
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#include "uart_if.h"
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/* Finds the subirq from the parent */
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#define get_sub_irq(parent, offset) \
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((parent == S3C24X0_INT_UART0) ? S3C24X0_SUBIRQ_MIN + offset : \
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((parent == S3C24X0_INT_UART1) ? S3C24X0_SUBIRQ_MIN + 3 + offset : \
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S3C24X0_SUBIRQ_MIN + 6 + offset))
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#define RX_OFF 0
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#define TX_OFF 1
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#define ERR_OFF 2
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extern unsigned int s3c2410_pclk;
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static int sscomspeed(long, long);
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static int s3c24x0_uart_param(struct uart_bas *, int, int, int, int);
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/*
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* Low-level UART interface.
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*/
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static int s3c2410_probe(struct uart_bas *bas);
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static void s3c2410_init(struct uart_bas *bas, int, int, int, int);
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static void s3c2410_term(struct uart_bas *bas);
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static void s3c2410_putc(struct uart_bas *bas, int);
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static int s3c2410_rxready(struct uart_bas *bas);
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static int s3c2410_getc(struct uart_bas *bas, struct mtx *mtx);
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extern SLIST_HEAD(uart_devinfo_list, uart_devinfo) uart_sysdevs;
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static int
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sscomspeed(long speed, long frequency)
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{
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int x;
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if (speed <= 0 || frequency <= 0)
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return -1;
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x = (frequency / 16) / speed;
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return x-1;
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}
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static int
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s3c24x0_uart_param(struct uart_bas *bas, int baudrate, int databits,
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int stopbits, int parity)
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{
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int brd, ulcon;
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ulcon = 0;
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switch(databits) {
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case 5:
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ulcon |= ULCON_LENGTH_5;
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break;
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case 6:
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ulcon |= ULCON_LENGTH_6;
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break;
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case 7:
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ulcon |= ULCON_LENGTH_7;
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break;
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case 8:
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ulcon |= ULCON_LENGTH_8;
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break;
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default:
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return (EINVAL);
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}
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switch (parity) {
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case UART_PARITY_NONE:
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ulcon |= ULCON_PARITY_NONE;
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break;
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case UART_PARITY_ODD:
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ulcon |= ULCON_PARITY_ODD;
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break;
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case UART_PARITY_EVEN:
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ulcon |= ULCON_PARITY_EVEN;
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break;
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case UART_PARITY_MARK:
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case UART_PARITY_SPACE:
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default:
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return (EINVAL);
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}
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if (stopbits == 2)
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ulcon |= ULCON_STOP;
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uart_setreg(bas, SSCOM_ULCON, ulcon);
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brd = sscomspeed(baudrate, bas->rclk);
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uart_setreg(bas, SSCOM_UBRDIV, brd);
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return (0);
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}
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struct uart_ops uart_s3c2410_ops = {
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.probe = s3c2410_probe,
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.init = s3c2410_init,
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.term = s3c2410_term,
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.putc = s3c2410_putc,
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.rxready = s3c2410_rxready,
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.getc = s3c2410_getc,
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};
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static int
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s3c2410_probe(struct uart_bas *bas)
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{
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return (0);
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}
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static void
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s3c2410_init(struct uart_bas *bas, int baudrate, int databits, int stopbits,
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int parity)
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{
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if (bas->rclk == 0)
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bas->rclk = s3c2410_pclk;
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KASSERT(bas->rclk != 0, ("s3c2410_init: Invalid rclk"));
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uart_setreg(bas, SSCOM_UCON, 0);
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uart_setreg(bas, SSCOM_UFCON,
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UFCON_TXTRIGGER_8 | UFCON_RXTRIGGER_8 |
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UFCON_TXFIFO_RESET | UFCON_RXFIFO_RESET |
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UFCON_FIFO_ENABLE);
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s3c24x0_uart_param(bas, baudrate, databits, stopbits, parity);
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/* Enable UART. */
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uart_setreg(bas, SSCOM_UCON, UCON_TXMODE_INT | UCON_RXMODE_INT |
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UCON_TOINT);
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uart_setreg(bas, SSCOM_UMCON, UMCON_RTS);
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}
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static void
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s3c2410_term(struct uart_bas *bas)
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{
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/* XXX */
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}
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static void
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s3c2410_putc(struct uart_bas *bas, int c)
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{
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while ((bus_space_read_4(bas->bst, bas->bsh, SSCOM_UFSTAT) &
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UFSTAT_TXFULL) == UFSTAT_TXFULL)
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continue;
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uart_setreg(bas, SSCOM_UTXH, c);
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}
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static int
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s3c2410_rxready(struct uart_bas *bas)
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{
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return ((uart_getreg(bas, SSCOM_UTRSTAT) & UTRSTAT_RXREADY) ==
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UTRSTAT_RXREADY);
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}
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static int
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s3c2410_getc(struct uart_bas *bas, struct mtx *mtx)
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{
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while (!sscom_rxrdy(bas->bst, bas->bsh))
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continue;
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return sscom_getc(bas->bst, bas->bsh);
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}
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static int s3c2410_bus_probe(struct uart_softc *sc);
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static int s3c2410_bus_attach(struct uart_softc *sc);
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static int s3c2410_bus_flush(struct uart_softc *, int);
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static int s3c2410_bus_getsig(struct uart_softc *);
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static int s3c2410_bus_ioctl(struct uart_softc *, int, intptr_t);
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static int s3c2410_bus_ipend(struct uart_softc *);
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static int s3c2410_bus_param(struct uart_softc *, int, int, int, int);
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static int s3c2410_bus_receive(struct uart_softc *);
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static int s3c2410_bus_setsig(struct uart_softc *, int);
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static int s3c2410_bus_transmit(struct uart_softc *);
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2014-01-19 19:36:11 +00:00
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static void s3c2410_bus_grab(struct uart_softc *);
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static void s3c2410_bus_ungrab(struct uart_softc *);
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2010-03-20 03:39:35 +00:00
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static kobj_method_t s3c2410_methods[] = {
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KOBJMETHOD(uart_probe, s3c2410_bus_probe),
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KOBJMETHOD(uart_attach, s3c2410_bus_attach),
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KOBJMETHOD(uart_flush, s3c2410_bus_flush),
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KOBJMETHOD(uart_getsig, s3c2410_bus_getsig),
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KOBJMETHOD(uart_ioctl, s3c2410_bus_ioctl),
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KOBJMETHOD(uart_ipend, s3c2410_bus_ipend),
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KOBJMETHOD(uart_param, s3c2410_bus_param),
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KOBJMETHOD(uart_receive, s3c2410_bus_receive),
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KOBJMETHOD(uart_setsig, s3c2410_bus_setsig),
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KOBJMETHOD(uart_transmit, s3c2410_bus_transmit),
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2014-01-19 19:36:11 +00:00
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KOBJMETHOD(uart_grab, s3c2410_bus_grab),
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KOBJMETHOD(uart_ungrab, s3c2410_bus_ungrab),
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2010-03-20 03:39:35 +00:00
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{0, 0 }
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};
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int
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s3c2410_bus_probe(struct uart_softc *sc)
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{
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switch(s3c2xx0_softc->sc_cpu) {
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case CPU_S3C2410:
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sc->sc_txfifosz = 16;
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sc->sc_rxfifosz = 16;
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break;
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case CPU_S3C2440:
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sc->sc_txfifosz = 64;
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sc->sc_rxfifosz = 64;
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break;
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default:
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return (ENXIO);
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}
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2013-04-01 00:44:20 +00:00
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return (0);
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}
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static int
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s3c2410_bus_attach(struct uart_softc *sc)
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{
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uintptr_t irq;
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2010-03-20 03:39:35 +00:00
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sc->sc_hwiflow = 0;
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sc->sc_hwoflow = 0;
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irq = rman_get_start(sc->sc_ires);
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arm_unmask_irq(irq);
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arm_unmask_irq(get_sub_irq(irq, RX_OFF));
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arm_unmask_irq(get_sub_irq(irq, TX_OFF));
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arm_unmask_irq(get_sub_irq(irq, ERR_OFF));
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return (0);
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}
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static int
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s3c2410_bus_transmit(struct uart_softc *sc)
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{
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uintptr_t irq;
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uart_lock(sc->sc_hwmtx);
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for (int i = 0; i < sc->sc_txdatasz; i++) {
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s3c2410_putc(&sc->sc_bas, sc->sc_txbuf[i]);
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uart_barrier(&sc->sc_bas);
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}
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sc->sc_txbusy = 1;
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uart_unlock(sc->sc_hwmtx);
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irq = rman_get_start(sc->sc_ires);
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arm_unmask_irq(get_sub_irq(irq, TX_OFF));
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return (0);
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}
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static int
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s3c2410_bus_setsig(struct uart_softc *sc, int sig)
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{
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return (0);
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}
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static int
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s3c2410_bus_receive(struct uart_softc *sc)
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{
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uart_rx_put(sc, uart_getreg(&sc->sc_bas, SSCOM_URXH));
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return (0);
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}
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static int
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s3c2410_bus_param(struct uart_softc *sc, int baudrate, int databits,
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int stopbits, int parity)
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{
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int error;
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if (sc->sc_bas.rclk == 0)
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sc->sc_bas.rclk = s3c2410_pclk;
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KASSERT(sc->sc_bas.rclk != 0, ("s3c2410_init: Invalid rclk"));
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uart_lock(sc->sc_hwmtx);
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error = s3c24x0_uart_param(&sc->sc_bas, baudrate, databits, stopbits,
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parity);
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uart_unlock(sc->sc_hwmtx);
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return (error);
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}
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static int
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s3c2410_bus_ipend(struct uart_softc *sc)
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{
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uint32_t ufstat, txmask, rxmask;
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uintptr_t irq;
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int ipend = 0;
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uart_lock(sc->sc_hwmtx);
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ufstat = bus_space_read_4(sc->sc_bas.bst, sc->sc_bas.bsh, SSCOM_UFSTAT);
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uart_unlock(sc->sc_hwmtx);
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txmask = rxmask = 0;
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switch (s3c2xx0_softc->sc_cpu) {
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case CPU_S3C2410:
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txmask = UFSTAT_TXCOUNT;
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rxmask = UFSTAT_RXCOUNT;
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break;
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case CPU_S3C2440:
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txmask = S3C2440_UFSTAT_TXCOUNT;
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rxmask = S3C2440_UFSTAT_RXCOUNT;
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break;
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}
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if ((ufstat & txmask) == 0) {
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if (sc->sc_txbusy != 0)
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ipend |= SER_INT_TXIDLE;
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irq = rman_get_start(sc->sc_ires);
|
|
|
|
arm_mask_irq(get_sub_irq(irq, TX_OFF));
|
|
|
|
}
|
|
|
|
if ((ufstat & rxmask) > 0) {
|
|
|
|
ipend |= SER_INT_RXREADY;
|
|
|
|
}
|
|
|
|
|
|
|
|
return (ipend);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
s3c2410_bus_flush(struct uart_softc *sc, int what)
|
|
|
|
{
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
s3c2410_bus_getsig(struct uart_softc *sc)
|
|
|
|
{
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
s3c2410_bus_ioctl(struct uart_softc *sc, int request, intptr_t data)
|
|
|
|
{
|
|
|
|
return (EINVAL);
|
|
|
|
}
|
|
|
|
|
2014-01-19 19:36:11 +00:00
|
|
|
|
|
|
|
static void
|
|
|
|
s3c2410_bus_grab(struct uart_softc *sc)
|
|
|
|
{
|
|
|
|
uintptr_t irq;
|
|
|
|
|
|
|
|
irq = rman_get_start(sc->sc_ires);
|
|
|
|
arm_mask_irq(get_sub_irq(irq, RX_OFF));
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
s3c2410_bus_ungrab(struct uart_softc *sc)
|
|
|
|
{
|
|
|
|
uintptr_t irq;
|
|
|
|
|
|
|
|
irq = rman_get_start(sc->sc_ires);
|
|
|
|
arm_unmask_irq(get_sub_irq(irq, RX_OFF));
|
|
|
|
}
|
|
|
|
|
2010-03-20 03:39:35 +00:00
|
|
|
struct uart_class uart_s3c2410_class = {
|
|
|
|
"s3c2410 class",
|
|
|
|
s3c2410_methods,
|
|
|
|
1,
|
|
|
|
.uc_ops = &uart_s3c2410_ops,
|
|
|
|
.uc_range = 8,
|
|
|
|
.uc_rclk = 0,
|
|
|
|
};
|