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freebsd-dev/sys/i386/include/smp.h

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/* -> /*- for copyright notices, minor format tweaks as necessary
2005-01-06 22:18:23 +00:00
/*-
Man the liferafts! Here comes the long awaited SMP -> -current merge! There are various options documented in i386/conf/LINT, there is more to come over the next few days. The kernel should run pretty much "as before" without the options to activate SMP mode. There are a handful of known "loose ends" that need to be fixed, but have been put off since the SMP kernel is in a moderately good condition at the moment. This commit is the result of the tinkering and testing over the last 14 months by many people. A special thanks to Steve Passe for implementing the APIC code!
1997-04-26 11:46:25 +00:00
* ----------------------------------------------------------------------------
* "THE BEER-WARE LICENSE" (Revision 42):
* <phk@FreeBSD.org> wrote this file. As long as you retain this notice you
* can do whatever you want with this stuff. If we meet some day, and you think
* this stuff is worth it, you can buy me a beer in return. Poul-Henning Kamp
* ----------------------------------------------------------------------------
*
$Id$ -> $FreeBSD$
1999-08-28 01:08:13 +00:00
* $FreeBSD$
Man the liferafts! Here comes the long awaited SMP -> -current merge! There are various options documented in i386/conf/LINT, there is more to come over the next few days. The kernel should run pretty much "as before" without the options to activate SMP mode. There are a handful of known "loose ends" that need to be fixed, but have been put off since the SMP kernel is in a moderately good condition at the moment. This commit is the result of the tinkering and testing over the last 14 months by many people. A special thanks to Steve Passe for implementing the APIC code!
1997-04-26 11:46:25 +00:00
*
*/
#ifndef _MACHINE_SMP_H_
#define _MACHINE_SMP_H_
Change #ifdef KERNEL to #ifdef _KERNEL in the public headers. "KERNEL" is an application space macro and the applications are supposed to be free to use it as they please (but cannot). This is consistant with the other BSD's who made this change quite some time ago. More commits to come.
1999-12-29 04:46:21 +00:00
#ifdef _KERNEL
Man the liferafts! Here comes the long awaited SMP -> -current merge! There are various options documented in i386/conf/LINT, there is more to come over the next few days. The kernel should run pretty much "as before" without the options to activate SMP mode. There are a handful of known "loose ends" that need to be fixed, but have been put off since the SMP kernel is in a moderately good condition at the moment. This commit is the result of the tinkering and testing over the last 14 months by many people. A special thanks to Steve Passe for implementing the APIC code!
1997-04-26 11:46:25 +00:00
New i386 SMP code: - The MP code no longer knows anything specific about an MP Table. Instead, the local APIC code adds CPUs via the cpu_add() function when a local APIC is enumerated by an APIC enumerator. - Don't divide the argument to mp_bootaddress() by 1024 just so that we can turn around and mulitply it by 1024 again. - We no longer panic if SMP is enabled but we are booted on a UP machine. - init_secondary(), the asm code between init_secondary() and ap_init() in mpboot.s and ap_init() have all been merged together in C into init_secondary(). - We now use the cpuid feature bits to determine if we should enable PSE, PGE, or VME on each AP. - Due to the change in the implementation of critical sections, acquire the SMP TLB mutex around a slightly larger chunk of code for TLB shootdowns. - Remove some of the debug code from the original SMP implementation that is no longer used or no longer applies to the new APIC code. - Use a temporary hack to disable the ACPI module until the SMP code has been further reorganized to allow ACPI to work as a module again. - Add a DDB command to dump the interesting contents of the IDT.
2003-11-03 22:32:04 +00:00
#ifdef SMP
Man the liferafts! Here comes the long awaited SMP -> -current merge! There are various options documented in i386/conf/LINT, there is more to come over the next few days. The kernel should run pretty much "as before" without the options to activate SMP mode. There are a handful of known "loose ends" that need to be fixed, but have been put off since the SMP kernel is in a moderately good condition at the moment. This commit is the result of the tinkering and testing over the last 14 months by many people. A special thanks to Steve Passe for implementing the APIC code!
1997-04-26 11:46:25 +00:00
Modified the PEND_INTS algorithm to fix the ISA INT loss problem. Noticed by: dave adkins <adkin003@gold.tc.umn.edu> and others.
1997-07-28 03:59:54 +00:00
#ifndef LOCORE
New i386 SMP code: - The MP code no longer knows anything specific about an MP Table. Instead, the local APIC code adds CPUs via the cpu_add() function when a local APIC is enumerated by an APIC enumerator. - Don't divide the argument to mp_bootaddress() by 1024 just so that we can turn around and mulitply it by 1024 again. - We no longer panic if SMP is enabled but we are booted on a UP machine. - init_secondary(), the asm code between init_secondary() and ap_init() in mpboot.s and ap_init() have all been merged together in C into init_secondary(). - We now use the cpuid feature bits to determine if we should enable PSE, PGE, or VME on each AP. - Due to the change in the implementation of critical sections, acquire the SMP TLB mutex around a slightly larger chunk of code for TLB shootdowns. - Remove some of the debug code from the original SMP implementation that is no longer used or no longer applies to the new APIC code. - Use a temporary hack to disable the ACPI module until the SMP code has been further reorganized to allow ACPI to work as a module again. - Add a DDB command to dump the interesting contents of the IDT.
2003-11-03 22:32:04 +00:00
#include <sys/bus.h>
Overhaul of the SMP code. Several portions of the SMP kernel support have been made machine independent and various other adjustments have been made to support Alpha SMP. - It splits the per-process portions of hardclock() and statclock() off into hardclock_process() and statclock_process() respectively. hardclock() and statclock() call the *_process() functions for the current process so that UP systems will run as before. For SMP systems, it is simply necessary to ensure that all other processors execute the *_process() functions when the main clock functions are triggered on one CPU by an interrupt. For the alpha 4100, clock interrupts are delievered in a staggered broadcast fashion, so we simply call hardclock/statclock on the boot CPU and call the *_process() functions on the secondaries. For x86, we call statclock and hardclock as usual and then call forward_hardclock/statclock in the MD code to send an IPI to cause the AP's to execute forwared_hardclock/statclock which then call the *_process() functions. - forward_signal() and forward_roundrobin() have been reworked to be MI and to involve less hackery. Now the cpu doing the forward sets any flags, etc. and sends a very simple IPI_AST to the other cpu(s). AST IPIs now just basically return so that they can execute ast() and don't bother with setting the astpending or needresched flags themselves. This also removes the loop in forward_signal() as sched_lock closes the race condition that the loop worked around. - need_resched(), resched_wanted() and clear_resched() have been changed to take a process to act on rather than assuming curproc so that they can be used to implement forward_roundrobin() as described above. - Various other SMP variables have been moved to a MI subr_smp.c and a new header sys/smp.h declares MI SMP variables and API's. The IPI API's from machine/ipl.h have moved to machine/smp.h which is included by sys/smp.h. - The globaldata_register() and globaldata_find() functions as well as the SLIST of globaldata structures has become MI and moved into subr_smp.c. Also, the globaldata list is only available if SMP support is compiled in. Reviewed by: jake, peter Looked over by: eivind
2001-04-27 19:28:25 +00:00
#include <machine/frame.h>
New i386 SMP code: - The MP code no longer knows anything specific about an MP Table. Instead, the local APIC code adds CPUs via the cpu_add() function when a local APIC is enumerated by an APIC enumerator. - Don't divide the argument to mp_bootaddress() by 1024 just so that we can turn around and mulitply it by 1024 again. - We no longer panic if SMP is enabled but we are booted on a UP machine. - init_secondary(), the asm code between init_secondary() and ap_init() in mpboot.s and ap_init() have all been merged together in C into init_secondary(). - We now use the cpuid feature bits to determine if we should enable PSE, PGE, or VME on each AP. - Due to the change in the implementation of critical sections, acquire the SMP TLB mutex around a slightly larger chunk of code for TLB shootdowns. - Remove some of the debug code from the original SMP implementation that is no longer used or no longer applies to the new APIC code. - Use a temporary hack to disable the ACPI module until the SMP code has been further reorganized to allow ACPI to work as a module again. - Add a DDB command to dump the interesting contents of the IDT.
2003-11-03 22:32:04 +00:00
#include <machine/intr_machdep.h>
#include <machine/apicvar.h>
Include machine/pcb.hto turn extern struct pcb stoppcbs[]; construct into the valid C.
2007-05-19 05:01:43 +00:00
#include <machine/pcb.h>
apic.h now has structure definitions for both the local APIC and io APIC. apic.h has defines like: #define lapic__id lapic->id Once private pages and "known virtual addr" mapping of the APICs is ready all 'lapic__XXX' will be changed to 'lapic.XXX', and the defines will be removed. Changes to smp.h for lapic_t lapic && ioapic_t ioapic pointers, currently equal to apic_base && io_apic_base, will stand alone with the private page mapping.
1997-05-29 05:57:43 +00:00
Man the liferafts! Here comes the long awaited SMP -> -current merge! There are various options documented in i386/conf/LINT, there is more to come over the next few days. The kernel should run pretty much "as before" without the options to activate SMP mode. There are a handful of known "loose ends" that need to be fixed, but have been put off since the SMP kernel is in a moderately good condition at the moment. This commit is the result of the tinkering and testing over the last 14 months by many people. A special thanks to Steve Passe for implementing the APIC code!
1997-04-26 11:46:25 +00:00
/* global data in mpboot.s */
extern int bootMP_size;
/* functions in mpboot.s */
Fixed some style bugs in the removal of __P(()). The main ones were not removing tabs before "__P((", and not outdenting continuation lines to preserve non-KNF lining up of code with parentheses. Switch to KNF formatting and/or rewrap the whole prototype in some cases.
2002-03-23 15:09:35 +00:00
void bootMP(void);
Man the liferafts! Here comes the long awaited SMP -> -current merge! There are various options documented in i386/conf/LINT, there is more to come over the next few days. The kernel should run pretty much "as before" without the options to activate SMP mode. There are a handful of known "loose ends" that need to be fixed, but have been put off since the SMP kernel is in a moderately good condition at the moment. This commit is the result of the tinkering and testing over the last 14 months by many people. A special thanks to Steve Passe for implementing the APIC code!
1997-04-26 11:46:25 +00:00
/* global data in mp_machdep.c */
extern int mp_naps;
extern int boot_cpu_id;
Add forwarding of roundrobin to other cpus. This gives a more regular update of cpu usage as shown by top when one process is cpu bound (no system calls) while the system is otherwise idle (except for top). Don't attempt to switch to the BSP in boot(). If the system was idle when an interrupt caused a panic, this won't work. Instead, switch to the BSP in cpu_reset. Remove some spurious forward_statclock/forward_hardclock warnings.
1998-05-17 22:12:14 +00:00
extern struct pcb stoppcbs[];
Change the x86 interrupt code to use FreeBSD CPU IDs (i.e. PCPU_GET(cpuid)) rather than local APIC IDs to keep track of CPUs which can handle interrupts.
2007-03-06 17:16:47 +00:00
extern int cpu_apic_ids[];
- Move the code to deal with handling an IPI_STOP IPI out of ipi_nmi_handler() and into a new cpustop_handler() function. Change the Xcpustop IPI_STOP handler to call this function instead of duplicating all the same logic in assembly. - EOI the local APIC for the lapic timer interrupt in C rather than assembly. - Bump the lazypmap IPI counter if COUNT_IPIS is defined in C rather than assembly.
2005-12-05 22:25:41 +00:00
#ifdef COUNT_IPIS
extern u_long *ipi_invltlb_counts[MAXCPU];
extern u_long *ipi_invlrng_counts[MAXCPU];
extern u_long *ipi_invlpg_counts[MAXCPU];
Add a new 'pmap_invalidate_cache()' to flush the CPU caches via the wbinvd() instruction. This includes a new IPI so that all CPU caches on all CPUs are flushed for the SMP case. MFC after: 1 month
2006-05-01 21:36:47 +00:00
extern u_long *ipi_invlcache_counts[MAXCPU];
- Move the code to deal with handling an IPI_STOP IPI out of ipi_nmi_handler() and into a new cpustop_handler() function. Change the Xcpustop IPI_STOP handler to call this function instead of duplicating all the same logic in assembly. - EOI the local APIC for the lapic timer interrupt in C rather than assembly. - Bump the lazypmap IPI counter if COUNT_IPIS is defined in C rather than assembly.
2005-12-05 22:25:41 +00:00
extern u_long *ipi_rendezvous_counts[MAXCPU];
#endif
New i386 SMP code: - The MP code no longer knows anything specific about an MP Table. Instead, the local APIC code adds CPUs via the cpu_add() function when a local APIC is enumerated by an APIC enumerator. - Don't divide the argument to mp_bootaddress() by 1024 just so that we can turn around and mulitply it by 1024 again. - We no longer panic if SMP is enabled but we are booted on a UP machine. - init_secondary(), the asm code between init_secondary() and ap_init() in mpboot.s and ap_init() have all been merged together in C into init_secondary(). - We now use the cpuid feature bits to determine if we should enable PSE, PGE, or VME on each AP. - Due to the change in the implementation of critical sections, acquire the SMP TLB mutex around a slightly larger chunk of code for TLB shootdowns. - Remove some of the debug code from the original SMP implementation that is no longer used or no longer applies to the new APIC code. - Use a temporary hack to disable the ACPI module until the SMP code has been further reorganized to allow ACPI to work as a module again. - Add a DDB command to dump the interesting contents of the IDT.
2003-11-03 22:32:04 +00:00
/* IPI handlers */
inthand_t
IDTVEC(invltlb), /* TLB shootdowns - global */
IDTVEC(invlpg), /* TLB shootdowns - 1 page */
IDTVEC(invlrng), /* TLB shootdowns - page range */
Add a new 'pmap_invalidate_cache()' to flush the CPU caches via the wbinvd() instruction. This includes a new IPI so that all CPU caches on all CPUs are flushed for the SMP case. MFC after: 1 month
2006-05-01 21:36:47 +00:00
IDTVEC(invlcache), /* Write back and invalidate cache */
Avoid more than two pending IPI interrupt vectors per local APIC as this may cause deadlocks. This should fix kern/72123. Discussed with: jhb Tested by: Nik Azim Azam, Andy Farkas, Flack Man, Aykut KARA Izzet BESKARDES, Jens Binnewies, Karl Keusgen Approved by: sam (mentor)
2004-12-07 20:15:01 +00:00
IDTVEC(ipi_intr_bitmap_handler), /* Bitmap based IPIs */
New i386 SMP code: - The MP code no longer knows anything specific about an MP Table. Instead, the local APIC code adds CPUs via the cpu_add() function when a local APIC is enumerated by an APIC enumerator. - Don't divide the argument to mp_bootaddress() by 1024 just so that we can turn around and mulitply it by 1024 again. - We no longer panic if SMP is enabled but we are booted on a UP machine. - init_secondary(), the asm code between init_secondary() and ap_init() in mpboot.s and ap_init() have all been merged together in C into init_secondary(). - We now use the cpuid feature bits to determine if we should enable PSE, PGE, or VME on each AP. - Due to the change in the implementation of critical sections, acquire the SMP TLB mutex around a slightly larger chunk of code for TLB shootdowns. - Remove some of the debug code from the original SMP implementation that is no longer used or no longer applies to the new APIC code. - Use a temporary hack to disable the ACPI module until the SMP code has been further reorganized to allow ACPI to work as a module again. - Add a DDB command to dump the interesting contents of the IDT.
2003-11-03 22:32:04 +00:00
IDTVEC(cpustop), /* CPU stops & waits to be restarted */
Remove the support for lazy cr3 switching from i386. amd64 has already this micro-optimization removed. Submitted by: kib
2011-04-30 23:02:17 +00:00
IDTVEC(rendezvous); /* handle CPU rendezvous */
Man the liferafts! Here comes the long awaited SMP -> -current merge! There are various options documented in i386/conf/LINT, there is more to come over the next few days. The kernel should run pretty much "as before" without the options to activate SMP mode. There are a handful of known "loose ends" that need to be fixed, but have been put off since the SMP kernel is in a moderately good condition at the moment. This commit is the result of the tinkering and testing over the last 14 months by many people. A special thanks to Steve Passe for implementing the APIC code!
1997-04-26 11:46:25 +00:00
/* functions in mp_machdep.c */
New i386 SMP code: - The MP code no longer knows anything specific about an MP Table. Instead, the local APIC code adds CPUs via the cpu_add() function when a local APIC is enumerated by an APIC enumerator. - Don't divide the argument to mp_bootaddress() by 1024 just so that we can turn around and mulitply it by 1024 again. - We no longer panic if SMP is enabled but we are booted on a UP machine. - init_secondary(), the asm code between init_secondary() and ap_init() in mpboot.s and ap_init() have all been merged together in C into init_secondary(). - We now use the cpuid feature bits to determine if we should enable PSE, PGE, or VME on each AP. - Due to the change in the implementation of critical sections, acquire the SMP TLB mutex around a slightly larger chunk of code for TLB shootdowns. - Remove some of the debug code from the original SMP implementation that is no longer used or no longer applies to the new APIC code. - Use a temporary hack to disable the ACPI module until the SMP code has been further reorganized to allow ACPI to work as a module again. - Add a DDB command to dump the interesting contents of the IDT.
2003-11-03 22:32:04 +00:00
void cpu_add(u_int apic_id, char boot_cpu);
- Move the code to deal with handling an IPI_STOP IPI out of ipi_nmi_handler() and into a new cpustop_handler() function. Change the Xcpustop IPI_STOP handler to call this function instead of duplicating all the same logic in assembly. - EOI the local APIC for the lapic timer interrupt in C rather than assembly. - Bump the lazypmap IPI counter if COUNT_IPIS is defined in C rather than assembly.
2005-12-05 22:25:41 +00:00
void cpustop_handler(void);
Fixed some style bugs in the removal of __P(()). The main ones were not removing tabs before "__P((", and not outdenting continuation lines to preserve non-KNF lining up of code with parentheses. Switch to KNF formatting and/or rewrap the whole prototype in some cases.
2002-03-23 15:09:35 +00:00
void init_secondary(void);
void ipi_all_but_self(u_int ipi);
don't globally define ipi_bitmap_handler on xen
2008-10-21 08:01:19 +00:00
#ifndef XEN
Tweak how the MD code calls the fooclock() methods some. Instead of passing a pointer to an opaque clockframe structure and requiring the MD code to supply CLKF_FOO() macros to extract needed values out of the opaque structure, just pass the needed values directly. In practice this means passing the pair (usermode, pc) to hardclock() and profclock() and passing the boolean (usermode) to hardclock_cpu() and hardclock_process(). Other details: - Axe clockframe and CLKF_FOO() macros on all architectures. Basically, all the archs were taking a trapframe and converting it into a clockframe one way or another. Now they can just extract the PC and usermode values directly out of the trapframe and pass it to fooclock(). - Renamed hardclock_process() to hardclock_cpu() as the latter is more accurate. - On Alpha, we now run profclock() at hz (profhz == hz) rather than at the slower stathz. - On Alpha, for the TurboLaser machines that don't have an 8254 timecounter, call hardclock() directly. This removes an extra conditional check from every clock interrupt on Alpha on the BSP. There is probably room for even further pruning here by changing Alpha to use the simplified timecounter we use on x86 with the lapic timer since we don't get interrupts from the 8254 on Alpha anyway. - On x86, clkintr() shouldn't ever be called now unless using_lapic_timer is false, so add a KASSERT() to that affect and remove a condition to slightly optimize the non-lapic case. - Change prototypeof arm_handler_execute() so that it's first arg is a trapframe pointer rather than a void pointer for clarity. - Use KCOUNT macro in profclock() to lookup the kernel profiling bucket. Tested on: alpha, amd64, arm, i386, ia64, sparc64 Reviewed by: bde (mostly)
2005-12-22 22:16:09 +00:00
void ipi_bitmap_handler(struct trapframe frame);
don't globally define ipi_bitmap_handler on xen
2008-10-21 08:01:19 +00:00
#endif
Add a new ipi_cpu() function to the MI IPI API that can be used to send an IPI to a specific CPU by its cpuid. Replace calls to ipi_selected() that constructed a mask for a single CPU with calls to ipi_cpu() instead. This will matter more in the future when we transition from cpumask_t to cpuset_t for CPU masks in which case building a CPU mask is more expensive. Submitted by: peter, sbruno Reviewed by: rookie Obtained from: Yahoo! (x86) MFC after: 1 month
2010-08-06 15:36:59 +00:00
void ipi_cpu(int cpu, u_int ipi);
int ipi_nmi_handler(void);
void ipi_selected(cpumask_t cpus, u_int ipi);
New i386 SMP code: - The MP code no longer knows anything specific about an MP Table. Instead, the local APIC code adds CPUs via the cpu_add() function when a local APIC is enumerated by an APIC enumerator. - Don't divide the argument to mp_bootaddress() by 1024 just so that we can turn around and mulitply it by 1024 again. - We no longer panic if SMP is enabled but we are booted on a UP machine. - init_secondary(), the asm code between init_secondary() and ap_init() in mpboot.s and ap_init() have all been merged together in C into init_secondary(). - We now use the cpuid feature bits to determine if we should enable PSE, PGE, or VME on each AP. - Due to the change in the implementation of critical sections, acquire the SMP TLB mutex around a slightly larger chunk of code for TLB shootdowns. - Remove some of the debug code from the original SMP implementation that is no longer used or no longer applies to the new APIC code. - Use a temporary hack to disable the ACPI module until the SMP code has been further reorganized to allow ACPI to work as a module again. - Add a DDB command to dump the interesting contents of the IDT.
2003-11-03 22:32:04 +00:00
u_int mp_bootaddress(u_int);
int mp_grab_cpu_hlt(void);
Add a new 'pmap_invalidate_cache()' to flush the CPU caches via the wbinvd() instruction. This includes a new IPI so that all CPU caches on all CPUs are flushed for the SMP case. MFC after: 1 month
2006-05-01 21:36:47 +00:00
void smp_cache_flush(void);
Revive backed out pmap related changes from Feb 2002. The highlights are: - It actually works this time, honest! - Fine grained TLB shootdowns for SMP on i386. IPI's are very expensive, so try and optimize things where possible. - Introduce ranged shootdowns that can be done as a single IPI. - PG_G support for i386 - Specific-cpu targeted shootdowns. For example, there is no sense in globally purging the TLB cache for where we are stealing a page from the local unshared process on the local cpu. Use pm_active to track this. - Add some instrumentation for the tlb shootdown code. - Rip out SMP code from <machine/cpufunc.h> - Try and fix some very bogus PG_G and PG_PS interactions that were bad enough to cause vm86 bios calls to break. vm86 depended on our existing bugs and this was the cause of the VESA panics last time. - Fix the silly one-line error that caused the 'panic: bad pte' last time. - Fix a couple of other silly one-line errors that should have caused more pain than they did. Some more work is needed: - pmap_{zero,copy}_page[_idle]. These can be done without IPI's if we have a hook in cpu_switch. - The IPI handlers need some cleanup. I have a bogus %ds load that can be avoided. - APTD handling is rather bogus and appears to be a large source of global TLB IPI shootdowns for no really good reason. I see speedups of between 1.5% and ~4% on buildworlds in a while 1 loop. I expect to see a bigger difference when there is significant pageout activity or the system otherwise has memory shortages. I have backed out a few optimizations that I had been using over the last few days in order to be a little more conservative. I'll revisit these again over the next few days as the dust settles. New option: DISABLE_PG_G - In case I missed something.
2002-07-12 07:56:11 +00:00
void smp_invlpg(vm_offset_t addr);
FreeBSD right now support 32 CPUs on all the architectures at least. With the arrival of 128+ cores it is necessary to handle more than that. One of the first thing to change is the support for cpumask_t that needs to handle more than 32 bits masking (which happens now). Some places, however, still assume that cpumask_t is a 32 bits mask. Fix that situation by using always correctly cpumask_t when needed. While here, remove the part under STOP_NMI for the Xen support as it is broken in any case. Additively make ipi_nmi_pending as static. Reviewed by: jhb, kmacy Tested by: Giovanni Trematerra <giovanni dot trematerra at gmail dot com>
2009-05-14 17:43:00 +00:00
void smp_masked_invlpg(cpumask_t mask, vm_offset_t addr);
Revive backed out pmap related changes from Feb 2002. The highlights are: - It actually works this time, honest! - Fine grained TLB shootdowns for SMP on i386. IPI's are very expensive, so try and optimize things where possible. - Introduce ranged shootdowns that can be done as a single IPI. - PG_G support for i386 - Specific-cpu targeted shootdowns. For example, there is no sense in globally purging the TLB cache for where we are stealing a page from the local unshared process on the local cpu. Use pm_active to track this. - Add some instrumentation for the tlb shootdown code. - Rip out SMP code from <machine/cpufunc.h> - Try and fix some very bogus PG_G and PG_PS interactions that were bad enough to cause vm86 bios calls to break. vm86 depended on our existing bugs and this was the cause of the VESA panics last time. - Fix the silly one-line error that caused the 'panic: bad pte' last time. - Fix a couple of other silly one-line errors that should have caused more pain than they did. Some more work is needed: - pmap_{zero,copy}_page[_idle]. These can be done without IPI's if we have a hook in cpu_switch. - The IPI handlers need some cleanup. I have a bogus %ds load that can be avoided. - APTD handling is rather bogus and appears to be a large source of global TLB IPI shootdowns for no really good reason. I see speedups of between 1.5% and ~4% on buildworlds in a while 1 loop. I expect to see a bigger difference when there is significant pageout activity or the system otherwise has memory shortages. I have backed out a few optimizations that I had been using over the last few days in order to be a little more conservative. I'll revisit these again over the next few days as the dust settles. New option: DISABLE_PG_G - In case I missed something.
2002-07-12 07:56:11 +00:00
void smp_invlpg_range(vm_offset_t startva, vm_offset_t endva);
FreeBSD right now support 32 CPUs on all the architectures at least. With the arrival of 128+ cores it is necessary to handle more than that. One of the first thing to change is the support for cpumask_t that needs to handle more than 32 bits masking (which happens now). Some places, however, still assume that cpumask_t is a 32 bits mask. Fix that situation by using always correctly cpumask_t when needed. While here, remove the part under STOP_NMI for the Xen support as it is broken in any case. Additively make ipi_nmi_pending as static. Reviewed by: jhb, kmacy Tested by: Giovanni Trematerra <giovanni dot trematerra at gmail dot com>
2009-05-14 17:43:00 +00:00
void smp_masked_invlpg_range(cpumask_t mask, vm_offset_t startva,
Revive backed out pmap related changes from Feb 2002. The highlights are: - It actually works this time, honest! - Fine grained TLB shootdowns for SMP on i386. IPI's are very expensive, so try and optimize things where possible. - Introduce ranged shootdowns that can be done as a single IPI. - PG_G support for i386 - Specific-cpu targeted shootdowns. For example, there is no sense in globally purging the TLB cache for where we are stealing a page from the local unshared process on the local cpu. Use pm_active to track this. - Add some instrumentation for the tlb shootdown code. - Rip out SMP code from <machine/cpufunc.h> - Try and fix some very bogus PG_G and PG_PS interactions that were bad enough to cause vm86 bios calls to break. vm86 depended on our existing bugs and this was the cause of the VESA panics last time. - Fix the silly one-line error that caused the 'panic: bad pte' last time. - Fix a couple of other silly one-line errors that should have caused more pain than they did. Some more work is needed: - pmap_{zero,copy}_page[_idle]. These can be done without IPI's if we have a hook in cpu_switch. - The IPI handlers need some cleanup. I have a bogus %ds load that can be avoided. - APTD handling is rather bogus and appears to be a large source of global TLB IPI shootdowns for no really good reason. I see speedups of between 1.5% and ~4% on buildworlds in a while 1 loop. I expect to see a bigger difference when there is significant pageout activity or the system otherwise has memory shortages. I have backed out a few optimizations that I had been using over the last few days in order to be a little more conservative. I'll revisit these again over the next few days as the dust settles. New option: DISABLE_PG_G - In case I missed something.
2002-07-12 07:56:11 +00:00
vm_offset_t endva);
void smp_invltlb(void);
FreeBSD right now support 32 CPUs on all the architectures at least. With the arrival of 128+ cores it is necessary to handle more than that. One of the first thing to change is the support for cpumask_t that needs to handle more than 32 bits masking (which happens now). Some places, however, still assume that cpumask_t is a 32 bits mask. Fix that situation by using always correctly cpumask_t when needed. While here, remove the part under STOP_NMI for the Xen support as it is broken in any case. Additively make ipi_nmi_pending as static. Reviewed by: jhb, kmacy Tested by: Giovanni Trematerra <giovanni dot trematerra at gmail dot com>
2009-05-14 17:43:00 +00:00
void smp_masked_invltlb(cpumask_t mask);
Man the liferafts! Here comes the long awaited SMP -> -current merge! There are various options documented in i386/conf/LINT, there is more to come over the next few days. The kernel should run pretty much "as before" without the options to activate SMP mode. There are a handful of known "loose ends" that need to be fixed, but have been put off since the SMP kernel is in a moderately good condition at the moment. This commit is the result of the tinkering and testing over the last 14 months by many people. A special thanks to Steve Passe for implementing the APIC code!
1997-04-26 11:46:25 +00:00
add ipi mapping MFC after: 1 month
2008-09-25 07:09:50 +00:00
#ifdef XEN
void ipi_to_irq_init(void);
Header cleanups and addition of IPI declarations for xen
2008-10-21 06:38:05 +00:00
Fix general issues with IPI support
2008-10-24 07:58:38 +00:00
#define RESCHEDULE_VECTOR 0
#define CALL_FUNCTION_VECTOR 1
Header cleanups and addition of IPI declarations for xen
2008-10-21 06:38:05 +00:00
#define NR_IPIS 2
add ipi mapping MFC after: 1 month
2008-09-25 07:09:50 +00:00
#endif
Modified the PEND_INTS algorithm to fix the ISA INT loss problem. Noticed by: dave adkins <adkin003@gold.tc.umn.edu> and others.
1997-07-28 03:59:54 +00:00
#endif /* !LOCORE */
New i386 SMP code: - The MP code no longer knows anything specific about an MP Table. Instead, the local APIC code adds CPUs via the cpu_add() function when a local APIC is enumerated by an APIC enumerator. - Don't divide the argument to mp_bootaddress() by 1024 just so that we can turn around and mulitply it by 1024 again. - We no longer panic if SMP is enabled but we are booted on a UP machine. - init_secondary(), the asm code between init_secondary() and ap_init() in mpboot.s and ap_init() have all been merged together in C into init_secondary(). - We now use the cpuid feature bits to determine if we should enable PSE, PGE, or VME on each AP. - Due to the change in the implementation of critical sections, acquire the SMP TLB mutex around a slightly larger chunk of code for TLB shootdowns. - Remove some of the debug code from the original SMP implementation that is no longer used or no longer applies to the new APIC code. - Use a temporary hack to disable the ACPI module until the SMP code has been further reorganized to allow ACPI to work as a module again. - Add a DDB command to dump the interesting contents of the IDT.
2003-11-03 22:32:04 +00:00
#endif /* SMP */
The SMP cleanup commit broke UP compiles. Make UP compiles work again.
2000-03-28 18:06:49 +00:00
Change #ifdef KERNEL to #ifdef _KERNEL in the public headers. "KERNEL" is an application space macro and the applications are supposed to be free to use it as they please (but cannot). This is consistant with the other BSD's who made this change quite some time ago. More commits to come.
1999-12-29 04:46:21 +00:00
#endif /* _KERNEL */
Man the liferafts! Here comes the long awaited SMP -> -current merge! There are various options documented in i386/conf/LINT, there is more to come over the next few days. The kernel should run pretty much "as before" without the options to activate SMP mode. There are a handful of known "loose ends" that need to be fixed, but have been put off since the SMP kernel is in a moderately good condition at the moment. This commit is the result of the tinkering and testing over the last 14 months by many people. A special thanks to Steve Passe for implementing the APIC code!
1997-04-26 11:46:25 +00:00
#endif /* _MACHINE_SMP_H_ */
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