1999-04-16 21:22:55 +00:00
|
|
|
/*-
|
|
|
|
* Copyright (c) 1998 Doug Rabson
|
|
|
|
* All rights reserved.
|
|
|
|
*
|
|
|
|
* Redistribution and use in source and binary forms, with or without
|
|
|
|
* modification, are permitted provided that the following conditions
|
|
|
|
* are met:
|
|
|
|
* 1. Redistributions of source code must retain the above copyright
|
|
|
|
* notice, this list of conditions and the following disclaimer.
|
|
|
|
* 2. Redistributions in binary form must reproduce the above copyright
|
|
|
|
* notice, this list of conditions and the following disclaimer in the
|
|
|
|
* documentation and/or other materials provided with the distribution.
|
|
|
|
*
|
|
|
|
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
|
|
|
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
|
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
|
|
|
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
|
|
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
|
|
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
|
|
|
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
|
|
|
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
|
|
|
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
|
|
|
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
|
|
|
* SUCH DAMAGE.
|
|
|
|
*
|
|
|
|
*/
|
2000-08-28 21:48:13 +00:00
|
|
|
/*-
|
|
|
|
* Copyright (c) 1998 The NetBSD Foundation, Inc.
|
|
|
|
* All rights reserved.
|
|
|
|
*
|
|
|
|
* This code is derived from software contributed to The NetBSD Foundation
|
|
|
|
* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
|
|
|
|
* NASA Ames Research Center.
|
|
|
|
*
|
|
|
|
* Redistribution and use in source and binary forms, with or without
|
|
|
|
* modification, are permitted provided that the following conditions
|
|
|
|
* are met:
|
|
|
|
* 1. Redistributions of source code must retain the above copyright
|
|
|
|
* notice, this list of conditions and the following disclaimer.
|
|
|
|
* 2. Redistributions in binary form must reproduce the above copyright
|
|
|
|
* notice, this list of conditions and the following disclaimer in the
|
|
|
|
* documentation and/or other materials provided with the distribution.
|
|
|
|
* 3. All advertising materials mentioning features or use of this software
|
|
|
|
* must display the following acknowledgement:
|
|
|
|
* This product includes software developed by the NetBSD
|
|
|
|
* Foundation, Inc. and its contributors.
|
|
|
|
* 4. Neither the name of The NetBSD Foundation nor the names of its
|
|
|
|
* contributors may be used to endorse or promote products derived
|
|
|
|
* from this software without specific prior written permission.
|
|
|
|
*
|
|
|
|
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
|
|
|
|
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
|
|
|
|
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
|
|
|
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
|
|
|
|
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
|
|
|
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
|
|
|
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
|
|
|
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
|
|
|
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
|
|
|
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
|
|
|
* POSSIBILITY OF SUCH DAMAGE.
|
|
|
|
*/
|
|
|
|
/*
|
|
|
|
* Copyright (c) 1995, 1996 Carnegie-Mellon University.
|
|
|
|
* All rights reserved.
|
|
|
|
*
|
|
|
|
* Author: Chris G. Demetriou
|
|
|
|
*
|
|
|
|
* Permission to use, copy, modify and distribute this software and
|
|
|
|
* its documentation is hereby granted, provided that both the copyright
|
|
|
|
* notice and this permission notice appear in all copies of the
|
|
|
|
* software, derivative works or modified versions, and any portions
|
|
|
|
* thereof, and that both notices appear in supporting documentation.
|
|
|
|
*
|
|
|
|
* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
|
|
|
|
* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
|
|
|
|
* FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
|
|
|
|
*
|
|
|
|
* Carnegie Mellon requests users of this software to return to
|
|
|
|
*
|
|
|
|
* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
|
|
|
|
* School of Computer Science
|
|
|
|
* Carnegie Mellon University
|
|
|
|
* Pittsburgh PA 15213-3890
|
|
|
|
*
|
|
|
|
* any improvements or extensions that they make and grant Carnegie the
|
|
|
|
* rights to redistribute these changes.
|
|
|
|
*/
|
1999-04-16 21:22:55 +00:00
|
|
|
|
2003-06-10 17:31:31 +00:00
|
|
|
#include <sys/cdefs.h>
|
|
|
|
__FBSDID("$FreeBSD$");
|
|
|
|
|
1999-04-16 21:22:55 +00:00
|
|
|
#include <sys/param.h>
|
|
|
|
#include <sys/systm.h>
|
|
|
|
#include <sys/kernel.h>
|
|
|
|
#include <sys/module.h>
|
|
|
|
#include <sys/bus.h>
|
|
|
|
#include <machine/bus.h>
|
2000-05-10 18:54:28 +00:00
|
|
|
#include <machine/md_var.h>
|
1999-04-16 21:22:55 +00:00
|
|
|
#include <sys/rman.h>
|
2003-08-22 07:20:27 +00:00
|
|
|
#include <dev/pci/pcireg.h>
|
|
|
|
#include <dev/pci/pcivar.h>
|
2001-06-01 17:39:11 +00:00
|
|
|
#include <machine/cpuconf.h>
|
2000-08-28 21:48:13 +00:00
|
|
|
#include <machine/bwx.h>
|
|
|
|
#include <machine/swiz.h>
|
|
|
|
|
|
|
|
#include <alpha/pci/ciareg.h>
|
|
|
|
#include <alpha/pci/ciavar.h>
|
2001-05-23 19:44:17 +00:00
|
|
|
#include <alpha/pci/pcibus.h>
|
|
|
|
#include <alpha/isa/isavar.h>
|
2000-08-28 21:48:13 +00:00
|
|
|
|
|
|
|
#include "alphapci_if.h"
|
|
|
|
#include "pcib_if.h"
|
|
|
|
|
|
|
|
#define KV(pa) ALPHA_PHYS_TO_K0SEG(pa)
|
1999-04-16 21:22:55 +00:00
|
|
|
|
|
|
|
static devclass_t pcib_devclass;
|
|
|
|
|
|
|
|
static int
|
|
|
|
cia_pcib_probe(device_t dev)
|
|
|
|
{
|
|
|
|
device_set_desc(dev, "2117x PCI host bus adapter");
|
|
|
|
|
2001-05-23 19:44:17 +00:00
|
|
|
pci_init_resources();
|
1999-12-03 08:41:24 +00:00
|
|
|
device_add_child(dev, "pci", 0);
|
1999-04-16 21:22:55 +00:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
1999-05-20 15:33:33 +00:00
|
|
|
static int
|
|
|
|
cia_pcib_read_ivar(device_t dev, device_t child, int which, u_long *result)
|
|
|
|
{
|
2000-08-28 21:48:13 +00:00
|
|
|
switch (which) {
|
|
|
|
case PCIB_IVAR_BUS:
|
1999-05-20 15:33:33 +00:00
|
|
|
*result = 0;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
return ENOENT;
|
|
|
|
}
|
|
|
|
|
2000-08-28 21:48:13 +00:00
|
|
|
static void *
|
|
|
|
cia_pcib_cvt_dense(device_t dev, vm_offset_t addr)
|
|
|
|
{
|
|
|
|
addr &= 0xffffffffUL;
|
|
|
|
return (void *) KV(addr | CIA_PCI_DENSE);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void *
|
|
|
|
cia_pcib_cvt_bwx(device_t dev, vm_offset_t addr)
|
|
|
|
{
|
2000-09-02 01:05:37 +00:00
|
|
|
if (chipset_bwx) {
|
2000-08-28 21:48:13 +00:00
|
|
|
addr &= 0xffffffffUL;
|
|
|
|
return (void *) KV(addr | CIA_EV56_BWMEM);
|
|
|
|
} else {
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
cia_clear_abort(void)
|
|
|
|
{
|
|
|
|
/*
|
|
|
|
* Some (apparently-common) revisions of EB164 and AlphaStation
|
|
|
|
* firmware do the Wrong thing with PCI master and target aborts,
|
|
|
|
* which are caused by accesing the configuration space of devices
|
|
|
|
* that don't exist (for example).
|
|
|
|
*
|
|
|
|
* To work around this, we clear the CIA error register's PCI
|
|
|
|
* master and target abort bits before touching PCI configuration
|
|
|
|
* space and check it afterwards. If it indicates a master or target
|
|
|
|
* abort, the device wasn't there so we return 0xffffffff.
|
|
|
|
*/
|
|
|
|
REGVAL(CIA_CSR_CIA_ERR) = CIA_ERR_RCVD_MAS_ABT|CIA_ERR_RCVD_TAR_ABT;
|
|
|
|
alpha_mb();
|
|
|
|
alpha_pal_draina();
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
cia_check_abort(void)
|
|
|
|
{
|
|
|
|
u_int32_t errbits;
|
|
|
|
int ba = 0;
|
|
|
|
|
|
|
|
alpha_pal_draina();
|
|
|
|
alpha_mb();
|
|
|
|
errbits = REGVAL(CIA_CSR_CIA_ERR);
|
|
|
|
if (errbits & (CIA_ERR_RCVD_MAS_ABT|CIA_ERR_RCVD_TAR_ABT))
|
|
|
|
ba = 1;
|
|
|
|
|
|
|
|
if (errbits) {
|
|
|
|
REGVAL(CIA_CSR_CIA_ERR) = errbits;
|
|
|
|
alpha_mb();
|
|
|
|
alpha_pal_draina();
|
|
|
|
}
|
|
|
|
|
|
|
|
return ba;
|
|
|
|
}
|
|
|
|
|
|
|
|
#define CIA_BWX_CFGADDR(b, s, f, r) \
|
|
|
|
KV(((b) ? CIA_EV56_BWCONF1 : CIA_EV56_BWCONF0) \
|
|
|
|
| ((b) << 16) | ((s) << 11) | ((f) << 8) | (r))
|
|
|
|
|
|
|
|
#define BWX_CFGREAD(b, s, f, r, width, type, op) do { \
|
|
|
|
vm_offset_t va = CIA_BWX_CFGADDR(b, s, f, r); \
|
|
|
|
type data; \
|
|
|
|
cia_clear_abort(); \
|
|
|
|
if (badaddr((caddr_t)va, width)) { \
|
|
|
|
cia_check_abort(); \
|
|
|
|
return ~0; \
|
|
|
|
} \
|
|
|
|
data = op(va); \
|
|
|
|
if (cia_check_abort()) \
|
|
|
|
return ~0; \
|
|
|
|
return data; \
|
|
|
|
} while (0)
|
|
|
|
|
|
|
|
#define BWX_CFGWRITE(b, s, f, r, data, width, type, op) do { \
|
|
|
|
vm_offset_t va = CIA_BWX_CFGADDR(b, s, f, r); \
|
|
|
|
cia_clear_abort(); \
|
|
|
|
if (badaddr((caddr_t)va, width)) return; \
|
|
|
|
op(va, data); \
|
|
|
|
cia_check_abort(); \
|
|
|
|
return; \
|
|
|
|
} while (0)
|
|
|
|
|
|
|
|
#define CIA_SWIZ_CFGOFF(b, s, f, r) \
|
|
|
|
(((b) << 16) | ((s) << 11) | ((f) << 8) | (r))
|
|
|
|
|
|
|
|
/* when doing a type 1 pci configuration space access, we
|
|
|
|
* must set a bit in the CIA_CSR_CFG register & clear it
|
|
|
|
* when we're done
|
|
|
|
*/
|
|
|
|
|
|
|
|
#define CIA_TYPE1_SETUP(b,s,old_cfg) if((b)) { \
|
|
|
|
do { \
|
|
|
|
(s) = splhigh(); \
|
|
|
|
(old_cfg) = REGVAL(CIA_CSR_CFG); \
|
|
|
|
alpha_mb(); \
|
|
|
|
REGVAL(CIA_CSR_CFG) = (old_cfg) | 0x1; \
|
|
|
|
alpha_mb(); \
|
|
|
|
} while(0); \
|
|
|
|
}
|
|
|
|
|
|
|
|
#define CIA_TYPE1_TEARDOWN(b,s,old_cfg) if((b)) { \
|
|
|
|
do { \
|
|
|
|
alpha_mb(); \
|
|
|
|
REGVAL(CIA_CSR_CFG) = (old_cfg); \
|
|
|
|
alpha_mb(); \
|
|
|
|
splx((s)); \
|
|
|
|
} while(0); \
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* From NetBSD:
|
|
|
|
* Some (apparently-common) revisions of EB164 and AlphaStation
|
|
|
|
* firmware do the Wrong thing with PCI master and target aborts,
|
|
|
|
* which are caused by accesing the configuration space of devices
|
|
|
|
* that don't exist (for example).
|
|
|
|
*
|
|
|
|
* To work around this, we clear the CIA error register's PCI
|
|
|
|
* master and target abort bits before touching PCI configuration
|
|
|
|
* space and check it afterwards. If it indicates a master or target
|
|
|
|
* abort, the device wasn't there so we return ~0
|
|
|
|
*/
|
|
|
|
|
|
|
|
|
|
|
|
#define SWIZ_CFGREAD(b, s, f, r, width, type) do { \
|
|
|
|
type val = ~0; \
|
|
|
|
int ipl = 0; \
|
|
|
|
u_int32_t old_cfg = 0, errbits; \
|
|
|
|
vm_offset_t off = CIA_SWIZ_CFGOFF(b, s, f, r); \
|
|
|
|
vm_offset_t kv = SPARSE_##width##_ADDRESS(KV(CIA_PCI_CONF), off); \
|
|
|
|
REGVAL(CIA_CSR_CIA_ERR) = CIA_ERR_RCVD_MAS_ABT|CIA_ERR_RCVD_TAR_ABT; \
|
|
|
|
alpha_mb(); \
|
|
|
|
CIA_TYPE1_SETUP(b,ipl,old_cfg); \
|
|
|
|
if (!badaddr((caddr_t)kv, sizeof(type))) { \
|
|
|
|
val = SPARSE_##width##_EXTRACT(off, SPARSE_READ(kv)); \
|
|
|
|
} \
|
|
|
|
CIA_TYPE1_TEARDOWN(b,ipl,old_cfg); \
|
|
|
|
errbits = REGVAL(CIA_CSR_CIA_ERR); \
|
|
|
|
if (errbits & (CIA_ERR_RCVD_MAS_ABT|CIA_ERR_RCVD_TAR_ABT)) \
|
|
|
|
val = ~0; \
|
|
|
|
if (errbits) { \
|
|
|
|
REGVAL(CIA_CSR_CIA_ERR) = errbits; \
|
|
|
|
alpha_mb(); \
|
|
|
|
alpha_pal_draina(); \
|
|
|
|
} \
|
|
|
|
return val; \
|
|
|
|
} while (0)
|
|
|
|
|
|
|
|
#define SWIZ_CFGWRITE(b, s, f, r, data, width, type) do { \
|
|
|
|
int ipl = 0; \
|
|
|
|
u_int32_t old_cfg = 0; \
|
|
|
|
vm_offset_t off = CIA_SWIZ_CFGOFF(b, s, f, r); \
|
|
|
|
vm_offset_t kv = SPARSE_##width##_ADDRESS(KV(CIA_PCI_CONF), off); \
|
|
|
|
alpha_mb(); \
|
|
|
|
CIA_TYPE1_SETUP(b,ipl,old_cfg); \
|
|
|
|
if (!badaddr((caddr_t)kv, sizeof(type))) { \
|
|
|
|
SPARSE_WRITE(kv, SPARSE_##width##_INSERT(off, data)); \
|
|
|
|
alpha_wmb(); \
|
|
|
|
} \
|
|
|
|
CIA_TYPE1_TEARDOWN(b,ipl,old_cfg); \
|
|
|
|
return; \
|
|
|
|
} while (0)
|
|
|
|
|
|
|
|
static u_int32_t
|
2000-12-01 15:27:48 +00:00
|
|
|
cia_pcib_swiz_read_config(u_int b, u_int s, u_int f, u_int reg, int width)
|
2000-08-28 21:48:13 +00:00
|
|
|
{
|
|
|
|
switch (width) {
|
|
|
|
case 1:
|
|
|
|
SWIZ_CFGREAD(b, s, f, reg, BYTE, u_int8_t);
|
2000-08-31 16:19:27 +00:00
|
|
|
break;
|
2000-08-28 21:48:13 +00:00
|
|
|
case 2:
|
|
|
|
SWIZ_CFGREAD(b, s, f, reg, WORD, u_int16_t);
|
2000-08-31 16:19:27 +00:00
|
|
|
break;
|
2000-08-28 21:48:13 +00:00
|
|
|
case 4:
|
|
|
|
SWIZ_CFGREAD(b, s, f, reg, LONG, u_int32_t);
|
|
|
|
}
|
|
|
|
return ~0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
2000-12-01 15:27:48 +00:00
|
|
|
cia_pcib_swiz_write_config(u_int b, u_int s, u_int f, u_int reg,
|
2000-08-28 21:48:13 +00:00
|
|
|
u_int32_t val, int width)
|
|
|
|
{
|
|
|
|
switch (width) {
|
|
|
|
case 1:
|
|
|
|
SWIZ_CFGWRITE(b, s, f, reg, val, BYTE, u_int8_t);
|
2000-08-31 16:19:27 +00:00
|
|
|
break;
|
2000-08-28 21:48:13 +00:00
|
|
|
case 2:
|
|
|
|
SWIZ_CFGWRITE(b, s, f, reg, val, WORD, u_int16_t);
|
2000-08-31 16:19:27 +00:00
|
|
|
break;
|
2000-08-28 21:48:13 +00:00
|
|
|
case 4:
|
|
|
|
SWIZ_CFGWRITE(b, s, f, reg, val, LONG, u_int32_t);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static u_int32_t
|
2000-12-01 15:27:48 +00:00
|
|
|
cia_pcib_bwx_read_config(u_int b, u_int s, u_int f, u_int reg, int width)
|
2000-08-28 21:48:13 +00:00
|
|
|
{
|
|
|
|
switch (width) {
|
|
|
|
case 1:
|
|
|
|
BWX_CFGREAD(b, s, f, reg, 1, u_int8_t, ldbu);
|
2000-08-31 16:19:27 +00:00
|
|
|
break;
|
2000-08-28 21:48:13 +00:00
|
|
|
case 2:
|
|
|
|
BWX_CFGREAD(b, s, f, reg, 2, u_int16_t, ldwu);
|
2000-08-31 16:19:27 +00:00
|
|
|
break;
|
2000-08-28 21:48:13 +00:00
|
|
|
case 4:
|
|
|
|
BWX_CFGREAD(b, s, f, reg, 4, u_int32_t, ldl);
|
|
|
|
}
|
|
|
|
return ~0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
2000-12-01 15:27:48 +00:00
|
|
|
cia_pcib_bwx_write_config(u_int b, u_int s, u_int f, u_int reg,
|
|
|
|
u_int32_t val, u_int width)
|
2000-08-28 21:48:13 +00:00
|
|
|
{
|
|
|
|
switch (width) {
|
|
|
|
case 1:
|
|
|
|
BWX_CFGWRITE(b, s, f, reg, val, 1, u_int8_t, stb);
|
2000-08-31 16:19:27 +00:00
|
|
|
break;
|
2000-08-28 21:48:13 +00:00
|
|
|
case 2:
|
|
|
|
BWX_CFGWRITE(b, s, f, reg, val, 2, u_int16_t, stw);
|
2000-08-31 16:19:27 +00:00
|
|
|
break;
|
2000-08-28 21:48:13 +00:00
|
|
|
case 4:
|
|
|
|
BWX_CFGWRITE(b, s, f, reg, val, 4, u_int32_t, stl);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
cia_pcib_maxslots(device_t dev)
|
|
|
|
{
|
|
|
|
return 31;
|
|
|
|
}
|
|
|
|
|
|
|
|
static u_int32_t
|
|
|
|
cia_pcib_read_config(device_t dev, int b, int s, int f,
|
|
|
|
int reg, int width)
|
|
|
|
{
|
2001-06-01 17:39:11 +00:00
|
|
|
pcicfgregs cfg;
|
|
|
|
|
|
|
|
if ((reg == PCIR_INTLINE) && (width == 1) &&
|
|
|
|
(platform.pci_intr_map != NULL)) {
|
|
|
|
cfg.bus = b;
|
|
|
|
cfg.slot = s;
|
|
|
|
cfg.func = f;
|
|
|
|
cfg.intline = 255;
|
2001-06-10 19:18:51 +00:00
|
|
|
cfg.intpin =
|
|
|
|
cia_pcib_read_config(dev, b, s, f, PCIR_INTPIN, 1);
|
2001-06-01 17:39:11 +00:00
|
|
|
platform.pci_intr_map((void *)&cfg);
|
|
|
|
if (cfg.intline != 255)
|
|
|
|
return cfg.intline;
|
|
|
|
}
|
|
|
|
|
2000-09-02 01:05:37 +00:00
|
|
|
if (chipset_bwx)
|
2000-08-28 21:48:13 +00:00
|
|
|
return cia_pcib_bwx_read_config(b, s, f, reg, width);
|
|
|
|
else
|
|
|
|
return cia_pcib_swiz_read_config(b, s, f, reg, width);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
cia_pcib_write_config(device_t dev, int b, int s, int f,
|
|
|
|
int reg, u_int32_t val, int width)
|
|
|
|
{
|
2000-09-02 01:05:37 +00:00
|
|
|
if (chipset_bwx)
|
2000-08-28 21:48:13 +00:00
|
|
|
cia_pcib_bwx_write_config(b, s, f, reg, val, width);
|
|
|
|
else
|
|
|
|
cia_pcib_swiz_write_config(b, s, f, reg, val, width);
|
|
|
|
}
|
|
|
|
|
1999-04-16 21:22:55 +00:00
|
|
|
static device_method_t cia_pcib_methods[] = {
|
|
|
|
/* Device interface */
|
|
|
|
DEVMETHOD(device_probe, cia_pcib_probe),
|
|
|
|
DEVMETHOD(device_attach, bus_generic_attach),
|
|
|
|
|
|
|
|
/* Bus interface */
|
|
|
|
DEVMETHOD(bus_print_child, bus_generic_print_child),
|
1999-05-20 15:33:33 +00:00
|
|
|
DEVMETHOD(bus_read_ivar, cia_pcib_read_ivar),
|
2002-02-28 18:18:41 +00:00
|
|
|
DEVMETHOD(bus_alloc_resource, alpha_pci_alloc_resource),
|
2001-05-23 19:44:17 +00:00
|
|
|
DEVMETHOD(bus_release_resource, pci_release_resource),
|
|
|
|
DEVMETHOD(bus_activate_resource, pci_activate_resource),
|
|
|
|
DEVMETHOD(bus_deactivate_resource, pci_deactivate_resource),
|
2000-05-10 18:54:28 +00:00
|
|
|
DEVMETHOD(bus_setup_intr, alpha_platform_pci_setup_intr),
|
|
|
|
DEVMETHOD(bus_teardown_intr, alpha_platform_pci_teardown_intr),
|
1999-04-16 21:22:55 +00:00
|
|
|
|
2000-08-28 21:48:13 +00:00
|
|
|
/* alphapci interface */
|
|
|
|
DEVMETHOD(alphapci_cvt_dense, cia_pcib_cvt_dense),
|
|
|
|
DEVMETHOD(alphapci_cvt_bwx, cia_pcib_cvt_bwx),
|
|
|
|
|
|
|
|
/* pcib interface */
|
|
|
|
DEVMETHOD(pcib_maxslots, cia_pcib_maxslots),
|
|
|
|
DEVMETHOD(pcib_read_config, cia_pcib_read_config),
|
|
|
|
DEVMETHOD(pcib_write_config, cia_pcib_write_config),
|
2000-12-08 22:11:23 +00:00
|
|
|
DEVMETHOD(pcib_route_interrupt, alpha_pci_route_interrupt),
|
2000-08-28 21:48:13 +00:00
|
|
|
|
1999-04-16 21:22:55 +00:00
|
|
|
{ 0, 0 }
|
|
|
|
};
|
|
|
|
|
|
|
|
static driver_t cia_pcib_driver = {
|
|
|
|
"pcib",
|
|
|
|
cia_pcib_methods,
|
|
|
|
1,
|
|
|
|
};
|
|
|
|
|
|
|
|
DRIVER_MODULE(pcib, cia, cia_pcib_driver, pcib_devclass, 0, 0);
|