1996-06-14 10:04:54 +00:00
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/*-
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* Copyright (c) 1990 The Regents of the University of California.
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* All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* William Jolitz.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* from: @(#)isa.h 5.7 (Berkeley) 5/9/91
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1999-08-28 01:08:13 +00:00
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* $FreeBSD$
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1996-06-14 10:04:54 +00:00
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*/
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#ifndef _PC98_PC98_PC98_H_
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#define _PC98_PC98_PC98_H_
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/* BEWARE: Included in both assembler and C code */
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/*
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* PC98 Bus conventions
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* modified for PC9801 by A.Kojima F.Ukai M.Ishii
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* Kyoto University Microcomputer Club (KMC)
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*/
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/*
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* Input / Output Port Assignments
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*/
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1996-09-10 09:39:22 +00:00
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#ifndef IO_ISABEGIN
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1996-06-14 10:04:54 +00:00
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#define IO_ISABEGIN 0x000 /* 0x000 - Beginning of I/O Registers */
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/* PC98 IO address ... very dirty (^_^; */
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1999-06-25 15:17:20 +00:00
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#define IO_ICU1 0x000 /* 8259A Interrupt Controller #1 */
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#define IO_DMA 0x001 /* 8237A DMA Controller */
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#define IO_ICU2 0x008 /* 8259A Interrupt Controller #2 */
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#define IO_RTC 0x020 /* 4990A RTC */
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#define IO_DMAPG 0x021 /* DMA Page Registers */
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#define IO_COM1 0x030 /* 8251A RS232C serial I/O (int) */
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#define IO_SYSPORT 0x031 /* 8255A System Port */
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#define IO_PPI 0x035 /* Programmable Peripheral Interface */
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#define IO_LPT 0x040 /* 8255A Printer Port */
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#define IO_KBD 0x041 /* 8251A Keyboard */
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#define IO_NMI 0x050 /* NMI Control */
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#define IO_WAIT 0x05F /* WAIT 0.6 us */
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#define IO_GDC1 0x060 /* 7220 GDC Text Control */
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#define IO_TIMER1 0x071 /* 8253C Timer */
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#define IO_SASI 0x080 /* SASI Hard Disk Controller */
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#define IO_FD1 0x090 /* 765A 1MB FDC */
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#define IO_GDC2 0x0A0 /* 7220 GDC Graphic Control */
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#define IO_CGROM 0x0A1 /* Character ROM */
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#define IO_COM2 0x0B1 /* 8251A RS232C serial I/O (ext) */
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#define IO_COM3 0x0B9 /* 8251A RS232C serial I/O (ext) */
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#define IO_FDPORT 0x0BE /* FD I/F port (1M<->640K,EMTON) */
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#define IO_FD2 0x0C8 /* 765A 640KB FDC */
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#define IO_SIO1 0x0D0 /* MC16550II ext RS232C */
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#define IO_REEST 0x0F0 /* CPU FPU reset */
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#define IO_A2OEN 0x0F2 /* A20 enable */
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#define IO_A20CT 0x0F6 /* A20 control enable/disable */
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#define IO_NPX 0x0F8 /* Numeric Coprocessor */
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1996-09-10 09:39:22 +00:00
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#define IO_SOUND 0x188 /* YM2203 FM sound board */
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1999-06-25 15:17:20 +00:00
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#define IO_EGC 0x4A0 /* 7220 GDC Graphic Control */
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#define IO_SCSI 0xCC0 /* SCSI Controller */
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#define IO_SIO2 0x8D0 /* MC16550II ext RS232C */
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#define IO_BEEPF 0x3FDB /* beep frequency */
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#define IO_MOUSE 0x7FD9 /* mouse */
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#define IO_BMS 0x7FD9 /* Bus Mouse */
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#define IO_MSE 0x7FD9 /* Bus Mouse */
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#define IO_MOUSETM 0xDFBD /* mouse timer */
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#define IO_WD1_NEC 0x640 /* 98note IDE Hard disk controller */
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#define IO_WD1_EPSON 0x80 /* 386note Hard disk controller */
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1996-06-14 10:04:54 +00:00
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#define IO_WD1 IO_WD1_NEC /* IDE Hard disk controller */
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1996-09-10 09:39:22 +00:00
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#define IO_ISAEND 0xFFFF /* - 0x3FF End of I/O Registers */
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#endif /* !IO_ISABEGIN */
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1996-06-14 10:04:54 +00:00
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/*
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* Input / Output Port Sizes - these are from several sources, and tend
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* to be the larger of what was found, ie COM ports can be 4, but some
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* boards do not fully decode the address, thus 8 ports are used.
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*/
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1996-09-10 09:39:22 +00:00
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#ifndef IO_ISASIZES
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#define IO_ISASIZES
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1996-06-14 10:04:54 +00:00
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1999-06-25 15:17:20 +00:00
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#define IO_ASCSIZE 5 /* AmiScan GI1904-based hand scanner */
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1996-06-14 10:04:54 +00:00
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#define IO_CGASIZE 16 /* CGA controllers */
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1999-06-25 15:17:20 +00:00
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#define IO_COMSIZE 8 /* 8250, 16X50 com controllers (4?) */
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1996-06-14 10:04:54 +00:00
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#define IO_DMASIZE 16 /* 8237 DMA controllers */
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#define IO_DPGSIZE 32 /* 74LS612 DMA page registers */
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1999-06-25 15:17:20 +00:00
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#define IO_EISASIZE 4096 /* EISA controllers */
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1996-06-14 10:04:54 +00:00
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#define IO_FDCSIZE 8 /* Nec765 floppy controllers */
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#define IO_GAMSIZE 16 /* AT compatible game controllers */
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1999-06-25 15:17:20 +00:00
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#define IO_GSCSIZE 8 /* GeniScan GS-4500G hand scanner */
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1996-06-14 10:04:54 +00:00
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#define IO_ICUSIZE 16 /* 8259A interrupt controllers */
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#define IO_KBDSIZE 16 /* 8042 Keyboard controllers */
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#define IO_LPTSIZE 8 /* LPT controllers, some use only 4 */
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#define IO_MDASIZE 16 /* Monochrome display controllers */
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1999-06-25 15:17:20 +00:00
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#define IO_NPXSIZE 16 /* 80387/80487 NPX registers */
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#define IO_PMPSIZE 2 /* 82347 power management peripheral */
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#define IO_PSMSIZE 5 /* 8042 Keyboard controllers */
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1996-06-14 10:04:54 +00:00
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#define IO_RTCSIZE 16 /* CMOS real time clock, NMI control */
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#define IO_TMRSIZE 16 /* 8253 programmable timers */
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#define IO_VGASIZE 16 /* VGA controllers */
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1999-06-25 15:17:20 +00:00
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#define IO_WDCSIZE 8 /* WD compatible disk controllers */
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1996-06-14 10:04:54 +00:00
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1996-09-10 09:39:22 +00:00
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#endif /* !IO_ISASIZES */
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1996-06-14 10:04:54 +00:00
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/*
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* Input / Output Memory Physical Addresses
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*/
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#ifndef IOM_BEGIN
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1999-06-25 15:17:20 +00:00
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#define IOM_BEGIN 0x0A0000 /* Start of I/O Memory "hole" */
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#define IOM_END 0x100000 /* End of I/O Memory "hole" */
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1996-06-14 10:04:54 +00:00
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#define IOM_SIZE (IOM_END - IOM_BEGIN)
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1999-06-25 15:17:20 +00:00
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#endif /* !IOM_BEGIN */
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1996-06-14 10:04:54 +00:00
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/*
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* RAM Physical Address Space (ignoring the above mentioned "hole")
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*/
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#ifndef RAM_BEGIN
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#define RAM_BEGIN 0x0000000 /* Start of RAM Memory */
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#ifdef EPSON_BOUNCEDMA
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#define RAM_END 0x0f00000 /* End of EPSON GR?? RAM Memory */
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#else
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#define RAM_END 0x1000000 /* End of RAM Memory */
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#endif
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#define RAM_SIZE (RAM_END - RAM_BEGIN)
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1996-09-10 09:39:22 +00:00
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#endif /* !RAM_BEGIN */
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1996-06-14 10:04:54 +00:00
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#ifndef PC98 /* IBM-PC */
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/*
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* Oddball Physical Memory Addresses
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*/
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#ifndef COMPAQ_RAMRELOC
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1999-06-25 15:17:20 +00:00
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#define COMPAQ_RAMRELOC 0x80C00000 /* Compaq RAM relocation/diag */
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#define COMPAQ_RAMSETUP 0x80C00002 /* Compaq RAM setup */
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1996-06-14 10:04:54 +00:00
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#define WEITEK_FPU 0xC0000000 /* WTL 2167 */
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#define CYRIX_EMC 0xC0000000 /* Cyrix EMC */
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1999-06-25 15:17:20 +00:00
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#endif /* !COMPAQ_RAMRELOC */
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1996-06-14 10:04:54 +00:00
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#endif
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1996-09-03 10:24:29 +00:00
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#define M_NEC_PC98 0x0001
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#define M_EPSON_PC98 0x0002
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#define M_NOT_H98 0x0010
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#define M_H98 0x0020
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#define M_NOTE 0x0040
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#define M_NORMAL 0x1000
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#define M_8M 0x8000
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1996-09-10 09:39:22 +00:00
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/*
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* Obtained from NetBSD/pc98
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*/
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1996-10-09 21:47:16 +00:00
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#define MADDRUNK -1
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#define IRQUNK 0
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#define DRQUNK -1
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1996-09-10 09:39:22 +00:00
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1996-06-14 10:04:54 +00:00
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#endif /* !_PC98_PC98_PC98_H_ */
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